Transistor

History
▪ In the nineteenth century, scientists were rarely inventors: Samuel F.B. Morse,
Alexander Graham Bell, Thomas Alva Edison
▪ In the twentieth century, scientists invaded the domain of invention: John Fleming
invented the vacuum diode tube and Lee De Forest invented the triode tube
▪ On December 23, 1947, however, the electronics industry was to experience the advent
of a completely new direction of interest and development. It was on the afternoon of
this day that Walter H. Brattain and John Bardeen demonstrated the amplifying action
of the first transistor at the Bell Telephone Laboratories.

Co-inventors of the first transistor at Bell Laboratories:

▪ Dr. Shockley
 Born: London, England, 1910
 PhD Harvard, 1936
▪ Dr. Bardeen
 Born: Madison,Wisconsin, 1908
 PhD Princeton, 1936
▪ Dr. Brattain
 Born: Amoy, China 1902
 PhD University of Minnesota, 1928
All shared the Nobel Prize in1956 for this contribution

William B. Shockley (1910-1989)

▪ Known as the “Father of the Transistor”
▪ joined Bell Labs in 1936 in the vacuum tube department (solid state physicist)
▪ Moved to the semiconductor laboratory:
 “It has today occurred to me that an amplifier using semiconductors rather than
vacuum tubes is in principle possible.”
John Bardeen (1908-1991)
▪ Physicist, Naval Ordnance Laboratory 1941-1945
▪ Research Physicist, Bell Telephone Laboratories 1945-1951 (theorist)
▪ Professor of Electrical Engineering,
 University of Illinois, 1951-1978
▪ Nobel Prize in Physics: 1956 and 1972
 Transistor (1956) and Superconductivity (1972)
 “I knew the transistor was important, but I never foresaw the revolution in
electronics it would bring.”
Walter Houser Brattain
▪ Experimental physicist who also worked on vacuum tubes
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▪ Joined Shockley and Bardeen in semiconductor research.

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Nobel Prize in 1956
▪ Shockley, Brattain and Bardeen start working with p- and n- type germanium and
silicon semiconductors in 1946
▪ Bardeen and Brattain put together the first transistor in December 1947:
 a point-contact transistor consisting of a single germanium crystal with a p-
and an n- zone. Two wires made contact with the crystal near the junction
between the two zones like the “whiskers” of a crystal-radio set.

The First Transistor: Point-contact transistor

A point-contact transistor was the

first type of solid state electronic
transistor ever constructed.

It was made by researchers John

Bardeen & Walter Houser Brattain
at Bell Laboratories in December
1947.

The point-contact transistor was

commercialized and sold by Western Electric
and others but was rather quickly superseded
by the junction transistor.

▪ Shockley immediately set out to define the effects that they had observed, i.e., to
explain the physics of transistors
▪ A few months later, Shockley devised the junction transistor, a true solid-state device
which did not need the “whiskers” of the point-contact transistor.
▪ AT&T licensed the transistor very cheaply to other manufacturers and waived patent
rights for the use of transistors in hearing aids, in the spirit of its founder, Alexander
Graham Bell

The Junction Transistor

▪ First BJT was invented early in 1948, only weeks after the point contact transistor.
▪ Initially known simply as the Junction Transistor.
▪ It did not become practical until the early 1950s.
▪ The term “bipolar” was tagged onto the name to distinguish the fact that both carrier
types play important roles in the operation.
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▪ Field Effect Transistors (FETs) are “unipolar” transistors since their operation
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depends primarily on a single carrier type.

Manufacturing transistors on a chip
▪ Shockley Semiconductor Laboratories, Palo Alto, CA (1954)
 the beginnings of “Silicon Valley”
▪ Fairchild Semiconductors founded in Mountain View, CA (1957) by eight Shockley
employees including Gordon Moore and Robert Noyce.
▪ Bell Labs had made several improvements in the manufacturing of crystals of silicon
and germanium with the impurities needed to create semiconductors
▪ Jack Kilby worked for Texas Instruments
▪ Conceived of a manufacturing method that allowed the miniaturization of electronic
circuits on semiconductor chips, called integrated circuits or ICs.
▪ Kilby had reduced the transistor to the size of a match head
▪ Texas Instruments sold these for $450.

▪ Due to improvements in manufacturing, integrated circuits became smaller and smaller

▪ Gordon Moore observed that “the number of transistors on a chip seems to double every
year….”
 Moore’s Law: the number of transistors on a chip seems to double every 18
months, while the price remains the same.
 Grosch’s law for mainframes: every year, the power of computers doubles
while the price is cut in half

Transistors
▪ Two main categories of transistors:
 Bipolar junction transistors (BJTs)
 Field effect transistors (FETs).
▪ Transistors have 3 terminals where the application of current (BJT) or voltage (FET)
to the input terminal increases the amount of charge in the active region.
▪ The physics of "transistor action" is quite different for the BJT and FET.
▪ In analog circuits, transistors are used in amplifiers and linear regulated power
supplies.
▪ In digital circuits they function as electrical switches, including logic gates, random
access memory (RAM), and microprocessors.

Essential component of many electronic circuits

▪ used in amps, oscillators, digital computers
▪ provide power gain, voltage gain, current gain
▪ IC's composed of transistor arrays fabricated onto single chip of Si.
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Bipolar Junction Transistors (BJT)
▪ A bipolar transistor essentially consists of a pair of PN Junction diodes that are joined
back-to-back.
▪ There are therefore two kinds of BJT, the NPN and PNP varieties.
▪ The three layers of the sandwich are conventionally called the Collector, Base, and
Emitter.

 arrowhead on emitter shows direction of conventional current flow

Three regions of BJT
a. Base
Region to which carriers flow from emitter to collector
1017 dopants/cm3
Moderately doped
b. Emitter
Region from which carriers flow
1019 dopants/cm3
Heavily doped
c. Collector
Region to which carriers flow
1015 dopants/cm3
Lightly doped
Largest
The First BJT

Transistor Size (3/8”L X 5/32”W X 7/32”H)

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No Date Codes. No Packaging.

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Modern Transistors

BJT Fabrication
▪ BJT can be made either as discrete devices or in planar integrated form.
▪ In discrete, the substrate can be used for one connection, typically the collector.
▪ In integrated version, all 3 contacts appear on the top surface.
 The E-B diode is closer to the surface than the B-C junction because it is easier
make the heavier doping at the top.
BJT Structure – Discrete
▪ Early BJTs were fabricated using alloying - a complicated and unreliable process.
▪ The structure contains two p-n diodes, one between the base and the emitter, and one
between the base and the collector.

BJT Structure – Planar

▪ The “Planar Structure” developed by Fairchild in the late 50’s shaped the basic structure
of the BJT, even up to the present day.
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▪ In the planar process, all steps are performed from the surface of the wafer
 ▪ BJTs are usually constructed vertically
▪ Controlling depth of the emitter’s n doping sets the base width
E B C

n
p
n

Advanced BJT Structures

▪ The original BJT structure survived, practically unchanged, since the mid 60’s.
▪ As the advances in MOS development appears, some of the fabrication technology are
also applied to the BJT.
 Low defect epitaxy
 Ion implant
 Plasma etching (dry etch)
 LOCOS (local oxidation of Si)
 Polysilicon layers
 Improved lithography

Example of BJT Specification Sheet

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BIPOLAR JUNCTION TRANSISTOR (BJT) STRUCTURE
▪ The BJT is constructed with three doped semiconductor regions separated by two pn
junctions, as shown in the epitaxial planar structure in the Figure below.
▪ One type consists of two n regions separated by a p region (npn), and the other type
consists of two p regions separated by an n region (pnp).
▪ The term bipolar refers to the use of both holes and electrons as current carriers in the
transistor structure.

BASIC BJT OPERATION

▪ In order for a BJT to operate properly as an amplifier, the two pn junctions must be
correctly biased with external dc voltages.
▪ The operation of the pnp is the same as for the npn except that the roles of the electrons
and holes, the bias voltage polarities, and the current directions are all reversed.
Biasing
▪ The Figure below shows a bias arrangement for both npn and pnp BJTs for operation
as an amplifier.
▪ Notice that in both cases the base-emitter (BE) junction is forward-biased and the
base-collector (BC) junction is reverse-biased.
▪ This condition is called forward-reverse bias.

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BJT Characteristics and Parameters
DC Beta (DC) and DC Alpha (DC)
▪ The dc current gain of a transistor is the ratio of the dc collector current (IC) to the dc base
current (IB) and is designated dc beta (βDC).
𝑰𝑪
𝜷𝑫𝑪 =
𝑰𝑩
▪ Typical values of βDC range from less than 20 to 200 or higher.
▪ βDC is usually designated as an equivalent hybrid (h) parameter, hFE, on transistor datasheets.

▪ The ratio of the dc collector current (IC) to the dc emitter current (IE) is the dc alpha (αDC).
▪ The alpha is a less-used parameter than beta in transistor circuits.
𝑰𝑪
𝜶𝑫𝑪 =
𝑰𝑬
▪ Typically, values of αDC range from 0.95 to 0.99 or greater, but αDC is always less than 1.
▪ The reason is that IC is always slightly less than IE by the amount of IB.
Transistor DC Model
▪ You can view the unsaturated BJT as a device with a current input and a dependent
current source in the output circuit, as shown in the figure below for an npn.
▪ The input circuit is a forward-biased diode through which there is base current.
▪ The output circuit is a dependent current source (diamond-shaped element) with a value
that is dependent on the base current, IB, and equal to βDCIB.

Transistor Currents and Voltages

▪ Consider the basic transistor bias circuit configuration in the figure below. Three
transistor dc currents and three dc voltages can be identified.
IB: dc base current
IE: dc emitter current
IC: dc collector current
VBE: dc voltage at base with respect to emitter
VCB: dc voltage at collector with respect to base
VCE: dc voltage at collector with respect to emitter

𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵

𝑉𝐶𝐸 = 𝑉𝐶𝐵 + 𝑉𝐵𝐸

𝑉𝐵𝐸 = 0.7𝑉
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Example No.1
Determine the dc current gain βDC and the emitter current IE for a transistor where
IB = 50 µA and IC = 3.65 mA.
Solution
𝐼𝐶 3.65𝑚𝐴
𝛽𝐷𝐶 = = = 𝟕𝟑
𝐼𝐵 50𝜇𝐴
𝐼𝐸 = 3.65𝑚𝐴 + 50𝜇𝐴 = 𝟑. 𝟕𝟎𝒎𝑨

Exercise 1. A certain transistor has a βDC of 200. When the base current is 50 µA, determine
the collector current.

Example No.2
Determine IB, IC, IE, VBE, VCE, and VCB in the circuit of the figure below. The transistor
has a βDC = 150.

Solution:
IB =?
Applying KVL @ base terminal in clockwise direction
𝑉𝐵𝐵 − 𝐼𝐵 𝑅𝐵 − 𝑉𝐵𝐸 = 0
𝑉𝐵𝐵 − 𝑉𝐵𝐸 5𝑉 − 0.7𝑉
𝐼𝐵 = = = 𝟒𝟑𝟎𝝁𝑨
𝑅𝐵 10𝐾Ω
𝐼𝐶 = 𝛽𝐷𝐶 𝐼𝐵 = (150)(430𝜇𝐴) = 𝟔𝟒. 𝟓𝒎𝑨
𝐼𝐸 = 64.5𝑚𝐴 + 430𝜇𝐴 = 𝟔𝟒. 𝟗𝒎𝑨
𝑉𝐵𝐸 = 𝟎. 𝟕𝑽
Applying KVL @ collector terminal in counter clockwise direction
𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 − 𝑉𝐶𝐸 = 0
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 10 − (64.5𝑚𝐴)(100Ω) = 𝟑. 𝟓𝟓𝑽
𝑉𝐶𝐸 = 𝑉𝐶𝐵 + 𝑉𝐵𝐸
𝑉𝐶𝐵 = 𝑉𝐶𝐸 − 𝑉𝐵𝐸 = 3.55𝑉 − 0.7𝑉 = 𝟐. 𝟖𝟓𝑽
▪ Since the collector is at a higher voltage than the base, the collector-base junction is
reverse-biased.

Exercise 2. Determine IB, IC, IE, VCE, and VCB in the Figure above for the following values: RB
= 22 KΩ, RC = 220 Ω, VBB = 6 V, VCC = 9 V, and βDC = 90.
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Circuit Configuration

Common Base Configuration

▪ In this circuit, the input signal is applied at the emitter, the output is taken at the
collector and the base is the common terminal
▪ This has very low input impedance

Alpha ()
• In the dc mode the levels of IC and IE due to majority carriers are related by a
quantity called alpha and defined by the following equation:
I
= C
IE
Collector Characteristic Curve and Input Point Characteristics for CB

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Common Emitter Configuration
▪ The input is applied at the base, the amplified output is taken from the collector, and
the emitter is the common terminal.
▪ This circuit is the one generally used for amplification because the CE configuration
has the best combination of current and voltage gains.

Beta (β)
• Ratio of the collector current to the base current
I
= C
IB

Collector Characteristics and Base Characteristics Curves for CE

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Common Collector Configuration
▪ This circuit has the input applied at the base, the output is taken at the emitter terminal
and the collector is the common terminal.
▪ It is used primarily for impedance-matching purposes since it has a high input
impedance and low output impedance, opposite to that of the common-base and
common-emitter configurations.

Gamma ()
▪ Forward current gain for common collector configuration
I
= E
IB
Comparison of Amplifier Configurations

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Transistor Biasing
Bias
▪ It is an electrical, mechanical, or magnetic force applied to a device to establish a
desired electrical or mechanical reference level for its operation.
▪ It is a DC voltage or current that sets the operating point for amplifying the AC signal
Biasing
▪ The term biasing is an all-inclusive term for the application of dc voltages to establish
a fixed level of current and voltage.
Loadline
▪ It is a straight line drawn on the collector curves between the cut-off and saturation
points of the transistor
Q-point (Quiescent Point)
▪ It is the operating point of the transistor with the time varying sources out of the circuit.
Regions of Transistor Action
IC Load Line
IB
Vcc
RL IB
c ACTIVE
SATURATION

IB
BREAKDOWN
Q Point
IB

IB

VCE
CUT-OFF VCC

Various operating points within the limits of operation of a transistor.

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Operation in the cutoff, saturation, and linear regions of the BJT characteristic are provided
as follows:
1. Linear-region (or Active) operation:
➢ Base–emitter junction forward biased
➢ Base–collector junction reverse biased
2. Cutoff-region operation:
➢ Base–emitter junction reverse biased
3. Saturation-region operation:
➢ Base–emitter junction forward biased
➢ Base–collector junction forward biased
Operation Mode

BJT – Biasing Techniques

▪ Fixed-bias circuit
▪ Emitter-stabilized bias circuit
▪ Voltage-divider bias
▪ DC bias with voltage feedback
Fixed-bias circuit

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Note:
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▪ The biasing voltage is taken from a battery or power supply

Analysis:
1. For the dc analysis the network can be isolated from
the indicated ac levels by replacing the capacitors
with an open-circuit equivalent.

2. Forward Bias of Base–Emitter.

▪ Consider first the base–emitter circuit, Writing
Kirchhoff’s voltage equation in the clockwise
direction for the loop, we obtain
𝑽𝑪𝑪 − 𝑰𝑩 𝑹𝑩 − 𝑽𝑩𝑬 = 𝟎
▪ Solving the equation for the current
IB will result in the following:
𝑽𝑪𝑪 − 𝑽𝑩𝑬
𝑰𝑩 =
𝑹𝑩
3. Collector–Emitter Loop
▪ The magnitude of the collector current
is related directly to IB through
𝑰𝑪 = 𝜷𝑰𝑩
▪ Applying Kirchhoff’s voltage law in the
clockwise direction around the indicated
closed loop ,will result in the following:
𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪 − 𝑽𝑪𝑪 = 𝟎
𝑽𝑪𝑬 = 𝑽𝑪𝑪 −𝑰𝑪 𝑹𝑪
▪ As a brief review of single- and double-subscript
notation recall that
𝑽𝑪𝑬 = 𝑽𝑪 −𝑽𝑬
▪ since VE = 0V, we have
𝑽𝑪𝑬 = 𝑽𝑪
▪ In addition, since
𝑽𝑩𝑬 = 𝑽𝑩 −𝑽𝑬
𝑽𝑩𝑬 = 𝑽𝑩
Exercise No.3
Determine the following for the fixed-bias configuration of the Figure.
(a) IBQ and ICQ.
(b) VCEQ.
(c) VB and VC.
(d) VBC.
Solution:
a.
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𝑉𝐶𝐶 − 𝑉𝐵𝐸 12 − 0.7

𝐼𝐵𝑄 = = = 𝟒𝟕. 𝟎𝟖𝝁𝑨
𝑅𝐵 240𝐾Ω
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𝐼𝐶𝑄 = 𝛽𝐼𝐵 = (50)(47.08𝜇𝐴) = 𝟐. 𝟑𝟓𝒎𝑨

b. 𝑉𝐶𝐸𝑄 = 𝑉𝐶𝐶 −𝐼𝐶 𝑅𝐶 = 12 − (2.35𝑚𝐴)(2.2𝐾Ω) = 𝟔. 𝟖𝟑𝐕
c. 𝑉𝐵 = 𝑉𝐵𝐸 = 𝟎. 𝟕𝑽
𝑉𝐶 = 𝑉𝐶𝐸 = 𝟔. 𝟖𝟑𝑽
d. 𝑉𝐵𝐶 = 𝑉𝐵 −𝑉𝐶 = 0.7 − 6.83 = −𝟔. 𝟏𝟑𝑽
Note: with the negative sign revealing that the junction is reversed-biased, as it should be
for linear amplification.

Transistor Saturation
▪ The term saturation is applied to any system where levels have reached their maximum
values.

Saturation current for the fixed-bias configuration

▪ Determine the saturation level for
the network of the figure.
𝑉𝑐𝑐 12𝑉
𝐼𝐶𝑠𝑎𝑡 = = = 5.45𝑚𝐴
𝑅𝐶 2.2𝐾Ω

Load-Line Analysis

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Equation that relates the variables IC and VCE
𝑉𝐶𝐸 = 𝑉𝐶𝐶 −𝐼𝐶 𝑅𝐶
𝑽𝒄𝒄
𝑰𝑪 = |
𝑹𝑪 𝑽 =𝟎𝑽
𝑪𝑬
𝑽𝑪𝑬 = 𝑽𝑪𝑪 |𝑰𝑪=𝟎𝒎𝑨

Movement of Q-point with increasing levels of IB

Effect of increasing levels of RC on the load line and Q-point.

Effect of lower values of VCC on the load line and Q-point. 17

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Exercise No.4
Given the load line of and the defined Q-point, determine the required values of VCC,
RC, and RB for a fixed-bias configuration.

Solution:

𝑉𝐶𝐸 = 𝑉𝐶𝐶 = 𝟐𝟎𝑽|𝑰𝑪=𝟎𝒎𝑨

𝑉𝑐𝑐
𝐼𝐶 = |
𝑅𝐶 𝑉 =0𝑉
𝐶𝐸
𝑉𝑐𝑐 20𝑉
𝑅𝐶 = = 10𝑚𝐴 = 𝟐𝑲𝛀
𝐼𝐶
𝑉𝐶𝐶 − 𝑉𝐵𝐸
𝐼𝐵 =
𝑅𝐵
𝑉𝐶𝐶 − 𝑉𝐵𝐸 20𝑉 − 0.7𝑉
𝑅𝐵 = = = 𝟕𝟕𝟐𝑲𝛀
𝐼𝐵 25𝜇𝐴

EMITTER-STABILIZED BIAS CIRCUIT

1. The dc bias network contains an emitter resistor to
improve the stability level over that of the fixed-bias
configuration.
2. The analysis will be performed by first examining the
base–emitter loop and then using the results to
investigate the collector–emitter loop.

Analysis:
1. Base–Emitter Loop
▪ Writing Kirchhoff’s voltage law around the
indicated loop in the clockwise direction will
result in the following equation:
𝑽𝑪𝑪 − 𝑰𝑩 𝑹𝑩 − 𝑽𝑩𝑬 − 𝑰𝑬 𝑹𝑬 = 𝟎
▪ Recall
𝐼𝐶 = 𝛽𝐼𝐵 𝑎𝑛𝑑 𝐼𝐸 = 𝐼𝐶 + 𝐼𝐵
𝑰𝑬 = (𝜷+𝟏)𝑰𝑩
▪ Substituting for IE will result in
𝑽𝑪𝑪 − 𝑰𝑩 𝑹𝑩 − 𝑽𝑩𝑬 − (𝜷+𝟏)𝑰𝑩 𝑹𝑬 = 𝟎
▪ Solving for IB gives
𝑽𝑪𝑪 − 𝑽𝑩𝑬
𝑰𝑩 =
𝑹𝑩 + (𝜷 + 𝟏)𝑹𝑬
2. Collector–Emitter Loop
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▪ Writing Kirchhoff’s voltage law for the indicated

loop in the clockwise direction will result in
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𝑰𝑬 𝑹𝑬 + 𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪 − 𝑽𝑪𝑪 = 𝟎
 ▪ Substituting IE ≈ IC and grouping terms gives
𝑉𝐶𝐸 − 𝑉𝐶𝐶 + 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 0
𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 (𝑹𝑪 + 𝑹𝑬 )
▪ The single-subscript voltage VE is the voltage from emitter to ground and is determined
by 𝑽𝑬 = 𝑰𝑬 𝑹𝑬
▪ while the voltage from collector to ground can be determined from
𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸
𝑽𝑪 = 𝑽𝑪𝑬 + 𝑽𝑬
𝑽𝑪 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪
▪ The voltage at the base with respect to ground can be determined from
𝑽𝑩 = 𝑽𝑪𝑪 − 𝑰𝑩 𝑹𝑩
𝑽𝑩 = 𝑽𝑩𝑬 + 𝑽𝑬
Exercise No.5
For the emitter bias network of the Figure, determine:
(a) IB.
(b) IC.
(c) VCE.
(d) VC.
(e) VE.
(f) VB.
(g) VBC.

Solution:
𝑉𝐶𝐶 −𝑉𝐵𝐸 20−0.7
a. 𝐼𝐵 = 𝑅 +(𝛽+1)𝑅 = 430𝐾+(51)(1𝐾) = 𝟒𝟎. 𝟏𝝁𝑨
𝐵 𝐸
b. 𝐼𝐶 = 𝛽𝐼𝐵 = 50(40.1𝜇𝐴) = 𝟐. 𝟎𝟏𝒎𝑨
c. 𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 ) = 20 − (2.01𝑚𝐴)(2𝐾 + 1𝐾) = 𝟏𝟑. 𝟗𝟕𝑽
d. 𝑉𝐶 = 𝑉𝐶𝐶 − 𝐼𝐶 𝑅𝐶 = 20 − (2.01𝑚𝐴)(2𝐾) = 𝟏𝟓. 𝟗𝟖𝑽
e. 𝑉𝐶𝐸 = 𝑉𝐶 − 𝑉𝐸
𝑉𝐸 = 𝑉𝐶 − 𝑉𝐶𝐸 = 15.98 − 13.97𝑉 = 𝟐. 𝟎𝟏𝑽
f. 𝑉𝐵 = 𝑉𝐵𝐸 + 𝑉𝐸 = 0.7 + 2.01𝑉 = 𝟐. 𝟕𝟏𝑽
g. 𝑉𝐵𝐶 = 𝑉𝐵 − 𝑉𝐶 = 2.71 − 15.98 = −13.27 (reverse-biased as required)

Improved Bias Stability

▪ The addition of the emitter resistor to the dc bias of the BJT provides improved stability,
that is, the dc bias currents and voltages remain closer to where they were set by the
19

circuit when outside conditions, such as temperature, and transistor beta, change.
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Comparison between Fixed bias and Emitter-Stabilized bias circuits
▪ Fixed Bias Circuit

▪ Emitter-stabilized Bias Circuit

Saturation Level

𝑉𝑐𝑐 20𝑉
𝐼𝐶𝑠𝑎𝑡 = 𝑅 = 2𝐾Ω+1KΩ = 𝟔. 𝟔𝟕𝒎𝑨
𝐶 +𝑅𝐸

Load-Line Analysis
𝑉𝐶𝐸 = 𝑉𝐶𝐶 − 𝐼𝐶 (𝑅𝐶 + 𝑅𝐸 )
𝑽𝒄𝒄
𝑰𝑪 = 𝑹 |
𝑪 +𝑹𝑬 𝑽 =𝟎𝑽
𝑪𝑬
𝑽𝑪𝑬 = 𝑽𝑪𝑪 |𝑰𝑪=𝟎𝒎𝑨

VOLTAGE-DIVIDER BIAS
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Exact Analysis
▪ The input side of the network can be redrawn as for the dc analysis.
▪ The Thévenin equivalent network for the network to the left of the base terminal can
then be found in the following manner:

1. Determining RTh
▪ RTh: The voltage source is replaced by a short-circuit equivalent

𝑹𝑻𝑯 = 𝑹𝟏 //𝑹𝟐

2. Determining ETh
▪ ETh: The voltage source VCC is returned to the network and the open-circuit Thévenin
voltage determined as follows:
▪ Applying the voltage-divider rule:

𝑹 𝑽
𝑬𝑻𝒉 = 𝑽𝑹𝟐 = 𝑹 𝟐+𝑹𝑪𝑪
𝟏 𝟐
▪ IBQ can be determined by first applying Kirchhoff’s voltage law in the clockwise
direction for the loop indicated:
𝑬𝑻𝒉 − 𝑰𝑩 𝑹𝑻𝒉 − 𝑽𝑩𝑬 − 𝑰𝑬 𝑹𝑬 = 𝟎
▪ Substituting 𝐼𝐸 = (𝛽 + 1)𝐼𝐵 and solving for IB yields
𝑬𝑻𝒉−𝑽𝑩𝑬
𝑰𝑩 = 𝑹
𝑻𝒉 +(𝜷+𝟏)𝑹𝑬
𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 (𝑹𝑪 + 𝑹𝑬 )
Exercise No.6
▪ Determine the dc bias voltage VCE and the current IC for the voltage-divider
configuration of the Figure.
Solution: 21
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Approximate Analysis
• the condition

Example 7
Repeat the analysis of example 4 using the approximate technique, and compare
solutions for IC and VCE .
Solution:
Testing

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Exercise No. 8
Repeat the exact analysis of Exercise 5 if β is reduced to 70, and compare solutions
for ICQ and VCEQ.
Solution:

Tabulating the results, we have:

Transistor Saturation and Load Line Analysis

Saturation Loadline

DC BIAS WITH VOLTAGE FEEDBACK

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 1. Base–Emitter Loop 2. Emitter-collector Loop

Exercise No.9
Determine the quiescent levels of IC and VCE for the network.

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