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INitele- Meda ate)
Microvitec Series 13
Stephen Moorhouse explains the operation of and the reason for the
unusual line scan/EHT generator system used in this monitor chassis
nn his article on servicing the Microvitec Series 13.
‘monitor chassis (May issue) Russ Phillips refers to its
“unusual” line output stage. The main teason for the
development of this circuit was the need to be able to
compete on a global scale in what had become @ very
price-sensitive section of the monitor market, In fact
however the Series 13 line deflection system was a devel-
‘opment ofa previous circuit that was used for many years
in earlier Microvitee designs, including the Series 7 and
Series 9 generic chassis. Microvitec owns & patent for it
Basic Concept
An essential requirement ofan autosyn: monitor, ie one
that will operate at diferent line frequencies, is Tine
deflection substantially constant
lependently of the line
frequency, as well as providing suitable EW geometry
correction. This means thatthe HT supply that powers
the line output stage must be proportional to the line fre-
ancy.
"This can be achieved by inserting an additional “Buck.
regulator” between the main chopper power supply cit-
Cit and the line output stage, see Fig. 1. This consist of
{series chopper FET, an efficiency diode D, a reservoir
indoctor and a smoothing capacitor C. The output volt-
age Vo = Vinx (Ton/Th), where Vin ithe HT produced
by the chopper power supply, Toni the on period ofthe
pulse-width modulated drive to the Buck regulator FET
ad This 1,
in te Series 13 circuit the Buck regulaor and line out-
pul stage cireuils are combined, see Fig. 2. The line out-
pul wansformer’s primary winding and the scan-comec-
tion/ecupling capacitor now perform two roles: in addi-
tion to their nornal functions they act as the storage ele-
tents forthe Buck regulator. The result sa considerable
Saving in materi
“The use of whats called « “negative Ayback” system
(dhe Tine Ayback pulse, produced atthe junction of the
Tine output wansisor’s emer and the input to the line
output transformers primary winding, is negative-going)
Js a costefective way of carrying out this combination.
By tuming the line output stage Upside down, drive for
the n-channel FET becomes very simple as itis now
“pround-eferenced”, Because i's connested t0 the lj-
back pulses, additional isolation is required in the line
diver wansformer
Active Breathing and Class D EW
Correction
‘The cther “novel” features of the circuit are the ways in
Which EW and picture breathing correction are implement
ed (see Figs. 4(b) and 5 on page 509 of the May issue.
‘Traditionally @transductor or a diode modulator is used
to apply EW corection to the line scan current. Both are
relatively costly, particularly in an application where @
fixed raster “width” will suffice. The technique adopted
here isto use the class D, pulse-width modulated FET drive
to generate the EW correction forthe tube in addition to its
main role in controlling the EHT and line scan, An EW
parabola obtained from the TDA4851 syne processor chip
4s fed to pins 6 and 7 of the NESSS chip ICI0I that pro-
‘duces the drive for the FET. The NESSS is arranged as 2
monostable excillator, and the parabola modifies the on
time ofits output. In this way the degree of EW correction
applied automatically tracks with the line frequency.
"The arrangement requires an integral EHT capacitor GnF
inthis case) inthe line output transformer. In addition to
improving the short-term EHT source impedance, this
capacitor prevents excessive modulation of the HT volt-
age by the parabola. Otherwise there would be unaccept-
able geometry distortion when the CRTs beam current is
high,
‘Since the Source impedance of an EHT supply is typical
ly 2-22MO, a I-1-SkV EHT change is not uncommon
between CRT beam current extremes — between a black
and a full white sereen, Without corrective ation the result
js unacceptable variations in the picture width. The usual
technique adopted in TV sets and monitors that don’t have
1 diode modulator is to add an ant-breathing resistor in
series with the HT supply tothe line output stage, The volt-
‘age drop across this resistor varies with the EHT current,
providing roughly the right correction. In the Series 13
chassis this approach is implemented using active circuit-
¥.
"The voltage atthe lower end of the EH bleed resistance
(ypically some SOOMO, and part of the line output trans-
former) is sensed to generate limited amount of ‘positive
feedback’ which is applied ot the timing pins 6 and 7 of the
monostable circuit (C101), together withthe EW correc-
tion parabola. As @ result the EHT is reduced with increas-
ing beam current, along with a corresponding reduction in
the scan current. Since the picture width is proportional to
the scan current and is inversely proportional tothe square
root ofthe EHT voltage, the technique produces a constant-
width display.
Ttis worth mentioning the role of VR302 which is within
the feedback loop i's associated with 1C303 (see Fig. 5,
page 509, May). This potentiometer is included to ensure
‘optimum correction: it provides compensation forthe +20
per cent tolerance associated with the EHT bleed resis
‘August 1998 TELEVISIONtance. Ifa replacement line output transforme has to be
ted, it will nearly always be necessary to readjust VR302. The
procedure is given in the relevant Microvitec service manu-
als,
Conclusion
‘Although the line deflection system employed inthe Series,
13 monitor chassis is somewhat unusual, it provides an
extremely cost-effective means of generating the EHT and
Tine sean with an autosyoe monitor.
Finally, there were a coupe of errors inthe cet diagrams
in the May anle. Inthe chopper power supply circuit (Fig
1) TR2 is shown as type BFS47B: i is infact type BCS47.
This transistor is used to lock the chopper power supply’
operating frequency to that of he ine output stage, via a iso-
lated winding onthe line ourpot wansformes. 2 terminates
the oscillator ramp generated within the UC3842 conto chip
by driving pin 4 high during the line flyback, ths initiating,
alter ashor dead time, the next eye
Secondly Fig. 4(b)is incoretin that TR102's drain should
be shown connected tothe contol pin 5 of ICIO1, not to the
timing pins 6 and 7, TR102 implements power management
by shuting down te line output stage in the absence of line
syne pulses. In this condition there i no clamp pulse ourput
ffom IC201 (TDASBS1) to dive the NESS F-V convener
chip IC401. TR6OD (on the geomery module) switches off
and TRIO2 switches on.
Editorial note: Our apologies for these errors, which are also
present in the Microvitec circuit diagram we used asthe basis
‘of our drawings. Atleast we showed TRIQ2 as a FET
MONITORS
Fig, le) Use of a Buck regulator and separot line outputs
onivide, wih en autosynt monisn 4 cengtant EAT ond line
Celeron current independently ofthe line frequency.
Fig. 2 (right: The arrangement used in the Micovitec Series 13
Monitor gots combines the Buck regletor and ne ou sage
Driersenstve section ofthe markers oe ”
shown asa bipolar transistor on the original circuit diagram.
‘We would have spotted the incorect transistor type bad We
‘gone by the pas list
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TELEVISION August 1998
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