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APJ ABDUL KALAM TECHNOLOGICAL UNIVERSITY
FOURTH SEMESTER B.TECH DEGREE EXAMINATION(R&S), MAY 2019
Course Code: CS202
‘Course Name: COMPUTER ORGANISATION AND ARCHITECTURE (CS, IT)
Max. Marks: 100 Duration: 3 Hours
PART A
Answer all questions,each carries 3 marks
Explain one, two and three address instruction with an example for each. a
List the steps involved in invoking a subroutine through the use of a link register. 3
3 Draw a 3 x 2 array multiplier. 3
4 Non-restoring division is faster than restoring division. Justify the statement, 3
PARTB
Answer any two questions, each carries 9 marks
5 List various addressing modes explain any four with an example for each: 9
6 a) Draw the diagram of. multi-bus organization with 3 buses. Write the control
sequence for the insti” an Add R4, BS. the above mentioned malti-bus
organization. 2
b) Give the sequence of control steps required to perform the operation Add [R3}. RI
in a signe tration ee
7a) Divide (1000). by (11)2 using restoring division method. 4
b) Illustrate the basic operational concepts in transferring data between main memory 5
and processor with neat diagram.
PART C
Answer all question, each carries 3 marks
8 What are vectored interrupts? 3
9 Give the functions of initiator and target controtiers in SCSI bus.
10 Compare synchronous and asynchronous DRAM. 3
11 Define temporal locatity and spatial locatity. 3
PART D
Answer any two questions, each carries 9 marks
12 a) Differentiate centralized and distributed bus arbitration mechanism used in DMA, 4
b) Give the structure of a typical static RAM cell and explain its read and write 5
operations.
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Differentiate serial port and parallel port. Draw the diagram of a bidirectional 8-bit
parallel interface and explain its working 9
Elaborate the various cache mapping techniques with an example for each. 9
PARTE
Answer any four questions, each carries 10 marks
Write the Register Transfer Logie format for a conditional control statement. Give 4
an example and explain the same.
Mention the advantages of using a scratch pad memory. Draw the diagram of a
processor that employs a scratch pad memory and explain the same. 6
Design an adder/subtractor circuit with one selection variable s and two inputs 4
and B. When s = 0 the circuit performs 4 +B. When s =I the circuit performs
A~B by taking 2’s complement of B.
Design a 4-bit combinational logic shifter with 2 control signals Hi and Hi that
Performs the following operations (bit values given in parenthesis are the values
of control variables Hi and Ho respectively):- No shift (00), Shift-right (01), Shifl-
left (10), Transfer 0s to S (11).
Draw and explain the block diagram for a4 it complete accumulator
6
Discuss about condition code bits in a4 bit status register ie
‘Design a hard-wired control unit based on the one flip-flop per state method to
addisubtract 2 signed numbers represented in the sign-and-magnitude form, 10
Explain the organization of microprogrammed computer with a block diagram
10
Draw a neat block diagram of a microprogram sequencer and explain its working. 10
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