20191224_更新日志

1、更新版本为V2.1
2、网络芯片更换为KSZ9301 DC-DC VCC1P5-->VCC1.5V
3、去掉时钟芯片U9 DDR3_POWER
20200221_更新日志
1、去掉24V转5V的电源电路 DC-DC VCC2P5-->VCC2.5V
2、去掉了1V8的电源电路（原来是给时钟U9供电） FPGA_PLL
3、去掉了J11接口的相关电路（JTAG调试ARM。一直未用） Auxiliary supply/Battly
4、去掉了J19的相关电路（原来是调试时钟U9的） 5V DC-DC VCC1P1-->VCC1.1V
5、增加CAN的电路的防护 VCCINT_FPGA/VCC1P1_HPS
6、增加了5V输入处的TVS ||
7、删除原24V网络 DC-DC VCC3P3-->VCC3.3V
8、对通用型的电容进行了一定的矫正
3A FPGA_IO_POWER/KSZ9031
20200224_更新日志
1、修改2页中1V2的电源网络命令 DC-DC VCC1.2V
2、对网络光纤电路和预留的IO进行了连接 KSZ9031
20200304
1、原16P的排阻更改为8P排阻，16P排阻需要定做
2、CAN的插座去掉一个(原来有两个)
20200311
1、修改STM32中CAN指示灯的3V3电压网络修改为VCC3P3。（原3V3_STM没有）
20200317
1、U83的YSO321SR_50MHz改为YSO321SR_25MHz

HPS_SYSTEM QSPI FLASH

64M_BYTE

1000M-RJ45 DDR3 --1.5V

FPGA-SOC /A9 32BIT

F
AS/PS SELET P
G 5CSEMA4U23
DDR3 --1.5V
A

SPI FLASH
64M_BYTE CAN_BUS CAN_BUS
FPGA_LOGIC 电源 ARM INTERFACE

100P_FPGA 100P_FPGA/电源/ARM
J20 J21

页数 功能介绍
01 版本修改记录和架构简易说明
02 系统电源电路、定位点和定位孔
03 DDR3接口相关的电路
04 ARM和RGMII相关的外围电路(CAN等)
05 FPGA相关的结构电路(CAN等)
06 SOC的电源引脚
07 核心板的标准输出接口及相关的外围电路
08 10/100/1000M网络KSZ9301电路
 1.5V 2A
J4
M1 M3 固定和定位
TRU_VIA TRU_VIA
VCC5P0 U6 VCC1P5_DDR3

1
2
7 6 L7 VCC1P5_DDR3 U40
VIN SW SW PA4030S1R0NT 5 DDR3_VREF_HPS
R24 C18 C19 4 C20 C17 C21 R314 2 VDDQ 4
OUT R25 1K/NC SD VREF
10uF 100nF 22uF 10uF 100nF C355 C356 R1 0R R3 0R
1K 1% 150K 1%
VCC3P3 GND 10uF 100nF C4 102/1kV C6 102/1kV
GND 1 2 6
8 EN FB GND AVIN
C27 R26 PG 5 R27 C352 C353 C354 GND DDR3_VTT_HPS GND GND
PGND 3 VCC1P5_DDR3 3

GND
0.1uF/NP AGND 100K 1% 22uF 10uF 100nF 7 VSENSE 8 TP2 TP3 TP4 TP1
PVIN VTT SMT POINT SMT POINT SMT POINT SMT POINT
Vout=0.6*(1+R1/R2)
1K 1% MP2162GQH-Z LP2998 C350 C351
贴片定位点

1
GND GND

1
GND 22uF 100nF
GND 5V转1.5V/2A
GND TOP层
TP5 TP6 TP7 TP8
2.5V 2A J5 SMT POINT SMT POINT SMT POINT SMT POINT

VCC5P0 U9
顺络电感 4030
VCC2P5
BOTTOM层

1
7 6 L9 1.2V 3A

1
2
VIN SW SW PA4030S1R0NT J26
R28 C29 C33 4 C30 C31 C32 顺络电感 4030
OUT R29 VCC5P0 U85 VCC1P2
10uF 100nF 22uF 10uF 100nF 2 3 L24

1
2
1K 1% 100K 1% VIN SW SW PA4030S1R0NT
R379 C587 C588 5 C584 C585 C586
GND 1 2 OUT R377
8 EN FB GND 10uF 100nF 22uF 10uF 100nF
C38 R30 PG 5 R31 1K 1% 100K 1%
PGND
0.1uF/NP AGND
3
31K6 1%
GND GND
8
EN FB
7 加密芯片 VCC3P3
Vout=0.6*(1+R1/R2) 1 GND
1K 1% C589 R380 PG 6 R378
MP2162GQH-Z AGND
GND GND 4 R170 R171 C330
0.1uF/NP PGND 100K 1%
5V转2.5V/2A Vout=0.6*(1+R1/R2) U36
GND 100nF
1K 1% MP2143DJ 1 8 4K7 4K7
GND GND 2 NC#1 VCC 7 GND
GND GND 5V转1.2V/3A 3 NC#2
NC#3
NC#4
SCL
6 HPS_SCL3 {4,7}
4 5 HPS_SDA3 {4,7}
GND SDA
VCCINT_FPGA
1.1V 3A J6 ATSHA204A
GND
顺络电感 4030
VCC5P0 U12 VCC1P1_HPS
2 3 L11
1
2

VIN SW SW PA4030S1R0NT
R32 C39 C40 5 C41 C42 C43
OUT R33
10uF 100nF 22uF 10uF 100nF
1K 1% 200K 1%

GND 8 7
1 EN FB GND VCC5P0
C47 R38 PG 6 R37 R20 1K 1% GREEN D20
AGND GND
4
0.1uF/NP PGND 240k 1% VCC3P3
Vout=0.6*(1+R1/R2) R19 1K 1% GREEN D21 GND
1K 1% MP2143DJ
GND GND
5V转1.1V/3A
GND
电源指示灯
J8
3.3V 3A
顺络电感 4030
VCC5P0 U13 VCC3P3
1
2

2 3 L13
VIN SW SW PA4030S1R0NT
R42 C53 C54 5 C55 C56 C57
OUT R43
10uF 100nF 22uF 22uF 100nF
1K 1% 200K 1%

GND 8 7
1 EN FB GND
C58 R44 PG 6 R45
AGND 4
PGND GND TEXT POINT
0.1uF/NP 44K2 1%
Vout=0.6*(1+R1/R2) J22
1K 1% MP2143DJ
GND GND

1
2
GND
5V转3.3V/3A
GND

VCC5P0 VCC3P3

C1 C2 C3 C8 C9 C10

100uF 100uF 100uF 100uF 100uF 100uF

GND GND
 P1-5
HPS_DDR3_DQ0 J25 N24 HPS_DDR3_DQ16 R46 R0603 HPS_DDR3_RESET_N
HPS_DDR/HPS_DQ_0 HPS_DDR/HPS_DQ_16 VCC1P5_DDR3
HPS_DDR3_DQ1 J24 N25 HPS_DDR3_DQ17 2K
HPS_DDR3_DQ2 E28 HPS_DDR/HPS_DQ_1 HPS_DDR/HPS_DQ_17 T28 HPS_DDR3_DQ18
HPS_DDR3_DQ3 D27 HPS_DDR/HPS_DQ_2 HPS_DDR/HPS_DQ_18 U28 HPS_DDR3_DQ19 HPS_DDR3_CK_P R47 R0402 HPS_DDR3_CK_N
HPS_DDR3_DQ4 J26 HPS_DDR/HPS_DQ_3 HPS_DDR/HPS_DQ_19 N26 HPS_DDR3_DQ20
HPS_DDR3_DQ5 K26 HPS_DDR/HPS_DQ_4 HPS_DDR/HPS_DQ_20 N27 HPS_DDR3_DQ21 100R 1%
HPS_DDR3_DQ6 G27 HPS_DDR/HPS_DQ_5 HPS_DDR/HPS_DQ_21 R27 HPS_DDR3_DQ22 U14 U15
HPS_DDR3_DQ7 F28 HPS_DDR/HPS_DQ_6 HPS_DDR/HPS_DQ_22 V27 HPS_DDR3_DQ23
HPS_DDR3_DQS_P0 R17 HPS_DDR/HPS_DQ_7 HPS_DDR/HPS_DQ_23 T19 HPS_DDR3_DQS_P2 HPS_DDR3_ADDR0 N3 E3 HPS_DDR3_DQ0 HPS_DDR3_ADDR0 N3 E3 HPS_DDR3_DQ16
HPS_DDR3_DQS_N0 R16 HPS_DDR/HPS_DQS_0 HPS_DDR/HPS_DQS_2 T18 HPS_DDR3_DQS_N2 HPS_DDR3_ADDR1 P7 A0 DQL0 F7 HPS_DDR3_DQ1 HPS_DDR3_ADDR1 P7 A0 DQL0 F7 HPS_DDR3_DQ17
HPS_DDR3_DM0 G28 HPS_DDR/HPS_DQSn_0 HPS_DDR/HPS_DQSn_2 W28 HPS_DDR3_DM2 HPS_DDR3_ADDR2 P3 A1 DQL1 F2 HPS_DDR3_DQ2 HPS_DDR3_ADDR2 P3 A1 DQL1 F2 HPS_DDR3_DQ18
HPS_DDR/HPS_DM_0 HPS_DDR/HPS_DM_2 HPS_DDR3_ADDR3 N2 A2 DQL2 F8 HPS_DDR3_DQ3 HPS_DDR3_ADDR3 N2 A2 DQL2 F8 HPS_DDR3_DQ19
HPS_DDR3_ADDR4 P8 A3 DQL3 H3 HPS_DDR3_DQ4 HPS_DDR3_ADDR4 P8 A3 DQL3 H3 HPS_DDR3_DQ20
HPS_DDR3_DQ8 K25 R26 HPS_DDR3_DQ24 HPS_DDR3_ADDR5 P2 A4 DQL4 H8 HPS_DDR3_DQ5 HPS_DDR3_ADDR5 P2 A4 DQL4 H8 HPS_DDR3_DQ21
HPS_DDR3_DQ9 L25 HPS_DDR/HPS_DQ_8 HPS_DDR/HPS_DQ_24 R25 HPS_DDR3_DQ25 HPS_DDR3_ADDR6 R8 A5 DQL5 G2 HPS_DDR3_DQ6 HPS_DDR3_ADDR6 R8 A5 DQL5 G2 HPS_DDR3_DQ22
HPS_DDR3_DQ10 J27 HPS_DDR/HPS_DQ_9 HPS_DDR/HPS_DQ_25 AA28 HPS_DDR3_DQ26 HPS_DDR3_ADDR7 R2 A6 DQL6 H7 HPS_DDR3_DQ7 HPS_DDR3_ADDR7 R2 A6 DQL6 H7 HPS_DDR3_DQ23
HPS_DDR3_DQ11 J28 HPS_DDR/HPS_DQ_10 HPS_DDR/HPS_DQ_26 W26 HPS_DDR3_DQ27 HPS_DDR3_ADDR8 T8 A7 DQL7 D7 HPS_DDR3_DQ8 HPS_DDR3_ADDR8 T8 A7 DQL7 D7 HPS_DDR3_DQ24
HPS_DDR3_DQ12 M27 HPS_DDR/HPS_DQ_11 HPS_DDR/HPS_DQ_27 R24 HPS_DDR3_DQ28 HPS_DDR3_ADDR9 R3 A8 DQU0 C3 HPS_DDR3_DQ9 HPS_DDR3_ADDR9 R3 A8 DQU0 C3 HPS_DDR3_DQ25
HPS_DDR3_DQ13 M26 HPS_DDR/HPS_DQ_12 HPS_DDR/HPS_DQ_28 T24 HPS_DDR3_DQ29 HPS_DDR3_ADDR10 L7 A9 DQU1 C8 HPS_DDR3_DQ10 HPS_DDR3_ADDR10 L7 A9 DQU1 C8 HPS_DDR3_DQ26
HPS_DDR3_DQ14 M28 HPS_DDR/HPS_DQ_13 HPS_DDR/HPS_DQ_29 Y27 HPS_DDR3_DQ30 HPS_DDR3_ADDR11 R7 A10 DQU2 C2 HPS_DDR3_DQ11 HPS_DDR3_ADDR11 R7 A10 DQU2 C2 HPS_DDR3_DQ27
HPS_DDR3_DQ15 N28 HPS_DDR/HPS_DQ_14 HPS_DDR/HPS_DQ_30 AA27 HPS_DDR3_DQ31 HPS_DDR3_ADDR12 N7 A11 DQU3 A7 HPS_DDR3_DQ12 HPS_DDR3_ADDR12 N7 A11 DQU3 A7 HPS_DDR3_DQ28
HPS_DDR3_DQS_P1 R19 HPS_DDR/HPS_DQ_15 HPS_DDR/HPS_DQ_31 U19 HPS_DDR3_DQS_P3 HPS_DDR3_ADDR13 T3 A12 DQU4 A2 HPS_DDR3_DQ13 HPS_DDR3_ADDR13 T3 A12 DQU4 A2 HPS_DDR3_DQ29
HPS_DDR3_DQS_N1 R18 HPS_DDR/HPS_DQS_1 HPS_DDR/HPS_DQS_3 T20 HPS_DDR3_DQS_N3 HPS_DDR3_ADDR14 T7 A13 DQU5 B8 HPS_DDR3_DQ14 HPS_DDR3_ADDR14 T7 A13 DQU5 B8 HPS_DDR3_DQ30
HPS_DDR3_DM1 P28 HPS_DDR/HPS_DQSn_1 HPS_DDR/HPS_DQSn_3 AB28 HPS_DDR3_DM3 HPS_DDR3_ADDR15 M7 A14 DQU6 A3 HPS_DDR3_DQ15 HPS_DDR3_ADDR15 M7 A14 DQU6 A3 HPS_DDR3_DQ31
HPS_DDR/HPS_DM_1 HPS_DDR/HPS_DM_3 A15 DQU7 A15 DQU7
HPS_DDR3_BA0 M2 J7 HPS_DDR3_CK_P HPS_DDR3_BA0 M2 J7 HPS_DDR3_CK_P
T26 HPS_DDR3_BA1 N8 BA0 CK K7 HPS_DDR3_CK_N HPS_DDR3_BA1 N8 BA0 CK K7 HPS_DDR3_CK_N
HPS_DDR3_ADDR0 C28 HPS_DDR/HPS_DQ_32 U25 HPS_DDR3_BA2 M3 BA1 CK# F3 HPS_DDR3_DQS_P0 HPS_DDR3_BA2 M3 BA1 CK# F3 HPS_DDR3_DQS_P2
HPS_DDR3_ADDR1 B28 HPS_DDR/HPS_A_0 HPS_DDR/HPS_DQ_33 AC28 BA2 DQSL G3 HPS_DDR3_DQS_N0 BA2 DQSL G3 HPS_DDR3_DQS_N2
HPS_DDR3_ADDR2 E26 HPS_DDR/HPS_A_1 HPS_DDR/HPS_DQ_34 V25 HPS_DDR3_W E_N L3 DQSL# C7 HPS_DDR3_DQS_P1 HPS_DDR3_W E_N L3 DQSL# C7 HPS_DDR3_DQS_P3
HPS_DDR3_ADDR3 D26 HPS_DDR/HPS_A_2 HPS_DDR/HPS_DQ_35 V19 HPS_DDR3_RAS_N J3 WE DQSU B7 HPS_DDR3_DQS_N1 HPS_DDR3_RAS_N J3 WE DQSU B7 HPS_DDR3_DQS_N3
HPS_DDR3_ADDR4 J21 HPS_DDR/HPS_A_3 HPS_DDR/HPS_DQ_36 V20 HPS_DDR3_CAS_N K3 RAS# DQSU# E7 HPS_DDR3_DM0 HPS_DDR3_CAS_N K3 RAS# DQSU# E7 HPS_DDR3_DM2
HPS_DDR3_ADDR5 J20 HPS_DDR/HPS_A_4 HPS_DDR/HPS_DQ_37 AE27 HPS_DDR3_CS_N L2 CAS# DML D3 HPS_DDR3_DM1 HPS_DDR3_CS_N L2 CAS# DML D3 HPS_DDR3_DM3
HPS_DDR3_ADDR6 C26 HPS_DDR/HPS_A_5 HPS_DDR/HPS_DQ_38 AD28 HPS_DDR3_CKE K9 CS# DMU HPS_DDR3_CKE K9 CS# DMU
HPS_DDR3_ADDR7 B26 HPS_DDR/HPS_A_6 HPS_DDR/HPS_DQ_39 V18 CKE J1 HPS_DDR3_ODT1 CKE J1 HPS_DDR3_ODT1
HPS_DDR3_ADDR8 F26 HPS_DDR/HPS_A_7 HPS_DDR/HPS_DQS_4 V17 DDR3_VREF_HPS M8 ODT1_NC#1 L1 HPS_DDR3_CS1_N DDR3_VREF_HPS M8 ODT1_NC#1 L1 HPS_DDR3_CS1_N
HPS_DDR3_ADDR9 F25 HPS_DDR/HPS_A_8 HPS_DDR/HPS_DQSn_4 AE28 H1 VREFCA CS1_NC#2 J9 HPS_DDR3_CKE1 H1 VREFCA CS1_NC#2 J9 HPS_DDR3_CKE1
HPS_DDR3_ADDR10 A24 HPS_DDR/HPS_A_9 HPS_DDR/HPS_DM_4 HPS_DDR3_ODT K1 VREFDQ CKE1_NC#3 L9 HPS_DDR3_ZQ01 HPS_DDR3_ODT K1 VREFDQ CKE1_NC#3 L9 HPS_DDR3_ZQ11
HPS_DDR3_ADDR11 B24 HPS_DDR/HPS_A_10 ODT ZQ1_NC#4 R326 ODT ZQ1_NC#4
HPS_DDR3_ADDR12 D24 HPS_DDR/HPS_A_11 V28 HPS_DDR3_RESET_N A1 T2 HPS_DDR3_RESET_N A1 T2 HPS_DDR3_RESET_N R327
HPS_DDR3_ADDR13 C24 HPS_DDR/HPS_A_12 HPS_DDR/HPS_RESETn VCC1P5_DDR3 C1 VDDQ#1 RESET L8 HPS_DDR3_ZQ00 240-1% VCC1P5_DDR3 C1 VDDQ#1 RESET L8 HPS_DDR3_ZQ10 240-1%
HPS_DDR3_ADDR14 G23 HPS_DDR/HPS_A_13 F1 VDDQ#2 ZQ F1 VDDQ#2 ZQ R0603
HPS_DDR3_ADDR15 F24 HPS_DDR/HPS_A_14 D2 VDDQ#3 R0603 D2 VDDQ#3
HPS_DDR/HPS_A_15 H2 VDDQ#4 B1 R48 H2 VDDQ#4 B1 R49
HPS_DDR3_CK_P N21 R28 A8 VDDQ#5 VSSQ#1 D1 240-1% A8 VDDQ#5 VSSQ#1 D1 240-1%
HPS_DDR3_CK_N N20 HPS_DDR/HPS_CK HPS_GPI4_6B_R28 P26 H9 VDDQ#6 VSSQ#2 G1 GND H9 VDDQ#6 VSSQ#2 G1 GND
HPS_DDR3_CKE L28 HPS_DDR/HPS_CKn HPS_GPI5_6B_P26 T17 E9 VDDQ#7 VSSQ#3 E2 R0603 E9 VDDQ#7 VSSQ#3 E2 R0603
HPS_DDR3_CKE1 K28 HPS_DDR/HPS_CKE_0 HPS_GPI6_6B_T17 T16 C9 VDDQ#8 VSSQ#4 D8 C9 VDDQ#8 VSSQ#4 D8
HPS_DDR3_BA0 A27 HPS_DDR/HPS_CKE_1 HPS_GPI7_6B_T16 Y28 N1 VDDQ#9 VSSQ#5 E8 N1 VDDQ#9 VSSQ#5 E8
HPS_DDR3_BA1 H25 HPS_DDR/HPS_BA_0 HPS_GPI8_6B_Y28 Y26 R1 VDD#1 VSSQ#6 B9 GND R1 VDD#1 VSSQ#6 B9 GND
HPS_DDR3_BA2 G25 HPS_DDR/HPS_BA_1 HPS_GPI9_6B_Y26 U15 B2 VDD#2 VSSQ#7 F9 B2 VDD#2 VSSQ#7 F9
HPS_DDR3_RAS_N A25 HPS_DDR/HPS_BA_2 HPS_GPI10_6B_U15 U16 K2 VDD#3 VSSQ#8 G9 K2 VDD#3 VSSQ#8 G9
HPS_DDR3_CAS_N A26 HPS_DDR/HPS_RASn HPS_GPI11_6B_U16 AC27 G7 VDD#4 VSSQ#9 E1 G7 VDD#4 VSSQ#9 E1
HPS_DDR3_W E_N E25 HPS_DDR/HPS_CASn HPS_GPI12_6B_AC27 V24 K8 VDD#5 VSS#1 M1 K8 VDD#5 VSS#1 M1 VCC1P5_DDR3
HPS_DDR3_CS_N L21 HPS_DDR/HPS_WEn HPS_GPI13_6B_V24 D9 VDD#6 VSS#2 P1 D9 VDD#6 VSS#2 P1
HPS_DDR3_CS1_N L20 HPS_DDR/HPS_CSn_0 N9 VDD#7 VSS#3 T1 N9 VDD#7 VSS#3 T1
HPS_DDR3_ODT D28 HPS_DDR/HPS_CSn_1 R9 VDD#8 VSS#4 J2 R9 VDD#8 VSS#4 J2 R50 C59
HPS_DDR3_ODT1 G26 HPS_DDR/HPS_ODT_0 VDD#9 VSS#5 B3 VDD#9 VSS#5 B3 1K 1% 100nF
HPS_DDR/HPS_ODT_1 VSS#6 G8 VSS#6 G8 R0603 C0603
HPS_DDR3_RZQ D25 VSS#7 J8 VSS#7 J8
HPS_RZQ_0 Bank 6A Bank 6B VSS#8 A9 HPS_DDR3_CKE R51 4K7 R0603 VSS#8 A9
VSS#9 VSS#9 DDR3_VREF_HPS
R53 VCCIO = 1.5V VCCIO = 1.5V M9 M9
100R M25 VSS#10 P9 VSS#10 P9
K27 HPS_GPI0_6A_M25 VSS#11 T9 HPS_DDR3_CKE1 R328 4K7 R0603 VSS#11 T9 R52 C60
R0603 R20 HPS_GPI1_6A_K27 VSS#12 VSS#12 1K 1% 100nF
R21 HPS_GPI2_6A_R20 R0603 C0603
HPS_GPI3_6A_R21 GND GND GND
DDR3-FBGA96 DDR3-FBGA96
GND
CycloneV 5CSEMA4U23
VERSION : 1.0 GND
PAGE : 5 of 11
DATE : AUG_ 2013
SOC DDR接口 DDR3芯片电路

DDR3去耦电容
R330 51R R0603 HPS_DDR3_CS1_N
R329 51R R0603 HPS_DDR3_ODT1 VCC1P5_DDR3
VCC1P5_DDR3
DDR3_VTT_HPS RN1 1 851R HPS_DDR3_ADDR14
2 7 HPS_DDR3_ADDR2
C321 C322 C323 3 6 HPS_DDR3_ADDR9 C61 C62 C63 C64 C65 C66 C67 C68 C69 C70
10uF 470nF 100nF 4 5 HPS_DDR3_ADDR13 2.2nF 2.2nF 2.2nF 2.2nF 2.2nF 4.7nF 4.7nF 10nF 10nF 10nF C71 C72 C73 C74 C75 C76 C77 C78 C79 C80
C0805 C0603 C0603 1 8 HPS_DDR3_ADDR8 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 2.2nF 2.2nF 2.2nF 2.2nF 2.2nF 4.7nF 10nF 4.7nF 10nF 10nF
2 7 HPS_DDR3_ADDR11 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402
DDR3_VTT_HPS 3 6 HPS_DDR3_ADDR6
GND 4 5 HPS_DDR3_ADDR1
RN2 51R GND
GND
DDR3_VTT_HPS RN3 1 851R HPS_DDR3_ADDR7 VCC1P5_DDR3 DDR3_VREF_HPS
2 7 HPS_DDR3_ADDR5 VCC1P5_DDR3 DDR3_VREF_HPS
C324 C325 C326 3 6 HPS_DDR3_ADDR4
10uF 470nF 100nF 4 5 HPS_DDR3_ADDR3
C0805 C0603 C0603 1 8 HPS_DDR3_ADDR0 C81 C82 C83 C84 C85 C86 C87 C88 C89
2 7 HPS_DDR3_ADDR12 100nF 100nF 100nF 470nF 470nF 10uF 22uF 100nF 100nF C90 C91 C92 C93 C94 C95 C96 C97 C98
DDR3_VTT_HPS 3 6 HPS_DDR3_BA1 C0402 C0402 C0402 C0402 C0402 C0805 C0805 C0402 C0402 100nF 100nF 100nF 470nF 470nF 10uF 22uF 100nF 100nF
GND 4 5 HPS_DDR3_BA0 C0402 C0402 C0402 C0402 C0402 C0805 C0805 C0402 C0402
RN4 51R
DDR3_VTT_HPS
RN5 1 851R HPS_DDR3_BA2 GND GND
C327 C328 C329 2 7 HPS_DDR3_ADDR10 GND GND
10uF 470nF 100nF 3 6 HPS_DDR3_CS_N
C0805 C0603 C0603 4 5 HPS_DDR3_ADDR15
1 8 HPS_DDR3_W E_N
2 7 HPS_DDR3_ODT
GND DDR3_VTT_HPS 3 6 HPS_DDR3_CAS_N
4 5 HPS_DDR3_RAS_N
RN6 51R
DDR匹配上拉电阻
 P1-6 Ethernet 接口
{5} HPS_W ARM_N HPS_nRSTA23
HPS_NRST_7A_A23
SOC启动方式：QSPI
{5} HPS_RESET_N H19 HPS_BOOT SELECT {5,8} HPS_RGMII0_RESETn
HPS_TDO HPS_NPOR_7A_H19 HPS_ENET_RSET_N {5,8}
B23 VCC3P3

VCC3P3
HPS_TMS C23
HPS_TCK K19
HPS_TRST C22
HPS_TDO_7A_B23
HPS_TMS_7A_C23
HPS_TCK_7A_K19
JTAG Default BOOT: 3.3V Quad SPI flash memory
R72
R75
33R/NC BOOTSEL0 R73
33R/NC QSPI_CS R76
10K BOOTSEL0
10K BOOTSEL1
HPS_RGMII0_INTn
HPS_RGMII0_MDIO
HPS_RGMII0_MDC
HPS_ENET_INT_N {8}
HPS_ENET_MDIO {8}
HPS_TDI HPS_TRST_7A_C22 HPS_ENET_MDC {8}
R5 10K D22 R77 33R/NC BOOTSEL2 R78 10K BOOTSEL2
R6 33R/NC E18 HPS_TDI_7A_D22
E20 HPS_PORSEL_7A_E18 HPS_RGMII0_RX_CLK
{5} HPS_CLK1_25 HPS_CLK1_7A_E20 HPS_ENET_RX_CLK {8}
{5} HPS_CLK2_25 D20 R81 1K 1%CAN_TX R82 4K7/NC HPS_RGMII0_RX_CTL
HPS_CLK2_7A_D20 HPS_ENET_RX_DV {8}
GND C21 R83 1K 1%UART0_TX R84 4K7/NC HPS_RGMII0_RXD0
TRACE_CLK_7A_C21 HPS_RGMII0_RXD1 HPS_ENET_RX_DATA0 {8}
A22
TRACE_D0_7A_A22 HPS_RGMII0_RXD2 HPS_ENET_RX_DATA1 {8}
B21 Default CLK_SELECT
TRACE_D1_7A_B21 HPS_RGMII0_RXD3 HPS_ENET_RX_DATA2 {8}
A21 CLKSEL[1:0] =00
{4} HPS_LED TRACE_D2_7A_A21 HPS_ENET_RX_DATA3 {8}
K18 GND HPS_CLOCK SELECT
A20 TRACE_D3_7A_K18
{7} TRACE_D4 TRACE_D4_7A_A20 HPS_RGMII0_TX_CTL
J18
{7} TRACE_D5 TRACE_D5_7A_J18 HPS_RGMII0_TX_CLK HPS_ENET_TX_EN {8}
{7} TRACE_D6 A19
TRACE_D6_7A_A19 HPS_RGMII0_TXD3 HPS_ENET_GTX_CLK {8}
{7} TRACE_D7 C18 HPS_ENET_TX_DATA3 {8}
A18 TRACE_D7_7A_C18 HPS_RGMII0_TXD2
{7} SPIM0_SCK HPS_UART HPS_ENET_TX_DATA2 {8}
{7} SPIM0_SI
{7} SPIM0_SO
C17
B18
J17
SPIM0_CLK_7A_A18
SPIM0_MOSI_7A_C17
SPIM0_MISO_7A_B18
ARM {7} UART0_RX
UART0_RX
UART0_TX
HPS_RGMII0_TXD1
HPS_RGMII0_TXD0
HPS_ENET_TX_DATA1 {8}
HPS_ENET_TX_DATA0 {8}
{7} SPIM0_SS0 BOOTSEL0 SPIM0_SS0,BOOTSEL0_7A_J17 {7} UART0_TX
UART0_RX A17
UART0_TX H17 UART0_RX_7A_A17
C19 UART0_TX,CLKSEL1_7A_H17
{7} HPS_SDA I2C0_SDA_7A_C19
{7} HPS_SCL B16
CAN_RX B19 I2C0_SCL_7A_B16
CAN_TX C16 CAN0_RX_7A_B19
CAN0_TX,CLKSEL0_7A_C16
CAN_STB J15
{7} NAND_ALE NAND_ALE_7B_J15
A16
{7} NAND_CE NAND_CE_7B_A16
J14
{7} NAND_CLE NAND_CLE_7B_J14
A15
{7} NAND_RE NAND_RE_7B_A15
D17
{7} NAND_RB NAND_RB_7B_D17
A14
{7} NAND_D0 NAND_DQ0_7B_A14
{2,7} HPS_SDA3 E16
A13 NAND_DQ1_7B_E16
{2,7} HPS_SCL3 NAND_DQ2_7B_A13
J13
{7} NAND_D3 NAND_DQ3_7B_J13
A12
{7} NAND_D4 NAND_DQ4_7B_A12
J12
{7} NAND_D5 NAND_DQ5_7B_J12
A11
{7} NAND_D6 NAND_DQ6_7B_A11
C15
{7} NAND_D7 NAND_DQ7_7B_C15
A9
{7} NAND_W P NAND_WP_7B_A9
BOOTSEL2 D15
{7} NAND_W E QSPI_IO0 NAND_WE,BOOTSEL2_7B_D15
A8
QSPI_IO1 H16 QSPI_IO0_7B_A8
QSPI_IO2 A7 QSPI_IO1_7B_H16
QSPI_IO3 J16 QSPI_IO2_7B_A7
QSPI_CS A6 QSPI_IO3_7B_J16
QSPI_CLK C14 QSPI_SS0,BOOTSEL1_7B_A6
HPS_RGMII0_INTn B14 QSPI_CLK_7B_C14
QSPI_SS1_7B_B14
D14
{7} SD_CMD SDMMC_CMD_7C_D14
A5
{7} SD_PW R SDMMC_PWREN_7C_A5
C13
{5,7} H_FPGA_DATA B6 SDMMC_D0_7C_C13
{5,7} H_NCONFIG H13 SDMMC_D1_7C_B6
{5,7} H_FPGA_DCLK A4 SDMMC_D4_7C_H13
{7} SD_D5 SDMMC_D5_7C_A4
H12
{5,7} H_CONF_DONE SDMMC_D6_7C_H12
B4
{5,7} H_NSTATUS SDMMC_D7_7C_B4
B12
{7} SD_CLKI SDMMC_FB_CLK_IN_7C_B12
B8
{7} SD_CLKO SDMMC_CCLK_OUT_7C_B8
B11
{7} SD_D2 SDMMC_D2_7C_B11
B9
{7} SD_D3 SDMMC_D3_7C_B9
HPS_RGMII0_TX_CLK E4
HPS_RGMII0_TXD0 C10 RGMII0_TX_CLK_7D_E4
HPS_RGMII0_TXD1 F5 RGMII0_TXD0_7D_C10
HPS_RGMII0_TXD2 C9 RGMII0_TXD1_7D_F5
HPS_RGMII0_TXD3 C4 RGMII0_TXD2_7D_C9
HPS_RGMII0_RXD0 C8 RGMII0_TXD3_7D_C4
HPS_RGMII0_MDIO D4 RGMII0_RXD0_7D_C8
HPS_RGMII0_MDC C7 RGMII0_MDIO_7D_D4
HPS_RGMII0_RX_CTL F4 RGMII0_MDC _7D_C7
HPS_RGMII0_TX_CTL C6
HPS_RGMII0_RX_CLK G4
HPS_RGMII0_RXD1 C5
RGMII0_RX_CTL_7D_F4
RGMII0_TX_CTL_7D_C6
RGMII0_RX_CLK_7D_G4
RGMII ARM运行指示灯 VCC3P3 CAN_BUS接口
HPS_RGMII0_RXD2 E5 RGMII0_RXD1_7D_C5 U19 VCC3P3 VCC3P3
HPS_RGMII0_RXD3 D5 RGMII0_RXD2_7D_E5 CAN_TX R102 33R 1 7 R386 33R
RGMII0_RXD3_7D_D5 R21 CAN_RX R104 33R 4 TXD CANH P42 R384 2K R385 2K
CAN_STB R109 33R 8 RXD R388 CANH 3
1K 1% STB CANL 2 3 GREEN GREEN
D19 GREEN VCC5P0 120R 1% R387 1 2 LD41 LD42
CycloneV 5CSEMA4U23 1
VERSION : 1.0 3 2

2
R39 1K 1% Q10 VCC 1 XH2.54-3A CAN_TX CAN_RX
PAGE : 6 of 11 {4} HPS_LED
C140 C141 6 33R
SOC DATE : AUG_ 2013 R41 S9014W CANL J25 GND
10uF 100nF 5 Q11
1、JTAG接口 4K7 2 SPLIT/NC
GND

3
2、ARM(IO/I2C等) GND TJA1044T GND
PESD2CAN

3、RGMII接口 GND GND CAN标准接口及发送接收指示灯

VCC3P3
JTAG接口电路
R54 R59 R55 R60 JTAG_TCK FPGA_TCK
{4,5} JTAG_TCK JTAG_TDO FPGA_TDO FPGA_TCK {5}
{4,5} JTAG_TDO JTAG_TMS FPGA_TMS FPGA_TDO {5}
VCC3P3
{4,5} JTAG_TMS JTAG_TDI FPGA_TDI FPGA_TMS {5}
U18 {4,5} JTAG_TDI FPGA_TDI {5}
9PAD C138 100nF GND 4K7 4K7 4K7 4K7
QSPI_CS 1 PAD 8 R15 0R
QSPI_IO1 R101 33R 2 CS# VCC 7 R103 33RQSPI_IO3
QSPI_IO2 R106 33R 3 DO(IO1) HD(IO3) 6 R107 33RQSPI_CLK HPS_TDO R11 33R/NC FPGA_TDO R9 0R HPS_TDI
WP(IO2) CLK {4,5} JTAG_TDO
4 5 R108 33RQSPI_IO0 HPS_TMS R12 0R FPGA_TDI R10 33R/NC HPS_TDO
GND DI(IO0) HPS_TRST {4,5} JTAG_TDI
HPS_TDI R13 0R FPGA_TCK R7 0R HPS_TCK
{4,5} JTAG_TCK FPGA_TMS HPS_TMS
N25Q256A13EF840E R14 0R R8 0R
GND {4,5} JTAG_TMS
QSPI电路
 P1-3 P1-2 Default Setup P1-9
{7} PRINP1_31 AF13 W11 EPCQ_nCSO AA6
AG8 IO_4A_AF13/DIFFIO_RX_B26N/DQ4B FPGA_CLK1_50 V11 IO_3B_W11/CLK0N,FPLL_BL_FBN/DIFFIO_RX_B15N MSEL[4:0] = 10010 EPCQ_DATA3 AB6 NCSO_3A_AA6/DATA4
{7} PRINP1_30 IO_4A_AG8/DIFFIO_TX_B25P/DQ4B IO_3B_V11/CLK0P,FPLL_BL_FBP/DIFFIO_RX_B15P AS_DATA3_3A_AB6/DATA3
{7} PRINP1_22
AG13
IO_4A_AG13/DIFFIO_RX_B26P/DQ4B {7} PRINP3_26
AH4
IO_3B_AH4/FPLL_BL_CLKOUT1,FPLL_BL_CLKOUTN/DIFFIO_TX_B21N/DQ3B
AS Fast Mode EPCQ_DATA2 AC5
AS_DATA2_3A_AC5/DATA2
U13 AG5 VCC3P3 EPCQ_DATA1 AC6
{7} PRINP1_19 IO_4A_U13/DIFFIO_RX_B27N/DQSN4B {7} PRINP3_27 IO_3B_AG5/FPLL_BL_CLKOUT0,FPLL_BL_CLKOUTP,FPLL_BL_FB/DIFFIO_TX_B21P/DQ3B EPCQ_DATA0 AS_DATA1_3A_AC6/DATA1
AH8 R124 0R MSEL0 R125 1K/NC AD7
{7} PRINP1_29 IO_4A_AH8/DIFFIO_TX_B28N/DQ4B AS_DATA0,ASDO_3A_AD7/DATA0
U14 AD5 R0603 R0603
{7} PRINP1_15 IO_4A_U14/DIFFIO_RX_B27P/DQS4B {7} PRINP3_3 IO_3A_AD5/DIFFIO_TX_B8P/DQ1B
AG9 R126 0R MSEL1 R127 1K/NC Y8
{7} PRINP1_28 IO_4A_AG9/DIFFIO_TX_B28P {7} PRINP4_25 IO_3A_Y8/DATA6/DIFFIO_RX_B1N/DQ1B
AH9 AF4 R0603 R0603 Y4
{7} PRINP1_27 IO_4A_AH9/DIFFIO_TX_B29N/DQ4B {7} PRINP3_1 IO_3B_AF4/DIFFIO_TX_B9N {7} PRINP4_21 IO_3A_Y4/DATA5/DIFFIO_TX_B2N
AE15 AE9 R128 0R MSEL2 R129 1K/NC W8
{7} PRINP1_11 IO_4A_AE15/DIFFIO_RX_B30N/DQ4B {7} PRINP3_15 IO_3B_AE9/DIFFIO_RX_B10N/DQ2B {7} PRINP4_24 IO_3A_W8/DATA8/DIFFIO_RX_B1P/DQ1B
AG10 AE4 R0603 R0603 Y5
{7} PRINP1_26 IO_4A_AG10/DIFFIO_TX_B29P/DQ4B {7} PRINP3_2 IO_3B_AE4/DIFFIO_TX_B9P/DQ2B {7} PRINP4_23 IO_3A_Y5/DATA7/DIFFIO_TX_B2P/DQ1B
AF15 AD10 R130 0R MSEL3 R131 1K/NC T8
{7} PRINP1_10 IO_4A_AF15/DIFFIO_RX_B30P/DQ4B {7} PRINP3_18 IO_3B_AD10/DIFFIO_RX_B10P/DQ2B {7} PRINP4_26 IO_3A_T8/DATA10/DIFFIO_RX_B3N/DQSN1B
AH11 U11 R0603 R0603 AB4
{7} PRINP1_24 IO_4A_AH11/DIFFIO_TX_B32N/DQ4B {7} PRINP3_8 IO_3B_U11/DIFFIO_RX_B11N/DQSN2B {7} PRINP4_18 IO_3A_AB4/DATA9/DIFFIO_TX_B4N/DQ1B
AG11 AF8 R132 0R MSEL4 R133 1K/NC U9
{7} PRINP1_25 IO_4A_AG11/DIFFIO_TX_B32P/DQ4B {7} PRINP3_17 IO_3B_AF8/DIFFIO_TX_B12N/DQ2B {7} PRINP4_27 IO_3A_U9/DATA12/DIFFIO_RX_B3P/DQS1B
AG16 T11 R0603 R0603 AA4
{7} PRINP1_3 IO_4A_AG16/DIFFIO_RX_B34N/DQ5B {7} PRINP3_9 IO_3B_T11/DIFFIO_RX_B11P/DQS2B {7} PRINP4_17 IO_3A_AA4/DATA11/DIFFIO_TX_B4P
AH12 AE7 V10
{7} PRINP1_23 IO_4A_AH12/DIFFIO_TX_B33P/DQ5B {7} PRINP3_12 IO_3B_AE7/DIFFIO_TX_B12P {7} PRINP4_30 IO_3A_V10/DATA14/DIFFIO_RX_B5N/DQ1B
AF17 AF9 GND AD4
{7} PRINP1_6 IO_4A_AF17/DIFFIO_RX_B34P/DQ5B {7} PRINP3_19 IO_3B_AF9/DIFFIO_TX_B13N/DQ2B {7} PRINP4_20 IO_3A_AD4/DATA13/DIFFIO_TX_B6N/DQ1B
V13 AE11 AC4
{7} PRINP1_17 IO_4A_V13/DIFFIO_RX_B35N/DQSN5B {7} PRINP3_22 IO_3B_AE11/DIFFIO_RX_B14N/DQ2B {7} PRINP4_19 IO_3A_AC4/DATA15/DIFFIO_TX_B6P/DQ1B
AH13 AE8
{7} PRINP1_18 IO_4A_AH13/DIFFIO_TX_B36N/DQ5B {7} PRINP3_10 IO_3B_AE8/DIFFIO_TX_B13P/DQ2B
W14 AD11 U10
{7} PRINP1_14 IO_4A_W14/DIFFIO_RX_B35P/DQS5B {7} PRINP3_20 IO_3B_AD11/DIFFIO_RX_B14P/DQ2B {7} PRINP4_16 IO_3A_U10/CLKUSR/DIFFIO_RX_B5P/DQ1B
AG14 AF6 AA11
{7} PRINP1_20 IO_4A_AG14/DIFFIO_TX_B36P {7} PRINP3_13 IO_3B_AF6/DIFFIO_TX_B16N/DQ2B R116 33R/NC
CONF_DONE {7} PRINP4_28 IO_3A_AA11/PR_DONE/DIFFIO_RX_B7N
AH14 AF5 AE6
{7} PRINP1_21 IO_4A_AH14/DIFFIO_TX_B37N/DQ5B {5} FPGA_RUN IO_3B_AF5/DIFFIO_TX_B16P/DQ2B {4,7} H_CONF_DONE {7} PRINP4_22 IO_3A_AE6/PR_READY/DIFFIO_TX_B8N/DQ1B
AE17 AG6 Y11
{7} PRINP1_9 IO_4A_AE17/DIFFIO_RX_B38N/DQ5B {7} PRINP3_29 IO_3B_AG6/DIFFIO_TX_B17N R118 33R/NC {7} PRINP4_29 IO_3A_Y11/PR_ERROR/DIFFIO_RX_B7P
AG15 AF10 NSTATUS AA20
{7} PRINP1_1 IO_4A_AG15/DIFFIO_TX_B37P/DQ5B {7} PRINP3_21 IO_3B_AF10/DIFFIO_RX_B18N/DQ3B {4,7} H_NSTATUS {7} PRINP4_8 IO_5A_AA20/INIT_DONE/DIFFIO_RX_R2P
AD17 AF7 AE26
{7} PRINP1_12 IO_4A_AD17/DIFFIO_RX_B38P/DQ5B {7} PRINP3_14 IO_3B_AF7/DIFFIO_TX_B17P/DQ3B R119 33R/NC
EPCQ_DATA0 {7} PRINP4_2 IO_5A_AE26/PR_REQUEST/DIFFIO_TX_R1N/DQ1R
AH16 AF11 Y19
{7} PRINP1_2 IO_4A_AH16/DIFFIO_TX_B40N/DQ5B {7} PRINP3_23 IO_3B_AF11/DIFFIO_RX_B18P/DQ3B {4,7} H_FPGA_DATA {7} PRINP4_9 IO_5A_Y19/CRC_ERROR/DIFFIO_RX_R2N
AH17 T12 AE25
{7} PRINP1_4 IO_4A_AH17/DIFFIO_TX_B40P/DQ5B {7} PRINP3_7 IO_3B_T12/DIFFIO_RX_B19N/DQSN3B R120 33R/NC {7} PRINP4_3 IO_5A_AE25/NCEO/DIFFIO_TX_R3P/DQ1R
AD19 AH2 NCONFIG AD26
{7} PRINP1_5 IO_4A_AD19/DIFFIO_RX_B42N/DQ6B {7} PRINP3_24 IO_3B_AH2/DIFFIO_TX_B20N/DQ3B {4,7} H_NCONFIG {7} PRINP4_1 IO_5A_AD26/CVP_CONFDONE/DIFFIO_TX_R3N/DQ1R
AF18 T13 AC24
{7} PRINP1_8 IO_4A_AF18/DIFFIO_TX_B41P/DQ6B {7} PRINP3_6 IO_3B_T13/DIFFIO_RX_B19P/DQS3B R121 33R/NC
EPCQ_CLK {7} PRINP4_4 IO_5A_AC24/DEV_OE/DIFFIO_TX_R5P
AE19 AH3 AB23
{7} PRINP1_7 IO_4A_AE19/DIFFIO_RX_B42P/DQ6B {7} PRINP3_25 IO_3B_AH3/DIFFIO_TX_B20P {4,7} H_FPGA_DCLK {7} PRINP4_6 IO_5A_AB23/DEV_CLRN/DIFFIO_TX_R5N/DQ1R
AA18 AD12 VCC3P3
{7} PRINP1_13 IO_4A_AA18/DIFFIO_RX_B43N/DQSN6B {7} PRINP3_5 IO_3B_AD12/DIFFIO_RX_B22N/DQ3B
{7} PRINP1_16 AH18 AE12 R113 10K CONF_DONEJ8
IO_4A_AH18/DIFFIO_TX_B44N/DQ6B {7} PRINP3_4 IO_3B_AE12/DIFFIO_RX_B22P/DQ3B CONF_DONE
AA19 AH5 R114 10K NSTATUS H8
{7} PRINP3_11 IO_4A_AA19/DIFFIO_RX_B43P/DQS6B {7} PRINP3_28 IO_3B_AH5/DIFFIO_TX_B24N/DQ3B NSTATUS
AG18 AH6 GND E6
{7} PRINP2_31 IO_4A_AG18/DIFFIO_TX_B44P {7} PRINP3_30 IO_3B_AH6/DIFFIO_TX_B24P/DQ3B NCE
AH19 R115 10K NCONFIG F7
{7} PRINP2_19 IO_4A_AH19/DIFFIO_TX_B45N/DQ6B FPGA_TDO Y9 NCONFIG
AD20
{7} PRINP2_4 IO_4A_AD20/DIFFIO_RX_B46N/DQ6B {4} FPGA_TDO FPGA_TMS AC7 TDO
AG19
{7} PRINP2_20 IO_4A_AG19/DIFFIO_TX_B45P/DQ6B {4} FPGA_TMS FPGA_TCK AB5 TMS
AE20 CycloneV 5CSEMA4U23
{7} PRINP2_5
{7} PRINP2_21
AG20 IO_4A_AE20/DIFFIO_RX_B46P/DQ6B
IO_4A_AG20/DIFFIO_TX_B48N/DQ6B
FPGA_IO3 VERSION : 1.0
{4} FPGA_TCK
{4} FPGA_TDI
FPGA_TDI W10 TCK
TDI
AF20 EPCQ_CLK AA8
{7} PRINP2_6
AF21 IO_4A_AF20/DIFFIO_TX_B48P/DQ6B PAGE : 2 of 11 DCLK
{7} PRINP2_7
AG21 IO_4A_AF21/DIFFIO_RX_B50N/DQ7B DATE : AUG_ 2013 GND MSEL0 J10
{7} PRINP2_23 IO_4A_AG21/DIFFIO_TX_B49P/DQ7B MSEL0
AF22 MSEL1 H9
{7} PRINP2_25 IO_4A_AF22/DIFFIO_RX_B50P/DQ7B MSEL1
AE22 MSEL2 G6
{7} PRINP2_9 IO_4A_AE22/DIFFIO_RX_B51N/DQSN7B MSEL2
AH21 MSEL3 K10
{7} PRINP2_22 IO_4A_AH21/DIFFIO_TX_B52N/DQ7B MSEL3
AD23 P1-7 MSEL4 K9
{7} PRINP2_16 IO_4A_AD23/DIFFIO_RX_B51P/DQS7B MSEL4
AH22 E8
{7} PRINP2_24 IO_4A_AH22/DIFFIO_TX_B53N/DQ7B IO_8A_E8/FPLL_TL_CLKOUT0,FPLL_TL_CLKOUTP,FPLL_TL_FB/DIFFIO_TX_T4P
AF23 D8
{7} PRINP2_11 IO_4A_AF23/DIFFIO_RX_B54N/DQ7B FPGA_CLK1_50 R117 IO_8A_D8/FPLL_TL_CLKOUT1,FPLL_TL_CLKOUTN/DIFFIO_TX_T4N
AH23 0R E11
{7} PRINP2_26 IO_4A_AH23/DIFFIO_TX_B53P/DQ7B IO_8A_E11/CLK6P,FPLL_TL_FBP/DIFFIO_RX_T9P
AG23 D11 CycloneV 5CSEMA4U23
{7} PRINP2_27 IO_4A_AG23/DIFFIO_RX_B54P/DQ7B IO_8A_D11/CLK6N,FPLL_TL_FBN/DIFFIO_RX_T9N
AH24 VERSION : 1.0
{7} PRINP2_28 IO_4A_AH24/DIFFIO_TX_B56N/DQ7B
AG24 L10 HPS Configuration FPGA_IV by PS
{7} PRINP2_29
{7} PRINP2_12
AE23 IO_4A_AG24/DIFFIO_TX_B56P/DQ7B
IO_4A_AE23/DIFFIO_RX_B58N/DQ8B
{7} DIFFIO_T21P
{7} DIFFIO_T22P
H6 IO_8A_L10/DIFFIO_RX_T21P
IO_8A_H6/DIFFIO_TX_T22P
FPGA_IO4 PAGE : 9 of 11
DATE : AUG_ 2013
AG26 L9 JTAG_TCK
{7} PRINP2_18 IO_4A_AG26/DIFFIO_TX_B57P/DQ8B {7} DIFFIO_T21N IO_8A_L9/DIFFIO_RX_T21N {4} JTAG_TCK JTAG_TDO
AE24 H5
{7} PRINP2_13 IO_4A_AE24/DIFFIO_RX_B58P/DQ8B {7} DIFFIO_T22N IO_8A_H5/DIFFIO_TX_T22N {4} JTAG_TDO JTAG_TMS
AC23 L8
{7} PRINP2_10 IO_4A_AC23/DIFFIO_RX_B59N/DQSN8B {7} DIFFIO_T23P IO_8A_L8/DIFFIO_RX_T23P {4} JTAG_TMS JTAG_TDI
AH26 K8
{7} PRINP2_30 IO_4A_AH26/DIFFIO_TX_B60N/DQ8B {7} DIFFIO_T23N IO_8A_K8/DIFFIO_RX_T23N VCC2P5 {4} JTAG_TDI
AC22 H4
{7} PRINP2_8 IO_4A_AC22/DIFFIO_RX_B59P/DQS8B {7} PRINP3_16 IO_8A_H4/DIFFIO_TX_T24N
AH27 J14 Reference resistor
{7} PRINP2_17 IO_4A_AH27/DIFFIO_TX_B61N/DQ8B JTAG_TCK R169
AG25 2 1 1K 1% for PLL
{7} PRINP2_14 IO_4A_AG25/DIFFIO_RX_B62N/DQ8B JTAG_TDO
AG28 4 3
{7} PRINP2_2 IO_4A_AG28/DIFFIO_TX_B61P/DQ8B JTAG_TMS
AF25 CycloneV 5CSEMA4U23 6 5
{7} PRINP2_15 IO_4A_AF25/DIFFIO_RX_B62P/DQ8B
AF28 VERSION : 1.0 8 7 GND
{7} PRINP2_1 IO_4A_AF28/DIFFIO_TX_B64N/DQ8B JTAG_TDI
AF27 10 9 P1-10
{7} PRINP2_3 IO_4A_AF27/DIFFIO_TX_B64P/DQ8B PAGE : 7 of 11 W25
FPGA_差分 DATE : AUG_ 2013 JTAG AA25 NC__W25
NC__AA25
GND W19
FPGA_IO1/2 CycloneV 5CSEMA4U23
NC__W19
VERSION : 1.0 A2
P1-4 AD1 DNU__A2
PAGE : 3 of 11 Y17 AD2 DNU__AD1
DATE : AUG_ 2013 {7} PRINP4_11
Y18 IO_5A_Y17/DIFFIO_RX_R4P/DQ1R AE14 DNU__AD2
{7} PRINP4_10 IO_5A_Y18/DIFFIO_RX_R4N/DQ1R DNU__AE14
Y16 B2
{7} PRINP4_13 IO_5A_Y16/DIFFIO_RX_R6P/DQS1R DNU__B2
W15 D1
{7} PRINP4_14 IO_5A_W15/DIFFIO_RX_R6N/DQSN1R DNU__D1
AA24 D2
{7} PRINP4_5 IO_5A_AA24/DIFFIO_TX_R7P/DQ1R DNU__D2
V16 D23
{7} PRINP4_12 IO_5A_V16/DIFFIO_RX_R8P/DQ1R DNU__D23
AA23 E12
{7} PRINP4_7 IO_5A_AA23/DIFFIO_TX_R7N DNU__E12
P1-8 V15 VCC3P3 H1
{7} PRINP4_15 IO_5A_V15/DIFFIO_RX_R8N/DQ1R DNU__H1
W12 H2
V12 IO_3B_W12/CLK1N/DIFFIO_RX_B23N U20 9PAD2 C142 100nF M1 DNU__H2
IO_3B_V12/CLK1P/DIFFIO_RX_B23P PAD GND DNU__M1
AA13 EPCQ_nCSO 1 8 M2
FPGA_CLK2_50 Y13 IO_4A_AA13/CLK2N/DIFFIO_RX_B31N
IO_4A_Y13/CLK2P/DIFFIO_RX_B31P
FPGA_IO4 CycloneV 5CSEMA4U23 EPCQ_DATA1R134 33R 2 CS# VCC
DO(IO1) HD(IO3)
7 R135 33REPCQ_DATA3 T1 DNU__M2
DNU__T1
AA15 EPCQ_DATA2R136 33R 3 6 R137 33REPCQ_CLK T2
IO_4A_AA15/CLK3N/DIFFIO_RX_B39N VERSION : 1.0 WP(IO2) CLK DNU__T2
Y15 4 5 R138 33REPCQ_DATA0 U8
D12 IO_4A_Y15/CLK3P/DIFFIO_RX_B39P PAGE : 4 of 11 GND DI(IO0) Y1 DNU__U8
C12 IO_8A_D12/CLK7P/DIFFIO_RX_T1P DATE : AUG_ 2013 Y2 DNU__Y1
IO_8A_C12/CLK7N/DIFFIO_RX_T1N SOIC_8PIN DNU__Y2
GND
AH7 B1
{7} PRINP3_31 IO_4A_AH7/RZQ_0/DIFFIO_TX_B25N RREF_TL__B1
AF26
{7} PRINP4_31 IO_5A_AF26/RZQ_1/DIFFIO_TX_R1P/DQ1R R335
DDR3_VREF_HPS T27
H28 VREFB6BN0_HPS_6B_T27 2K 1%
VREFB6AN0_HPS_6A_H28 CycloneV 5CSEMA4U23
AE5 TPS3809K33DBVR VERSION : 1.0
AF12 VREFB3AN0_3A_AE5
AF16 VREFB3BN0_3B_AF12 VCC3P3 2 R139 0R GND
PAGE : 10 of 11
VREFB4AN0_4A_AF16 RESET HPS_RESET_N {4} DATE : AUG_ 2013
AC26 R140 0R HPS_RGMII0_RESETn {8}
D19 VREFB5AN0_5A_AC26 3 R141
D9 VREFB7A7B7C7DN0_HPS__D19 C150 VDD
VREFB8AN0_8A_D9 1
U83 VCC3P3 100nF GND 100K
GND FPGA运行指示灯 {8} KSZ9031_XI R142 18R2 3
OUT VCC
4 U21
CycloneV 5CSEMA4U23 VCC3P3
VERSION : 1.0 R36 1K 1% {4} HPS_CLK1_25 R143 18R2 2 1 GND GND
GND EN
DDR3_VREF_HPS
PAGE : 8 of 11 D18 GREEN R144 18R2 YSO321SR_25MHz TPS3809K33DBVR
DATE : AUG_ 2013 {4} HPS_CLK2_25
GND
C154 C155 FPGA_CLK1_50 R147 18R2 VCC3P3 2 R145 4K7 HPS_W ARM_N {4}
100nF 100nF R34 1K 1% Q9 RESET
{5} FPGA_RUN FPGA_CLK2_50
C0402 C0402 R148 18R2 GZ1608D121TF C538 C541 3 R146
S9014W C153 VDD
R35 4K7 10nF 100nF 1
100nF GND 100K
FPGA运行指示灯
GND
GND SOC 晶振电路 U23

GND GND GND

 P1-11
A10 K12
A3 GND__A10 GND__K12 K14
VCC_AUX_SHARED VCCA_FPLL AA1 GND__A3 GND__K14 K16
AA17 GND__AA1 GND__K16 K2
VCC3P3 P1-1 VCCA_FPLL L18 VCC2P5 AA2 GND__AA17 GND__K2 K20
J19 K5 1 2 C156 C164 C157 C158 AA26 GND__AA2 GND__K20 K3
F22 VCCRSTCLK_HPS__J19 HPS_CLOCK VCCA_FPLL__K5 P4 100nF 47nF 100nF 47nF AA3 GND__AA26 GND__K3 K4
VCC3P3 VCCRSTCLK_HPS__F22 & Reset Pins VCCA_FPLL__P4 U4 180ohm at 100MHz C0402 C0402 C0402 C0402 AA9 GND__AA3 GND__K4 L1
Configuration pins Y10 FPGA_PLL VCCA_FPLL__U4 W5 AB1 GND__AA9 GND__L1 L13
Supply:VCC 3.3V AD24 VCCPGM__Y10 SUPPLY VCCA_FPLL__W5 J4 AB2 GND__AB1 GND__L13 L15
H10 VCCPGM__AD24 Configuration pins VCCA_FPLL__J4 AA21 AB24 GND__AB2 GND__L15 L17
VCC2P5 VCCBAT VCCPGM__H10 power Supply VCCA_FPLL__AA21 M4 FPGA_PLL Supply GND GND AB25 GND__AB24 GND__L17 L19
D7 VCCA_FPLL__M4 R4 :VCC 2.5V for VCCPGM AB26 GND__AB25 GND__L19 L2
VCCBAT__D7 Battery Supply VCCA_FPLL__R4 VCC_AUX VCC2P5 VCC3P3 VCC_AUX AB27 GND__AB26 GND__L2 L24
AA5 AC21 AB3 GND__AB27 GND__L24 L27
W9 VCCIO3A__AA5 VCC_AUX__AC21 AC8 AC1 GND__AB3 GND__L27 L3
AA12 VCCIO3A__W9 Auxiliary VCC_AUX__AC8 AD15 Auxiliary supply C165 C159 C160 C161 C162 C163 AC2 GND__AC1 GND__L3 L5
VCC3P3 AE10 VCCIO3B__AA12 Supply VCC_AUX__AD15 E15 :VCC 2.5V 100nF 100nF 47nF 100nF 100nF 47nF AC3 GND__AC2 GND__L5 M10
AE13 VCCIO3B__AE10 VCC_AUX__E15 F8 VCC_AUX_SHAREDVCC2P5 C0402 C0402 C0402 C0402 C0402 C0402 AD14 GND__AC3 GND__M10 M11
AG4 VCCIO3B__AE13 VCC_AUX__F8 F21 AD22 GND__AD14 GND__M11 M14
AA16 VCCIO3B__AG4 FPGA_VCCIO VCC_AUX_SHARED__F21 AD25 GND__AD22 GND__M14 M16
AE21 VCCIO4A__AA16 :Bank3A/3B H23 AD3 GND__AD25 GND__M16 M20
VCC3P3 AF14 VCCIO4A__AE21 :Bank4A/5A HPS_PLL SUPPLY VCCPLL_HPS__H23 GND GND AD6 GND__AD3 GND__M20 M3
AF19 VCCIO4A__AF14 U21 AD8 GND__AD6 GND__M3 M8
AG12 VCCIO4A__AF19 VCC_HPS__U21 K17 AE1 GND__AD8 GND__M8 N1
FPGA IO Power AG22 VCCIO4A__AG12 VCC_HPS__K17 L16 VCCINT_FPGA AE16 GND__AE1 GND__N1 N13
：VCC_3.3V AH15 VCCIO4A__AG22 VCC_HPS__L16 L18 HPS Core POWER
FPGA Core POWER AE18 GND__AE16 GND__N13 N15
AH25 VCCIO4A__AH15 VCC_HPS__L18 M17 ：VCC_1.1V AE2 GND__AE18 GND__N15 N17
W13 VCCIO4A__AH25 HPS_CORE VCC_HPS__M17 M18 C166 C167 C168 C169 C170 C171 AE3 GND__AE2 GND__N17 N19
VCC3P3 AC25 VCCIO4A__W13 SUPPLY VCC_HPS__M18 M19 10uF 10uF 10uF 47nF 10nF 10nF AF1 GND__AE3 GND__N19 N2
W17 VCCIO5A__AC25 VCC_HPS__M19 N16 C0603 C0603 C0603 C0402 C0402 C0402 AF2 GND__AF1 GND__N2 N3
C25 VCCIO5A__W17 VCC_HPS__N16 N18 VCC1P1_HPS VCCINT_FPGA AF24 GND__AF2 GND__N3 N4
C27 VCCIO6A_HPS__C25 VCC_HPS__N18 P17 AF3 GND__AF24 GND__N4 N8
F27 VCCIO6A_HPS__C27 VCC_HPS__P17 P19 AG1 GND__AF3 GND__N8 P1
G24 VCCIO6A_HPS__F27 VCC_HPS__P19 AG17 GND__AG1 GND__P1 P10
H21 VCCIO6A_HPS__G24 J11 C172 C173 C174 C175 C176 C177 C178 AG2 GND__AG17 GND__P10 P12
DDR3 IO Power H26 VCCIO6A_HPS__H21 VCC__J11 K13 10uF 100nF 100nF 100nF 100nF 100nF 100nF AG27 GND__AG2 GND__P12 P16
:Bank6A/6B L26 VCCIO6A_HPS__H26 VCC__K13 K15 C0603 C0402 C0402 C0402 C0402 C0402 C0402 AG3 GND__AG27 GND__P16 P18
:VCCIO_1.5V M21 VCCIO6A_HPS__L26 VCC__K15 L11 AG7 GND__AG3 GND__P18 P2
AD27 VCCIO6A_HPS__M21 HPS_VCCIO VCC__L11 L12 FPGA Core POWER AH10 GND__AG7 GND__P2 P20
P27 VCCIO6B_HPS__AD27 :Bank6A/6B VCC__L12 L14 ：VCC_1.1V AH20 GND__AH10 GND__P20 P25
T21 VCCIO6B_HPS__P27 :Bank7A/6C VCC__L14 M12 B15 GND__AH20 GND__P25 P3
T25 VCCIO6B_HPS__T21 :Bank7C/7D VCC__M12 M13 C179 C180 C181 C182 C183 C184 C185 B17 GND__B15 GND__P3 P5
VCC1P5_DDR3 VCCIO6B_HPS__T25 :Bank8A VCC__M13 GND__B17 GND__P5
U18 M15 22nF 22nF 22nF 22nF 22nF 10nF 10nF B20 P8
W27 VCCIO6B_HPS__U18 VCC__M15 M9 C0402 C0402 C0402 C0402 C0402 C0402 C0402 B22 GND__B20 GND__P8 P9
C20 VCCIO6B_HPS__W27 VCC__M9 N10 B25 GND__B22 GND__P9 R1
D18 VCCIO7A_HPS__C20 VCC__N10 N11 VCCINT_FPGA B27 GND__B25 GND__R1 R11
FPGA IO Power B13 VCCIO7A_HPS__D18 VCC__N11 N12 B3 GND__B27 GND__R11 R13
:Bank7A/7B VCC3P3 H14 VCCIO7B_HPS__B13 VCC__N12 N14 B5 GND__B3 GND__R13 R15
:Bank7C/7D B10 VCCIO7B_HPS__H14 VCC__N14 N9 GND B7 GND__B5 GND__R15 R2
:Bank8A
D6 VCCIO7C_HPS__B10 FPGA_CORE VCC__N9 P11 C1 GND__B7 GND__R2 R3
:VCCIO_3.3V VCCIO7D_HPS__D6 SUPPLY VCC__P11 GND__C1 GND__R3
G5 P13 C11 R8
E7 VCCIO7D_HPS__G5 VCC__P13 P14 VCC3P3 C2 GND__C11 GND__R8 T10
VCC3P3 VCCIO8A__E7 VCC__P14 FPGA VCC3P3(BANK 3, 4, 5, 8) GND__C2 GND__T10
P15 C3 T14
AA10 VCC__P15 R10 D10 GND__C3 GND__T14 T3
AA14 VCCPD3A__AA10 VCC__R10 R12 D13 GND__D10 GND__T3 U1
Dedicated power AD13 VCCPD3B4A__AA14 VCC__R12 R14 C186 C187 C188 C189 C190 C191 C192 C193 C194 D16 GND__D13 GND__U1 U12
:Bank3A/3B 3.3V AD16 VCCPD3B4A__AD13 Dedicated pow VCC__R14 R9 10uF 470nF 100nF 100nF 100nF 100nF 47nF 10nF 10nF D21 GND__D16 GND__U12 U17
:Bank4A/5A 3.3V AD18 VCCPD3B4A__AD16 :Bank3A/3B VCC__R9 T15 C0603 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 D3 GND__D21 GND__U17 U2
AD21 VCCPD3B4A__AD18 :Bank4A/5A VCC__T15 T9 E1 GND__D3 GND__U2 U20
VCC3P3 AD9 VCCPD3B4A__AD21 VCC__T9 L4 E19 GND__E1 GND__U20 U24
Y21 VCCPD3B4A__AD9 VCC__L4 T4 E2 GND__E19 GND__U24 U27
K21 VCCPD5A__Y21 VCC__T4 M5 GND E22 GND__E2 GND__U27 U3
Dedicated power K24 VCCPD6A6B_HPS__K21 VCC__M5 N5 E23 GND__E22 GND__U3 U5
:Bank6A/6B 2.5V M24 VCCPD6A6B_HPS__K24 Dedicated pow VCC__N5 R5 E24 GND__E23 GND__U5 V1
VCC2P5 P21 VCCPD6A6B_HPS__M24 :HPS VCC__R5 T5 E27 GND__E24 GND__V1 V14
P24 VCCPD6A6B_HPS__P21 :Bank6A/6B VCC__T5 U26 VCC3P3 E3 GND__E27 GND__V14 V2
E21 VCCPD6A6B_HPS__P24 VCC__U26 HPS VCC3P3(BANK 7) E9 GND__E3 GND__V2 V21
Dedicated power E17 VCCPD7A_HPS__E21 F1 GND__E9 GND__V21 V26
:Bank7A/7B 2.5V E14 VCCPD7B_HPS__E17 Dedicated pow F2 GND__F1 GND__V26 V3
:Bank7C/7D 2.5VVCC3P3 E13 VCCPD7C_HPS__E14 :HPS C195 C196 C197 C198 C199 C200 C201 F23 GND__F2 GND__V3 V4
:Bank 8A 2.5V
E10 VCCPD7D_HPS__E13 :Bank7A/7B 10uF 470nF 100nF 100nF 47nF 10nF 10nF F3 GND__F23 GND__V4 V5
VCCPD8A__E10 :Bank7C/7D
C0603 C0402 C0402 C0402 C0402 C0402 C0402 F6 GND__F3 GND__V5 V8
:Bank8A GND__F6 GND__V8
G1 V9
G2 GND__G1 GND__V9 W1
G3 GND__G2 GND__W1 W16
GND H11 GND__G3 GND__W16 W18
H15 GND__H11 GND__W18 W2
CycloneV 5CSEMA4U23 GND__H15 GND__W2
VERSION : 1.0 H18 W20
H20 GND__H18 GND__W20 W21
PAGE : 1 of 11 VCC2P5 H24 GND__H20 GND__W21 W24
DATE : AUG_ 2013 HPS VCC2P5(BANK 6) H27 GND__H24 GND__W24 W3
H3 GND__H27 GND__W3 W4
J1 GND__H3 GND__W4 Y12
C202 C203 C204 C205 C206 C207 C208 J2 GND__J1 GND__Y12 Y14
10uF 470nF 100nF 100nF 47nF 10nF 10nF J3 GND__J2 GND__Y14 Y20
C0603 C0402 C0402 C0402 C0402 C0402 C0402 J5 GND__J3 GND__Y20 Y24
J9 GND__J5 GND__Y24 Y25
K1 GND__J9 GND__Y25 Y3
K11 GND__K1 GND__Y3
GND GND__K11
GND
VCC1P5_DDR3 HPS 1.5V(BANK 6) HPS_VCC1P1 GND
VCC1P1_HPS
CycloneV 5CSEMA4U23
VERSION : 1.0
C209 C210 C211 C212 C213 C214 C215 C223 C224 C225 C226 C227 C228 C229
10uF 100nF 100nF 100nF 100nF 100nF 100nF 10uF 100nF 100nF 100nF 100nF 100nF 100nF
PAGE : 11 of 11
C0603 C0402 C0402 C0402 C0402 C0402 C0402 C0603 C0402 C0402 C0402 C0402 C0402 C0402 DATE : AUG_ 2013

C216 C217 C218 C219 C220 C221 C222 C230 C231 C232 C233 C234 C235 C236
22nF 22nF 22nF 22nF 10nF 10nF 10nF 22nF 22nF 22nF 22nF 10nF 10nF 10nF
C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402 C0402

GND GND
 J21 J20
SD_CMD 1 2 SPIM0_CLK PRINP2_11 1 2 PRINP2_1
{4} SD_CMD 1 2 SPIM0_SCK {4} {5} PRINP2_11 1 2 PRINP2_1 {5}
SD_PWR 3 4 SPIM0_MOSI PRINP2_10 3 4 PRINP2_2
{4} SD_PW R 3 4 SPIM0_SI {4} {5} PRINP2_10 3 4 PRINP2_2 {5}
SD_D0 5 6 SPIM0_MISO PRINP2_9 5 6 PRINP2_3
{4,5} H_FPGA_DATA 5 6 SPIM0_SO {4} {5} PRINP2_9 5 6 PRINP2_3 {5}
SD_D1 7 8 SPIM0_SS0 PRINP2_8 7 8 PRINP2_16
{4,5} H_NCONFIG 7 8 SPIM0_SS0 {4} {5} PRINP2_8 7 8 PRINP2_16 {5}
SD_D4 9 10 I2C3_SDA PRINP2_7 9 10 PRINP2_15
{4,5} H_FPGA_DCLK 9 10 HPS_SDA {4} {5} PRINP2_7 9 10 PRINP2_15 {5}
SD_D5 11 12 I2C3_SCK PRINP2_6 11 12 PRINP2_14
{4} SD_D5 11 12 HPS_SCL {4} {5} PRINP2_6 11 12 PRINP2_14 {5}
SD_D6 13 14 TRACE_D7 TRACE_D7 SPIS1_MIS0
{4} && I2C0_SCK PRINP2_5 13 14 PRINP2_13
{4,5} H_CONF_DONE 13 14 {5} PRINP2_5 PRINP2_4 13 14 PRINP2_12 PRINP2_13 {5}
{4,5} H_NSTATUS
SD_D7 15 16 TRACE_D6 TRACE_D6 SPIS1_SCS0
{4} && I2C0_SDA 15 16
SD_CLKIN 17 15 16 {5} PRINP2_4 PRINP2_23 15 16 PRINP2_17 PRINP2_12 {5}
{4} SD_CLKI 18 TRACE_D5 TRACE_D5 SPIS1_MOSI
{4} && CAN1_TX 17 18
SD_CLKOUT 19 17 18 {5} PRINP2_23 PRINP2_22 17 18 PRINP2_18 PRINP2_17 {5}
20 TRACE_D4 SPIS1_SCLK
TRACE_D4 {4} && CAN1_RX 19 20
{4} SD_CLKO 19 20 {5} PRINP2_22 PRINP2_21 19 20 PRINP2_30 PRINP2_18 {5}
SD_D2 21 22 NAND_D0 NAND_D0 {4} 21 22
{4} SD_D2 21 22 {5} PRINP2_21 PRINP2_20 21 22 PRINP2_29 PRINP2_30 {5}
SD_D3 23 24 NAND_D1 NAND_D1
HPS_SDA3 {2,4} 23 24
{4} SD_D3 NAND_WP 25 23 24 {5} PRINP2_20 PRINP2_19 23 24 PRINP2_28 PRINP2_29 {5}
26 NAND_D2 NAND_D2
HPS_SCL3 {2,4} 25 26
{4} NAND_W P NAND_CLE 27 25 26 {5} PRINP2_19 PRINP2_31 25 26 PRINP2_27 PRINP2_28 {5}
28 NAND_D3 27 28
{4} NAND_CLE NAND_RB 29 27 28 NAND_D3 {4} {5} PRINP2_31 PRINP1_16 27 28 PRINP2_26 PRINP2_27 {5}
30 NAND_D4 QSPI Slave Select 2
{5} PRINP1_16 29 30
{4} NAND_RB NAND_CE 31 29 30 NAND_D4 {4} PRINP1_4 29 30 PRINP2_25 PRINP2_26 {5}
32 NAND_D5 {5} PRINP1_4 31 32
{4} NAND_CE NAND_RE 33 31 32 NAND_D5 {4} PRINP1_3 31 32 PRINP2_24 PRINP2_25 {5}
34 NAND_D6 {5} PRINP1_3 33 34
{4} NAND_RE 33 34 NAND_D6 {4} PRINP1_8 33 34 PRINP4_1 PRINP2_24 {5}
35 36 NAND_D7 NAND_D7 {4} {5} PRINP1_8 35 36
35 36 PRINP1_7 35 36 PRINP4_2 PRINP4_1 {5}
37 38 NAND_ALE NAND_ALE {4} {5} PRINP1_7 37 38
37 38 PRINP1_6 37 38 PRINP4_31 PRINP4_2 {5}
39 40 NAND_WE NAND_W E {4} {5} PRINP1_6 39 40
39 40 PRINP1_5 39 40 PRINP4_3 PRINP4_31 {5}
GND 41 42 {5} PRINP1_5 41 42
PRINP3_9 43 41 42 PRINP1_9 41 42 PRINP4_4 PRINP4_3 {5}
44 {5} PRINP1_9 43 44
{5} PRINP3_9 PRINP3_7 45 43 44 PRINP1_10 43 44 PRINP4_5 PRINP4_4 {5}
46 {5} PRINP1_10 45 46
{5} PRINP3_7 PRINP3_31 47 45 46 PRINP1_11 45 46 PRINP4_6 PRINP4_5 {5}
48 GND {5} PRINP1_11 47 48
{5} PRINP3_31 PRINP3_6 49 47 48 PRINP1_12 47 48 PRINP4_7 PRINP4_6 {5}
50 49 50
{5} PRINP3_6 PRINP3_8 51 49 50 {5} PRINP1_12 PRINP1_13 49 50 PRINP4_8 PRINP4_7 {5}
52 51 52
{5} PRINP3_8 DIFFIO_T22N 53 51 52 {5} PRINP1_13 PRINP1_14 51 52 PRINP4_9 PRINP4_8 {5}
54 53 54
{5} DIFFIO_T22N DIFFIO_T22P 55 53 54 {5} PRINP1_14 PRINP1_15 53 54 PRINP4_10 PRINP4_9 {5}
56 {5} PRINP1_15 55 56
{5} DIFFIO_T22P DIFFIO_T21N 57 55 56 PRINP1_31 55 56 PRINP4_11 PRINP4_10 {5}
58 {5} PRINP1_31 57 58
{5} DIFFIO_T21N DIFFIO_T21P 59 57 58 J28 PRINP1_17 57 58 PRINP4_12 PRINP4_11 {5}
60 59 60
{5} DIFFIO_T21P Signal_D 59 60 {5} PRINP1_17 PRINP1_19 59 60 PRINP4_13 PRINP4_12 {5}
R389 33R/NC 61 62 {5} PRINP1_19 61 62
{5} DIFFIO_T23P FOUT_N 61 62 5V_IN L4 BEAD_ FERRITE VCC5P0 PRINP1_2 61 62 PRINP4_14 PRINP4_13 {5}
R390 33R/NC 63 64 63 64
{5} DIFFIO_T23N FOUT_P 63 64 {5} PRINP1_2 PRINP1_1 63 64 PRINP4_15 PRINP4_14 {5}
R391 33R/NC 65 66 1 2 65 66
{5} PRINP3_11 {5} PRINP1_1 PRINP4_15 {5}

1
2
R392 33R/NC FSIN_N 67 65 66 68 PRINP1_21 67 65 66 68 PRINP4_16
{5} PRINP3_14 FSIN_P 67 68 {5} PRINP1_21 PRINP1_20 67 68 PRINP4_30 PRINP4_16 {5}
R393 33R/NC 69 70 69 70
{5} PRINP3_16 PRINP3_5 71 69 70 {5} PRINP1_20 PRINP1_18 69 70 PRINP4_29 PRINP4_30 {5}
72 TVS1 71 72
{5} PRINP3_5 PRINP3_4 73 71 72 {5} PRINP1_18 PRINP1_22 71 72 PRINP4_28 PRINP4_29 {5}
74 SMAJ40CA 73 74
{5} PRINP3_4 PRINP3_3 75 73 74 {5} PRINP1_22 PRINP1_23 73 74 PRINP4_27 PRINP4_28 {5}
76 75 76
{5} PRINP3_3 PRINP3_2 77 75 76 {5} PRINP1_23 PRINP1_24 75 76 PRINP4_26 PRINP4_27 {5}
78 77 78
{5} PRINP3_2 PRINP3_1 79 77 78 {5} PRINP1_24 PRINP1_25 77 78 PRINP4_25 PRINP4_26 {5}
80 79 80
{5} PRINP3_1 PRINP3_24 81 79 80 {5} PRINP1_25 PRINP1_26 79 80 PRINP4_24 PRINP4_25 {5}
82 81 82
{5} PRINP3_24 PRINP3_25 83 81 82 {5} PRINP1_26 PRINP1_27 81 82 PRINP4_22 PRINP4_24 {5}
84 GND 83 84
{5} PRINP3_25 PRINP3_26 85 83 84 {5} PRINP1_27 PRINP1_28 83 84 PRINP3_23 PRINP4_22 {5}
86 85 86
{5} PRINP3_26 PRINP3_27 87 85 86 {5} PRINP1_28 PRINP1_29 85 86 PRINP3_22 PRINP3_23 {5}
88 87 88
{5} PRINP3_27 PRINP3_10 89 87 88 PRINP4_23 {5} PRINP1_29 PRINP1_30 87 88 PRINP3_21 PRINP3_22 {5}
90 89 90
{5} PRINP3_10 PRINP4_21 91 89 90 PRINP4_23 {5} {5} PRINP1_30 PRINP3_13 89 90 PRINP3_20 PRINP3_21 {5}
92 91 92
{5} PRINP4_21 PRINP4_17 93 91 92 {5} PRINP3_13 PRINP3_12 91 92 PRINP3_19 PRINP3_20 {5}
94 93 94
{5} PRINP4_17 PRINP4_20 95 93 94 {5} PRINP3_12 PRINP3_30 93 94 PRINP3_18 PRINP3_19 {5}
96 95 96
{5} PRINP4_20 PRINP4_19 97 95 96 {5} PRINP3_30 PRINP3_29 95 96 PRINP3_17 PRINP3_18 {5}
98 97 98
{5} PRINP4_19 PRINP4_18 99 97 98 {5} PRINP3_29 PRINP3_28 97 98 PRINP3_15 PRINP3_17 {5}
100 99 100
{5} PRINP4_18 99 100 {5} PRINP3_28 99 100 PRINP3_15 {5}

AMP_5179009-4 AMP_5179009-4
底板接口
37P(ARM)+21P(FPGA)+21P(GND)+7P(5V)+5P(光纤)+5P(24V)+4P(差分输入)改为： 100P
37P(ARM)+24P(FPGA)+21P(GND)+7P(5V)+5P(NC)+6P(差分输入)

VCC3P3

R332

4K7

R336 330R J27

{4} UART0_RX

J10

1
2
VCC3P3
UART0-RX
UART0-TX
3
2 散热器
1
1

R334 UART0
GND
4K7 Q4

R337 330R PESD3V3L2BT

{4} UART0_TX
3

GND
 VCC3P3
{5} KSZ9031_XI XI R352
0R/NC
3
OUT
U84
VCC
4 ETH0
2 1
GND EN
YSO321SR_50MHz 10Base-T/100Base-TX/1000BASE-T
GND

VCC1P2 180ohm at 100MHz AVDDL_PLL

GZ1608D121TF C579 C578 L21 1 2
100nF 10nF
C0402 C0402 C572 C574 C573
10uF 10nF 10nF
C0603 C0402 C0402
HPS_ENET_LDO_O
GND HPS_ENET_RSET_N
CLK125_NDO_LED_MODE HPS_ENET_RSET_N {5}
GND
HPS_ENET_INT_N
HPS_ENET_MDIO HPS_ENET_INT_N {4}
VCC3P3 180ohm at 100MHz AVDDH
1000M-RJ45接口 L19 1 2
HPS_ENET_MDIO {4}

XI
C568 C569 C570 C571 DVDDH VCC3P3
VCC3P3 10uF 10nF 10nF 10nF 1 L23 2
C0603 C0402 C0402 C0402 R348 12K1 1% C583
C580 C581 C582 10uF180ohm at 100MHz
R92 R93 10nF 10nF 10nF C0603
GND C0402 C0402 C0402
J11
GND U1

49

48
47
46
45
44
43
42
41
40
39
38
37
MDI0_P 1 11 470R 470R KSZ9031RN GND
MDI0_N 2 TD1+ GRLA 12 LED_TX

DVDDL
AVDDL_PLL
LDO_O
XI
XO

RESET_N
CLK125_NDO

INT_N
P_GND

AVDDH

DVDDH
ISET

MDIO
MDI1_P 3 TD1- GRLC
MDI1_N 4 TD2+ Left Green LED LINK
TD2-
MDI2_P 7 13 LED_RX
MDI2_N 8 TD3+ YELC 14
MDI3_P 9 TD3- YELA ACT 1 36 HPS_ENET_MDC
MDI3_N TD4+ MDI0_P AVDDH MDC HPS_ENET_RX_CLK HPS_ENET_MDC {4}
10 Right Yellow LED 2 35
TD4- VCC1P2 MDI0_N TXRXP_A RX_CLK HPS_ENET_RX_CLK {4}
VCC3P3 180ohm at 100MHz AVDDL 3 34
15 L20 1 2 4 TXRXM_A DVDDH 33 HPS_ENET_RX_DV
GND0 MDI1_P AVDDL RX_DV HPS_ENET_RX_DATA0 HPS_ENET_RX_DV {4}
R97 33R/NC 5 16 5 32
6 TCT
RCT
GND1
GND2
17
18
C567
10uF
C566
10nF
C565
10nF
MDI1_N
MDI2_P
6
7
TXRXP_B
TXRXM_B KSZ9031RNI RXD0
RXD1
31
30
HPS_ENET_RX_DATA1 HPS_ENET_RX_DATA0 {4}
HPS_ENET_RX_DATA1 {4}
C136 C137 GND3
EARTH_ETH0
C0603 C0402 C0402 MDI2_N 8
9
TXRXP_C
TXRXM_C 48-pin QFN DVDDL
VSS
29
28 HPS_ENET_RX_DATA2
48F-01GY2DPL2NL MDI3_P AVDDL RXD2 HPS_ENET_RX_DATA3 HPS_ENET_RX_DATA2 {4}
10uF102/1kV 10 27
MDI3_N TXRXP_D RXD3 HPS_ENET_RX_DATA3 {4}
GND 11 26
12 TXRXM_D DVDDL 25 HPS_ENET_TX_EN
AVDDH TX_EN HPS_ENET_TX_EN {4}
ETH0_GND
L15 180ohm at 100MHz

GTX_CLK
VSS_PS
R105 0R 1 2

DVDDH
DVDDL

DVDDL

DVDDL
TXD0
TXD1
TXD2
TXD3
LED2

LED1
ETH0_GND GND EARTH_ETH0

13
14
15
16
17
18
19
20
21
22
23
24
VCC1P2 180ohm at 100MHz DVDDL
L22 1 2
C564
VCC3P3 10uF C563 C562 C561 C560 C559 C558
R353 4K7 HPS_ENET_INT_N C0603 10nF 10nF 10nF 10nF 10nF 10nF
R354 4K7 HPS_ENET_MDC C0402 C0402 C0402 C0402 C0402 C0402 HPS_ENET_GTX_CLK
HPS_ENET_MDIO HPS_ENET_TX_DATA3 HPS_ENET_GTX_CLK {4}
R355 4K7 GND HPS_ENET_TX_DATA3 {4}
R356 4K7 HPS_ENET_RSET_N HPS_ENET_TX_DATA2
HPS_ENET_TX_DATA2 {4}
GND HPS_ENET_TX_DATA1
HPS_ENET_TX_DATA1 {4}
HPS_ENET_TX_DATA0
HPS_ENET_TX_DATA0 {4}
LED_TX
VCC3P3
DVDDH LED_RX R351
R357 4K7 LED_TX R360 1K/NC 4K7
R358 4K7/NC LED_RX R361 1K 1% A5有上拉
R359 4K7/NC HPS_ENET_RX_CLK R362 1K 1%
GND
PHY Address is 00001

DVDDH
R363 4K7/NC CLK125_NDO_LED_MODE R366 4K7
R364 4K7/NC HPS_ENET_RX_DV R367 4K7 RGMII Routing Constraints (Reduced Gigabit Media Independent Interface):
R365 4K7/NC HPS_ENET_GTX_CLK R368 4K7/NC The RGMII signals must be length-matched by TX and RX groups.
R369 4K7 HPS_ENET_RX_DATA0 R372 4K7/NCGND That is, the TX group should be matched within 0.25 inch (6.35 mm),
R370 4K7 HPS_ENET_RX_DATA1 R373 4K7/NC and the RX group should be matched within 0.25 inch (6.35 mm).
R371 4K7 HPS_ENET_RX_DATA2 R374 4K7/NC Total length should not exceed 1.75 inch (44.5 mm).
HPS_ENET_RX_DATA3 There is no requirement to match the TX and RX groups
R375 4K7 R376 4K7/NC because their clocks are not related.