Field Effect Transistors

Transistor: Design philosophy

• A three terminal device.
• Electrons were emitted by heating a wire (cathode) which moved towards positive electrode.
• Current between anode and cathode were controlled by a control voltage.

Picture of a triode

2
Transistor: Energy band diagram

Ability to control the flow of current by

modulating energy landscape
 Limits of BJT
• What is the output when input is high?

• Power is consumed under static mode

• BJT circuits are power hungry

• High noise, low thermal stabily

 Limits of BJT

• Low input impedance (=V/I) implies that a device

draws current and the signal power is lost

• It can influence operation at low voltages

• The input signal is at microvolt, power is below picowatt!

 Some key advantages
• Low input impedance has application in audio circuits and radio frequency circuits where
impedance matching is needed

• High bandwidth

• High gain

• Applications in sensing circuits

 Field Effect Transistors
• FETs are voltage controlled devices with high input impedance
• Can be easily fabricated with high density
• High temperature stability

• Almost zero standby power: do not consume power at 0 or 1 state

• Can be used as a capacitor and a resistor

 Junction Field Effect Transistors
▪ JFET is a three-terminal device with one terminal capable of controlling the current between the other
two.
▪ In the absence of any applied potentials the JFET has two p – n junctions under no-bias conditions.

Three terminals are: N-type

crystal/substrate
1.Drain
2.Source
3.Gate
Water analogy for the JFET
control mechanism.
The two p-regions are
internally shorted
Types of JFET

n-channel p-channel
 Construction
• For an n-channel FET, the device is constructed from a bar of n-type material, with the
shaded areas composed of a p-type material as a Gate.

• Between the Source and the Drain, the n-type material acts as a resistor.
• The current flow consists of the majority carriers (electrons for n-type material).

Since the Gate junction is reverse biased and because there is no minority carrier contribution to
the flow through the device, the input impedance is extremely high.

The control element for the JFET comes from depletion of charge carriers from
the n-channel.
Operation of n-channel JFET

▪ A positive voltage 𝑉𝐷𝑆 is applied between drain and source

▪ The source terminal is connected directly to the source i.e. 𝑉𝐺𝑆 =

0. (Gate and source are at the same potential)

▪ The pn junction is negatively biased generating a depletion

region

▪ The depletion region is wider near the top of both p -type

materials

▪ The concentration of positive charges is higher at the top, which

depletes the negative charges
PN junction

Positive bias makes the depletion region narrow

Negative bias makes the depletion region wide
Operation of n-channel JFET

▪ The instant the voltage 𝑉𝐷𝐷 (= 𝑉𝐷𝑆 ) is applied, the electrons are
drawn to the drain terminal, establishing the conventional
current 𝐼𝐷 with the defined direction.

▪ The path of charge flow clearly reveals that the drain and source
currents are equivalent (𝐼𝐷 = 𝐼𝑆 ).

▪ Under the conditions in Fig. , the flow of charge is relatively

uninhibited and is limited solely by the resistance of the n -
channel between drain and source.

It is important to note that the depletion region is wider near the top of both p -type materials.
 The reason for the change in width of the region is best described using a resistance based
model

▪ Assuming a uniform resistance in the n-channel,

we can break down the resistance of the channel
into the divisions.

▪ The current 𝐼𝐷 will establish the voltage levels

through the channel.

▪ The upper region of the p -type material will be

reverse-biased by about 1.5 V, with the lower
region only reverse-biased by 0.5 V.

The fact that the p – n junction is reverse-biased for the

length of the channel results in a gate current of zero amperes
𝑰𝑫 𝒗𝒆𝒓𝒔𝒖𝒔 𝑽𝑫𝑺 𝒇𝒐𝒓 𝑽𝑮𝑺 = 𝟎𝑽
 The depletion region’s width changes with gate
Gate voltage voltage and the value of current changes

n-Channel JFET characteristics with 𝐼𝐷𝑆𝑆 = 8 mA and 𝑉𝑃 = -4V.

 JFET’s domains of operation
• Ohmic Region: The device acts like a resistor

• Pinch-Off : The pinch off voltage is the value of Vds when drain current
reaches constant saturation value.

• Breakdown Region

-There is high current as the depletion width is broken

• Cut-Off Region
-The Cutoff Voltage of a JFET is the voltage that is needed at the gate-source
region of the JFET in order to turn it off.
-No drain current flows
P-Channel JFET

p-Channel JFET characteristics with 𝑰𝑫𝑺𝑺 = 6 mA and 𝑽𝑷 = 6 V.

Key Relationships
Gate current and gate source voltage
DC biasing of an FET
Gate current, 𝐼𝐺 = 0, 𝑉𝐺𝐺 = −𝑉𝐺𝑆
𝑉𝐺𝑆 =-2 V 𝑉𝐷𝐷 =

2 2
𝑉𝐺𝑆 −2 𝑅𝐷 =
Drain current, 𝐼𝐷 = 𝐼𝐷𝑆𝑆 1− = 10 1 −
𝑉𝑃 −8
= 5.625 mA

𝑉𝐷𝐷 = 𝐼𝐷 𝑅𝐷 + 𝑉𝐷𝑆 = 16𝑉 − 5.625𝑚𝐴 2 𝑘=4.75 V

𝑉𝐺𝐺
Two dimensional electron gas (Not for evaluation)
Towards MOSFETs
• Input impedance of JFET is 108 , which is good, but is not suitable for fast
computation

• The reverse biasing of the channel is a problem as it requires constant voltage

application

• The depletion mode of operation can slow down the device

• Input impedance of MOSFET is 1015 , which makes it suitable for fast

computation and low power circuits

• The device works in depletion and enhancement modes

• Faster switching times and low form factor

Operation of MOSFETs
Depletion Type

▪ A slab of p -type material is formed from a silicon base

and is referred to as the substrate.
▪ The source and drain terminals are connected through
metallic contacts to n -doped regions linked by an n –
channel.
▪ The gate is also connected to a metal contact surface but
remains insulated from the n -channel by a very thin
silicon dioxide (SiO 2 ) layer.

There is no direct electrical connection between the gate

terminal and the channel of a MOSFET.
 Basic Operation and Characteristics Drain current, 𝐼𝐷 = 𝐼𝐷𝑆𝑆 1−
𝑉𝐺𝑆
2

𝑉𝑃

Transfer characteristics for an n-channel depletion-type

n-Channel depletion-type MOSFET with
MOSFET.
𝑽𝑮𝑺 = 𝟎 and applied voltage 𝑽𝑫𝑫 .
n-channel depletion mode MOSFET

saturation
Ohmic region
region

𝑉𝑇𝑁 is threshold value of 𝑉𝐺𝑆 above which there is finite

drain current

negative 𝑉𝐺𝑆 depletes the n channel of negative charges, which are

pushed away reducing the value of drain current.
Symbol for n-channel depletion mode MOSFET

Conventional symbol Simplified circuit symbol

MOSFETs
Enhancement Type
The absence of a channel between the two n -doped regions.

Drain current, 𝐼𝐷 = 𝑘 𝑉𝐺𝑆 − 𝑉𝑇 2

A positive voltage on the gate generates negative charges at the

Oxide interface. The region of negative charge carriers is
called electron inversion layer.
https://youtu.be/rkbjHNEKcRw
A detailed schematic of n-channel enhancement type
MOSFET
The role of threshold voltage

No current current flow

Basic Operation and Characteristics

The transfer characteristics for an n-channel enhancement-

type MOSFET from the drain characteristics.
Channel formation in the n-channel enhancement-type
MOSFET.
n-channel enhancement type MOSFET

VTN is the threshold voltage above which VGS allows flow of current, if VGS < VTN
drain current is always zero. For p type mosfet, it is called VTP

VGS -VDS (sat)=VTN

Or, VDS (sat)= VGS -VTN
Symbol for n-channel enhancement mode MOSFET

Conventional symbol Simplified circuit symbol

Basic Operation and Characteristics
Basic Operation and Characteristics
Gate length defines the trend of VLSI miniaturization
Load line of MOSFET
Load line of MOSFET
MOSFET and BJT Load lines: A comparison

MOSFET BJT
New Designs : nanowire and graphene

Not for
evaluation
New Designs :3d architectures

Not for
evaluation
 Not for
MOSFET as Sensor evaluation
Symbol of Mosfet

Symbol of n type MOSFET without substrate

(commonly used in textbooks and questions!)
Operation of MOSFET

(63) How MOSFETs and

Field-Effect Transistors
Work! - YouTube

More interesting videos at: (63) Transistors Explained - How transistors work - YouTube
 DC biasing: Common Source circuit
nMOS common source circuit

𝑖𝑓, 𝑉𝐺𝑆 > 𝑉𝑇 , the transistor is in saturation,

Drain current, 𝐼 𝐷
= 𝑘𝑛 𝑉𝐺𝑆 − 𝑉𝑇𝑁 2

Drain to source voltage, VDS = 𝑉𝐷𝐷 − 𝐼𝐷 𝑅𝐷

If 𝑉𝐷𝑆 > 𝑉𝐷𝑆 𝑆𝑎𝑡 = 𝑉𝐺𝑆 −𝑉𝑇𝑁 , the transistor is in the saturation region,
If 𝑉𝐷𝑆 < 𝑉𝐷𝑆 𝑆𝑎𝑡 , the transistor is in non-saturation region
 DC biasing: Common Source circuit
pMOS common source circuit (Note the position
of drain resistance!)

If 𝑉𝐷𝑆 > 𝑉𝐷𝑆 𝑆𝑎𝑡 = 𝑉𝐺𝑆 −𝑉𝑇𝑝 , the transistor is in the saturation region,
If 𝑉𝐷𝑆 < 𝑉𝐷𝑆 𝑆𝑎𝑡 , the transistor is in non-saturation region
𝑉𝑇𝑝 is the threshold voltage at which the device turns on
 DC biasing: Common Source circuit
pMOS common source circuit
 Example problem 1
• Calculate the drain current and drain to source voltage of a common source circuit with an n-channel
enhancement mode MOSFET for the circuit below, while assuming R1 =30 k, R2 =20 k, RD =20 k,
VDD =5V, k, VTN =1 V and Kn =0.1 mA/V2
Example problem 1

The device is in saturation

 Example problem 2
• Calculate the drain current and drain to source voltage of a common source circuit
with a p-channel enhancement mode MOSFET for the circuit below, while assuming
R1 =50 k, R2 =50 k, RD =7.5 k, VDD =5V, k, VTP =-0.8 V and Kp =0.2 mA/V2
 Example problem 2
• Calculate the drain current and drain to source voltage of a common source circuit
with a p-channel enhancement mode MOSFET for the circuit below, while assuming
R1 =50 k, R2 =50 k, RD =7.5 k, VDD =5V, k, VTP =-0.8 V and Kp =0.2 mA/V2
 Field Effect Transistors: Key points
• FETs are widely used particularly in integrated circuits.
• Approximately more than 75% electronic circuits are based on FETs.

• It is a minority carrier device.

• It is a bipolar device.
BJT •
•
It is a diffusion current device.
It is a current operative device.
Types of FETs:
▪ Junction Field Effect Transistor (JFET)
• npn and pnp BJTs. ▪ Metal-Oxide-Semiconductor Field Effect
Transistor (MOSFET)
• Depletion Type
• Enhancement Type
• It is a majority carrier device.
▪ Metal Semiconductor Field Effect Transistors
• It is a unipolar device.
FET •
•
It is a drift current device.
It is a voltage operative device.
(MESFET)

For the FET, an electric field is established by the

• n-channel and p-channel FETs. charges present, which controls the conduction path of
the output circuit without the need for direct contact
between the controlling and controlled quantities.