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Bangladesh University of Business and Technology

Lab Report -02

Experiment No: 02

Name of the Experiment: Realization of Basic gates using Universal Gates.

Course code: CSE 206

Course name: Digital Logic Design Lab

Submitted By:

Name: Nafiza Humauara Hasan


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NHasan Neha Intake: 50
Id: 22234103306 Section: 05

Submitted To:

Name: Md. Mosrur Sakib


Lecturer
Dept. of Electrical & Electronic Engineering
Experiment No: 02
Name of the Experiment: Realization of Basic gates using Universal Gates.

Objective: In digital electronics, logic gates are fundamental building blocks that
process binary inputs and produce binary outputs based on specific logic rules.
There are three primary basic logic gates: AND, OR, and NOT. Additionally, there
are two universal gates, NAND and NOR, which can be used to implement any
other logic gate. The universality of these gates is critical in designing complex
digital circuits with minimal component count.

Theory: A NAND gate produces an output of 0 only when both of its inputs are 1;
otherwise, it generates an output of 1. Similarly, a NOR gate produces an output of 1
only when both inputs are 0; otherwise, it generates an output of 0. Due to their
unique characteristics, both NAND and NOR gates can be utilized to implement any
other basic gate.

NAND Gate: The NAND gate represents the complement of the AND operation. Its
name is an abbreviation of NOT AND. The graphic symbol for the NAND gate
consists of an AND symbol with a bubble on the output, denoting that a complement
operation is performed on the output of the AND gate.
NOR gate: NOR Gate: The NOR gate represents the complement of the OR
operation. Its name is an abbreviation of NOT OR. The graphic symbol for the NOR
gate consists of an OR symbol with a bubble on the output, denoting that a
complement operation is performed on the output of the OR gate.

Required equipment and devices:

SL NO. COMPONENT SPECIFICATION QTY


1. NAND GATE IC-7400 1
2. NOR GATE IC-7402 1
3. IC TRAINER KIT - 1
4. TRAINER BOARD - 1
Circuit Diagram & Data table:
**Implementation using NAND gate:

1. NAND gate as NOT gate: A NOT produces complement of the input. It can have only one input,
tie the inputs of a NAND
gate together. Now it will work as a NOT gate. Its output is
Y = (A.A)’ = (A)’

2. NAND gates as AND gate: A NAND produces complement of AND gate. So, if the output of a
NAND gate is inverted,
overall output will be that of an AND gate.
Y = ((A.B)’)’= (A.B)’ =(A.B)

3. NAND gates as OR gate: From De Morgan’s theorems:


(A.B)’ = A’ + B’.
Similarly, (A’.B’)’ = A’’ + B’’ = A+ B.
So, give the inverted inputs to a NAND gate, obtain OR operation at output.
4. NAND gates as EX-OR gate: The output of a two input EX-OR gate is given by:
Y = A’B + AB’
EX-OR gate can be Implemented using four NAND gates as follows.

Gate No. Inputs Output


1. A,B (A, B)’
2. A, (A,B)’ (A (AB)’)’
3. (A,B)’ ,B (B (AB)’)’
4. (A (AB)’,(B(AB)’)’ A’B+AB’

Now the output from gate no. 4 is the overall output of the configuration.
Y =((A (AB)’)’ (B (AB)’)’)’
= (A(AB)’)’’ + (B(AB)’)’’
= (A(AB)’) + (B(AB)’)
= (A(A’ + B)’) + (B(A’ + B’))
= (AA’ + AB’) + (BA’ + BB’)
= (0+AB’+BA’+0)
= AB’ + BA’
So Y =AB’ + A’B
5. NAND gates as EX-NOR gate: EX-NOR gate is actually EX-OR gate followed by NOT gate. So
give the output of EX-OR gate to a NOT gate, overall ouput is that of an EX-NOR gate.
Y = AB+ A’B

**Implementation using NOR gate:

1. NOR gate as NOT gate: A NOT produces complement of the input. It can have only one input, tie
the inputs of a NOR gat together. Now it will work as a NOT gate. Its output is
Y = (A+A)’ = (A)’

2. NOR gates as AND gate: From De Morgan’s theorems:


(A+B)’ = A’. B’.
Similarly, (A’+B’)’ = A’’. B’’ = A .B
So, give the inverted inputs to a NOR gate, obtain AND operation at output.
3. NOR gates as OR gate: A NOR produces complement of OR gate. So, if the output of a NOR gate
is inverted, overall output will be that of an OR gate.
Y = ((A+B)’)’= (A+B)

4. The output of a two input EX-NOR gate is given by:


Y = AB + A’B’
EX-NOR gate can be implemented using four NOR gates as follows.

Gate No. Inputs Output


1. A, B (A+B)’
2. A, (A + B)’ (A+(A+B)’)’
3. (A + B)’,B (B+(A+B)’)’
4. (A + (A + B)’)’, (B + (A+B)’)’ AB + A’B’
Now the output from gate no. 4 is the overall output of the configuration.
Y =((A + (A+B)’)’ (B +( A+B)’)’)’
= (A+(A+B)’)’’.(B+(A+B)’)’’
= (A+(A+B)’).(B+(A+B)’)
= (A+A’B’).(B+A’B’)
= (A + A’).(A + B’).(B+A’)(B+B’)
= 1.(A+B’).(B+A’).1
= (A+B’).(B+A’)
= A.(B + A’) +B’.(B+A’)
= AB + AA’ +B’B+B’A’
= AB+0+0+B’A’
= AB + B’A’
So Y= AB + A’B

5. NOR gates as EX-NOR gate: The output of a two input EX-NOR gate is given by:
Y = AB + A’B’
EX-NOR gate can be implemented using four NOR gates as follows.
Discussion :
In this experiment we used two universal gates. IC 7400 Quadruple 2-inputes NAND gate and IC
7402 Quadruple 2-inputes NOR gate. We were asked to implement XOR and XNOR using the
NAND gate in the first experiment. We drew the circuit diagram and figured out the truth table.
Later on, we used the NAND gate to implement XOR and XNOR. Secondly, we did the same
procedure but this time, we used NOR gates to implement NOT,AND,OR,XOR and XNOR. And
finally we drew the circuit diagram and checked the circuit.

Conclusion:
In conclusion, this lab report demonstrated the realization of basic gates (AND, OR,
and NOT) using universal gates (NAND and NOR). The experiments on the
breadboard using IC 7400 (NAND gate) and IC 7402 (NOR gate) confirmed the
functionality and versatility of universal gates. Understanding universal gates'
capabilities is crucial for designing complex digital circuits, and this lab helped
reinforce this concept through practical implementations.

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