5 4 3 2 1

D D

PROJECT COVER
Board Name
C
DUO_MB C

Board Version
V1.1
Designer

Reviewed by

B
CIS Library YES B

A A

Project: CV1800B
File: 01 Project Cover
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 1 of 7

5 4 3 2 1
 5 4 3 2 1

D
CONTENT D

PAGE TITLE
1 Project Cover

2 Content

3 Board Architecture

4 Power

5 CV1800B PART1
C
6 CV1800B PART2 C

7 FIX & HOLE

10

11

12

13

14

15
B B

16

17

18

19

20

21

22

23

A A

Project: CV1800B
File: 02 Content
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 2 of 7

5 4 3 2 1
 5 4 3 2 1

Board Architecture

D D

LED
JTAG_TDI I2C0_SCL UART1_TX GPIOA28 VBUS
USB C
JTAG_TDO I2C0_SDA UART1_RX GPIOA29 VSYS

GND GND

PWM10 SD1_GP1 UART4_TX GPIO26 3V3_EN

MIC
PWM11 SD1_GP0 UART4_RX GPIO25 3V3(OUT)

PWM5 SD1_D2 I2C1_SCL UART2/3_TX GPIO19 CAM FPC

C
PWM6 SD1_D1 I2C1_SDA UART2/3_RX GPIO20 C

GND GND

PWM9 SD1_CLK I2C3_SDA SPI2_SCK GPIO23 ADC2

CV1800B
PWM8 SD1_CMD I2C3_SCL SPI2_TX GPIO22 ADC1

UART3_RTS PWM7 SD1_D0 I2C1_SDA SPI2_RX GPIO21 RUN

UART3_CTS PWM4 SD1_D3 I2C1_SCL SPI2_CSn GPIO18 PWR_GPIO4

GND GND GND

B I2C1_SDA GPIOC9 TF CARD GPIOA26 SPINOR_HLD B

I2C1_SCL GPIOC10 GPIOA27 SPINOR_WP

PWM4 JTAG_TMS UART0_TX GPIOA16 GPIOA25 SPINOR_TX

PWM5 JTAG_TCK UART0_RX GPIOA17 GPIOA22 SPINOR_SCK

GND GND
ETH
GPIOA14 GPIOA24 SPINOR_RX

GPIOA15 GPIOA23 SPINOR_CSn

A A
TXP

TXN

GND

RXP

RXN

Project: CV1800B
File: 03 Board Architecture
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 3 of 7

5 4 3 2 1
 5 4 3 2 1

U8

Power

4
VBUS VSYS

S3

S4
A1B12
GND2 A4B9 D1
VBUS2 B8 B5819W S
SUB2 A5 J10 VBUS TP13 TEST-L VBUS
CC1 B7 USB_DM DM 1 USB_DM
DN2 A6 USB_DP USB_DM [6] DP 2 USB_DP
DP1 A7 USB_DP [6] GND TP16 TEST-L
DN1 B6 CONN 1x2PIN(NC)
DP2 A8
D D
SBU1 B5
CC2 B4A9
VBUS1 VBUS
B1A12
GND1 R39 R40

S1

S2
5.1K 1% 5.1K 1%
TYPE-C_16P

VSYS

C1 0.1uF 16V
MAX 18V ROR IC
PRECTION
3V3 0V9
C2

C3

U2 3V3
1

4
TP2
MAX 2A
10K 1%
R1

VIN

BST
U1 TP1
2
10uF 16V

0.1uF 16V

L2 1uH 2.2A 3V3

SW 3 4 L1
2 IN SW 6

C7

C8
C5 20PF 25V 0.47uH 3.4A
5 6 R3 5 GND OUT 1

C10
20PF 25V
C 40.2K 1% R2 0V9 C
GND

EN FB EN FB

C4

C6

C11
22uF 6.3V

C12
22uF 6.3V
0.8V 4.7K 1.2V 0.6V

C9

10K 1%
R4
MP1605GTF

MAX 2A

10uF 6.3V

0.1uF 6.3V
C13
1uF 16V

MP1657GTF
3

10uF 6.3V

0.1uF 6.3V
R5

1uF 6.3V(NC)
13K 1%
3

R6
20K 1%
3V3_EN 1 G
[6] 3V3_EN R41
1K 5% Q1
SOFT START
t=-RC*ln(1-Ven/Vin)=-RC*ln(0.64)=10ms Vout=0.60*(1+10K/20K)=0.9V
CJ3134K S
Vout=0.8*[(40.2K/13K)+1]=3.31V SVB unnecessary
2

POWER SEQUENCE:1

B B

2 3 CJ3139K

D
3V3 1V8 3V3 Q2
3V3_PREI

G
MAX 2A

C14
1uF 6.3V

C15
1uF 6.3V
U3 TP3

1
3 4 L3
2 IN SW 6 0.47uH 3.4A
5 GND OUT 1
R9
20K 1%

C18
20PF 25V

10K
R7
R8 1V8
EN FB
C16

C17

C20
10uF 6.3V

C21
10uF 6.3V

C22
0.1uF 6.3V

20K 1% 1.2V 0.6V

C19

MP1605GTF

MAX 2A
10uF 6.3V

0.1uF 6.3V

3
1uF 6.3V

D
1 G
R11 10K 1%

1V8 R10 1K 5% Q3
CJ3134K
S
Vout=0.60*(1+20K/10K)=1.8V R12

2
10K
POWER SEQUENCE:1

A A

Project: CV1800B
File: 04 Power
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 4 of 7

5 4 3 2 1
 5 4 3 2 1

CV1800B I
USB&ETH&MIPI 1V8 GPIO26_ADC0
GPIO27_ADC1
R13
R15
10K 1%
10K 1%
ADC1
ADC2
R14
R16
10K 1%
10K 1%
U4B

D
VDD18A_USB_PLL 1p8V only VDD18A_USB_PLL_ETH_CSI
52
D
44 ADC1
((ADC1)/XGPIOB[3]/KEY_COL2/PWM[3])___[PD]|[FS]_____________________ADC1
53 J9
USB_DP 54 USB_DP [5]
USB_DM 45 ADC2 USB_DM [5] 1
(USB_VBUS_DET/XGPIOB[6](ADC2)/CAM_MCLK0/CAM_MCLK1/PWM[4])__[HIZ]|_________________USB_VBUS_DET MIPI0_DN0 2
47 EPHY_RXN MIPI0_DP0 3
((PAD_ETH_TXP)/UART3_RX/IIC1_SCL/XGPIOB[25]/PWM[13]/CAM_MCLK0/SPI1_SDO/IIS2_LRCK)__[HIZ]|_______PAD_ETH_TXP___EPHY_RXN 48 EPHY_RXP 4
((PAD_ETH_TXM)/UART3_RTS/IIC1_SDA/XGPIOB[24]/PWM[12]/CAM_MCLK1/SPI1_SDI/IIS2_BCLK)__[HIZ]|_______PAD_ETH_TXM___EPHY_RXP 49 EPHY_TXN MIPI0_DN1 5
((PAD_ETH_RXP)/UART3_TX/CAM_MCLK1/XGPIOB[27]/PWM[15]/CAM_HS0/SPI1_SCK/IIS2_DO)__[HIZ]|_______PAD_ETH_RXP___EPHY_TXN 50 EPHY_TXP MIPI0_DP1 6
((PAD_ETH_RXM)/UART3_CTS/CAM_MCLK0/XGPIOB[26]/PWM[14]/CAM_VS0/SPI1_CS_X/IIS2_DI)__[HIZ]|_______PAD_ETH_RXM___EPHY_TXP 7
56 MIPI0_DN1 MIPI0_CKN 8 17
((PAD_MIPIRX4N)/VI0_CLK/IIC0_SCL/XGPIOC[2]/IIC1_SDA/CAM_MCLK0/KEY_ROW0/UART3_TX/CAM_MCLK1/XGPIOB[9]/PWM[10]/KEY_ROW2/SPI1_SCK/DBG[15])__[PD]|____PAD_MIPIRX4N 57 MIPI0_DP1 MIPI0_CKP 9 18
((PAD_MIPIRX4P)/VI0_D[0]/IIC0_SDA/XGPIOC[3]/IIC1_SCL/CAM_MCLK1/KEY_ROW1/UART3_CTS/CAM_MCLK0/XGPIOB[10]/PWM[11]/KEY_ROW3/SPI1_CS_X/DBG[16])__[PD]|____PAD_MIPIRX4P 58 MIPI0_CKN 10
((PAD_MIPIRX3N)/VI0_D[1]/XGPIOC[4]/CAM_MCLK0/UART3_RTS/IIC1_SDA/XGPIOB[8]/PWM[9]/KEY_COL1/SPI1_SDI/DBG[14])__[PD]|____PAD_MIPIRX3N 59 MIPI0_CKP SENSOR_RSTN 11
((PAD_MIPIRX3P)/VI0_D[2]/XGPIOC[5]/UART3_RX/IIC1_SCL/XGPIOB[7]/PWM[8]/KEY_COL0/SPI1_SDO/DBG[13])__[PD]|____PAD_MIPIRX3P 60 MIPI0_DN0 SENSOR_CLK 12
((PAD_MIPIRX2N)/VI0_D[3]/XGPIOC[6]/IIC4_SCL/DBG[6])__[PD]|____PAD_MIPIRX2N 61 MIPI0_DP0 I2C_SCL 13
((PAD_MIPIRX2P)/VI0_D[4]/XGPIOC[7]/IIC4_SDA/DBG[7])__[PD]|____PAD_MIPIRX2P 62 SENSOR_RSTN I2C_SDA 14
((PAD_MIPIRX1N)/VI0_D[5]/XGPIOC[8]/KEY_ROW3/DBG[8])__[PD]|____PAD_MIPIRX1N 63 I2C_SDA 15
((PAD_MIPIRX1P)/VI0_D[6]/XGPIOC[9]/IIC1_SDA/KEY_ROW2/DBG[9])__[PD]|____PAD_MIPIRX1P 64 I2C_SCL I2C_SDA [7] 16
((PAD_MIPIRX0N)/VI0_D[7]/XGPIOC[10]/IIC1_SCL/CAM_MCLK1/DBG[10])__[PD]|____PAD_MIPIRX0N 65 SENSOR_CLK I2C_SCL [7] 3V3_PREI
((PAD_MIPIRX0P)/VI0_D[8]/XGPIOC[11]/CAM_MCLK0/DBG[11])__[PD]|____PAD_MIPIRX0P FPC_16P_STA

CV180xB_QFN68

C C

VBUS VSYS
VDDIO_SD0_EMMC 3V3_PREI
GPIO0 1
J3
40
U4A GPIO1
VDDIO0_SD0_SPI 3P3V or 1P8V 10
3.3V POWER GPIO2
2
3
4
39
38
37 3V3_EN
VDDIO_SD0_SPI GPIO3 3V3_EN [5]
5 36 3V3_PREI
3 GPIO4 6 35
(SDIO0_CLK/IIC1_SDA/SPI0_SCK/XGPIOA[7]/PWM[15]/EPHY_LNK_LED/DBG[0])_____[PD->DRV_LO+PD]|_________SD0_CLK 4 SD_SD0_CLK [7] GPIO5 7 34
(SDIO0_CMD/IIC1_SCL/SPI0_SDO/XGPIOA[8]/PWM[14]/EPHY_SPD_LED/DBG[1])________________[PD]|_________SD0_CMD 5 SD_SD0_CMD [7]
SD_SD0_D0 [7] 8 33
(SDIO0_D[0]/CAM_MCLK1/SPI0_SDI/XGPIOA[9]/UART3_TX/PWM[13]/WG0_D0/DBG[2])________________[PD]|__________SD0_D0 7 GPIO6 GPIO27_ADC1
SD_SD0_D1 [7] C23 9 32
(SDIO0_D[1]/IIC1_SDA/AUX0/XGPIOA[10]/UART1_TX/PWM[12]/WG0_D1/DBG[3])________________[PD]|__________SD0_D1 8 GPIO7 GPIO26_ADC0
SD_SD0_D2 [7] 10 31
(SDIO0_D[2]/IIC1_SCL/AUX1/XGPIOA[11]/UART1_RX/PWM[11]/WG1_D0/DBG[4])________________[PD]|__________SD0_D2 9 GPIO8 RUN
SD_SD0_D3 [7] 0.1uF 6.3V 11 30 RUN [7]
(SDIO0_D[3]/CAM_MCLK0/SPI0_CS_X/XGPIOA[12]/UART3_RX/PWM[10]/WG1_D1/DBG[5])________________[PD]|__________SD0_D3 11 GPIO9 GPIO22
SD_SD0_CD [7] C0201 12 29 GPIO22 [7]
(SDIO0_CD/XGPIOA[13])________________[PU]|__________SD0_CD
13 28
12 GPIO14 [7] GPIO10 GPIO10 14 27 GPIO21
(SDIO0_PWR_EN/XGPIOA[14])__[PD->DRV_HI/LO+PD]|______SD0_PWR_EN GPIO11 GPIO20
[7] GPIO11 15 26
15 GPIO12 GPIO12 16 25 GPIO19
(UART0_TX/CAM_MCLK1/PWM[4]/XGPIOA[16]/UART1_TX/AUX1/JTAG_TMS/DBG[6])_____[PU->DRV_HI+PU]|________UART0_TX 16 GPIO13 GPIO13 GPIO18
17 24
(UART0_RX/CAM_MCLK0/PWM[5]/XGPIOA[17]/UART1_RX/AUX0/JTAG_TCK/DBG[7])________________[PU]|________UART0_RX
18 23
17 GPIO21 GPIO14 19 22 GPIO17
(SPINOR_HOLD_X/SPINAND_HOLD/XGPIOA[26])_____[PD->DRV_HI+PD]|___SPINOR_HOLD_X 18 GPIO18 GPIO15 GPIO16
20 21
(SPINOR_SCK/SPINAND_CLK/XGPIOA[22])_________[DRV_LO+PD]|______SPINOR_SCK 19 GPIO19
(SPINOR_MOSI/SPINAND_MOSI/XGPIOA[25])________________[PU]|_____SPINOR_MOSI 20 GPIO20 CON_PICO_40W (NC)
(SPINOR_WP_X/SPINAND_WP/XGPIOA[27])_____[PU->DRV_HI+PU]|_____SPINOR_WP_X 21 GPIO16
(SPINOR_MISO/SPINAND_MISO/XGPIOA[23])________________[PU]|_____SPINOR_MISO 22 GPIO17
B (SPINOR_CS_X/SPINAND_CS/XGPIOA[24])_________[DRV_HI+PD]|_____SPINOR_CS_X B
24 GPIO1
(JTAG_TDO/UART1_RX/UART2_RX/XGPIOA[29]/IIC0_SDA/WG0_D1/WG1_D0/DBG[11])________________[PU]|________IIC0_SDA 23 GPIO0
(JTAG_TDI/UART1_TX/UART2_TX/XGPIOA[28]/IIC0_SCL/WG0_D0/DBG[10])________________[PU]|________IIC0_SCL 3V3_PREI
25 R17 4.7K
(AUX0/XGPIOA[30]/IIS1_MCLK/WG1_D1/DBG[12])________________[PD]|____________AUX0
14 GPIO15 GPIO12 R18 4.7K
(XGPIOA[15])________________[PD]|__________SPK_EN GPIO13 R19 4.7K
BOOT_Config：(UART0_TX)
PU = Normal
PD = ROM Fail Mode
CV180xB_QFN68

VDDIO_SD1 3V3_PREI
U4D J8
EPHY_RXN
VDDIO_SD1 3p3V only 51 EPHY_RXP
1
2
VDD33A_ETH_USB_SD1 3
36 GPIO2 EPHY_TXN 4
(UART4_TX/PWR_GPIO[26]/PWM[10])_____________[PD]|___SD1_GPIO1 35 GPIO3 EPHY_TXP 5
(UART4_RX/PWR_GPIO[25]/PWM[11])_____________[PD]|___SD1_GPIO0
38 GPIO9 CON_PICO_4W (NC)
(PWR_SD1_D3/SPI2_CS_X/IIC1_SCL/PWR_GPIO[18]/CAM_MCLK0/UART3_CTS/PWR_SPINOR1_CS_X/PWM[4])______[DRV_HI+PD]|______SD1_D3 39 GPIO4
(PWR_SD1_D2/IIC1_SCL/UART2_TX/PWR_GPIO[19]/CAM_MCLK0/UART3_TX/PWR_SPINOR1_HOLD_X/PWM[5])__[PD->DRV_HI+PD]|______SD1_D2 40 GPIO5
(PWR_SD1_D1/IIC1_SDA/UART2_RX/PWR_GPIO[20]/CAM_MCLK1/UART3_RX/PWR_SPINOR1_WP_X/PWM[6])__[PD->DRV_HI+PD]|______SD1_D1 41 GPIO8
A (PWR_SD1_D0/SPI2_SDI/IIC1_SDA/PWR_GPIO[21]/CAM_MCLK1/UART3_RTS/PWR_SPINOR1_MISO/PWM[7])_____________[PD]|______SD1_D0 A
42 GPIO7
(PWR_SD1_CMD/SPI2_SDO/IIC3_SCL/PWR_GPIO[22]/CAM_VS0/EPHY_LNK_LED/PWR_SPINOR1_MOSI/PWM[8])_____________[PD]|_____SD1_CMD 43 GPIO6
(PWR_SD1_CLK/SPI2_SCK/IIC3_SDA/PWR_GPIO[23]/CAM_HS0/EPHY_SPD_LED/PWR_SPINOR1_SCK/PWM[9])______[DRV_LO+PD]|_____SD1_CLK

CV180xB_QFN68
Project: CV1800B
File: 05 CV1800B PART1
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 5 of 7

5 4 3 2 1
 5 4 3 2 1

CV1800B II
0V9
U4F

6
VDDC1
VDDC2
13
37 1V8 VDDC&TPU POWER
VDDC3
VDDC4
VDDC5
46
55 DDR2 POWER 0V9
1V8

C24
10uF 6.3V

C25
1uF 6.3V

C26
0.1uF 6.3V

C27
0.1uF 6.3V
26
VDDQ1 27

C28
10uF 6.3V

C29
1uF 6.3V

C30
1uF 6.3V

C31
1uF 6.3V

C32
0.1uF 6.3V

C33
0.1uF 6.3V

C34
0.1uF 6.3V
VDDQ2 28
69 VDDQ3
D E-PAD D
C0402 C0201 C0201

CV180xB_QFN68

U7 3V3_PREI
1V8 G
2
1 1K 5% R32 3.3K R31
LEVEL SHIFT
U4C VDD18A_AUD +
C93 0.1uF 6.3V
VDD18A_AUD 1p8V only 2
MIC4015(NC)
VDD18A_AUD
67 C35 1uF 6.3V
((PAD_AUD_AINL_MIC)/XGPIOC[23]/IIS1_BCLK/IIS2_BCLK)__[HIZ]|___PAD_AUD_AINL_MIC 1 R30 1K 5% LED
((PAD_AUD_AOUTR)/XGPIOC[24]/IIS1_DI/IIS2_DO/IIS1_DO)__[HIZ]|______PAD_AUD_AOUTR
68
PAD_AUD_AVREF C37 C38
66

10uF 6.3V

0.1uF 6.3V
VSS18A_AUD

CV180xB_QFN68
D2 R28
3V3_PREI

3
C 1V8 BULE HIGH 0402 1K C

1.8V POWER CJ3134K 1 G

D

Q6
S
C39 C40 C41 C42
SYS XTAL

2
10uF 6.3V 0.1uF 6.3V 0.1uF 6.3V 0.1uF 6.3V
1V8
C0402 C0201 C0201 C0201

SYS_XTAL_OUT

SYS_XTAL_IN
3V3
R20 1M
C43 R0201
VDDIO_RTC
U4E
0.1uF 6.3V
C0201
1V8 R33 4.7K R34 4.7K
3V3_PREI

1
VDDIO_RTC 1p8V only 29
R21
X1

G
4.7K
VDDIO_RTC

2
I2C_SCL 2 3 GPIO11
30 PW R_VBAT_DET [6] I2C_SCL GPIO11 [6]

D
GND2GND1
(PWR_VBAT_DET(PWRSAR.VIN3))_________[HIZ]|_______PWR_VBAT_DET 31 PW R_GPIO4 CJ3134K Q7
(PWR_SEQ2/PWR_GPIO[4])__[PD->DRV+PD]|___________PWR_SEQ2 3 1
3 1
3

33 SYS_XTAL_IN R22 Q4
XTAL_XIN 34 SYS_XTAL_OUT 3.3K D R35 4.7K R36 4.7K
XTAL_XOUT G 1 R42 5.1K RUN C46 C0201
1V8 3V3_PREI
RUN [6]

1
32 CJ3134K C0201 25MHz 18PF 25V
(PWR_PTEST)__________[PD]|[FS]__________PTEST

4
S

G
18PF 25V C47
I2C_SDA 2 3 GPIO10
[6] I2C_SDA GPIO10 [6]
2

D
CV180xB_QFN68 CJ3134K Q8
B B

R37 4.7K R38 4.7K

1V8 3V3_PREI

1
G
PW R_GPIO4 2 3 GPIO22
GPIO22 [6]

D
TF_SOCKET CJ3134K Q9

10

11
G1

G2

SD_SD0_CD SD_SD0_D2 1
[6] SD_SD0_CD [6] SD_SD0_D2 SD_SD0_D3 DAT2
2
[6] SD_SD0_D3 SD_SD0_CMD CD/DATA3
3
[6] SD_SD0_CMD CMD
3

4
PU by SOC D 3V3_PREI VDD
Q5 G 1 1K 5% R24 SD_SD0_DET G1
CJ3134K SWITCH
S SD_SD0_CLK 5
R25 [6] SD_SD0_CLK 6 CLK
VSS
2

A
DET TP4 TEST-LSD_SD0_DET 10K SD_SD0_D0 7
[6] SD_SD0_D0 DATA0 A
DAT2 TP5 TEST-L SD_SD0_D2 SD_SD0_D1 8
[6] SD_SD0_D1 DATA1
DAT3 TP6 TEST-L SD_SD0_D3
CMD TP7 TEST-L SD_SD0_CMD
VSD TP8 TEST-L 3V3
G3

G4

GND TP9 TEST-L

SDCK TP10 TEST-L SD_SD0_CLK J5
12

13

DAT0 TP12 TEST-L SD_SD0_D0 CONN_TF 2x2 9P LIE

DAT1 TP11 TEST-L SD_SD0_D1 Project: CV1800B
File: 06 CV1800B PART2
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 6 of 7

5 4 3 2 1
 5 4 3 2 1

FIX&HOLE
D D

C ID1 ID2 ID3 ID4 C

1 1 1 1

MARK-L MARK-L MARK-L MARK-L

B B

A A

Project: CV1800B
File: 07 FIX & HOLE
Date: Wednesday, April 12, 2023 Rev: 1.1

Designed by: <designer> Sheet: 7 of 7

5 4 3 2 1