Design of GaN Power

Amplifiers: Part II

Presented by:
Dr. Edward Niehenke
Niehenke Consulting

Sponsored by:
 GaN Power Amplifier Design
Part 2

Ed Niehenke, PhD, PE
Baltimore, MD 21075
(410) 796-5866, e.niehenke@ieee.org

GaN Power Amplifier Design -1

EDWARD C. NIEHENKE, Ph.D., PE,
Consultant, Baltimore, Maryland, USA.
■ BS, MS, PhD degrees Drexel University
■ Martin-Marietta, Research Department, 2 years,
Cryogenics Electronics
■ Westinghouse/Northrop Grumman, Senior Advisory
Engineer 34 years, State-of-the-art
microwave/millimeter wave circuits and systems
■ Lectured to over 300 students for Besser Associates
and Continuing Education of Europe on Microwave Circuits and
systems
■ Nine patents, three Westinghouse Trade Secret Awards, one
Westinghouse Value Engineering Merit Award, and one George
Westinghouse Innovation Award.
■ 120 presentations at symposia, workshops, IEEE chapter/section
meetings,
■ Authored over 30 papers on RF/microwave/millimeter wave circuits.
■ MTT-S Society 1986/87 Distinguished Microwave Lecturer, “Gallium
Arsenide–Key to Modern Microwave Technology” presented to 70
groups throughout the world.
■ IEEE Centennial and Millennium Medals, fellow of the IEEE, registered
professional engineer in the State of Maryland.

GaN Power Amplifier Design -2

 GaN Power Amplifier Design
■ Effect of power amplifier (PA) conduction angles on
power amplifier currents, power, load line and
efficiency
■ Power and efficiency of PAs versus conduction
angle and input power
■ PA classes of operation description and
comparison
■ Step by step design of Class B GaN PA
■ Modeling of GaN PAs
■ Step by step design of popular Doherty GaN PA
■ Conclusions.

GaN Power Amplifier Design -3

 Effect of Conduction Angle on An’s
An Coefficients Normalized to Imax = 1A Constant Gm
0.6
0.5 A1
0.4 Fundamental A0
0.3 DC Component

0.2 A2
A3 Second Harmonic
0.1 Third
A4 Harmonic
0 Forth
Harmonic
-0.1
0 45 90 135 180 225 270 315 360
Class C B AB A
Conduction Angle (Degrees)
 Normalized Efficiency (hNORM), Normalized Power (PNORM), and
Normalized Load Conductance (GNORM) Versus Amplifier Conduction
Angle - Constant Transconductance - Resistive (R) and Tuned (T) Load

1.2
1.1 P NORM (R)
G NORM (R)
1
0.9
0.8 P NORM and G NORM (T)
h NORM (T)
0.7
h NORM (R)
0.6
0.5
P RF = P NORM (Imax - Imin) (Vmax - Vmin)/8
0.4
0.3 G RF = GNORM (Imax - Imin)/ (Vmax - Vmin)
0.2 h=h NORM
/F
0.1 F = (1 + Imin/(A0(Imax - Imin)) (1 + Vmin/((1 – A’0)(Vmax - Vmin)))
0
0 45 90 135 180 225 270 315 360
Conductance Angle (Degrees)
GaN Power Amplifier Design -5
 Relative Output Power (P/Pnorm), and Efficiency (h)
vs Input Power (p2)and Conduction Angel (CA)
■ Class A and B linear, Class AB nonlinear
h improved for class AB especially at low drive level (p)
1.2

1.1 P/Pnorm
1
2250
2700
0.9 3600
0.8 1800
0.7 1800
2250 2700 2250
0.6

0.5
2700
0.4 3600
0.3 h
0.2

0.1

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Normalized Variable Input Power (p^2)
GaN Power Amplifier Design -6
 Class A, B, AB, C, D, E, F, and F-1
Operation
Constant transconductance, tuned load
IV Trajectory 1max-Imin=1
Imax
Bias Point
D, E, F, F-1, J

C B A B
AB J J C AB
Imin
VQ -180 -90
Vmin Vmax w t (Degrees)
q is angle from origin where current is at Imin
Conduction angle is 2q
Class Conduction Angle Efficiency Gain Linearity
A 3600 50 % High Good
AB 180 - 3600 50 - 78.5% -3 - -6 dB Harmonics
B 1800 78.5 % -6 dB Harmonics
C D, E, F,
C, 0F - -1,
180 J, 01800 >78.5 % Low Harmonics

GaN Power Amplifier Design -7

 Class B Operation - Tuned Load, 78.5%h
Transistor Current (I)
VDC
Current (I) IV Trajectory
VDC Class B, A0 = 1 / p, A1 = 0.5
Imax + -
I R
Imin
Vmin VDC Vmax -180 -90 0 -90 180
wt (Degrees)
wt (Degrees)

Transistor Voltage (V)

GaN Power Amplifier Design -8

 Class D, E, F, and F-1
Class D Class F
Vcc

Idc Iout(wt)
RFC
l/4

Vce(wt) f0 V0ut(wt)

fop01.vsd

Class F-1
Class E

GaN Power Amplifier Design -9

 Class D1 (Push-Pull)
■ Odd mode balance places virtual short circuit in
symmetry plane providing low Z at second
harmonic
■ Series L-C provides open at harmonics especially
important for 3rd and 5th harmonic
■ This enhances Vce to look like square wave with
value when Icd = 0 and Vce = 0 with current value
■ Result: very high efficiency
Vbe Vcc
Ice1
Cser Lser
Q1

Vce1
RG RL
Vce2

Q2 ClassD1.VSD

Ice2
GaN Power Amplifier Design -10
 Class J Operation
■ Provides Broader Bandwidth
compared to Class B
■ See
https://www.youtube.com/watch?v
=N0dLVMoVQSI

■ Class b (Resistive inductive load)

and provide second harmonic load
and short other harmonics) Class J
construction V max - Vknee
■ Power and efficiency same as RLOPT =
Imax
class b with shorts of all
ZL @ f0 = RLOPT ( 1 + j)
harmonics third and above
3p
ZL @ 2f0 = - j R LOPT
8
ZL @ ³ 3f0 = 0
Imax
Idc =
p
V Imax
Pdc = dc
p
h (Same as Class b)
(V max - V min)p
h=
4(V max + V min)

GaN Power Amplifier Design -11

 Power Amplifier Operating Class Summary
Operating J A AB B C D E F D1 F
Class Inverse
Conduction Q 180 360 180 to 180 <180 180
Angle Deg- 360
rees

Gain Reduction dB 6 3 6 8 6 6 6 6 6
To Class A
Ideal Efficiency h 78 50 65 78 85 100 100 100 100 100
%

Efficiency k 1- 1-Vo/Vcc 1- See 1-Vo/Vcc 1- 1-

Reduction Vo/Vcc 2Vo/Vcc Notes Vo/Vcc Vo/Vcc

Efficiency at Very Poo Good Very Poor Poor, Class D, D1, E, and F need to be driven hard to
Reduced Power Good r Good obtain square wave pulse required for high h

Frequency Fo <»150 <»20 MHz KW P <»20

GHz <»2 GHz Watts P
Harmonic nfo 0@ Short 2f0 Short Series LC circuit Short even n Open
Suppression >3f0 All nf0 resonant at fo Open odd n even n
Inducti
ve
Short
Load odd n

Peak Transistor Vmax 2.91Vcc 2Vcc-Vo Vcc-Vo 3.5Vcc- 2Vcc-Vo V0+(Vcc

Voltage Volts -Vo 2.5Vo -Vo)p
Pout/Pin Gain Good Goo Fair Good Poor Poor (Good with system solution)
Linearity d

Supply Voltage Vcc

Volts

Knee Voltage Vo
Volts

GaN Power Amplifier Design -12

Design a 30 W (P1dB) PA using the Wolfspeed
(Crey CGH35030F) GaN HEMT at 1.9 GHz
Operate Class B, Use Tuner for Optimization

Optimum values for

Good Pout@P1dB
PAE and Low
AM/AM and AM/PM

GaN Power Amplifier Design -13

 Matching at Second Harmonic
■ First we will design the second harmonic circuit close to the
transistor
■ It want to see a G = 1@141.80
■ Length @2f0 = (180-141.8)/2 = 19.10
■ Length at f0 = 19.1/2 = 9.550

GaN Power Amplifier Design -14

 Matching at Fundamental
■ Now work at fundamental with the second harmonic
circuit installed
G = 0.612@157.40

50 W 9.550 line
Transistor
50 W
G = 0.612@157.40

23 W 900 line

GaN Power Amplifier Design -15

Match 5.5 Ohm Input

GaN Power Amplifier Design -16

Results Pout = 25 W @P1dB, PAE = 72%, 11.9 dB SS Gain
Unconditionally stable, Input Matched

GaN Power Amplifier Design -17

Results Pout = 25 W @P1dB, PAE = 72%, 11.9 dB SS Gain
Low temp rise 350C, DC current rises with Pin

GaN Power Amplifier Design -18

Summarization of AM/AM and AM/PM for Class A and B
Class B has 2.1 dB Lower Gain with 21% Better h
■ Class A Class B
■ Pout = 31.6 W @P1dB Pout = 25 W @P1dB
■ PAE = 51%, PAE = 72%,
■ 14 dB SS Gain 11.9 dB SS Gain

GaN Power Amplifier Design -19

 Gain Compression with GaN Devices
■ If the product is used for a constant envelop, then work the PA
where the PAE is maximum
■ If the PA is used for varying envelop device, then design the
semiconductor process and matching techniques for low
AM/AM and AM/PM characteristics, and you have a winner
■ Rule of Thumb: For digitally modulated signals without
distortion reduction operate with a peak power at P1dB for
>40 dB adjacent power ratio and < 30 of EVM,

AM to PM of Power Amplifiers
■ AM/PM is caused by a nonlinear parameter changing with
input power
■ For example the transistor has nonlinear capacitors
(varactors) which vary depending on the input power to the
device.
■ Also as the temperature changes (input power), this can
cause a change.
GaN Power Amplifier Design -20
 Digital Modulation Performance
■ Operate the Class A and class B previously designed Cree
CGH3503F 30 W PA with QPSK and 64 QAM signal for -40 dB
ACPR and 3.5 % EVM
■ Bandwidth 30 MHz in both central channel a well as adjacent
channel which is offset 21 MHz
AWR Test Bench Shown Below
QPSK (3.7 dB PAR) 64 QAM (6.1 dB PAR)

GaN Power Amplifier Design -21

 CGH3503F 30 W PA Summary
ACPR = -40 dB. EVM 2 to 30
■ Performance at P1dB (CW Input)
– Class A, P = 45 dBm, PAE = 51%
– Class B, P = 44 dBm. PAE = 72.2%
■ QPSK
– Class A Pav = 42 dBm, PAE = 31.1%, Pmax = 44.6 dBm
– Class B Pav = 40 dBm, PAE = 51.1%, Pmax = 42.9 dBm
■ 64 QAM
– Class A Pav = 40 dBm, PAE = 21.1%, Pmax = 44.6 dBm
– Class B Pav = 38 dBm, PAE = 39.2%, Pmax = 42.8 dBm
■ Conclusion
– Class B has about 2X better PAE compared to Class A
– And much lower junction temperatures
– However the power is reduced 2 dB due to moderate AM/PM
– Performance could be improved with lower AM/PM for class B
operation

GaN Power Amplifier Design -22

 Modeling GaN HEMT, GaN Nuances
■ Trapping effects and associated current-knee collapse:
Increases knee voltage at which electron velocity occurs
■ Bias dependencies:
– Source resistance and drain to source resistance
important
■ Sub threshold valid modeling important for designers
for Class B, C, D, E, and F high efficiency operating
modes since not all models can fit behavior in this
region. Curtice FET (CFET) model is well behaved in this
region
■ Models should be checked for gate voltages at or below
threshold, if this is important
■ Electrothermal modeling important for high voltage-
current products
■ Measurements must use pulsed IV characteristics
L. Dunleavy, C. Baylis, II, W. Curtice, and R. Connick, Modeling GaN: Powerful but
Challenging,” IEEE Microwave Magazine, pp82- 96, October 2010.
GaN Power Amplifier Design -23
 Modeling GaN HEMT
Pulsed IV measurements are required

Comparison of pulsed I–V (solid lines without symbols) and static I–V for a GaN
HEMT. Pulse conditions were 0.2 ms pulse width and 1-ms separation with
quiescent bias set at Vdsq 5 0, Vgsq 5 0. Vgs is varied from 25 to 21 V in 1 V steps.
L. Dunleavy, C. Baylis, II, W. Curtice, and R. Connick, Modeling GaN: Powerful but
Challenging,” IEEE Microwave Magazine, pp82- 96, October 2010.
GaN Power Amplifier Design -24
 Modeling GaN HEMT
Pulsed IV Measurements Important for accurate modeling

Pulsed S-parameter and static S-

parameter comparison for a 10 W
GaN HEMT. Pulse conditions:
5 ms pulse width, 0.1% duty cycle
(IF BW 5 1/pulse width 5 ,200 kHz).

L. Dunleavy, C. Baylis, II, W. Curtice, and R. Connick, Modeling GaN: Powerful but
Challenging,” IEEE Microwave Magazine, pp82- 96, October 2010.
GaN Power Amplifier Design -25
 Measurements for Modeling GaN HEMT
Main considerations for non-linear (NL) Empirical transistor
models

IMS2011 WMJ Workshop: Modeling Considerations for GaN HEMT and Higher Level IC
Devices, Dr. Larry Dunleavy, Dr. Jiang Liu, Modelithics, Inc.
GaN Power Amplifier Design -26
 Modeling GaN HEMT
Nonlinear transistor modeling process

L. Dunleavy, C. Baylis, II, W. Curtice, and R. Connick, Modeling GaN: Powerful but
Challenging,” IEEE Microwave Magazine, pp82- 96, October 2010.
GaN Power Amplifier Design -27
 Modeling GaN HEMT
Comparison of example FET models used for
GaAs, silicon, and GaN FET/HEMT devices.

Cree (Modified Fager - Statz) 18+ Yes Yes HEMT

L. Dunleavy, C. Baylis, II, W. Curtice, and R. Connick, Modeling GaN: Powerful but
Challenging,” IEEE Microwave Magazine, pp82- 96, October 2010.
GaN Power Amplifier Design -28
“GaN MMIC Design and Modeling” Bill Pribble, Jim Milligan,
Jeff Barner, Jeremy Fisher, Thomas Smith Cree, Inc.
IMS2011 Workshop, “Introduction to GaN MMIC
GaN Power Design”
Amplifier Design -29
 Modeling GaN HEMT
Topology for the Angelov GaN HEMT model

The electrothermal model elements Rtherm and Ctherm enable

estimation of channel temperature rise due to power dissipation
And varies model parameters to account for temperature rise.
Angelov, K. Andersson, D. Schreurs, D. Xiao, N. Rorsman1, V. Desmaris, M. Sudow, and H.
Zirath, “Large-signal modelling and comparison of AlGaN/GaN HEMTs and SiC MESFETs,”
in Proc. Asia-Pacific Microwave Conf. 2006, Dec. 2006, pp. 279–282.
GaN Power Amplifier Design -30
10W Dogerty GaN PA Design
Ed Niehenke
Niehenke Consulting
eniehenke@ieee.org
+1 410-796-5866

31

GaN Power Amplifier Design -31

 10W PA Design
■ Transistor:
– Eudyna 10W GaN HEMT amplifier, EGN010MK
– Vds = 50V
– Ids = 100 ma (no RF power) deep class b
■ Frequency range: 3.4 to 3.8 GHz
■ Design objectives: (at P1.5 dB)
– Power > 41 dBm
– PAE > 70%
– h > 80%
– G > 8.5 dB
– Stable 0.1 to 10 GHz
– Input return loss > 15 dB
GaN Power Amplifier Design -32
Bias The Transistor
Vgs = -1.3V

GaN Power Amplifier Design -33

 Output Match
■ From Load Pull

GaN Power Amplifier Design -34

 Input Circuit for Stability and Input Match
Results
Adjust f1 = 2.5GHz
f1 Rbias = 50W
Rbias Rsh = 200W
Rsh Csh = 40pF
Csh Rser = 15W
Rser Cser = 5pF
Cser

GaN Power Amplifier Design -35

Stability and Input Match

GaN Power Amplifier Design -36

Power Sweep

GaN Power Amplifier Design -37

 Doherty Amplifier Design
900 3 dB Coupler Main
Or 3 dB Coupler Power Amplifier
with 900 Phase
Shifter 00
RF f
Input

900 Line
Length
Match
-900 f RF
Output
f length such that
900Coupler Auxillary
Power Amplifier G high with Aug
Amp off
DOHERTY05.VSD

■ Main Amp Class AB, Aux amp Class C

■ At -6dB for high power, aux amp turned off
■ Each amp changes load that each sees resulting in
better efficiency and linear power

GaN Power Amplifier Design -38

 Design Doherty PA Using 10W PA
■ f length set to 430 for high output Reflection
Coefficient (G) Aux PA when turned off

G
TLIN
ID=TL5
Z0=50 Ohm
EL=43 Deg
F0=3.5 GHz

GaN Power Amplifier Design -39

 Design Doherty PA Using 10W PA
■ Balanced PA for Comparison

SUBCKT
ID=S2
PORT_PS1 NET="Main PA"
P=1 QHYB QHYB RES
Z=50 Ohm ID=U1 ID=U2 ID=R2
PStart=6 dBm 1 2
R=50 Ohm R=50 Ohm R=50 Ohm
PStop=38 dBm COUPL=3 dB COUPL=3 dB
PStep=1 dB LOSS=0 dB LOSS=0 dB
1 3 1 3
-90 -90
0 0 SUBCKT 0 0 PORT
ID=S1 P=2
2
-90 2
-90 Z=50 Ohm
4 NET="Main PA" 4

RES 1 2
ID=R1
R=50 Ohm

GaN Power Amplifier Design -40

 Design Doherty PA Using 10W PA
■ Performance the same for balanced PA and
Dougherty PA with equal gate biases for each PA

GaN Power Amplifier Design -41

 Design Doherty PA Using 10W PA
■ Aux PA biased Class C for operation in Dougherty PA
■ Performance enhanced with similar PA output with significant enhancement of PAE
■ The exercise does show technique and better performance but not that of
theoretical performance (Same PAE at 6 dB backoff)

GaN Power Amplifier Design -42

 Conclusions
■ PA parameters for varying conduction angle provide the
designer insight to the operation of the PA under different
conditions
■ The description of the various classes of operation provide
optimal choices and design parameters
■ Modeling of GaN PA techniques procedures are shown and
important for the computer design and optimization of
performance
■ Step by step design of the Class b PA provides insight to the
designer’s knowledge
■ Computer analysis for different varying input signal
constellations are important for detailed performance analysis
■ Step by step design of the Doherty power amplifier is shown
for this popular amplifier

GaN Power Amplifier Design -43

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