1 2 3 4 5 6

A A

J2 VCC VCC
H1 H3
PWR
1 PWR_FLAG
C1
2 PWR_FLAG
0.1uF
GND
VCC
GND GND
GND

20
U1
1 1 19 R1 R2 RA 8
I1/CLK IO1 470

VCC
6 GI_INT RED 2 18 R0 R3 7
I2 IO2 680
2 RI GRN 3 17 G1 R4 GA 6
I3 I03 470
7 BI BLU 4 16 G0 R5 5 GBSVID
I4 IO4 680
3 RED RI 5 15 B1 R6 BA 4 J3

GAL16V8
CGA/EGA input I5 IO5 470
8 HSYNC VCC GI_INT 6 14 B0 R7 3
J1 I6 IO6 680
4 GRN BI 7 13 CSYNC 2
I7 IO7
B 9 VSYNC HSYNC 8 12 CSYNC 3 CS 1 B
I8 IO8

4k7
R1
5 BLU VSYNC 9 2
GND I9
EGA 11 1 GND

GND
I10/OE SW_CSYNC

2
SW2
SW1

10
SW_EGA

1
GND
GND

GAL16V8 Logic equations:

R0 = EGA * RI + EGA * RED * GIINT

R1 = RED
G0 = EGA * GIINT + EGA * GRN * GIINT + EGA * RED * GRN * BLU * GIINT
G1 = EGA * GRN + EGA * GRN * RED + EGA * GRN * BLU + EGA * GRN * GIINT
B0 = EGA * BI + EGA * BLU * GIINT
B1 = BLU
CSYNC = HSYNC * VSYNC + HSYNC * VSYNC

C C

Copyright © John Tsiombikas <nuclear@member.fsf.org

License: GNU General Public License v3 or later

Sheet: /
D File: gbs-cgaega.sch D

Title: CGA/EGA input board for GBS-8200

Size: A4 Date: 2021-07-19 Rev: 1
KiCad E.D.A. kicad 5.1.8+dfsg1-1+b1 Id: 1/1
1 2 3 4 5 6