Electronic Devices

(ECE F214)

Lecture – 03

Crystal Growth Techniques

Dr. Manish Gupta

Department of Electrical and Electronics Engineering
BITS-Pilani, K K Birla Goa Campus
Crystal Growth Techniques

• The performance of the semiconductor devices depends on the purity

and properties of the material

• Today, the Silicon crystal grown by the semiconductor industries has the
purity of less than 1 part in ten billion

❑ Starting Material

• The raw material for the growth of Si crystal is silicon dioxide (SiO2)

• It is interesting to know that the SiO2 can be obtained from the sand.
(https://www.youtube.com/watch?v=otCVi_djnys)

BITS Pilani, K K Birla Goa Campus

Crystal Growth Techniques

SiO2

https://www.shutterstock.com/image-photo/silicon-
dioxide-known-silica-oxide-anticaking-1918025048

• In the furnace, react SiO2 with coke (C) at a very high temperature of
1800°C to reduce SiO2
SiO2 + 2C Si + 2CO

• The Si obtained is the metallurgical grade Si (MGS). It has impurities such

as Fe, Al, and heavy metal at a level of several 100 to several 1000 ppm

• MGS is not suitable for electronic applications due to the presence of

impurities.
BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques
• MGS is further refined to yield semiconductor-grade or electronic grade
silicon (EGS). The impurity in EGS is 1 part per billion (ppb)

• EGS is obtained by reacting MGS with HCl to form tricholorosilane

(SiHCl3), which is a liquid with boiling point of 32 °C

Si + 3 HCl SiHCl3 + H2

• Along with SiHCl3, chlorides of other impurities such as FeCl3 are

formed.

• The other impurities have different boiling point that SiHCl3, which are
separated by Fractional Distillation.
• Pure SiHCl3 obtained after fractional distillation is then converted to
highly pure EGS by reacting with H2
2SiHCl3 + 2H2 2Si + 6HCl
BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques

Summary of the process involved in obtaining EGS

❑ Growth of Single Crystal Ingots

• It is a technique used to convert high purity

polycrystalline EGS to single-crystal Si ingots or boules

• The technique used is called as Czochralski method

BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques
❑ Czochralski (C-Z) Technique

https://www.sciencedirect.com/topics/engineering/crystal-pulling https://www.microchemicals.com/products/wafers/silicon_i
ngot_production.html

BITS Pilani, K K Birla Goa Campus

Czochralski Method
The setup consists of three main components:

• A furnace, which includes a graphite

crucible, a rotation mechanism (clockwise
as shown), a heating element, and a power
supply

• A crystal-pulling mechanism, which includes

a seed holder and a rotation mechanism
(counter-Clockwise); and

• An ambient control, which includes a gas

source (such as argon), a flow control and
an exhaust system.

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Czochralski Method
❑ Process
• The first step is to melt the EGS in graphite crucible by heating it to
the melting point of Si (1412 C)

• A temperature gradient is set up by cooling the rod and slowly

withdrawing it from the melt (the surrounding atmosphere is cooler
than the melt)

• Next, a seed crystal is lowered into the molten material (just to touch
the melt) and then is raised slowly while simultaneously being
rotated. This solidifies the molten Si into a continuous crystal, and
allows a crystal to grow onto the seed

• The seed is rotated to keep the crystal uniform and cylindrical

• The technique is widely used in growing Si and Ge.

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Czochralski Method
• Decreasing the speed with which the crystal is pulled from the melt,
increases the quality of the crystals (fewer defects) but decreases the
growth rate.

❑ Advantages

• This method is used to grow large single crystals. Thus, it is used

extensively in the semiconductor industry.

• There is no direct contact between the crucible walls and the

crystal which helps to produce unstressed single crystal.

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
 Distribution Coefficient (kd)
• At the solidifying interface between the melt and the solid,
there will be a distribution of the impurities between the two
phases.

• The quantity that identifies this property is the distribution

coefficient kd, which is the ratio of the concentration of the
impurity in the solid Cs to the concentration in the liquid (CL) at
equilibrium
𝐶𝑠
kd =
𝐶𝐿

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Wafers (Ingot to Wafer)

• Slicing: The silicon crystal (or ingot) is

sliced by using a diamond tipped saw

• Wafers are sorted by thickness

https://www.sas-globalwafers.co.jp/eng/products/wafer/process.html BITS Pilani, K K Birla Goa Campus

 Wafers (Ingot to Wafer)
• Lapping (Double Side Lapping):
Wafers are set in a carrier, which spins
between two rotating lapping plates.
Both surfaces of the wafers are lapped
to remove damaged surface layer and
to achieve predetermined uniform
thickness.

• Etching (Chemical Polishing):

Wafers are set in a carrier, which spins
between two rotating lapping plates.
Both surfaces of the wafers are lapped
to remove damaged surface layer and
to achieve predetermined uniform
thickness.

https://www.sas-globalwafers.co.jp/eng/products/wafer/process.html BITS Pilani, K K Birla Goa Campus

 Wafers (Ingot to Wafer)
• Lapping (Double Side Lapping):
Wafers are set in a carrier, which spins
between two rotating lapping plates.
Both surfaces of the wafers are lapped
to remove damaged surface layer and
to achieve predetermined uniform
thickness.

• Etching (Chemical Polishing):

Wafers are set in a carrier, which spins
between two rotating lapping plates.
Both surfaces of the wafers are lapped
to remove damaged surface layer and
to achieve predetermined uniform
thickness.

https://www.sas-globalwafers.co.jp/eng/products/wafer/process.html BITS Pilani, K K Birla Goa Campus

 Wafers (Ingot to Wafer)
• Polishing: A wafer mounted onto a
ceramics plate is pressed against the
surface of a rotating plate covered with
a polishing cloth. It is polished to have a
mirror surface by a combined
mechanical-chemical action.

• Cleaning: Wafers are physically and

chemically cleaned using ultra-pure
water and chemicals.

• Packaging: Wafers are packaged in a

clean shipping case, and sealed in a
special moisture-proof bag.

Link: https://www.youtube.com/watch?v=2qLI-NYdLy8 (Animated video)

https://www.sas-globalwafers.co.jp/eng/products/wafer/process.html BITS Pilani, K K Birla Goa Campus
 Epitaxial Growth

• Epitaxy means "on top", and represents a process in which a layer is

created on top of another layer and inherits its crystal structure.

• It is a technique of growing an oriented single crystal layer on a

substrate wafer is called epitaxy or epitaxial growth.

• Epitaxial growth can be performed at temperatures considerably below

the melting of the substrate crystal.

• If the deposited layer is of the same material as the substrate one

speaks of homoepitaxy, if it's another material it's so-called
heteroepitaxy.

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
 Epitaxial Growth

❑ Epitaxial Growth Techniques

• Chemical Vapor Deposition

• Molecular Beam Epitaxy (MBE)
• Liquid Phase Epitaxy

B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Epitaxial Growth
❑ Chemical Vapor Deposition

• Vapor Phase Epitaxy: In this technique, the high purity epitaxial

growth of material is achieved by crystallization from the vapor
phase.

• The crystalline layers can be grown on a substrate or wafer from a

chemical vapor of the semiconductor material or from the mixtures
of chemical vapours containing the semiconductor
• The epitaxial layer is grown on a Si substrate by the controlled
deposition of Si atoms on to the surface

• In this method, a gas of silicon tetrachloride reacts with hydrogen

gas to give Si and HCl. The HCl remains in gaseous state and
does not disturb the crystal growth
SiCl4 + 2H2 Si + 4HCl
BITS Pilani, K K Birla Goa Campus
Vapor Phase Epitaxy
❑ Working

• The vapor phase epitaxy requires a chamber (or reactor) into

which the gases can be introduced and a method of heating the Si
wafer
• Hydrogen gas is passed through a heated vessel in which SiCl4 is
evaporated
BITS Pilani, K K Birla Goa Campus
Vapor Phase Epitaxy
• Next, two gases are introduced into the reactor over substrate
crystal

• The Si wafers are placed on a graphite susceptor that can be

heated to the reaction temperature with an rf heating coil or
tungsten halogen lamp.

• Using this technique, epitaxial layer can be grown on multiple

wafers

• The reaction temperature for the hydrogen reduction of SiCl4 is ~

1150-1250 °C.
• Vapor epitaxy is useful to grow thin Si layer on insulator substrate

• It is also used for the growth of III-V compounds such as gallium-

arsenide (GaAs) and gallium-phosphide (GaP).
BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques
❑ Molecular Beam Epitaxy (MBE)

• It is one of the technique for growing

epitaxial layers

• In this technique, the substrate (GaAs) is

held in a high vacuum chamber

• In the given example, for the growth

AlGaAs layers on GaAs substrate, the Al,
Ga and As components along with the
dopants are heated in the separate
cylindrical cells.

• Collimated beams of these constituents

escape into the vacuum and are directed
on to the substrate surface
B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques
• The rate at which these atomic beams strike the surface of the
substrate can be closely controlled It is one of the technique for
growing epitaxial layers

• This technique results in very high crystal growth

• Abrupt changes in the doping and crystal composition can be

controlled by controlling the shutters in the front of the individual
beams

• The technique is capable to produce a crystals with very slow growth

rate (≤ 1mm/hour), which is useful to make the composition changes

• Due to the development in the recent years, some of solid sources can
be replaced by gaseous chemical sources. The technique is know as
chemical beam epitaxy or gas-source MBE.
B.G. Streetman & Sanjay Banerjee, "Solid State Electronic Devices",7th/ 6th ed., Pearson Prentice Hall. BITS Pilani, K K Birla Goa Campus
Crystal Growth Techniques
❑ Setup for Molecular Beam Epitaxy

https://www.eetimes.eu/unlocking-the-potential-of-molecular-beam-epitaxy/

BITS Pilani, K K Birla Goa Campus

Crystal Growth Techniques
❑ Setup for Molecular Beam Epitaxy

https://www.riber.com/news/this-one-is-a-special-one/

BITS Pilani, K K Birla Goa Campus

Thank you

BITS Pilani, K K Birla Goa Campus