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Parvathy 'S Cordic-1
Parvathy 'S Cordic-1
Abstract 1. Introduction
The Coordinate Rotation DIgital Computer
The CORDIC algorithm is a technique for
(CORDIC) algorithm has been used for many years for
efficiently implementing the trigonometric
efficient implementation of vector rotation operations in
functions and hyperbolic functions.Vector
rotation through fixed and known angles has hardware. CORDIC or Coordinate Rotation Digital
wide applications in various areas. But there is Computer is a simple and hardware-efficient algorithm
no optimized coordinate rotation digital for the implementation of various elementary, especially
computer (CORDIC) design for vector-rotation trigonometric functions. Instead of using Calculus based
through specific angles. FPGA based CORDIC methods such as polynomial or rational functional
design for fixed angle of rotation provides approximation, it uses simple shift, add, subtract and
optimization schemes and CORDIC circuits for table look-up operations to achieve this objective. By
fixed and known rotations with different levels making slight adjustments to the initial conditions and
of accuracy. For reducing the area and time the LUT values, it can be used to efficiently implement
complexities, a hardwired pre-shifting scheme Trigonometric, Hyperbolic, Exponential functions,
in barrel-shifters of the CORDIC circuits is Coordinate Transformations etc. using the same
used. Pipelined schemes are suggested further hardware. Since it uses only shift-add arithmetic, VLSI
for cascading dedicated single-rotation units implementation of such an algorithm is easily
and bi-rotation CORDIC units for high- achievable.
throughput and reduced latency
implementations. The fixed-point mean- The CORDIC algorithm was first proposed by
squared-error of the CORDIC circuit is Jack E Volder in 1959 [9], [10]. It is an iterative
analyzed and reduced. This design offers higher technique and consists of two modes of operation called
throughput, less latency and less area-delay rotation mode and vectoring mode. In either mode, the
product. The fixed-angle CORDIC rotation algorithm is rotation of an angle vector by a definite
would have wide applications in signal angle but in variable directions. This fixed rotation in
processing, games, animation, graphics and variable direction is implemented through an iterative
robotics. The coding is done in Verilog language, sequence of addition/subtraction followed by bit-shift
synthesized using Xilinx ISE 14.1 and simulated operation. The final result is obtained by appropriately
using ISim. scaling the result obtained after successive iterations. All
of the trigonometric functions can be computed or
Keywords— Coordinate rotation digital computer derived from functions using vector rotation. CORDIC
(CORDIC), digital signal processing (DSP) chip, VLSI. works by rotating the coordinate system through
constant angles until the angle is reduces to zero. 2. Shift-add operations for corresponding scaling
CORDIC algorithm is very attractive for hardware circuits.
implementation because less power dissipation,
3. A hardware pre-shifting scheme is suggested for
compactable & simple in design.
reduction of barrel-shifter complexity.
Less power dissipation and compact because it
4. A cascaded pipelined circuit in which more than one
uses only elementary shift-and-add operations to
CORDIC module in separate stages in a cascade. The
perform the vector rotation so it only needs the use of 2
cascade of CORDIC modules is faster and involves less
shifter and 3 adder modules. Simplicity is due to
area-delay complexity.
elimination of multiplication with only addition,
subtraction and bit-shifting operation. Either if there is 5. An efficient CORDIC circuit using a pair of micro-
an absence of a hardware multiplier (e.g. μC, μP) or rotations, and named as Bi rotation CORDIC.
there is a necessity to optimize the number of logic gates
(e.g. FPGA) CORDIC is the preferred choice. However, 3. System architecture
the major disadvantage of the CORDIC algorithm are 3.1 Reference Cordic Circuit
large number of iterations required for accurate results
and thus the speed is low and time delay is high, power Reference CORDIC circuit [1] for vector
consumption is high in some architecture types rotation with initial vector (X, Y) rotate through an angle
,whenever a hardware multiplier is available, e.g. in a θ to obtain final vector (X’, Y’) through successive
DSP microprocessor iterations is shown below. The rotation-mode CORDIC
Rotation of vectors through a fixed and known algorithm to rotate a vector U= [Ux Uy] through an angle
angle has wide applications in robotics, graphics, games, θ to obtain a rotated vector V= [Vx Vy] is given by
and animation [4] [6]. Locomotion of robots is very
often performed by successive rotations through small (Ux)i+1= (Ux) i – (Uy )i 2-i ……3.1
fixed angles and translations of the links. The translation
(Uy)i+1= (Uy) i + (Ux )i 2-i ……3.2
operations are realized by simple additions of coordinate
values while the new coordinates of a rotational step Φi+1 = Φi - tan-1(2-i) ……3.3
could be accomplished by suitable successive rotations
through a small fixed angle which could be performed such that when n is sufficiently large
by a CORDIC circuit for fixed rotation. Similarly,
interpolation of orientations between key-frames in
computer graphics and animation could be performed by
T ……3.4
fixed CORDIC rotations. There are plenty of examples
of uniform rotation starting from electrons inside an
atom to the planets and satellites. A simple example of where = -1 if Φi <0 and σi = 1 otherwise, and K is
uniform rotations is the hands of an animated the scale-factor of the CORDIC algorithm, given by,
mechanical clock which perform one degree rotation
each time. There are several cases where high-speed
K= ……3.5
constant rotation is required in games, graphic, and
animation. The objects with constant rotations are very
A reference CORDIC circuit for fixed rotations
often used in simulation, modeling, games, and
according to eqns 3.1 and 3.2 is shown in figure 3.1.
animation. The contributions of this paper are as follows,
1. Algorithm for optimization schemes for reducing the
number of micro-rotations and for reducing the
complexity of barrel-shifters for fixed-angle vector-
rotation.
CORDIC circuit, a set of a small number of The major contributors to the hardware-complexity in
predetermined elementary angles { , for 0 i m- the implementation of a CORDIC circuit are the barrel-
shifters and the adders.
1}, where = arctan (2-k(i)) is the elementary angle to The optimization of CORDIC circuit is shown in figure
be used for the ith micro-rotation in the CORDIC 3.2.
algorithm and m is the minimum necessary number of
The components are
micro-rotations. Meanwhile, it is well known that the
rotation through any angle, 0 < θ 2π can be mapped i. Registers
ii. Barrel shifter
into a positive rotation through 0 < θ π/4 without any
iii. Adder/ Subtractor
extra arithmetic operations. Hence, as a first step of iv. Sign Bit Register
optimization, we perform the rotation mapping so that v. ROM Module
the rotation angle lies in the range of 0 < θ π/4. In the
next step, we minimize the number of elementary angles
Read only memory (ROM)
in the set { } according to the accuracy requirements.
The rotation mode CORDIC algorithm of eqns 3.1, 3.2 ROM is a memory that is capable of
and 3.3 therefore, can be modified accordingly to have holding data and having that data read from the chip, but
not written to. It is non-volatile which means it keeps its
= contents regardless if it has power or not. Here ROM
contains the control-bits for the number of shifts
corresponding to the micro-rotations to be implemented
……3.6
by the barrel-shifter and the directions of micro-rotations
are stored in the sign-bit register (SBR).
The set of micro rotations is optimized according to the
algorithm which is described in chapter 2. Since the 3.3 Hardwired Pre-Shifting Scheme
elementary angles and direction of micro-rotations are The barrel-shifter used in the optimization
CORDIC circuit increases the complexity of the circuit.
predetermined for the given angle of rotation, the angle
In order to avoid the complexity of barrel-shifter, a
estimation data-path is not required in the CORDIC hardwired pre-shifting scheme [1] is used. A barrel-
circuit for fixed and known rotations. Moreover, because shifter for maximum of S shifts for word-length L is
implemented by [log2(S+1)] stages of demultiplexors,
only a few elementary angles are involved in this case,
where each stage requires L number of 1:2 line MUXes.
the corresponding control- bits could be stored in a ROM The hardware-complexity of barrel-shifter, therefore,
of few words. increases linearly with the word-length and
logarithmically with the maximum number of shifts. We
can reduce the effective word-length in the MUXes of
the barrel-shifters, and so also the number of stages of
MUXes by simple hardwired pre-shifting.
The time involved in a barrel-shifter could
also be reduced by hardwired pre-shifting, since the
delay of the barrel-shifter is proportional to the number
of stages of MUXes, and it also possible to reduce the
Figure 3.2 Optimization of CORDIC circuit number stages by hardwired pre-shifting. The hardwired
pre-shifting scheme is shown in figure.3.3.
4. Simulation Results
vector rotation through n iterations from the initial where s is the maximum number of shifts in the set of
vector (X0, Y0). selected micro-rotations. In this (L-l) MSBs are load to
Figure 5.3 Multi-stage single-rotation barrel shifters from the registers and load (l-l) LSBs
cascad
ed
COR
DIC
locations by
keeping l
circuit MSBs as 0 to
adder/subtractor.
In figure 5.3 the input initial values (X, Y) = (1,
Figure 5.4 Hardwired pre-
0) is rotated by a fixed angle taken as 20 . For 20 , there shifting scheme
are 7 number of iterations. The initial vector is rotated
In figure 5.4 the input initial values (X, Y) = (1,
by the given angle to obtain the final vector (Xn, Yn).
0) is rotated by a fixed angle taken as 30 . For 30 , there
Outputs – Xn = 000000000000000011111000 are 9 number of iterations. The initial vector is rotated
by the given angle to obtain the final vector (Xn, Yn).
and Yn = 000000000000000000111110
Outputs – Xn = 000000000000000010011111
Angle – Z0 = 0000000000000110110100010
and Yn = 000000000000000010010111
5.1.3 Hardwired pre-shifting scheme
Angle – Z0 = 000000000001010001110011
The barrel-shifter used in the optimization
CORDIC circuit increases the complexity of the circuit.
In order to avoid the complexity of barrel-shifter, a
hardwired pre-shifting scheme is used. The barrel-shifter
needs to implement a maximum of(s- l) shifts only,
6. References