WEEK # 4

Illustrate 8051 programming exercises

1. A set of ten data bytes is stored in successive locations starting at 30H. Write an ALP to add these numbers
and store the 16-bit result in the next two locations. Add the numbers, ignoring the range between 50 and
100. Additionally, keep a count of such numbers in 40H.
2. Four unsigned ‘8’ bit numbers are available in RAM locations starting at 30H. Write an ALP to subtract these
numbers from another set of four unsigned ‘8’ bit numbers available in locations starting at 25H. Store the
difference in locations starting at 35H. (Take at least two numbers which gives negative result and positive
result). Verify PSW register content and comment.
3. An array of thirteen 8-bit numbers are available in successive RAM locations starting at 50H. Write an 8051
program to separate the ODD parity numbers from the array, replace the corresponding location by 00H.
Store the ODD parity numbers in RAM locations starting at 61H and the count of such numbers in 60H.
4. Write an ALP to check whether an ‘8’ bit binary number stored at internal RAM location 50H is available
anywhere in external RAM locations between 0200H and 0213H. If the number is available, store the
number in accumulator and address of that location in registers R6 and R7. If the same number is available
at more than one location; store the count in R5 register and address of the first appearance in registers R6
and R7.
5. Write an 8051 ALP to display BCD down counter from 90H to 00H at port ‘0’ with a delay of 1 sec between
each count. Use 8051 instructions to obtain the delay. When the count begins at 90H, turn on the (red) LED
connected to P1.7; when the count reaches 05H, turn on (yellow) LED connected to P1.6 and when the
count reaches 00H, turn on (green) LED connected to P1.5. Give a delay of 1.5 minutes and then repeat the
process. Assume XTAL = 11.0592MHz.
*************************************************************************************