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20CS405
Unit-I
Part A
INPUT
DEVICE
CONTROL CONTROL
MEMORY
I/O BUS BUS
CPU (RAM AND
PORTS
ROM)
OUTPUT
DEVICE ADDRESS BUS
It is TTL compatible
Bus Interface
ES Unit
CS
SS Instruction
DS queue
IP
SP Execution
BP
ALU Unit
DI
SI
Flags
U U U U OF DF IF TF SF ZF U AF U PF U CF
They are:
(a) The data register file and
(b) The pointer and index register file
64k
64k
64k
64k
The architectures of the 8086 through the 80286 are fully upward-
compatible to the 80386 through the Core2.
The 8-bit registers are AH, AL, BH, BL, CH, CL, DH, and DL are
referred to when an instruction is formed using these two-letter
designations.
The 16-bit registers are AX, BX, CX, DX, SP, BP, DI, SI, IP,
FLAGS, CS, DS, ES, SS, FS, and GS.