How to avoid common industrial Ethernet

mistakes in customer designs

如何避免常見的工業乙太網路設計錯誤
August 2021
Gao Chen

1
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet PHY?
3. How to enhance the noise immunity? From layout’s point of view and
selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

2
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet PHY?
3. How to enhance the noise immunity? From layout’s point of view and
selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

3
Voltage mode or Current mode Ethernet PHY
Typical implementations
PHY - Integrated
50
3.3V

100

50

Current Mode Voltage Mode

✓ Reduced BOM
✓ Lower power dissipation
✓ Improved RF performance
4
Voltage mode or Current mode Ethernet PHY
Power consumption
Current Mode
Impedance seen from source is:
100 Ω║ 100 Ω = 50 Ω
To generate a symbol either a -1V or a +1V signal is
needed
To generate a 1V signal:
2 x 1V/50 Ω = 40mA per data pair
Each symbol is generated using the full 40mA per
channel
10/100Mbit, 2 Channels, 3.3V center tab
3.3V*40mA= 132mA * 2 channels = 264mA
1000Mbit, 4 Channels, 3.3V center tab
3.3V*40mA= 132mA * 4 channels = 528mA
Voltage Mode
Impedance seen from source is:
50 Ω + 50 Ω + 100 Ω = 200 Ω
To generate a symbol a 2V signal is needed
To generate a 2V signal:
2V/200 Ω = 10mA per data pair
The current can be averaged due to the 5 symbols
generated
Avg(10mA, 5mA, 0mA, -5mA, -10mA) = 6mA
10/100Mbit, 2 Channels
3.3V*6mA= 19.8mA * 2 channels = 39.6mA
1000Mbit, 4 Channels
3.3V*6mA= 19.8mA * 4 channels = 79.2mA
5
Voltage mode or Current mode Ethernet PHY
EMI performance

Current Mode Voltage Mode

Typically uses a single-ended current source Uses a true differential output driver to
driver to generate the differential signals generated the differential signals

A true differential driver can provide a better-balanced

differential waveform which means the transformer needs
to rectify less common-mode voltage imbalances the
common mode imbalance creates radiated emissions

6
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet
PHY?
3. How to enhance the noise immunity? From layout’s point of view and
selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

7
Check points when designing the Ethernet PHY
1. Schematic considerations
2. Layout considerations

8
Check points when designing the Ethernet PHY
Schematics
• Power pins • Serial Management interface
– Decoupling capacitors and Ferrite bead • Reset pin and interrupt usage
• GND considerations • Strap settings as expected
– Adding an Earth option on MDI connector which can be
decoupled through RC filter
• LED functions needed for system
– Polarity of LED pin
– Protect LED pins if LED’s are located close to earth
connection
• Clock
– How is system clocking scheme
– Using clock out pin of PHY Example schematics in Altium:
• TIDA-00204 → Gigabit PHY
• MDI connection to magnetics and connector • TIDA-00299 → 10/100 PHY
– Ensure termination is added where needed
• MII mode chosen to be used in system
– Ensure termination is added where needed
9
Check points when designing the Ethernet PHY
Layout – MDI interface

Differential routing Decoupling connection

Ensuring differential
Easy layout ESD diodes trace impedance
matching of 100 Ω on
the MDI traces is done
Separation of
to reduce noise
Earth and GND

Bob Smith termination

Ensuring proper Earth
connection to rest of
system
10
Check points when designing the Ethernet PHY
Layout MII Rules
Rule Distance
RGMII TX Length matching 10 mil
RGMII RX Length matching 10 mil
RGMII Data to Data distance separation 30 mil
RGMII Clock to Data distance separation 50 mil
RGMII Clock to Clock distance separation 50 mil
Max total trace length 2500mil

Ensure single ended trace impedance matching of 50 Ω on the MII traces is done to reduce noise

Applying the rules from the document:

spraar7 11
Check points when designing the Ethernet PHY
Layout MII example ETH2 Midlayer 6 – RGMII RX “TIDA-00204”
E1 E3

12
Ensure distance rule and added vias when possible, at signal via
Check points when designing the Ethernet PHY
Layout MII example ETH2 Midlayer 3 – RGMII TX “TIDA-00204”
E1 E3

13
Ensure distance rule and added vias when possible, at signal via
Check points when designing the Ethernet PHY
Layout MII example Signal length of RGMII 2 “TIDA-00204”

Since RGMII is 125MHz the full clock cycle is 8ns.

Typical propagation delay in FR4 stripline is 180fs/mil, meaning with the length of this design you have 234ps
delay on the signal, which is so small it can be ignored 14
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet PHY?
3. How to enhance the noise immunity? From layout’s point of view
and selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

15
 Design challenge: Why is EMC immunity and especially
EFT important in industrial drives?
3-phase PWM switched voltage Cable can be up to 100m: Send reference
positon, speed, … Industrial PC/PLC
8-16/32kHz
Motion Controller

Servo drive
1) Internal generated noise: Generated by the drives
own switch mode power supplies and inverter.
RT Ethernet /
Fieldbus interface 2) External injected noise: Industrial drive must
Common mode voltage noise coupled
meet IEC61800-3 standard for EMC immunity.
through PWM switched output voltage
Power
(CMTI) through cable or capacitive or interface
electromagnetic coupling inside the drive ✓ Goal for “error free” operation for high
performance and minimum system
HMI: I/O
downtime!
Position feedback
interface
Impulse noise from switched
mode power supply coupling into
supply rails (PoL) and signal Power
GND.
port 200-690VAC
Position feedback Logic or DC-fed
Motor sensor GND
Earth GND 16
Test Setup: TIDA-00299 EtherCAT Slave 24V P/S
Ethernet ports for
control lines
CX5120-135
5V P/S Beckhoff PLC with
EtherCAT master

Device Under Test (TIDA-00299)

Shielded cable, cat7,
5V P/S 30m or 50m
depending test

Second slave for EtherCAT protocol Shielded cable, cat7,

(Not under test) 3m Diagnostic interface
Diagnostic interface to to PLC connected
Slave disconnected during during test
test 17
 TIDA-00299 EMC Immunity Tests
Reference to IEC 61800-3 is EMC immunity for variable speed drives
Performance
Port Phenomenon
Basic
standard
Lev el (acceptance) TIDA-00299 EMC tests preformed:
criterion
ESD IEC61000-4-2 +/-4kV CD or 8kV AD, B
IEC61000-4-4
if CD not possible
Enclosure ports RF 80MHz to 1GHz,
EC61000-4-3
electromagnetic 10V/m, 80% AM A
field amplitude (1MHz)
Fast transient +/-2kV /
IEC61000-4-4 B
Burst (EFT) 5kHz or 100kHz (a)
Surge 1,2/50us, +/-1kV (c)
Power port IEC61000-4-5 B
8/20us +/-2kV (d)
0.15-80Mhz, 10V/m,
Conducted RF IEC61000-4-6 A
80% AM (1kHz)
Fast transient +/-2kV /
Power interface IEC61000-4-4 5kHz or 100kHz B
Burst (EFT) Performance Description
capacitive clamp (acceptance)
Fast transient +/-1kV / criterion
IEC61000-4-4 B
Signal Burst (EFT) 5kHz or 100kHz A Module shall continue to operate as intended. No loss of function or
interfaces 0.15-80Mhz, 10V/m,
Conducted RF IEC61000-4-6 A performance even during the test.
80% AM (1kHz) Temporary degradation of performance during test is accepted. After the
Fast transient +/-2kV / B test, module shall continue to operate as intended w ithout manual
IEC61000-4-4 B
Ports for Burst (EFT) 5kHz or 100kHz interv ention.
process Surge 1,2/50us,
IEC61000-4-5 +/-1kV (d),(f) B During the test, loss of functions accepted, but no destruction of hardware
measurement 8/20us C or software. After the test, the module shall continue to operate as
control lines 0.15-80Mhz, 10V/m,
Conducted RF IEC61000-4-6 A intended automatically, after manual restart, or power off, or power on.
80% AM (1kHz) Not self-recov erable.
For more details refer to IEC61800-3, EMC requirements for second environment
18
TIDA-00299 PHY Related Schematic test options

1. Decoupling between digital GND and Earth

2. Bob Smith termination
3. Ferrite beat
4. Center tab of integrated termination
5. Potential EMC/EMI options for improving system performance
TIDA-00299 IEC61000-4-4(EFT)
Decoupling between digital GND and Earth
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled

EtherCAT application note decoupling scheme – EARTH to GND

20
TIDA-00299 IEC61000-4-4(EFT)
Bob Smith
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled

EtherCAT application note decoupling scheme – Bob Smith

21
TIDA-00299 IEC61000-4-4(EFT)
Ferrite decoupling
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled and 1Mohm and 10nF Earth to GND connection
Further investigation needed for
Ferrite decoupling effect
improved filter performance

22
TIDA-00299 IEC61000-4-4(EFT)
Ferrite decoupling
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled and 1Mohm and 10nF Earth to GND connection

Ferrite decoupling effect Further investigation needed for

improved filter performance

23
TIDA-00299 IEC61000-4-4(EFT)
Center tab of integrated termination
All tests was conducted with 2.2uF and 0.1uF capacitor

For the DP83826 this pin is giving the option to add a capacitor as center
tab of the integrated resistors

More testing required to understand the benefits of these capacitors

24
TIDA-00299 IEC61000-4-4(EFT)
Potential EMC/EMI options for improving system performance
All tests was conducted with 4.7nF capacitor and the ESD diode

More testing required to understand the benefits of these capacitors and

the ESD diodes

The additional capacitance both from ESD diode and external capacitors
can help improve EMI performance when doing CISPR-32 testing

25
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet PHY?
3. How to enhance the noise immunity? From layout’s point of view and
selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

26
How to select the Pulse transformer
All TI 10/100 Ethernet datasheet has a section explaining tested transformer.

In the datasheet of the DP83826 section 12.1.3 Transformer Layout

27
How to select the Pulse Magnetics
All TI 1000 Ethernet datasheet has a section explaining what magnetics to use.

In the datasheet of the DP83867 section 9.2.1.1 Cable Line Driver

28
Agenda
1. Comparison between voltage and current type for EtherNET PHY
2. What are the key and check points when designing the Ethernet PHY?
3. How to enhance the noise immunity? From layout’s point of view and
selection of the protection components.
4. How to select the Pulse transformer?
5. Introduction of the TIDA Ref. Design.

29
TIDA-00204
EMI/EMC-Compliant Industrial Temp Dual-Port Gigabit Ethernet Reference Design
Features & benefits Tools & Resources
• EMI- and EMC-compliant design with wide input voltage range (17- • TIDA-00204 Design Folder
60V) using two DP83867IR Gigabit Ethernet PHYs and AM3359 • DP83867 Gigabit Ethernet PHY
Sitara™ Processor to work in harsh industrial environments • Sitara AM3359
• Exceeds CISPR 11 / EN55011 Class A radiated emission
requirement by >4.3dB
• Exceeds IEC61800-3 EMC immunity requirements:
+/-6kV ESD CD per IEC 61000-4-2
+/-4kV EFT per IEC 61000-4-4
+/-2kV Surge per IEC 61000-4-5
• Sitara™ AM3359 firmware, including UDP and TCP/IP stack and
HTTP web server examples, boots from on-board SD-Card allowing
easy standalone operation
• Access to DP83867IR registers via USB virtual COM port allows for
custom specific PHY configurations, like RGMII Delay Mode

Applications
• Industrial Drives
• Factory Automation and Control
DP83867|Latest Generation Ethernet PHY 10/100/1000
Industry’s First Gigabit PHY for the Industrial Market
Features Benefits
• ESD: Exceeds IEC 8kV specifications • Integrated ESD circuitry allows for easy design-in with minimal
• Lowest latency for both 100Mbps and 1Gbps modes, <400ns external components and minimizes damage to both device & system
• Wake on LAN (WoL) Power Savings • Reduces time to process data
• Start of Frame Detect for IEEE 1588 time stamp • Improves accuracy over solutions that don’t have time stamp by
aligning master & slave CLKs
• JTAG (IEEE 1149.1)
• Ease of use during design, debug, and production flows – addresses
• Output Clocks: 25MHz or 125MHz
GMII MAC interface
• MAC Interfaces: GMII / RGMII / SGMII / MII
• Pin to pin temperature grades (0 to 70oC) through (-40oC to Outstanding EMI / EMC Performance
105oC)
• QFN48 or QFP64
Pass EN55011
Applications class B with a
• Factory Automation & Control single PHY
• Building Automation
• Motor Drive & Control
• Smart Grid & Energy
• Wired and Wireless Communications
TIDA-00204 Highlights
EMC Immunity Tests
RGMII RX Clock and Requirements TIDA-00204 Measurements
RDATA1 (DP83867 output) Phenomen Basic Lev el Perform Lev el Performan Test
on standard ance ce
criterion Criterion
ESD IEC61000- +/-4kV CD B +/-6kV B PASS
4-2 CD (EXCEED)
125MHz clock, no Fast IEC61000- +/-2kV/5kHz, B +/-4kV B PASS
overshoot, using transient 4-4 capacitive clamp (EXCEED)
Burst (EFT)
DP83867
integrated 50-ohm Surge IEC61000- +/-1kV. Since B +/-2kV B PASS
1,2/50us, 4-5 shielded cable (EXCEED)
series termination 8/20us >20m,
impedance

EMI

Basic Standard Category 2 electric field TIDA-00204 measured Result

strength quasi-peak minimum margin to limit
dB(uV/m)
EN55011/ 40 (30-230MHz) at 10m (50 Horizontal: 10.6dB PASS
CISPR 11 class A at 3m) (125MHz)
47 (230-1000MHz) at 10m Vertical: 4.3 dB (125Mhz)
(57 at 3m)
TIDA-00299
EtherCAT® Slave and Multi-Protocol Industrial Ethernet Reference Design
Features Benefits
• EMC-compliant, industrial temp dual port EtherCAT slave with SPI interface ▪ Cost-Optimized Dual port EtherCAT slave with HW option for
• 5-V Input Supply, to power entire board incl. optional DDR3 memory (not PROFIBUS and Multi-protocol RT Ethernet
needed for EtherCAT with stack external) ▪ TPS650250 PMIC used to generate all power rails needed
• AM335x configured to boot EtherCAT firmware from SPI Flash or option to ▪ DP83822, low latency, robust 10/100 PHY, EtherCAT conformance
boot through SPI host processor. tested and/or certified
• SPI slave interface (16MHz) or SPI master or McASP serial interface (48MHz) ▪ Designed to meet IEC61000-4-2, 4-4, 4-5 EMC Immunity
to host processor like C2000 to run the EtherCAT slave stack
• No external RAM required when EtherCAT slave stack runs on external host
processor
• TI LaunchPad Compatible BoosterPack format with 3.3V TTL logic

Target Applications
Industrial drives
Industrial sensors
Industrial automation

Tools & Resources

Board Image
• TIDA-00299 and Tools Folder
• Design Guide
• Design Files: Schematics, BOM,
Gerbers, and more
• Device Datasheets:
‒ DP83822H, AMIC110, TPS650250
 DP83822 | Ultra-Low Power, Robust Released!
Ethernet PHY 10/100 Mbps
Features Benefits
• Industry’s lowest power 10/100 Mbps PHY • Good for battery/low powered applications. Less heat dissipation.
▪ 1.8V single supply operation < 120mW • Low latency allows for faster response in time sensitive applications
▪ 3.3V single supply operation < 220mW • Can withstand harsh environments
• Industry’s lowest latency <280ns
• Provides design flexibility via
• Power saving features: WoL, EEE (IEEE 802.3az)
• Compatibility with RGMII Gigabit MAC interface
• Exceeds IEC ±8kV ESD specifications
• Compatible with copper and fiber optic cabling
• ±16kV HBM ESD
• DP83822 is a replacement to the TLK105L (pin for pin compatible)
• Start of Frame Detect for IEEE 1588 time stamp
• Multiple MAC Interfaces: MII/RMII/RGMII
• Copper and Fiber support
• Wide Temperature Range (-40oC to 125oC)
• Small Package Size: QFN-32 (5x5mm)
Applications
• Factory Automation & Control
• Motor Drive & Control
• Power Automation
• Automotive
Outstanding signal integrity
 DP83826 | Ultra-low & deterministic latency Released!
Ethernet PHY 10/100 Mbps
Features Benefits
Low and deterministic latency • Rich feature set to meet real-time Ethernet fieldbus critical needs :
• Tx: 40 ns, Rx: 170 ns (max) • Very low latency allows for faster bus cycles
• Deterministic over power cycles < ±2 ns • Supports fieldbuses with fast link-drop recovery requirements
• Fixed phase relationship XI and TX_CLK < ±2 ns • All key configurations HW bootstraps selectable enabling fast link -up time
• Short POR time enabling fast System link-up time.
Robust & small system solution • Whole-system synchronization available through dedicated reference clock output → reduced
• Enhanced EMC FIFO on MAC … and even lower latency
• IEC 61000-4-2 ESD: ±8 kV contact, ±15 kV air • BASIC mode pin-compatible KSZ8081MNX → use in existing and new designs!
• CISPR 22: conducted & radiated Class B • Low power consumption reduces heat dissipation
• Fast link-drop modes (with detection in < 10 us)
• Long cable reach : > 150 meters
• Voltage tolerance: ± 10 %
• Voltage-mode line driver eliminates need for external termination resistor
• Integrated terminations on MDI & MAC I/F
2 selectable pin modes
• BASIC mode: standard Ethernet
• ENHANCED mode: standard Ethernet PLUS enhanced features also support Ethernet
fieldbuses → true industrial Ethernet support

Applications
• Factory Automation (MII, RMII, master & slave)
• Motion Control
• Robotics
• Process Automation
• Motor Drives
• Grid Infrastructure
• Building automation
 TIDA-00299 Highlights
EtherCAT
conformance test
(CTT)

Pass

Measurement: Long reach due to DP83822 high signal integrity Measurement: Industry benchmark EMC Immunity

Cable Length CRC Total EtherCAT No packet loss

type [m] Error packets sent [2min]
No packet loss
Cat 7 3 0 2.400.000 with DP83822! with DP83822!
Cat 7 30 0 2.400.000
Cat 7 50 0 2.400.000 Competitor Competitor
Cat 6 150 0 2.400.000

Test performed with Fast Link Down Disabled and 1Mohm and 10nF Earth to GND connection & 30m Cable

36
TIDA-00299 PCB Picture & PHY Related Schematic
Ethernet PHY TIDA-00299
Part # Variants

DP83822 E2

DP83826 E20

Competitor M E20

Ethernet RJ45 connector

w ith shield (PE) and
option to connect GND
and PE through high-
voltage caps and resistor
(bottom PCB).
Default None

37
TIDA-00299 Variants
Rev E2 Rev E20

38
TIDA-00299 IEC61000-4-4(EFT)
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled and 1Mohm and 10nF Earth to GND connection

On port for control lines tests no errors on all PHYs with proper external decoupling

39
TIDA-00299 IEC61000-4-4(EFT)
Diagnostic data on frames lost in percent of sent frames

Test performed with Fast Link Down Enabled and 1Mohm and 10nF Earth to GND connection

On power port tests

40
References
Ethernet TI designs
• EtherCAT® Slave and Multi-Protocol Industrial Ethernet Reference Design, TIDA-00299
• EMI/EMC-Compliant Industrial Temp Dual-Port Gigabit Ethernet Reference Design, TIDA-00204
• Industrial gigabit Ethernet PHY reference design, TIDA-010010
• EMC-compliant 10/100-Mbps Ethernet PHY reference design with IEEE802.3at Type-1 (≤ 12.95 W)
PoE-PD, TIDA-010046
• EMI/EMC Compliant 10/100 Mbps Ethernet Brick with Fiber or Twisted Pair Interface Reference
Design, TIDA-00928

PoE TI Designs
• Power Over Ethernet® (PoE) Reference Design for Industrial Gateways, TIDM-1018
• High density isolated PoE and GigE reference design for machine vision cameras and vision sensors,
TIDA-010083
• EtherCAT P® One Cable for Power and EtherCAT® Reference Design TIDA-01461
41
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