VLIW Processors

LE CTU RE 9

D R . S A MMAN H . A ME EN

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This architecture is another approach to ILP implementation. In contrast to
Superscalar, VLIW relies completely on the compiler for all tasks pre-
execution. In this case, the compiler determines the how the instructions
are grouped, assigned to available functional units and scheduled.

VLIW is characterised for having a very simple instruction set with respect to the
number of different instructions, but complex and large with respect to the size of each
instruction. This last part applies because it is specified in each instruction the state of
each instruction and all functional units of the system. The main purpose is to plan the
computer program such that the compiler implements all the necessary tasks for
execution, opposed to superscalar processors, which has the hardware as the mean to
execute all tasks for execution.

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• Since is it entirely based in software, it does not require
complicated or heavy hardware to execute instructions.
• Compilers can detect parallelism by analysing the code prior
to its execution and thus ensuring that there is no
dependency check during execution

Disadvantages
• it is necessary to keep all functional units busy in order to
have a better improvement over RISC or CISC architectures.
• Another problem is incompatibility with different architectures.
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• VLIW processors are one of the most promising
implementations of ILP due to its better performance when
executing many instructions in parallel. The main problem in
VLIW implementation is its inefficiency performance when
there are few instructions to be executed in parallel, leading
to a performance equivalent of CISC and RISC in this case.
Another problem is compatibility with other architectures.
VLIW is mainly applied in embedded systems.

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