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Monet 14 " Intel Skylake Platform Block Diagram


Channel A
1600 MT/s 1.35V GPU
DDR3L SO-DIMM Nvidia
A PAGE 17
CPU PEG x 4 (port 5/6) N16S-GM
Dual Rank
DDR3L (2GB/4GB)
A

Skylake - U 23mm X 23mm (GB2b-64)


596 ball
PAGE 22~25

PAGE 18~21

Processor : Dual Core


SATA3 6GB /S Port 7 Power : 15 (Watt) eDP (X2 lanes) 14" eDP Panel
HDD PAGE 31 Package : BGA1356 PAGE 26
Size : 42 x 24 * 1.16 (mm)

DDI HDMI CONN


DMIC*2 PAGE 27
DB Audio Codec
B B

HP+MIC Jack Conexant HDA Giga LAN


DB
PCIE Port 9 Realtek
CX6008 RTL8111GUS RJ45 PAGE 28

2 Watt PAGE 28
SPEAKER
DB DB PCIE Port 6
NGFF
WLAN + BT
USB2.0 Port 6
PAGE 30

I2C Card Reader


USB2.0 Port 4 Realtek SD slot
Flash ROM SPI RTS5176E DB
C 4 MB PAGE 34 C
SD3.0 DB
HSPI
USB2.0
Flash ROM SPI
8 MB PAGE 34 EC Port 5 Port 7 Port 8
ITE LPC
Touch Pad PS/2 Fingerprint Camera Touch Panel
PAGE 32
IT8528E
PAGE 32 PAGE 26 PAGE 26
Package : LQPF128
USB 3.0 port x2
K/B PAGE 33
USB3.0 port 1/2
1 for power share
USB2.0 port 1/2
TPS2546ARTER
FAN PAGE 37 PAGE 35 PAGE 30

PAGE 2~16 USB3.0 port 3 USB3.0 Re-driver


USB 3.0 CONN
USB2.0 port 3 PS8713B
D DB Right DB D

Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
BLOCK DIAGRAM
Date: Friday, May 22, 2015 Sheet 1 of 53
1 2 3 4 5 6 7 8
5 4 3 2 1

27
27
27
27
INT_HDMI_TXN2
INT_HDMI_TXP2
INT_HDMI_TXN1
INT_HDMI_TXP1
E55
F55
E58
F58
U17A

DDI1_TXN[0]
DDI1_TXP[0]
DDI1_TXN[1]
SKL_ULT ? Need apply PN
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
C47
C46
D46
C45
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
INT_EDP_TXP1
INT_EDP_TXN0
INT_EDP_TXP0
INT_EDP_TXN1
26
26
26
02
INT_EDP_TXP1 26
HDMI 27
27
INT_HDMI_TXN0
INT_HDMI_TXP0
F53
G53
DDI1_TXP[1]
DDI1_TXN[2]
DDI1_TXP[2]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
A45
B45
27 INT_HDMI_TXCN F56 A47
G56 DDI1_TXN[3] EDP_TXN[3] B47
27 INT_HDMI_TXCP DDI1_TXP[3] EDP_TXP[3] +3.3V_RUN
C50 E45 INT_EDP_AUXN
D D50 DDI2_TXN[0] DDI EDP EDP_AUXN F45 INT_EDP_AUXP INT_EDP_AUXN 26 D
DDI2_TXP[0] EDP_AUXP INT_EDP_AUXP 26
C52
D52 DDI2_TXN[1] B52 EDP_DISP_UTIL R56
A50 DDI2_TXP[1] EDP_DISP_UTIL TP49
*10K/F_4_NC
B50 DDI2_TXN[2] G50
D51 DDI2_TXP[2] DDI1_AUXN F50
C51 DDI2_TXN[3] DDI1_AUXP E48 EDP_HPD
DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUXP G46
DISPLAY SIDEBANDS DDI3_AUXN F46 R72
L13 DDI3_AUXP
27 HDMI_SCL GPP_E18/DDPB_CTRLCLK 100K_4
DDPB_CTRLDATA/ GPP_E19 L12 L9 INT_HDMI_HPD
27 HDMI_SDA GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 INT_HDMI_HPD 27
L7
Display Port B Detected N7 GPP_E14/DDPC_HPD1 L6
This signal has a weak internal pull-down. DDPC_CTRLDATA N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 L10
0 = Port B is not detected. GPP_E17/EDP_HPD
EDP_HPD EDP_HPD 26
N11
1 = Port B is detected. DDPD_CTRLDATA N12 GPP_E22/DDPD_CTRLCLK R12 eDP_BL_EN
GPP_E23/DDPD_CTRLDATA EDP_BKLTEN R11 eDP_BL_EN 26,35
LCD_PWM
EDP_BKLTCTL LCD_PWM 26
R64 24.9/F_4 EDP_RCOMP E52 U13 DP_ENVDD
This signal has a weak internal pull-down. +1.0V_RUN EDP_RCOMP EDP_VDDEN DP_ENVDD 26

0 = Port C and D is not detected. SKL_ULT


1 OF 20 ?
eDP_COMPIO and ICOMPO signals should be shorted near
1 = Port C and D is detected. balls and routed with typical impedance <25 mohms REV = 1

DDPD_CTRLDATA R55 *10K_4_NC

DDPC_CTRLDATA R71 *10K_4_NC


C C
DVT1 CPU P/N list
AJ0QJFCUT04 CPU(1356P)SKL I3-6100U 2.3G QJFC WINCON
AJ0QJ8NUT04 CPU(1356P)SKL I5-6200U 2.3G QJ8N WINCON
AJ0QJ8LRT05 CPU(1356P)SKL I7-6500U 2.5G QJ8L WINCON

+1.0V_RUN

U17D SKL_ULT ?
PLACE NEAR CPU
CATERR# D63
EC_PECI A54 CATERR#
35 EC_PECI PECI
R250 499/F_4 PROCHOT# C65 JTAG XDP_TMS_CPU R296 *51_4_NC
35,40,41,42 H_PROCHOT# C63 PROCHOT#
PM_THRMTRIP#
A65 THERMTRIP# XDP_TCK0 XDP_TDI_CPU R295 *51_4
+VCCSTPLL SKTOCC# B61 XDP_TCK0 2,16
CPU MISC PROC_TCK D60 XDP_TDI_CPU XDP_TDI_CPU 16
Follow CRB 16 XDP_BPM0 C55 PROC_TDI XDP_TDO_CPU R264 51_4
BPM#[0] A61 XDP_TDO_CPU XDP_TDO_CPU 16
R294 49.9/F_4 CATERR# 16 XDP_BPM1 D55 PROC_TDO
BPM#[1] C60 XDP_TMS_CPU XDP_TMS_CPU 16
B54 PROC_TMS XDP_TCK0 R266 51_4
BPM#[2] B59 XDP_TRST#_CPU XDP_TRST#_CPU 2,16
C56 PROC_TRST#
BPM#[3] XDP_TRST#_CPU R265 *51_4_NC
B56 XDP_TCK1 XDP_TCK1 16
CPU_GP0 A6 PCH_JTAG_TCK
+1.0V_RUN TP50 GPP_E3/CPU_GP0 D59 XDP_TDI XDP_TDI 16
CPU_GP1 A7 PCH_JTAG_TDI
TP48 GPP_E7/CPU_GP1 A56 XDP_TDO XDP_TDO 16
PCH_TP_INTR# BA5 PCH_JTAG_TDO
33 PCH_TP_INTR# GPP_B3/CPU_GP2 C59
B 1K_4 R290 H_PROCHOT# CPU_GP3 AY5 PCH_JTAG_TMS XDP_TMS B
TP77 GPP_B4/CPU_GP3 C61 XDP_TMS 16
PCH_TRST# XDP_TRST#_CPU
A59 XDP_TRST#_CPU 2,16
R132 49.9/F_4 PROC_POPIRCOMP AT16 JTAGX XDP_TCK0
PROC_POPIRCOMP XDP_TCK0 2,16
R133 49.9/F_4 PCH_OPI_RCOMP AU16
EDRAM_OPIO_RCOMP H66 PCH_OPIRCOMP
TP87 EOPIO_RCOMP H65 OPCE_RCOMP
+3.3V_SUS TP88 OPC_RCOMP +1.0V_RUN
PDC R242
XDP_TCK0 *51_4 R297 2 1
SKL_ULT 2 1
4 OF 20
10K_4 R375 PCH_TP_INTR# REV = 1 XDP_TMS 51_4 R267 *SJ0402_NC

XDP_TDI 51_4 R298

XDP_TDO 51_4 R299


Close to EC XDP_TCK1 *51_4_NC R272

+VCCSTPLL Close to Chipset

1K_4 R293 PM_THRMTRIP#

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 1/15 eDP/DDI/MISC
Date: Friday, May 22, 2015 Sheet 2 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

03
SkyLake ULT Processor (DDR3L)
D D

? ?
SKL_ULT SKL_ULT
U17B U17C

AU53 M_A_CLKN0 17
M_A_DQ0 AL71 DDR0_CKN[0] AT53 M_A_DQ32 AY39 IL NIL AN45
17 M_A_DQ0 DDR0_DQ[0] IL:Interleave DDR0_CKP[0] M_A_CLKP0 17 17 M_A_DQ32 DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0]
M_A_DQ1 AL68 NIL:Non-interleave AU55 M_A_CLKN1 17 M_A_DQ33 AW39 AN46
17 M_A_DQ1 M_A_DQ2 AN68 DDR0_DQ[1] DDR0_CKN[1] AT55 17 M_A_DQ33 M_A_DQ34 AY37 DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKN[1] AP45
17 M_A_DQ2 DDR0_DQ[2] DDR0_CKP[1] M_A_CLKP1 17 17 M_A_DQ34 DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKP[0]
M_A_DQ3 AN69 M_A_DQ35 AW37 AP46
17 M_A_DQ3 M_A_DQ4 AL70 DDR0_DQ[3] BA56 17 M_A_DQ35 M_A_DQ36 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1]
17 M_A_DQ4 DDR0_DQ[4] DDR0_CKE[0] M_A_CKE0 17 17 M_A_DQ36 DDR0_DQ[36]/DDR1_DQ[4]
M_A_DQ5 AL69 BB56 M_A_CKE1 17 M_A_DQ37 BA39 AN56
17 M_A_DQ5 M_A_DQ6 AN70 DDR0_DQ[5] DDR0_CKE[1] AW56 17 M_A_DQ37 M_A_DQ38 BA37 DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] AP55
17 M_A_DQ6 M_A_DQ7 AN71 DDR0_DQ[6] DDR0_CKE[2] AY56 17 M_A_DQ38 M_A_DQ39 BB37 DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] AN55
17 M_A_DQ7 M_A_DQ8 AR70 DDR0_DQ[7] DDR0_CKE[3] 17 M_A_DQ39 M_A_DQ40 AY35 DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2] AP53
17 M_A_DQ8 M_A_DQ9 AR68 DDR0_DQ[8] AU45 17 M_A_DQ40 M_A_DQ41 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3]
17 M_A_DQ9 AU71 DDR0_DQ[9] DDR0_CS#[0] AU43 M_A_CS#0 17 17 M_A_DQ41 AY33 DDR0_DQ[41]/DDR1_DQ[9] BB42
M_A_DQ10 M_A_DQ42
17 M_A_DQ10 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 M_A_CS#1 17 17 M_A_DQ42 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] AY42
M_A_DQ11 M_A_DQ43
17 M_A_DQ11 AR71 DDR0_DQ[11] DDR0_ODT[0] AT43 M_A_DIM0_ODT0 17 17 M_A_DQ43 BB35 DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] BA42
M_A_DQ12 M_A_DQ44
17 M_A_DQ12 AR69 DDR0_DQ[12] DDR0_ODT[1] M_A_DIM0_ODT1 17 17 M_A_DQ44 BA35 DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0] AW42
M_A_DQ13 M_A_DQ45
17 M_A_DQ13 M_A_DQ14 AU70 DDR0_DQ[13] DDR3L LPDDR3 DDR4 BA51 M_A_A5 17 M_A_DQ45 M_A_DQ46 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR1_ODT[1]
17 M_A_DQ14 AU69 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] BB54 M_A_A9 M_A_A5 17 17 M_A_DQ46 BB33 DDR0_DQ[46]/DDR1_DQ[14] DDR3L LPDDR3 DDR4 AY48
M_A_DQ15 M_A_DQ47
17 M_A_DQ15 AF65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 M_A_A6 M_A_A9 17 17 M_A_DQ47 AU40 DDR0_DQ[47]/DDR1_DQ[15] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AP50
AF64 DDR1_DQ[0]/DDR0_DQ[16] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AY52 M_A_A8 M_A_A6 17 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BA48
AK65 DDR1_DQ[1]/DDR0_DQ[17] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52M_A_A7 M_A_A8 17 AT37 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48
AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AY55 M_A_BS#2 M_A_A7 17 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AP48
C C
AF66 DDR1_DQ[3]/DDR0_DQ[19] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] AW54M_A_A12 M_A_BS#2 17 AR40 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52
AF67 DDR1_DQ[4]/DDR0_DQ[20] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_A11 M_A_A12 17 AP40 DDR1_DQ[36]/DDR1_DQ[20] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] AN50
AK67 DDR1_DQ[5]/DDR0_DQ[21] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] BA55 M_A_A15 M_A_A11 17 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AN48
AK66 DDR1_DQ[6]/DDR0_DQ[22] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 M_A_A14 M_A_A15 17 AR37 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53
AF70 DDR1_DQ[7]/DDR0_DQ[23] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_A14 17 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# AN52
AF68 DDR1_DQ[8]/DDR0_DQ[24] DDR3L LPDDR3 DDR4 AU46 M_A_A13 AU33 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
AH71 DDR1_DQ[9]/DDR0_DQ[25] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 M_A_A13 17 AU30 DDR1_DQ[41]/DDR1_DQ[25] DDR3L LPDDR3 DDR4 BA43
AH68 DDR1_DQ[10]/DDR0_DQ[26] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] AT46 M_A_CAS# 17 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AY43
AF71 DDR1_DQ[11]/DDR0_DQ[27] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 M_A_WE# 17 AR33 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44
AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] AU52 M_A_RAS# 17 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] AW44
AH70 DDR1_DQ[13]/DDR0_DQ[29] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] AY51 M_A_A2 M_A_BS#0 17 AR30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44
AH69 DDR1_DQ[14]/DDR0_DQ[30] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_A_A2 17 AP30 DDR1_DQ[46]/DDR1_DQ[30] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] AY47
BB65 DDR1_DQ[15]/DDR0_DQ[31] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] AT50 M_A_A10 M_A_BS#1 17 AY31 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BA44
M_A_DQ16 M_A_DQ48
17 M_A_DQ16 AW65 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_A1 M_A_A10 17 17 M_A_DQ48 AW31 DDR0_DQ[48]/DDR1_DQ[32] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46
M_A_DQ17 M_A_DQ49
17 M_A_DQ17 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AY50 M_A_A0 M_A_A1 17 17 M_A_DQ49 AY29 DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AY46
M_A_DQ18 M_A_DQ50
17 M_A_DQ18 AY63 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] BA50 M_A_A3 M_A_A0 17 17 M_A_DQ50 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46
M_A_DQ19 M_A_DQ51
17 M_A_DQ19 BA65 DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[3] BB52 M_A_A4 M_A_A3 17 17 M_A_DQ51 BB31 DDR0_DQ[51]/DDR1_DQ[35] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] BB46
M_A_DQ20 M_A_DQ52
17 M_A_DQ20 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[4] M_A_A4 17 17 M_A_DQ52 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR1_MA[3] BA47
M_A_DQ21 M_A_DQ53
17 M_A_DQ21 M_A_DQ22 BA63 DDR0_DQ[21]/DDR0_DQ[37] AM70 M_A_DQSN0 17 M_A_DQ53 M_A_DQ54 BA29 DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[4]
17 M_A_DQ22 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQSN[0] AM69 M_A_DQSP0 M_A_DQSN0 17 17 M_A_DQ54 BB29 DDR0_DQ[54]/DDR1_DQ[38] IL NIL BA38 M_A_DQSN4
M_A_DQ23 M_A_DQ55
17 M_A_DQ23 BA61 DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSP[0] AT69 M_A_DQSN1 M_A_DQSP0 17 17 M_A_DQ55 AY27 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[4]/DDR1_DQSN[0] AY38 M_A_DQSP4 M_A_DQSN4 17
M_A_DQ24 M_A_DQ56
17 M_A_DQ24 AW61 DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSN[1] AT70 M_A_DQSP1 M_A_DQSN1 17 17 M_A_DQ56 AW27 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 M_A_DQSN5 M_A_DQSP4 17
M_A_DQ25 M_A_DQ57
17 M_A_DQ25 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQSP[1] AH66 M_A_DQSP1 17 17 M_A_DQ57 AY25 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[5]/DDR1_DQSN[1] BA34 M_A_DQSP5 M_A_DQSN5 17
M_A_DQ26 M_A_DQ58
17 M_A_DQ26 AW59 DDR0_DQ[26]/DDR0_DQ[42] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 17 M_A_DQ58 AW25 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] AT38 M_A_DQSP5 17
M_A_DQ27 M_A_DQ59
17 M_A_DQ27 M_A_DQ28 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSP[0]/DDR0_DQSP[2] AG69 17 M_A_DQ59 M_A_DQ60 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR1_DQSN[4]/DDR1_DQSN[2] AR38
17 M_A_DQ28 M_A_DQ29 AY61 DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSN[1]/DDR0_DQSN[3] AG70 17 M_A_DQ60 M_A_DQ61 BA27 DDR0_DQ[60]/DDR1_DQ[44] DDR1_DQSP[4]/DDR1_DQSP[2] AT32
17 M_A_DQ29 M_A_DQ30 BA59 DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSP[1]/DDR0_DQSP[3] BA64 M_A_DQSN2 17 M_A_DQ61 M_A_DQ62 BA25 DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[5]/DDR1_DQSN[3] AR32
17 M_A_DQ30 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQSP2 M_A_DQSN2 17 17 M_A_DQ62 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[5]/DDR1_DQSP[3] BA30 M_A_DQSN6
M_A_DQ31 M_A_DQ63
17 M_A_DQ31 AT66 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSP[2]/DDR0_DQSP[4] AY60 M_A_DQSN3 M_A_DQSP2 17 17 M_A_DQ63 AU27 DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_A_DQSP6 M_A_DQSN6 17 +1.35V_SUS
B
AU66 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSN[3]/DDR0_DQSN[5] BA60 M_A_DQSP3 M_A_DQSN3 17 AT27 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] AY26 M_A_DQSN7 M_A_DQSP6 17 B
AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSP[3]/DDR0_DQSP[5] AR66 M_A_DQSP3 17 AT25 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_A_DQSP7 M_A_DQSN7 17
AN65 DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQSN[2]/DDR0_DQSN[6] AR65 AU25 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] AR25 M_A_DQSP7 17
AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 AP27 DDR1_DQ[51] DDR1_DQSN[6] AR27
AP66 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSN[3]/DDR0_DQSN[7] AR60 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 R125
AT65 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSP[3]/DDR0_DQSP[7] AN25 DDR1_DQ[53] DDR1_DQSN[7] AR21
DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[54] DDR1_DQSP[7] 470_4
AU65 IL NIL AW50 AP25
AT61 DDR1_DQ[23]/DDR0_DQ[55] DDR0_ALERT# AT52 DDR0_PAR AT22 DDR1_DQ[55] AN43
AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR0_PAR TP24 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 DDR1_PAR
AP60 DDR1_DQ[25]/DDR0_DQ[57] AY67 SM_VREF AU21 DDR1_DQ[57] DDR1_PAR AT13 DDR3_DRAMRST# TP22
AN60 DDR1_DQ[26]/DDR0_DQ[58] DDR_VREF_CA AY68 SMDDR_VREF_DQ0_M3 SM_VREF 17 AT21 DDR1_DQ[58] DRAM_RESET# AR18 SM_RCOMP_0 R113 DDR3_DRAMRST# 17
20mils width 121/F_4
AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR0_VREF_DQ BA67 SMDDR_VREF_DQ1_M3 SMDDR_VREF_DQ0_M3 17 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP_1 R162
NIL-DDR CH - 80.6/F_4
AP61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_VREF_DQ TP30 AP22 DDR1_DQ[60] DDR_RCOMP[1] AU18 SM_RCOMP_2 R163
A 100/F_4
AT60 DDR1_DQ[29]/DDR0_DQ[61] AW67DDR_VTT_CNTL AP21 DDR1_DQ[61] DDR_RCOMP[2]
AU60 DDR1_DQ[30]/DDR0_DQ[62] DDR_VTT_CNTL DDR_VTT_CNTL 45 AN21 DDR1_DQ[62]
DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[63]
NIL-DDR CH -
B PDC
IL NIL
SKL_ULT SKL_ULT
2 OF 20 3 OF 20
REV = 1 REV = 1

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 2/15(DDR3L)
Date: Friday, May 22, 2015 Sheet 3 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

PLTRST#(CLG)

PLTRST#

R131
PLTRST# 18,28,30,35 04
D D
100K/F_4

PCH Pull-high/low(CLG) U17K SKL_ULT


?

+3.3V_SUS
SYSTEM POWER MANAGEMENT
AT11 PCH_SLP_S0_N
PCH Pull-high/low(CLG)
DSW_3P3 GPP_B12/SLP_S0# AP15 TP94
AN10 DSW_3P3 GPD4/SLP_S3# BA16 SIO_SLP_S3# 35,45,47
10K_4 R123 SUSWARN# PLTRST#
B5 GPP_B13/PLTRST# SUS_3V3 DSW_3P3 GPD5/SLP_S4# AY16 SIO_SLP_S4# 35,45
SYS_RESET#
AY17 SYS_RESET# DSW_3P3 GPD10/SLP_S5# SIO_SLP_S5# 35,45 +3.3V_SUS
10K_4 R120 SUSACK# RSMRST#
35 RSMRST# RSMRST# AN15 SLP_SUS#_EC
A68 SLP_SUS# AW 15 TP32
1K_4 R158 PCIE_WAKE# R284 *10K_4_NC PROCPWRGD
H_VCCST_PWRGD B65 PROCPW RGD SLP_LAN# BB17 GPD9
VCCST_PW RGD DSW_3P3 GPD9/SLP_W LAN# TP31
C503 *0.1U/16V_4 AN16 SLP_A# BATLOW# R124 10K_4
B6 DSW_3P3 GPD6/SLP_A# TP95
SYS_PWROK
35 SYS_PWROK EC_PWROK BA20 SYS_PW ROK BA15 SIO_PWRBTN# AC_PRESENT R159 *10K_4
35,37 EC_PWROK PCH_PW ROK DSW_3P3 GPD3/PW RBTN# SIO_PWRBTN# 35
R143 DSWROK_EC_R BB20 AY15 AC_PRESENT
DSW _PW ROK DSW_3P3 GPD1/ACPRESENT AU13 BATLOW# AC_PRESENT 35
*SJ0402_NC
C 2 1 SUSWARN# AR13 DSW_3P3 GPD0/BATLOW # C
35 SUSWARN#_EC 2 1 GPP_A13/SUSW ARN#/SUSPW RDNACK SUS_3V3
+3.3V_RUN SUSWARN# SUSACK# AP11
R142 *0_4_NC GPP_A15/SUSACK# SUS_3V3 AU11
10K_4 R122 SYS_RESET# PCIE_WAKE# BB15 SUS_3V3 GPP_A11/PME# AP16 INTRUDER#_R 1M_4 R141
W AKE# INTRUDER# +RTC_CELL
AM15
10K_4 R171 RSMRST# AW 17 GPD2/LAN_W AKE# DSW_3P3 AM10
AT15 GPD11/LANPHYPC DSW_3P3 SUS_3V3 GPP_B11/EXT_PW R_GATE# AM11 GPP_B2
DSWROK_EC_R GPD7/RSVD DSW_3P3 SUS_3V3 GPP_B2/VRALERT# TP21
*100K/F_4_NC R154

SKL_ULT
11 OF 20 ?
REV = 1

R168
*SJ0402_NC
RSMRST# 2 1 DSWROK_EC_R
2 1

System PWR_OK(CLG) +1.0V_RUN


B B
SYS_PWROK R305 *0_4_NC EC_PWROK

R261
1K_4
R253
10K/F_4

D5 1 2 MEK500V-40 H_VCCST_PWRGD_R R260 60.4_4 H_VCCST_PWRGD


16,35,38 HWPG

C482
*10P/50V_4

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 3/15(PowerManger)
Date: Friday, May 22, 2015 Sheet 4 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

+VCC_CORE
U17L SKL_ULT ?

CPU POWER 1 OF 4
+VCC_CORE
05
A30 G32
A34 VCC_A30 VCC_G32 G33
A39 VCC_A34
VCC_A39
29A VCC_G33
VCC_G35
G35
A44 G37 C92 C180 C153 C68 C198 C81 C210
C240 C47 C82 C79 C74 C49 C75 C66 AK33 VCC_A44 VCC_G37 G38 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10U/6.3V_4 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 AK35 VCC_AK33 VCC_G38 G40
D AK37 VCC_AK35 VCC_G40 G42 D
AK38 VCC_AK37 VCC_G42 J30
AK40 VCC_AK38 VCC_J30 J33
AL33 VCC_AK40 VCC_J33 J37
AL37 VCC_AL33 VCC_J37 J40
AL40 VCC_AL37 VCC_J40 K33 C93 C165 C87 C88 C138 C152 C69 C137
C222 C94 C61 C80 C76 C476 C231 AM32 VCC_AL40 VCC_K33 K35 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AM33 VCC_AM32 VCC_K35 K37
AM35 VCC_AM33 VCC_K37 K38
AM37 VCC_AM35 VCC_K38 K40
AM38 VCC_AM37 VCC_K40 K42
G30 VCC_AM38 VCC_K42 K43 R65 100/F_4
VCC_G30 VCC_K43 +VCC_CORE
K32 E32
RSVD_K32 VCC_SENSE E33 VCC_SENSE 42
C58 C59 C91 C208 C474 C64
AK32 VSS_SENSE VSS_SENSE 42
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
RSVD_AK32 B63 H_CPU_SVIDALRT# R66 100/F_4
AB62 VIDALERT# A63 VR_SVID_CLK_R
P62 VCCOPC_AB62 VIDSCK D64 H_CPU_SVIDDAT
V62 VCCOPC_P62 VIDSOUT
VCCOPC_V62 G20
VCCSTG_G20 +VCCSTG
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
AE63 VCCOPC_SENSE
VSSOPC_SENSE
AE62
AG62 VCCEOPIO
C VCCEOPIO C
VCCEOPIO_SENSE AL63
TP27 AJ62 VCCEOPIO_SENSE
VSSEOPIO_SENSE
TP26 VSSEOPIO_SENSE PDC
Layout note: need routing together and ALERT need between CLK and DATA.
SKL_ULT ?
12 OF 20
REV = 1

Close U9052 +VCCSTPLL

+VCC_CORE R249
CLOSE TO CPU
56.2/F_4
PLACE THE PU RESISTORS
SVID ALERT
H_CPU_SVIDALRT# R263 220/F_4
VR_SVID_ALERT# 42
C219 C166 C202 C189 C227 C192 C232 C167
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6

C478
*0.1U/16V_4
+VCC_CORE

C271 C272 C273 C263 C261 C262 C154 C155 +VCCSTPLL


10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
B B

PLACE THE PU RESISTORS R274


*54.9/F_4
CLOSE TO VR
PULL UP IS IN THE VR MODULE
SVID CLK
VR_SVID_CLK_R R292 0_4
VR_SVID_CLK 42

+VCCSTPLL

R251
100/F_4
CLOSE TO CPU
PLACE THE PU RESISTORS
SVID DATA
H_CPU_SVIDDAT R262 0_4
VR_SVID_DATA 42

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 4/15 (POWER-1)
Date: Friday, May 22, 2015 Sheet 5 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

06
Under U9052 +1.0V_RUN
+1.35V_SUS ?
U17N SKL_ULT

CPU POWER 3 OF 4 Under U9052 Close U9052


AU23 AK28
AU28 VDDQ_AU23 VCCIO AK30
D AU35 VDDQ_AU28 4.5A 3.1A VCCIO AL30 D
C284 C286 C282 C354 C355 C283 AU42 VDDQ_AU35 VCCIO AL42 C65 C35 C245 C243 C211 C223 C274 C260 C233 C50
10U/6.3V_4 10U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 BB23 VDDQ_AU42 VCCIO AM28 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
BB32 VDDQ_BB23 VCCIO AM30
BB41 VDDQ_BB32 VCCIO AM42
BB47 VDDQ_BB41 VCCIO +VCCSA
BB51 VDDQ_BB47 AK23
VDDQ_BB51 VCCSA Under U9052
AK25
VCCSA G23
4A VCCSA
AM40 G25
C372 C288 C352 C356 VDDQC VCCSA G27 C160 C86 C71 C70 C85 C84 C205 C98 C144 C96 C55 C83 C97 C54
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 A18 VCCSA G28 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCSTPLL VCCST 0.12A VCCSA
C285 C270 J22
*10U/6.3V_4 1U/6.3V_4 A22 VCCSA J23
+VCCSTG VCCSTG_A220.04A VCCSA J27
Close U9052 VCCSA
AL23 K23 Close U9052
+VCCPLL_OC VCCPLL_OC 3.5A VCCSA K25
K20 VCCSA K27
120mA VCCPLL_K200.12A VCCSA
C234 C224 C95 C72 C53 C244
K21 K28 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4
+VCCPLL VCCPLL_K21 VCCSA K30
+1.0V_RUN +VCCSTG VCCSA +1.0V_RUN
AM23 VCCIO_VCCSENSE
R37 0_6 VCCIO_SENSE AM22 VCCIO_VSSSENSE
VSSIO_SENSE
+1.35V_SUS +VCCPLL_OC H21 VSSSA_SENSE
VSSSA_SENSE H20 VCCSA_SENSE VSSSA_SENSE 42 VCCIO_VCCSENSE
R117 R93 100/F_4
2 1 VCCSA_SENSE VCCSA_SENSE 42
2 1
+VCCSTPLL *SJ0603_NC +VCCPLL 14 OF 20 VCCIO_VSSSENSE R140 100/F_4
SKL_ULT
C R34 0_6 REV = 1 C

Under U9052 Close U9052 +VCCSA

+VCCSTG +VCCPLL_OC +VCCSTPLL +VCCPLL

VCCSA_SENSE R312 100/F_4


C139 C287 C52 C99
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
VSSSA_SENSE R311 100/F_4

Close A18 Ball Close to CPU


+VCCSTPLL +1.35V_SUS

C369 C336 C366 C358 C360 C357 C280 C279 C373 C353
C51 C67 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 10U/6.3V_6 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4
*1U/6.3V_4 *22U/6.3V_6
B B

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 5/15 (POWER-2)
Date: Friday, May 22, 2015 Sheet 6 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

+VCCGT
U17M
SKL_ULT ? +VCCGT
07
Under U9052 CPU POWER 2 OF 4 Close U9052
N70
A48 VCCGT N71
A53 VCCGT VCCGT R63
A58 VCCGT
VCCGT
31A VCCGT
VCCGT
R64 C187 C174 C207 C191 C226 C188
C140 C214 C196 C236 C142 A62 R65 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
D 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 A66 VCCGT VCCGT R66 D
AA63 VCCGT VCCGT R67
AA64 VCCGT VCCGT R68
AA66 VCCGT VCCGT R69
AA67 VCCGT VCCGT R70
AA69 VCCGT VCCGT R71
AA70 VCCGT VCCGT T62
AA71 VCCGT VCCGT U65 C253 C254 C218 C221 C255 C217 C251 C216
C247 C162 C141 C258 C163 AC64 VCCGT VCCGT U68 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 10U/6.3V_4 AC65 VCCGT VCCGT U71
AC66 VCCGT VCCGT W 63
AC67 VCCGT VCCGT W 64
AC68 VCCGT VCCGT W 65
AC69 VCCGT VCCGT W 66
AC70 VCCGT VCCGT W 67
AC71 VCCGT VCCGT W 68
J43 VCCGT VCCGT W 69 C186 C259 C242 C252
J45 VCCGT VCCGT W 70 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
C248 C201 C195 C212 C185 C194 J46 VCCGT VCCGT W 71
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 J48 VCCGT VCCGT Y62
J50 VCCGT VCCGT
J52 VCCGT
J53 VCCGT AK42
J55 VCCGT VCCGTX_AK42 AK43
J56 VCCGT VCCGTX_AK43 AK45
J58 VCCGT VCCGTX_AK45 AK46
J60 VCCGT VCCGTX_AK46 AK48
C213 C156 C164 C157 C228 C143 K48 VCCGT VCCGTX_AK48 AK50
1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 K50 VCCGT VCCGTX_AK50 AK52
K52 VCCGT VCCGTX_AK52 AK53
C K53 VCCGT VCCGTX_AK53 AK55 C
K55 VCCGT VCCGTX_AK55 AK56
K56 VCCGT VCCGTX_AK56 AK58
K58 VCCGT VCCGTX_AK58 AK60
K60 VCCGT VCCGTX_AK60 AK70
L62 VCCGT VCCGTX_AK70 AL43
L63 VCCGT VCCGTX_AL43 AL46
L64 VCCGT VCCGTX_AL46 AL50
L65 VCCGT VCCGTX_AL50 AL53
L66 VCCGT VCCGTX_AL53 AL56
L67 VCCGT VCCGTX_AL56 AL60
L68 VCCGT VCCGTX_AL60 AM48
L69 VCCGT VCCGTX_AM48 AM50
L70 VCCGT VCCGTX_AM50 AM52
L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
N63 VCCGT VCCGTX_AM56 AM58
N64 VCCGT VCCGTX_AM58 AU58
N66 VCCGT VCCGTX_AU58 AU63
N67 VCCGT VCCGTX_AU63 BB57
100/F_4 R58 N69 VCCGT VCCGTX_BB57 BB66
+VCCGT VCCGT VCCGTX_BB66
J70 AK62
42 VCCGT_SENSE VCCGT_SENSE VCCGTX_SENSE
J69 AL61
42 VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE
100/F_4 R57 PDC
13 OF 20
SKL_ULT
REV = 1

B B

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 6/15 (POWER-3)
Date: Friday, May 22, 2015 Sheet 7 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

08
U17R U17P U17Q
SKL_ULT ? ?
SKL_ULT SKL_ULT ?
D D
GND 3 OF 3 GND 1 OF 3 GND 2 OF 3

F8
VSS L18 A5 AL65 AT63 BA49
G10 VSS VSS VSS VSS VSS
VSS L2 A67 AL66 AT68 BA53
G22 VSS VSS VSS VSS VSS
VSS L20 A70 AM13 AT71 BA57
G43 VSS VSS VSS VSS VSS
VSS L4 AA2 AM21 AU10 BA6
G45 VSS VSS VSS VSS VSS
VSS L8 AA4 AM25 AU15 BA62
G48 VSS VSS VSS VSS VSS
VSS N10 AA65 AM27 AU20 BA66
G5 VSS VSS VSS VSS VSS
VSS N13 AA68 AM43 AU32 BA71
G52 VSS VSS VSS VSS VSS
VSS N19 AB15 AM45 AU38 BB18
G55 VSS VSS VSS VSS VSS
VSS N21 AB16 AM46 AV1 BB26
G58 VSS VSS VSS VSS VSS
VSS N6 AB18 AM55 AV68 BB30
G6 VSS VSS VSS VSS VSS
VSS N65 AB21 AM60 AV69 BB34
G60 VSS VSS VSS VSS VSS
VSS N68 AB8 AM61 AV70 BB38
G63 VSS VSS VSS VSS VSS
VSS P17 AD13 AM68 AV71 BB43
G66 VSS VSS VSS VSS VSS
VSS P19 AD16 AM71 AW 10 BB55
H15 VSS VSS VSS VSS VSS
VSS P20 AD19 AM8 AW 12 BB6
H18 VSS VSS VSS VSS VSS
VSS P21 AD20 AN20 AW 14 BB60
H71 VSS VSS VSS VSS VSS
VSS R13 AD21 AN23 AW 16 BB64
J11 VSS VSS VSS VSS VSS
VSS R6 AD62 AN28 AW 18 BB67
J13 VSS VSS VSS VSS VSS
VSS T15 AD8 AN30 AW 21 BB70
J25 VSS VSS VSS VSS VSS
VSS T17 AE64 AN32 AW 23 C1
J28 VSS VSS VSS VSS VSS
VSS T18 AE65 AN33 AW 26 C25
J32 VSS VSS VSS VSS VSS
VSS T2 AE66 AN35 AW 28 C5
J35 VSS VSS VSS VSS VSS
VSS T21 AE67 AN37 AW 30 D10
J38 VSS VSS VSS VSS VSS
VSS T4 AE68 AN38 AW 32 D11
J42 VSS VSS VSS VSS VSS
VSS U10 AE69 AN40 AW 34 D14
J8 VSS VSS VSS VSS VSS
VSS U63 AF1 AN42 AW 36 D18
K16 VSS VSS VSS VSS VSS
VSS U64 AF10 AN58 AW 38 D22
K18 VSS VSS VSS VSS VSS
C VSS U66 AF15 AN63 AW 41 D25 C
K22 VSS VSS VSS VSS VSS
VSS U67 AF17 AP10 AW 43 D26
K61 VSS VSS VSS VSS VSS
VSS U69 AF2 AP18 AW 45 D30
K63 VSS VSS VSS VSS VSS
VSS U70 AF4 AP20 AW 47 D34
K64 VSS VSS VSS VSS VSS
VSS V16 AF63 AP23 AW 49 D39
K65 VSS VSS VSS VSS VSS
VSS V17 AG16 AP28 AW 51 D44
K66 VSS VSS VSS VSS VSS
VSS V18 AG17 AP32 AW 53 D45
K67 VSS VSS VSS VSS VSS
VSS W 13 AG18 AP35 AW 55 D47
K68 VSS VSS VSS VSS VSS
VSS W6 AG19 AP38 AW 57 D48
K70 VSS VSS VSS VSS VSS
VSS W9 AG20 AP42 AW 6 D53
K71 VSS VSS VSS VSS VSS
VSS Y17 AG21 AP58 AW 60 D58
L11 VSS VSS VSS VSS VSS
VSS Y19 AG71 AP63 AW 62 D6
L16 VSS VSS VSS VSS VSS
VSS Y20 AH13 AP68 AW 64 D62
L17 VSS VSS VSS VSS VSS
VSS Y21 AH6 AP70 AW 66 D66
VSS AH63 VSS VSS AR11 AW 8 VSS VSS D69
AH64 VSS VSS AR15 AY66 VSS VSS E11
AH67 VSS VSS AR16 B10 VSS VSS E15
18 OF 20 AJ15 VSS VSS AR20 B14 VSS VSS E18
SKL_ULT AJ18 VSS VSS AR23 B18 VSS VSS E21
REV = 1 ? VSS VSS VSS VSS
AJ20 AR28 B22 E46
AJ4 VSS VSS AR35 B30 VSS VSS E50
AK11 VSS VSS AR42 B34 VSS VSS E53
AK16 VSS VSS AR43 B39 VSS VSS E56
AK18 VSS VSS AR45 B44 VSS VSS E6
AK21 VSS VSS AR46 B48 VSS VSS E65
AK22 VSS VSS AR48 B53 VSS VSS E71
AK27 VSS VSS AR5 B58 VSS VSS F1
AK63 VSS VSS AR50 B62 VSS VSS F13
AK68 VSS VSS AR52 B66 VSS VSS F2
AK69 VSS VSS AR53 B71 VSS VSS F22
B AK8 VSS VSS AR55 BA1 VSS VSS F23 B
AL2 VSS VSS AR58 BA10 VSS VSS F27
AL28 VSS VSS AR63 BA14 VSS VSS F28
AL32 VSS VSS AR8 BA18 VSS VSS F32
AL35 VSS VSS AT2 BA2 VSS VSS F33
AL38 VSS VSS AT20 BA23 VSS VSS F35
AL4 VSS VSS AT23 BA28 VSS VSS F37
AL45 VSS VSS AT28 BA32 VSS VSS F38
AL48 VSS VSS AT35 BA36 VSS VSS F4
AL52 VSS VSS AT4 F68 VSS VSS F40
AL55 VSS VSS AT42 BA45 VSS VSS F42
AL58 VSS VSS AT56 VSS VSS BA41
AL64 VSS VSS AT58 VSS
VSS VSS
17 OF 20
PDC
16 OF 20
SKL_ULT SKL_ULT
REV = 1 ? REV = 1 ?

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 7/15 (GND)
Date: Friday, May 22, 2015 Sheet 8 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

?
SKL_ULT
U17S

U17T SKL_ULT ?
D RESERVED SIGNALS-1 D

CFG0 E68 BB68 SPARE


16 CFG0 CFG[0] RSVD_TP_BB68
CFG1 B67 BB69
16 CFG1 CFG[1] RSVD_TP_BB69
CFG2 D65 AW69 F6
16 CFG2 CFG[2] RSVD_AW69 RSVD_F6
TP96 CFG3 D67 AK13 AW68 E3
CFG4 E70 CFG[3] RSVD_TP_AK13 AK12 AU56 RSVD_AW68 RSVD_E3 C11
5/13 Added test point TP97
CFG5 C68 CFG[4] RSVD_TP_AK12 AW48 RSVD_AU56 RSVD_C11 B11
16 CFG5 CFG[5] RSVD_AW48 RSVD_B11
CFG6 D68 BB2 C7 A11
16 CFG6 CFG[6] RSVD_BB2 RSVD_C7 RSVD_A11
CFG7 C67 BA3 U12 D12
16 CFG7 CFG[7] RSVD_BA3 RSVD_U12 RSVD_D12
CFG8 F71 U11 C12
16 CFG8 CFG[8] RSVD_U11 RSVD_C12
CFG9 G69 H11 F52
16 CFG9 CFG[9] RSVD_H11 RSVD_F52
CFG10 F70 AU5
16 CFG10 CFG[10] TP5
CFG11 G68 AT5
CFG0-19 need reserved TP 16 CFG11
CFG12 H70 CFG[11] TP6
16 CFG12 CFG[12] 20 OF 20
CFG13 G71
16 CFG13 CFG[13] SKL_ULT
CFG14 H69 D5 REV = 1 ?
16 CFG14 CFG[14] RSVD_D5
CFG15 G70 D4
16 CFG15 CFG[15] RSVD_D4 B2
CFG16 E63 RSVD_B2 C2
16 CFG16 CFG[16] RSVD_C2
CFG17 F63
16 CFG17 CFG[17] B3
CFG18 E66 RSVD_B3 A3
16 CFG18 CFG[18] RSVD_A3
CFG19 F66
16 CFG19 CFG[19] AW1
R63 49.9/F_4 CFG_RCOMP E60 RSVD_AW1
C CFG_RCOMP C
E1
ITP_PMODE E8 RSVD_E1 E2
16 ITP_PMODE ITP_PMODE RSVD_E2
AY2 BA4
AY1 RSVD_AY2 RSVD_BA4 BB4
RSVD_AY1 RSVD_BB4
D1 A4
D3 RSVD_D1 RSVD_A4 C4
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3 R374 0_4
C71 RSVD_AY3
B70 RSVD_C71 D71
RSVD_B70 RSVD_D71 C70
F60 RSVD_C70
RSVD_F60 C54
A52 RSVD_C54 D54
RSVD_A52 RSVD_D54
BA70 AY4
BA68 RSVD_TP_BA70 TP1 BB3
RSVD_TP_BA68 TP2
B B
J71 AY71
J68 RSVD_J71 VSS_AY71 AR56
RSVD_J68 ZVM#
F65 AW71
G65 VSS_F65 RSVD_TP_AW71 AW70
VSS_G65 RSVD_TP_AW70
F61 AP56
E61 RSVD_F61 MSM# C64 R291 *100K_4_NC
RSVD_E61 PROC_SELECT# +VCCSTPLL PROC_SELECT# needs to be pulled to VCCST for
Cannon Lake support via 100K ohm resistor and
PDC 19 OF 20 with no resistor populated (floating pin) for
SKL_ULT Skylake.
REV = 1 ?

The CFG signals have a default value of '1' if not terminated on the board.
Processor Strapping
1 0 Circuit
CFG3 CFG3 R289 *1K_4_NC
A
(Physcial Debug Enable) Disable: Enable: Set DFX Enable in DFX interface MSR A

DFX Privacy
CFG4 Disable; No physical DP attached to eDP Enable; An ext DP device is connected to eDP CFG4 R330 1K_4

(DP Presence Strap)


Quanta Computer Inc.
PROJECT : AM8
Size Document Number Rev
1A
SKL U 8/15 (RSV)
Date: Friday, May 22, 2015 Sheet 9 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

U17E
SKL_ULT
?
10
GPIO Pull UP AV2
SPI - FLASH
SMBUS, SMLINK
R7 SMB_PCH_CLK GPIO Pull UP
34 PCH_SPI_CLK SPI0_CLK GPP_C0/SMBCLK
D AW 3 R8 SMB_PCH_DAT D
34 PCH_SPI_SO SPI0_MISO GPP_C1/SMBDATA
AV3 R10 SMBALERT#
34 PCH_SPI_SI SPI0_MOSI GPP_C2/SMBALERT# SMBALERT# 11 +3.3V_SUS
AW 2 5/19 Changed resistor value from 2.2K to 4.7K
34 PCH_SPI_IO2 SPI0_IO2
AU4 R9 SMB_ME0_CLK
+3.3V_RUN 34 PCH_SPI_IO3 SPI0_IO3 GPP_C3/SML0CLK
AU3 W2 SMB_ME0_DAT SMB_PCH_CLK R301 4.7K_4
34 PCH_SPI_CS0# SPI0_CS0# SUS_3V3 GPP_C4/SML0DATA
AU2 W1 SML0ALERT#
34 PCH_SPI_CS1# SPI0_CS1# GPP_C5/SML0ALERT# SML0ALERT# 11
AU1 SMB_PCH_DAT R300 4.7K_4
SPI0_CS2# W 3 SMB_ME1_CLK
GPP_C6/SML1CLK V3 SMB_ME1_DAT SMB_ME0_CLK R75 499/F_4
SPI - TOUCH GPP_C7/SML1DATA AM7 GPP_B23
GPP_B23/SML1ALERT#/PCHHOT# TP19
10K_4 R153 SERIRQ TP54 SPI1_CLK M2 SMB_ME0_DAT R349 499/F_4
TP52 SPI1_MISO M3 GPP_D1/SPI1_CLK
10K_4 R170 EC_RCIN# TP51 SPI1_MOSI J4 GPP_D2/SPI1_MISO SMB_ME1_CLK R343 2.2K_4
TP62 SPI1_IO2 V1 GPP_D3/SPI1_MOSI SUS_3V3
*10K_4_NC R329 SPI1_MOSI TP64 SPI1_IO3 V2 GPP_D21/SPI1_IO2 SMB_ME1_DAT R340 2.2K_4
TP55 SPI1_CS# M1 GPP_D22/SPI1_IO3 AY13
LPC
GPP_D0/SPI1_CS# GPP_A1/LAD0/ESPI_IO0 LAD0 30,35
*10K_4_NC R331 SPI1_MISO BA13
GPP_A2/LAD1/ESPI_IO1 LAD1 30,35 +3.3V_RUN
BB13
C LINK SUS_3V3 GPP_A3/LAD2/ESPI_IO2 LAD2 30,35
AY12
GPP_A4/LAD3/ESPI_IO3 LAD3 30,35
G3 BA12
CL_CLK GPP_A5/LFRAME#/ESPI_CS# LFRAME# 30,35
G2 BA11 EC16 18P/50V_4 CLKRUN# R134 8.2K/F_4
G1 CL_DATA GPP_A14/SUS_STAT#/ESPI_RESET#
CL_RST#
AW 9 CLK_PCI_EC_R R121 22/F_4
GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_24M_KBC 35
AW 13 AY9 CLK_PCI_LPC_R R119 22/F_4
C 35 EC_RCIN# GPP_A0/RCIN# SUS_3V3 SUS_3V3 GPP_A10/CLKOUT_LPC1 LPC_CLK_DEBUG 30 C
AW 11CLKRUN#
GPP_A8/CLKRUN# CLKRUN# 35
AY11
35 SERIRQ GPP_A6/SERIRQ SUS_3V3 PDC
EC15 18P/50V_4
5 OF 20
SKL_ULT
REV = 1 EMI(near PCH)
?

+3.3V_SUS

SMBus/Pull-up(CLG)
Q14
5

B SMB_ME1_CLK 4 3 B
SMBCLK1 35

2 EC side
SMB_ME1_DAT 1 6
SMBDAT1 35

2N7002KDW

+3.3V_RUN
+3.3V_RUN 4.7K_4 R252
Q11
5

4 3 SMB_PCH_DAT
17 SMB_RUN_DAT
XDP
DDR3-L 2

1 6 SMB_PCH_CLK
17 SMB_RUN_CLK
A A

+3.3V_RUN 4.7K_4 R241


2N7002KDW

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 9/15(SPI/LPC/SMBUS)
Date: Friday, May 22, 2015 Sheet 10 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

11
D
Functional Strap Definitions D

DESIGN NOTE:
WEAK PULL UP RESISTOR PRESENT ON THIS NET
+3.3V_RUN

ACZ_SPKR
14,32 ACZ_SPKR
Change to 150K_1% Flash Descriptor Security Override:
Top-Block Swap Override: R156 The signal has a weak internal pull-down.
R383 HIGH - TOP SWAP ENABLE *4.7K_4 0 = Enable security measures defined in the Flash
*20K/F_4 LOW-DISABLED Descriptor.
HIGH: LPC SELECTED FOR SYSTEM FLASH 1 = Disable Flash Descriptor Security (override). This
WEAK INTERNAL PD ACZ_SDOUT strap should only be asserted high using external
14 ACZ_SDOUT
pull-up in manufacturing/debug environments ONLY.
This function is useful when running ITP/XDP.

R155 1K_4 ACZ_SDOUT


C 35 PCH_MELOCK C

+3.3V_SUS +3.3V_RUN

R60
This signal has a weak internal pull-down. R138
*1K_4_NC
0 = Disable Intel ME Crypto Transport Layer Security *4.7K_4
(TLS) cipher suite (no confidentiality). (Default) The signal has a weak internal pull-down.
1 = Enable Intel ME Crypto Transport Layer Security 0 = Disable “No Reboot” mode. (Default)
SMBALERT#
(TLS) cipher suite (with confidentiality). Must be GPP_B18 1 = Enable “No Reboot” mode (PCH will disable the TCO
10 SMBALERT# pulled up to support Intel AMT with TLS and Intel 14 GPP_B18
Timer system reboot feature). This function is useful
SBA (Small Business Advantage) with TLS. when running ITP/XDP.
R61 R139
*20K/F_4_NC 10K_4
Notes: Notes:
1. The internal pull-down is disabled after RSMRST# 1. The internal pull-down is disabled after PLTRST# deasserts.
de-asserts. 2. This signal is in the primary well.
2. This signal is in the primary well.

+3.3V_SUS

B B

R347

GSPI1_MOSI
BIOS Strap Bit(BBS): *10K_4
14 GSPI1_MOSI The signal has a weak internal pull-down.
This field determines the destination of accesses to the
BIOS memory range. Also controllable using Boot BIOS This signal has a weak internal pull-down.
R126 SML0ALERT#
*20K/F_4
Destination bit (Chipset Configuration Registers: Offset 10 SML0ALERT# 0 = LPC Is selected for EC. (Default)
3410h:Bit 10). This strap is used in conjunction with Boot 1 = eSPI Is selected for EC.
BIOS Destination Selection 0 strap.
Bit 10 Boot BIOS Destination R344
20K/F_4
Notes:
0 SPI 1. The internal pull-down is disabled after RSMRST#
1 LPC de-asserts.
2. This signal is in the primary well.

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 10/15(HDA)
Date: Monday, May 25, 2015 Sheet 11 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

U17H

PCIE/USB3/SATA
SKL_ULT
?

SSIC / USB3
H8 USB30_RX1-
12
USB3_1_RXN G8 USB30_RX1- 29
USB30_RX1+
H13 USB3_1_RXP C13 USB30_TX1- USB30_RX1+ 29
18 PEG_RXN1 G13 PCIE1_RXN/USB3_5_RXN USB3_1_TXN D13 USB30_TX1+
USB30_TX1- 29 USB3.0 (M/B-1)
18 PEG_RXP1 PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB30_TX1+ 29
18 PEG_TXN1 C488 Dis@0.22U/10V_4 PEG_TXN1_C B17
C485 Dis@0.22U/10V_4 PEG_TXP1_C A17 PCIE1_TXN/USB3_5_TXN J6 USB30_RX2-
18 PEG_TXP1 PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN USB30_RX2- 29
H6 USB30_RX2+
D G11 USB3_2_RXP/SSIC_1_RXP B13 USB30_TX2- USB30_RX2+ 29 D
18 PEG_RXN2
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13 USB30_TX2+
USB30_TX2- 29 USB3.0 (M/B-2)
18 PEG_RXP2 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP USB30_TX2+ 29 +3.3V_SUS
18 PEG_TXN2 C507 Dis@0.22U/10V_4 PEG_TXN2_C D16
C505 Dis@0.22U/10V_4 PEG_TXP2_C C16 PCIE2_TXN/USB3_6_TXN J10 USB30_RX3-
18 PEG_TXP2 PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB30_RX3- 32
H10 USB30_RX3+
dGPU H16 USB3_3_RXP/SSIC_2_RXP B15 USB30_TX3- USB30_RX3+ 32
18 PEG_RXN3 G16 PCIE3_RXN USB3_3_TXN/SSIC_2_TXN A15 USB30_TX3+
USB30_TX3- 32 USB3.0 Small Board
18 PEG_RXP3 PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB30_TX3+ 32
18 PEG_TXN3 C501 Dis@0.22U/10V_4 PEG_TXN3_C D17
C502 Dis@0.22U/10V_4 PEG_TXP3_C C17 PCIE3_TXN E10
18 PEG_TXP3 PCIE3_TXP USB3_4_RXN F10 5/8 Removed 3D camera function
G15 USB3_4_RXP C15
18 PEG_RXN4 F15 PCIE4_RXN USB3_4_TXN D15
18 PEG_RXP4 PCIE4_RXP USB3_4_TXP
18 PEG_TXN4 C491 Dis@0.22U/10V_4 PEG_TXN4_C B19
C492 Dis@0.22U/10V_4 PEG_TXP4_C A19 PCIE4_TXN AB9 USBP1- SATA_LED# R324 10K_4
18 PEG_TXP4 PCIE4_TXP USB2N_1 USBP1- 29
AB10 USBP1+ Combo USB3.0 MB-1
F16 USB2P_1 USBP1+ 29 DEVSLP0 R326 *10K_4_NC
E16 PCIE5_RXN AD6 USBP2-
C19 PCIE5_RXP USB2N_2 AD7 USBP2+ USBP2- 29 SATAGP0
Combo USB3.0 MB-2 R325 10K_4
D19 PCIE5_TXN USB2P_2 USBP2+ 29
PCIE5_TXP AH3 USBP3- SATAGP1 R327 10K_4
G18 USB2N_3 AJ3 USBP3+ USBP3- 32
30 PCIE_RXN6_WLAN F18 PCIE6_RXN USB2P_3 USBP3+ 32 Combo USB3.0 Small Board, check function SATAGP2 R323 10K_4
30 PCIE_RXP6_WLAN PCIE6_RXP
WLAN 30 PCIE_TXN6_WLAN C493 0.1U/16V_4 PCIE_TXN6_WLAN_C D20 AD9 USBP4-
PCIE6_TXN USB2N_4 USBP4- 32
30 PCIE_TXP6_WLAN C494 0.1U/16V_4 PCIE_TXP6_WLAN_C C20 AD10 USBP4+ CardReader
PCIE6_TXP USB2P_4 USBP4+ 32
F20 AJ1 USBP5- USB_OC0# R283 10K_4
32 SATA_RXN0 E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USBP5- 32
USBP5+ FingerPrint
32 SATA_RXP0 B21 PCIE7_RXP/SATA0_RXP USB2P_5 USBP5+ 32 USB_OC1#
HDD 32 SATA_TXN0 USB2 R273 10K_4
A21 PCIE7_TXN/SATA0_TXN AF6 USBP6-
32 SATA_TXP0 PCIE7_TXP/SATA0_TXP USB2N_6 USBP6- 30
AF7 USBP6+ BT USB_OC2# R45 10K_4
C G21 USB2P_6 USBP6+ 30 C
F21 PCIE8_RXN/SATA1A_RXN AH1 USBP7- USB_OC3# R303 10K_4
D21 PCIE8_RXP/SATA1A_RXP USB2N_7 AH2 USBP7- 26
USBP7+ Camera
PCIE8_TXN/SATA1A_TXN USB2P_7 USBP7+ 26
C21
PCIE8_TXP/SATA1A_TXP AF8 USBP8-
E22 USB2N_8 AF9 USBP8- 26
USBP8+ Touch Screen
28 PCIE_RXN9_LAN E23 PCIE9_RXN USB2P_8 USBP8+ 26
28 PCIE_RXP9_LAN PCIE_TXN9_LAN_C B23 PCIE9_RXP AG1 USB2_ID
LAN 28 PCIE_TXN9_LAN C504 0.1U/16V_4 R368 1K_4
C498 0.1U/16V_4 PCIE_TXP9_LAN_C A23 PCIE9_TXN USB2N_9 AG2 USB_VBUSSENSE R100 1K_4
28 PCIE_TXP9_LAN PCIE9_TXP USB2P_9
F25 AH7
E25 PCIE10_RXN USB2N_10 AH8
D23 PCIE10_RXP USB2P_10 PLACE 'R10387' WITHIN 500 MILS
C23 PCIE10_TXN AB6 USB2_COMP R82 113/F_4 FROM USB2_COMP PIN WITH
PCIE10_TXP USB2_COMP AG3 USB2_ID TRACE IMPEDANCE LESS THAN 0.5 OHMS
R321 100/F_4 PCIE_RCOMPN F5 USB2_ID AG4 USB_VBUSSENSE
PCIE_RCOMPP E5 PCIE_RCOMPN USB2_VBUSSENSE +3.3V_SUS
PCIE_RCOMPP A9 USB_OC0#
D56 GPP_E9/USB2_OC0# C9 USB_OC0# 29
USB_OC1#
16 XDP_PRDY#_CPU D61 PROC_PRDY# SUS_3V3 GPP_E10/USB2_OC1# D9 USB_OC1# 32
USB_OC2#
16 XDP_PREQ#_CPU BB11 PROC_PREQ# GPP_E11/USB2_OC2# B9
+3.3V_RUN R118 10K_4 PIRQA# USB_OC3# SIO_EXT_SCI# 10K_4 R108
GPP_A7/PIRQA# GPP_E12/USB2_OC3#
E28 J1 DEVSLP0 +3.3V_RUN
PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 DEVSLP0 32
E27 J2 SIO_EXT_SMI#
PCIE11_RXP/SATA1B_RXP SUS_3V3 GPP_E5/DEVSLP1 SIO_EXT_SMI# 35
D24 J3 SIO_EXT_SCI#
C24 PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SIO_EXT_SCI# 35
E30 PCIE11_TXP/SATA1B_TXP H2 SATAGP0 SIO_EXT_SMI# R328 10K_4
F30 PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0 H3 SATAGP1
A25 PCIE12_RXP/SATA2_RXP SUS_3V3 GPP_E1/SATAXPCIE1/SATAGP1 G4 SATAGP2
B25 PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2
B PCIE12_TXP/SATA2_TXP H1 SATA_LED# B
SUS_3V3 GPP_E8/SATALED# SATA_LED# 32
PDC
8 OF 20
SKL_ULT
REV = 1 ?
USB3.0 Port Mapping Table USB2.0 Port Mapping Table
PCI-E Port Mapping Table
PCI-E Port
USB3.0 Function USB2.0 Function
Function CLK RQ Port Function
PORT-1 USB3.0 MB-1 PORT-1 Combine USB3.0 MB-1
Port1 dGPU Port0 NA PORT-2 USB3.0 MB-2 PORT-2 Combine USB3.0 MB-1
Port2 dGPU Port1 NA
PORT-3 Combine USB3.0 Small Board PORT-3 Combine USB3.0 Small Board
PORT-4 N/A PORT-4 CardReader
Port3 dGPU Port2 WLAN PORT-5 FingerPrint
Port4 dGPU Port3 LAN
USB2.0 Overcurrent Pin Default Usage PORT-6 BT
PORT-7 Camera
Port5 NA Port4 VGA
Pin Default Port Mapping
PORT-8 Touch Screen
USB_OC0# Port 2, Port 1
Port6 WLAN Port5 NA
PORT-9 NC
USB_OC1# Port 4, Port 3
PORT-10 NC
A
Port7 HDD
USB_OC2# Port 6, Port 5 A

USB_OC3# Port 8, Port 7


Port8 NA

Port9 LAN
Quanta Computer Inc.
Port10 NA PROJECT : AM8
Size Document Number Rev
1A
SKL U 11/15 (PCIE/USB/SATA)
Date: Friday, May 22, 2015 Sheet 12 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

CLK_REQ/Strap Pin(CLG)

PCIE_CLKREQ_VGA# R128
+3.3V_RUN

10K_4
13
PCIE_CLKREQ_WLAN# R137 10K_4 U17J SKL_ULT ?

PCIE_CLKREQ_LAN# R127 10K_4 CLOCK SIGNALS

PCIE_CLKREQ1# R129 10K_4 CLK_VGA_N D42


18 CLK_VGA_N CLKOUT_PCIE_N0
CLK_VGA_P C42
PCIE_CLKREQ5# R136 10K_4
VGA 18 CLK_VGA_P
PCIE_CLKREQ_VGA# AR10 CLKOUT_PCIE_P0
18 PCIE_CLKREQ_VGA# GPP_B5/SRCCLKREQ0# SUS_3V3
D D
PCIE_CLKREQ4# R135 10K_4 B42 RP3 *0_4P2R_4_NC
A42 CLKOUT_PCIE_N1 F43 CK_XDP_N_R 2 1
CLKOUT_PCIE_P1 CLKOUT_ITPXDP_N CK_XDP_N 16
PCIE_CLKREQ1# AT7 E43 CK_XDP_P_R 4 3
GPP_B6/SRCCLKREQ1# SUS_3V3 CLKOUT_ITPXDP_P CK_XDP_P 16

WLAN CLK_PCIE_WLANN D41 BA17


30 CLK_PCIE_WLANN CLKOUT_PCIE_N2 GPD8/SUSCLK
CLK_PCIE_WLANP C41
30 CLK_PCIE_WLANP CLKOUT_PCIE_P2
PCIE_CLKREQ_WLAN# AT8 E37 XTAL24_IN
30 PCIE_CLKREQ_WLAN# GPP_B7/SRCCLKREQ2# SUS_3V3 XTAL24_IN +1.0V_SUS
E35 XTAL24_OUT
CLK_PCIE_LANN D40 XTAL24_OUT
28 CLK_PCIE_LANN CLKOUT_PCIE_N3
LAN CLK_PCIE_LANP C40 E42 XCLK_BIASREF R304 2.7K/F_4
28 CLK_PCIE_LANP CLKOUT_PCIE_P3 XCLK_BIASREF
PCIE_CLKREQ_LAN# AT10
28 PCIE_CLKREQ_LAN# GPP_B8/SRCCLKREQ3# SUS_3V3
AM18 RTC_X1
B40 RTCX1 AM20 RTC_X2
A40 CLKOUT_PCIE_N4 RTCX2
PCIE_CLKREQ4# AU8 CLKOUT_PCIE_P4 AN18 SRTC_RST#
GPP_B9/SRCCLKREQ4# SUS_3V3 SRTCRST# AM16 RTC_RST#
E40 RTCRST#
E38 CLKOUT_PCIE_N5
PCIE_CLKREQ5# AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5# SUS_3V3 TBT

10 OF 20
SKL_ULT
REV = 1 ?

U17I SKL_ULT ?
C C

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 R44 100/F_4
D31 CSI2_DN4 CSI2_COMP B7
C33 CSI2_DP4 SUS_3V3 GPP_D4/FLASHTRIG
D33 CSI2_DN5
A31 CSI2_DP5 EMMC
B31 CSI2_DN6 AP2
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 SUS_1V8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2 EMMC_RCLK
CSI2_DP10 GPP_F21/EMMC_RCLK TP74
C27 AM3 EMMC_CLK
CSI2_DN11 GPP_F22/EMMC_CLK TP73
D27 AP4 EMMC_CMD
CSI2_DP11 GPP_F12/EMMC_CMD TP76
AT1 EMMC_RCOMP R372 200/F_4
EMMC_RCOMP
9 OF 20
SKL_ULT
REV = 1 ?
B B

RTC Clock 32.768KHz External Crystal


+RTC_CELL

R400 20K/F_4 RTC_RST#

R403 20K/F_4 SRTC_RST#

C550 15P/50V_4 RTC_X1 C568 C569


5/12 Changed C495 and C496 values to 10pF
1

1U/6.3V_4 1U/6.3V_4
Y3 C495 10P/50V_4
32.768KHZ R371
10M_4

1
2
2

C544 15P/50V_4 RTC_X2 XTAL24_IN R314


1M_4 24MHZ +-30PPM
RTC_RST# XTAL24_OUT Y2

3
4
C496 10P/50V_4
3

A A
2 Q24
35 EC_RTC_RST
2N7002W
1
1

R388
100K_4
2

Quanta Computer Inc.


Vinafix.com
RTC RESET PROJECT : AM8
Size Document Number Rev
1A
SKL U 12/15(CLK/EMMC/RTC)
Date: Friday, May 22, 2015 Sheet 13 of 53
5 4 3 2 1
5 4 3 2 1

U17F
Skylake (GPIO)
SKL_ULT ?
14
LPSS ISH

+3.3V_SUS AN8 P2 DGPU_PWR_EN


GPP_B15/GSPI0_CS# GPP_D9 DGPU_PWR_EN 48 +3.3V_SUS
AP7 P3 DGPU_PWROK
GPP_B16/GSPI0_CLK SUS_3V3 SUS_3V3 GPP_D10 DGPU_PWROK 20
AP8 P4 DGPU_HOLD_RST#
GPP_B17/GSPI0_MISO GPP_D11 DGPU_HOLD_RST# 18
GPP_B18 AR7 P1
D 11 GPP_B18 GPP_B18/GSPI0_MOSI GPP_D12 D
DGPU_PWR_EN R333 10K_4
R193 10K_4 I2C0_PCH_DAT AM5 M4 ISH_I2C0_SDA
GPP_B19/GSPI1_CS# GPP_D5/ISH_I2C0_SDA TP56
R203 10K_4 I2C0_PCH_CLK AN7 SUS_3V3 N3 ISH_I2C0_SCL DGPU_PWROK R332 *10K_4_NC
GPP_B20/GSPI1_CLK SUS_3V3 GPP_D6/ISH_I2C0_SCL TP53
AP5
GSPI1_MOSI AN5 GPP_B21/GSPI1_MISO N1 DGPU_HOLD_RST# R335 10K_4
11 GSPI1_MOSI GPP_B22/GSPI1_MOSI GPP_D7/ISH_I2C1_SDA
SUS_3V3 N2
AB1 GPP_D8/ISH_I2C1_SCL PCH_TEMPALERT# R337 *10K_4_NC
AB2 GPP_C8/UART0_RXD AD11
W4 GPP_C9/UART0_TXD SUS_3V3
SUS_1V8
GPP_F10/I2C5_SDA/ISH_I2C2_SDA AD12
AB3 GPP_C10/UART0_RTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_C11/UART0_CTS#
TP71 UART2_RXD AD1 U1 PCH_TEMPALERT#
GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA TP59
TP68 UART2_TXD AD2 U2 SML0BDATA
GPP_C21/UART2_TXD SUS_3V3 SUS_3V3 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL TP60
TP72 UART2_RTS# AD3 U3 SML0BCLK
GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# TP61
R364 49.9K_4 UART2_RXD TP69 UART2_CTS# AD4 U4 SML0BALERT#
GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT# TP63
R356 49.9K_4 UART2_TXD
R363 49.9K_4 UART2_RTS# AC1 UART1_RXD
GPP_C12/UART1_RXD/ISH_UART1_RXD TP70
R357 49.9K_4 UART2_CTS# U7 AC2 UART1_TXD
33 I2C0_PCH_DAT GPP_C16/I2C0_SDA SUS_3V3 GPP_C13/UART1_TXD/ISH_UART1_TXD TP67
Touch Pad 33 I2C0_PCH_CLK U6 SUS_3V3 AC3 UART1_RTS
GPP_C17/I2C0_SCL GPP_C14/UART1_RTS#/ISH_UART1_RTS# TP66
AB4 UART1_CTS
GPP_C15/UART1_CTS#/ISH_UART1_CTS# TP65
U8
U9 GPP_C18/I2C1_SDA AY8
GPP_C19/I2C1_SCL SUS_3V3 GPP_A18/ISH_GP0 BA8
AH9 GPP_A19/ISH_GP1 BB7
5/18 Removed TP11 and TP12 GPP_F4/I2C2_SDA SUS_3V3 GPP_A20/ISH_GP2
AH10 SUS_1V8 BA7
GPP_F5/I2C2_SCL GPP_A21/ISH_GP3 AY7
AH11 GPP_A22/ISH_GP4 AW7
AH12 GPP_F6/I2C3_SDA SUS_1V8
GPP_A23/ISH_GP5 AP13
GPP_F7/I2C3_SCL GPP_A12/BM_BUSY#/ISH_GP6
AF11
C AF12 GPP_F8/I2C4_SDA C
SUS_1V8
GPP_F9/I2C4_SCL

6 OF 20
SKL_ULT
REV = 1 ?

HDA Bus(CLG) SKL_ULT ?


U17G

AUDIO
R169 *1K_4 ACZ_SYNC +3.3V_SUS
+3.3V_RUN
ACZ_SYNC BA22
B R172 33_4 ACZ_SYNC ACZ_BCLK AY22 HDA_SYNC/I2S0_SFRM B
32 ACZ_SYNC_AUDIO HDA_BLK/I2S0_SCLK
11 ACZ_SDOUT ACZ_SDOUT BB22 SDIO/SDXC
R185 33_4 ACZ_RST# ACZ_SDIN0 BA21 HDA_SDO/I2S0_TXD
32 ACZ_RST#_AUDIO 32 ACZ_SDIN0 HDA_SDI0/I2S0_RXD
AY21 AB11 KB_LED_DET
HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD KB_LED_DET 33
32 ACZ_SDOUT_AUDIO R157 33_4 ACZ_SDOUT ACZ_RST# AW22 AB13 KB_DET# DCR_EN R91 *10K_4_NC
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0 KB_DET# 33
J5 AB12 DCR_EN
GPP_D23/I2S_MCLK GPP_G2/SD_DATA1 DCR_EN 26
AY20 W12 BT_RADIO_DIS#
I2S1_SFRM GPP_G3/SD_DATA2 BT_RADIO_DIS# 30
32 BIT_CLK_AUDIO R176 47_4 ACZ_BCLK AW20 W11 WLAN_OFF#
I2S1_TXD SUS_3V3 GPP_G4/SD_DATA3 WLAN_OFF# 30
W10
TP18 SSP2_SFRM AK7 GPP_G5/SD_CD# W8
C376 TP23 SSP2_SCLK AK6 GPP_F1/I2S2_SFRM GPP_G6/SD_CLK W7
GPP_F0/I2S2_SCLK GPP_G7/SD_WP 5/7 Base on 3D CAMERA funciton removed, Removed FW_GPIO net too.
47P/50V_4 TP17 SSP2_TXD AK9 SUS_1V8
TP15 SSP2_RXD AK10 GPP_F2/I2S2_TXD BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 BB9
SUS_3V3 GPP_A16/SD_1P8_SEL
H5 AB7 R88 200/F_4
D7 GPP_D19/DMIC_CLK0 SUS_3V3
SD_RCOMP
GPP_D20/DMIC_DATA0
GPU_EVENT# D8 AF13 GPP_F23
21 GPU_EVENT# GPP_D17/DMIC_CLK1 SUS_1V8 GPP_F23 TP16
GC6_FB_EN C8 SUS_3V3
21 GC6_FB_EN GPP_D18/DMIC_DATA1
+3.3V_SUS ACZ_SPKR AW5
11,32 ACZ_SPKR GPP_B14/SPKR SUS_3V3

R308 10K_4 GPU_EVENT# 7 OF 20


SKL_ULT
REV = 1 ?
R276 *10K_4_NC GC6_FB_EN

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 13/15(I2C/GPIO/UART/HDA)
Date: Friday, May 22, 2015 Sheet 14 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

15
D D
?
SKL_ULT
U17O
CPU POWER 4 OF 4

+VCCPRIM AB19
C215 1U/6.3V_4 AB20 VCCPRIM_1P0 AK15 +VCCPGPPA
P18 VCCPRIM_1P0 VCCPGPPA AG15 +VCCPGPPB
VCCPRIM_1P0 VCCPGPPB Y16 +VCCPGPPC +3.3V_SUS
AF18 VCCPGPPC Y15 +VCCPGPPD
+1.0V_SUS VCCPRIM_CORE VCCPGPPD
C193 1U/6.3V_4 AF19 T16 +VCCPGPPE
V20 VCCPRIM_CORE 2.574A VCCPGPPE AF16 +VCCPGPPF +VCCPGPPA R353 0_6
V21 VCCPRIM_CORE VCCPGPPF AD15 +VCCPGPPG
VCCPRIM_CORE VCCPGPPG C146 1U/6.3V_4 +VCCPGPPB R352 0_6
AL1 V19
PCH Internal VRM +VCCDSW_1.0V
C548 1U/6.3V_4 DCPDSW _1P0 VCCPRIM_3P3_V19 +3.3V_SUS
+VCCPGPPC R339 0_6
K17 T1 +VCCPRIM_1.0V R341 0_6
VCCMPHYAON_1P0 VCCPRIM_1P0_T1 +1.0V_SUS
R42 0_6 +VCCMPHYAON_1P0 L1 0.022A +VCCPGPPD R346 0_6
+1.0V_SUS VCCMPHYAON_1P0
C62 1U/6.3V_4 0.006A AA1 +VCCATS_1.8V R359 0_6
VCCATS_1P8 +1.8V_SUS
N15 +VCCPGPPE R338 0_6
N16 VCCMPHYGT_1P0_N15 AK17 +VCCRTCPRIM_3.3V R360 0_6
VCCMPHYGT_1P0_N16 0.154A VCCRTCPRIM_3P3 +3.3V_SUS
N17 +VCCPGPPG R345 0_6
+1.0V_SUS VCCMPHYGT_1P0_N17
C176 1U/6.3V_4 P15 AK19
VCCMPHYGT_1P0_P15 VCCRTC_AK19 +RTC_CELL
C56 22U/6.3V_6 P16 BB14
VCCMPHYGT_1P0_P16 VCCRTC_BB14
R40 0_6 +VCCAMPHYPLL_1P0 K15 BB10 DCPRTC C359 0.1U/16V_4 +1.0V_SUS +1.8V_SUS
+1.0V_SUS VCCAMPHYPLL_1P0 DCPRTC
C168 1U/6.3V_4 L15
VCCAMPHYPLL_1P0 0.035A A14 +VCCCLK1 R14 0_6
C C
R41 0_6 +VCCAPLL_1.0V V15 VCCCLK1 +VCCPGPPF R358 0_6
+1.0V_SUS VCCAPLL_1P0
C616 0.1U/16V_4 0.026A 0.029A K19 +VCCCLK2 R24 0_6
AB17 VCCCLK2
5/14 For noise issue, added 0.1U decoupling caps(C616) R81 0_6 +VCCPRIM Y18 VCCPRIM_1P0_AB17 0.696A 0.024A L21 +VCCCLK3 R38 0_6
+1.0V_SUS VCCPRIM_1P0_Y18 VCCCLK3
R164 *0_4_NC AD17 0.033A N20 +VCCCLK4 R39 0_6
+3.3V_ALW VCCDSW _3P3_AD17 0.118A VCCCLK4
C241 1U/6.3V_4 AD18
R165 0_4 AJ17 VCCDSW _3P3_AD18 0.004A L19 +VCCCLK5 R25 0_6
+3.3V_SUS VCCDSW _3P3_AJ17 VCCCLK5
C337 0.1U/16V_4
+VCCHDA AJ19 0.068A 0.010A A10 +VCCCLK6 R16 0_6
+V3.3DX_1.5DX_ADO VCCHDA VCCCLK6
5/14 For noise issue, channged C337 value from 1uF to 0.1uF C45 1U/6.3V_4
R145 0_6 +VCCSPI AJ16 0.011A AN11 CORE_VID0
+3.3V_SUS VCCSPI GPP_B0/CORE_VID0 TP29
AN13 CORE_VID1
AF20 GPP_B1/CORE_VID1 TP28
R84 0_6 +VCCSRAM_1.0V AF21 VCCSRAM_1P0
+1.0V_SUS VCCSRAM_1P0
C237 1U/6.3V_4 T19 0.642A
T20 VCCSRAM_1P0
VCCSRAM_1P0
R144 0_6 +VCCPRIM_3.3V AJ21 0.075A
+3.3V_SUS VCCPRIM_3P3_AJ21
R336 0_6 +VCCPRIM_1.0V AK20
+1.0V_SUS VCCPRIM_1P0_AK20 0.696A
R36 0_6 +VCCAPLLEBB N18
+1.0V_SUS VCCAPLLEBB
C42 1U/6.3V_4 0.033A

15 OF 20
SKL_ULT
B REV = 1 ? B
+VCCATS_1.8V +RTC_CELL +VCCRTCPRIM_3.3V
+V3.3DX_1.5DX_ADO +1.0V_SUS

C43 C57 C531 C367 C368 C536 C535


R130 0_4 +3.3V_RUN *1U/6.3V_4 *22U/6.3V_6 1U/6.3V_4 0.1U/16V_4 1U/6.3V_4 1U/6.3V_4 0.1U/16V_4

+VCCPGPPB +VCCPGPPC +VCCPGPPE

C530 C522 C521


1U/6.3V_4 1U/6.3V_4 1U/6.3V_4

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 14/15(PCH POWER)
Date: Friday, May 22, 2015 Sheet 15 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

+1.0V_SUS

+1.0V_RUN

R317
150/F_4

12
CFG3_XDP
XDP_PREQ#_CPU
R316 1K_4 XDP_PRESENT_CPU
"(Pin1-Pin60)" = Intel DG Pin1-Pin60 insch

31
32
CN4
XDP Pin#1(PIN1) (PIN2)GND1
30
29
C472
0.1U/16V_4
C471
0.1U/16V_4
16
OBSFN_A0(PIN3) (PIN4)OBSFN_C0 CFG17 9
PWR_DEBUG 33 28
12 XDP_PRDY#_CPU OBSFN_A1(PIN5) (PIN6)OBSFN_C1 CFG16 9
D 34 27 D
R319 1K_4 35 GND2(PIN7) (PIN8)GND3 26
9 CFG0 OBSDATA_A0(PIN9) (PIN10)OBSDATA_C0 CFG8 9
R227 36 25
9 CFG1 OBSDATA_A1(PIN11) (PIN12)OBSDATA_C1 CFG9 9 +1.0V_SUS
*10K_4 37 24
38 GND4(PIN13) (PIN14)GND5 23
9 CFG2 OBSDATA_A2(PIN15) (PIN16)OBSDATA_C2 CFG10 9
TP91 CFG3_XDP 39 22 ITP_PMODE *1K_4_NC R30
OBSDATA_A3(PIN17) (PIN18)OBSDATA_C3 CFG11 9
40 21
GND6(PIN19) (PIN20)GND7
41 20 +3.3V_RUN
2 XDP_BPM0 OBSFN_B0(PIN21) (PIN22)OBSFN_D0 CFG19 9
42 19
2 XDP_BPM1 OBSFN_B1(PIN23) (PIN24)OBSFN_D1 CFG18 9
43 18
CFG4_XDP 44 GND8(PIN25) (PIN26)GND9 17 PCH_SPI_SI_XDP R228 1K_4
TP90 OBSDATA_B0(PIN27) (PIN28)OBSDATA_D0 CFG12 9
45 16
+3.3V_SUS 9 CFG5 OBSDATA_B1(PIN29) (PIN30)OBSDATA_D1 CFG13 9
46 15
47 GND10(PIN31) (PIN32)GND11 14
9 CFG6 OBSDATA_B2(PIN33) (PIN34)OBSDATA_D2 CFG14 9
48 13
9 CFG7 OBSDATA_B3(PIN35) (PIN36)OBSDATA_D3 CFG15 9
1K_4 R220 SIO_PWRBTN#_XDP 49 12
RSMRST#_XDP 50 GND12(PIN37) (PIN38)GND13 11
TP86 PWRGOOD/HOOK0(PIN39) (PIN40)ITPCLK/HOOK4 CK_XDP_P 13
C470 10
(PIN42)ITPCLK#/HOOK5 CK_XDP_N 13
*0.1U/16V_4_NC TP83 SIO_PWRBTN#_XDP 51
52 HOOK1(PIN41) 9
+1.0V_SUS VCC_OBS_AB(PIN43) (PIN44)VCC_OBS_CD +1.0V_SUS
CFG0 R318 1K_4 PWR_DEBUG 53 8 ITP_PMODE ITP_PMODE 9
PCH_SPI_SI_XDP 54 HOOK2(PIN45) (PIN46)RESET#/HOOK6 7 SYS_RESET#_XDP
+3.3V_RUN TP85 HOOK3(PIN47) (PIN48)DBR#/HOOK7 TP89 TP45
55 6
SMB_RUN_DAT_XDP 56 GND14(PIN49) (PIN50)GND15 5 XDP_TDO
TP92 SDA(PIN51) (PIN52)TDO
SMB_RUN_CLK_XDP 57 4 XDP_TRST#
C *1K_4_NC R229 SYS_RESET#_XDP
TP93
XDP_TCK1
XDP_TCK0
58
59
SCL(PIN53)
TCK1(PIN55) CPU XDP (PIN54)TRSTN
(PIN56)TDI
3
2
XDP_TDI
XDP_TMS
C

C467 60 TCK0(PIN57) (PIN58)TMS 1 PCH_SPI_IO2_XDP


GND16(PIN59) (PIN60)GND17(XDP_PRESENT) TP84
0.1U/16V_4

*Samtec BSH-030-01_NC

+3.3V_RUN
5/14 Modified XDP schematic

C516
0.1U/16V_4 +1.0V_RUN

To PCH_JTAG R232 51_4


U15 To CPU
14 R221 *0_4_NC XDP_TDO
VCC
B B
XDP_TDO 2 3 XDP_TCK0
1A 1B XDP_TDO_CPU 2 2 XDP_TCK0

4,35,38 HWPG 1 XDP_TMS


1OE 2 XDP_TMS
5/13 Removed APS connector and all signal net XDP_TDI 5 6 XDP_TDI
2A 2B XDP_TDI_CPU 2 2 XDP_TDI
4 XDP_TDO
2OE 2 XDP_TDO
XDP_TMS 9 8 R235 *0_4_NC XDP_TDI
3A 3B XDP_TMS_CPU 2
10 R234 *0_4_NC XDP_TCK0
3OE
XDP_TRST# 12 11 XDP_TCK1
4A 4B XDP_TRST#_CPU 2 2 XDP_TCK1
13
4OE 15
DPAD
7
GND
*SN74CBTLV3126RGYR

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
SKL U 15/15(XDP/APS*)
Vinafix.com
5 4 3 2
Date: Friday, May 22, 2015 Sheet
1
16 of 53
5 4 3 2 1

QP/N is DGMK4000412

3
3
3
M_A_A0
M_A_A1
M_A_A2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
98
97
96
95
JDIM1A
A0
A1
A2
DQ0
DQ1
DQ2
5
7
15
17
M_A_DQ4
M_A_DQ0
M_A_DQ7
M_A_DQ3
M_A_DQ[63:0] 3
2.48A +1.35V_SUS

75
76
81
JDIM1B
VDD1
VDD2
VSS16
VSS17
44
48
49
17
3 M_A_A3 92 A3 DQ3 4 82 VDD3 VSS18 54
M_A_A4 M_A_DQ1
3 M_A_A4 M_A_A5 91 A4 DQ4 6 M_A_DQ5 87 VDD4 VSS19 55
3 M_A_A5 90 A5 DQ5 16 88 VDD5 VSS20 60
M_A_A6 M_A_DQ2
3 M_A_A6 M_A_A7 86 A6 DQ6 18 M_A_DQ6 93 VDD6 VSS21 61
3 M_A_A7 A7 DQ7 VDD7 VSS22
M_A_A8 89 21 M_A_DQ9 94 65
3 M_A_A8 85 A8 DQ8 23 99 VDD8 VSS23 66
M_A_A9 M_A_DQ12
D 3 M_A_A9 M_A_A10 107 A9 DQ9 33 M_A_DQ10 100 VDD9 VSS24 71 D
3 M_A_A10 A10/AP DQ10 VDD10 VSS25
M_A_A11 84 35 M_A_DQ14 105 72
3 M_A_A11 M_A_A12 83 A11 DQ11 22 M_A_DQ8 106 VDD11 VSS26 127
3 M_A_A12 A12/BC# DQ12 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


M_A_A13 119 24 M_A_DQ13 111 128
3 M_A_A13 A13 DQ13 VDD13 VSS28
M_A_A14 80 34 M_A_DQ15 112 133
3 M_A_A14 M_A_A15 78 A14 DQ14 36 M_A_DQ11 117 VDD14 VSS29 134
3 M_A_A15 A15 DQ15 39 118 VDD15 VSS30 138
M_A_DQ17
DQ16 VDD16 VSS31

PC2100 DDR3 SDRAM SO-DIMM


109 41 M_A_DQ21 123 139
3 M_A_BS#0 108 BA0 DQ17 51 124 VDD17 VSS32 144
M_A_DQ22
3 M_A_BS#1 79 BA1 DQ18 53 VDD18 VSS33 145
M_A_DQ18
3 M_A_BS#2 114 BA2 DQ19 40 199 VSS34 150
M_A_DQ20
3 M_A_CS#0 121 S0# DQ20 42 +3.3V_RUN VDDSPD VSS35 151
M_A_DQ16
3 M_A_CS#1 101 S1# DQ21 50 M_A_DQ23 77 VSS36 155
3 M_A_CLKP0 CK0 DQ22 NC1 VSS37
103 52 M_A_DQ19 122 156
3 M_A_CLKN0 102 CK0# DQ23 57 125 NC2 VSS38 161
M_A_DQ28
3 M_A_CLKP1 104 CK1 DQ24 59 M_A_DQ24 NCTEST VSS39 162
3 M_A_CLKN1 CK1# DQ25 VSS40
73 67 M_A_DQ31 R214 10K/F_4 198 167
3 M_A_CKE0 74 CKE0 DQ26 69 M_A_DQ27 +3.3V_RUN 30 EVENT# VSS41 168
3 M_A_CKE1 115 CKE1 DQ27 56 3 DDR3_DRAMRST# RESET# VSS42 172
M_A_DQ25
3 M_A_CAS# CAS# DQ28 VSS43
110 58 M_A_DQ29 C612 *0.1U/16V_4 173
3 M_A_RAS# 113 RAS# DQ29 68 M_A_DQ26 SMDDR_VREF_DQ0_M1 +SMDDR_VREF_DQ0 1 VSS44 178
R205 0_6
3 M_A_WE# 197 W E# DQ30 70 VREF_DQ VSS45
R195 10K/F_4 DIMM0_SA0 M_A_DQ30 +SMDDR_VREF_DIMM 126 179
SA0 DQ31 +SMDDR_VREF_DIMM VREF_CA VSS46
R196 10K/F_4 DIMM0_SA1 201 129 M_A_DQ37 184
SMB_RUN_CLK 202 SA1 DQ32 131 M_A_DQ33 VSS47 185
10 SMB_RUN_CLK 200 SCL DQ33 141 2 VSS48 189
SMB_RUN_DAT M_A_DQ38
10 SMB_RUN_DAT SDA DQ34 143 M_A_DQ35 3 VSS1 VSS49 190
116 DQ35 130 M_A_DQ32 8 VSS2 VSS50 195
3 M_A_DIM0_ODT0 120 ODT0 DQ36 132 M_A_DQ36 9 VSS3 VSS51 196

(204P)
3 M_A_DIM0_ODT1 ODT1 DQ37 140 13 VSS4 VSS52
M_A_DQ34
11 DQ38 142 M_A_DQ39 14 VSS5
C 28 DM0 DQ39 147 M_A_DQ40 19 VSS6 C
46 DM1 DQ40 149 M_A_DQ43 20 VSS7 203
DM2 DQ41 VSS8 VTT1 +0.675V_DDR_VTT
63 157 M_A_DQ41 25 204

(204P)
136 DM3 DQ42 159 M_A_DQ47 26 VSS9 VTT2
153 DM4 DQ43 146 M_A_DQ45 31 VSS10 205
170 DM5 DQ44 148 M_A_DQ44 32 VSS11 HOLE1 206
187 DM6 DQ45 158 M_A_DQ42 37 VSS12 HOLE2
DM7 DQ46 160 M_A_DQ46 38 VSS13 207
M_A_DQSP0 12 DQ47 163 M_A_DQ53 43 VSS14 PAD1 208
3 M_A_DQSP0 29 DQS0 DQ48 165 VSS15 PAD2
M_A_DQSP1 M_A_DQ52
3 M_A_DQSP1 M_A_DQSP2 47 DQS1 DQ49 175 M_A_DQ55
3 M_A_DQSP2 DQS2 DQ50
M_A_DQSP3 64 177 M_A_DQ50 DDR3-DIMM1_H=4.0_RVS
3 M_A_DQSP3 137 DQS3 DQ51 164
M_A_DQSP4 M_A_DQ49 ddr-ds2rk-20401-tp4b-204p-ruv
3 M_A_DQSP4 154 DQS4 DQ52 166
M_A_DQSP5 M_A_DQ48 DGMK4000412
3 M_A_DQSP5 DQS5 DQ53
M_A_DQSP6 171 174 M_A_DQ54
3 M_A_DQSP6 188 DQS6 DQ54 176
M_A_DQSP7 M_A_DQ51
3 M_A_DQSP7 10 DQS7 DQ55 181
M_A_DQSN0 M_A_DQ56
3 M_A_DQSN0 27 DQS#0 DQ56 183
M_A_DQSN1 M_A_DQ60
3 M_A_DQSN1 45 DQS#1 DQ57 191
M_A_DQSN2 M_A_DQ59
3 M_A_DQSN2 62 DQS#2 DQ58 193
M_A_DQSN3 M_A_DQ63
3 M_A_DQSN3 135 DQS#3 DQ59 180
M_A_DQSN4 M_A_DQ57
3 M_A_DQSN4 152 DQS#4 DQ60 182
M_A_DQSN5 M_A_DQ61
3 M_A_DQSN5 M_A_DQSN6 169 DQS#5 DQ61 192 M_A_DQ62
3 M_A_DQSN6 DQS#6 DQ62
M_A_DQSN7 186 194 M_A_DQ58
3 M_A_DQSN7 DQS#7 DQ63
EZIW
DDR3-DIMM1_H=4.0_RVS
ddr-ds2rk-20401-tp4b-204p-ruv
CPU Bracket DGMK4000412

B B

+1.35V_SUS
Place these Caps near So-Dimm0. VREF DQ0 M1 Solution
For EMI RESERVE 1uF/10uF 4pcs on each side of connector
+1.35V_SUS +0.675V_DDR_VTT
+1.35V_SUS R204
+1.35V_SUS C397 1U/6.3V_4 C398 1U/6.3V_4 1.8K/F_4

EC29 120P/50V_4 EC23 120P/50V_4 C412 1U/6.3V_4 C408 1U/6.3V_4 SMDDR_VREF_DQ0_M3 R200 2/F_6 SMDDR_VREF_DQ0_M1
3 SMDDR_VREF_DQ0_M3

1
EC27 120P/50V_4 EC33 120P/50V_4 C414 1U/6.3V_4 C390 1U/6.3V_4
C385
EC26 120P/50V_4 EC21 120P/50V_4 C396 1U/6.3V_4 C386 1U/6.3V_4 0.022U/25V_4 R201 +1.35V_SUS

2
1.8K/F_4
EC30 120P/50V_4 EC28 0.1U/16V_4 C415 1U/6.3V_4 C405 1U/6.3V_4
24.9/F_4 R197
EC34 120P/50V_4 EC25 0.1U/16V_4 C413 1U/6.3V_4
R449
EC31 120P/50V_4 EC24 0.1U/16V_4 C411 1U/6.3V_4 1.8K/F_4
+SMDDR_VREF_DIMM
EC22 120P/50V_4 EC36 0.1U/16V_4 C395 1U/6.3V_4 R450 2/F_6 +SMDDR_VREF_DIMM
3 SM_VREF
C613 *0.1U/16V_4

1
C391 10U/6.3V_6 C614 *2.2U/6.3V_6 C615
+0.675V_DDR_VTT 0.022U/25V_4 R451
C417 10U/6.3V_6 1.8K/F_4

2
EC32 120P/50V_4 +SMDDR_VREF_DQ0
A C416 10U/6.3V_6 R452 24.9/F_4 A
EC35 120P/50V_4 C389 *0.1U/16V_4
C409 10U/6.3V_6
C400 *2.2U/6.3V_6
C394 10U/6.3V_6

C410 10U/6.3V_6 +3.3V_RUN


Quanta Computer Inc.
C392 10U/6.3V_6 C399 0.1U/16V_4

C393 10U/6.3V_6 C388 2.2U/6.3V_6 PROJECT : AM8


Size Document Number Rev
1A
DDR3 DIMM0-RVS(4.0H)
Date: Friday, May 22, 2015 Sheet 17 of 53

Vinafix.com
5 4 3 2 1
1 2 3 4 5 6 7 8

+1.05V_GFX
Near GPU
C572
C477
*Dis@22U/6.3V_8_NC
*Dis@22U/6.3V_6
U18A

1/14 PCI_EXPRESS
C294 *Dis@0.1U/16V_4

NVDD = 32 A +VGACORE
18
C574 *Dis@10U/25V_8_NC PEX_WAKE AB6
C517 Dis@10U/6.3VS_6 Under GPU U18E
C585 *Dis@4.7U/10V_6 AA22 PEX_IOVDD R102 *SJ0402_NC 11/14 NVVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# 2 1 C300 Dis@1U/6.3V_4 K10 VDD
2 1 PEGX_RST# 21
AC24 C277 Dis@1U/6.3V_4 K12
C145 Dis@1U/6.3V_4 AD25
PEX_IOVDD
PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R167 Dis@10K/F_4
+3V_AON C295 Dis@1U/6.3V_4 K14
VDD
VDD U18C VDD33 = 500mA
A C161 *Dis@1U/6.3V_4 AE26 PEX_IOVDD C203 Dis@1U/6.3V_4 K16 VDD 14/14 XVDD/VDD33 A
AE27 PEX_IOVDD PEX_REFCLK AE8 C269 Dis@4.7U/10V_6 K18 VDD Under GPU
CLK_VGA_P 13
Under GPU PEX_REFCLK AD8 C266 Dis@4.7U/10V_6 L11 VDD AD10 NC VDD33 G10
CLK_VGA_N 13 +3V_AON
C278 Dis@4.7U/10V_6 L13 VDD AD7 NC VDD33 G12
PEX_TX0 AC9 PEG_RXP1_C C350 Dis@0.22U/10V_4 C235 Dis@4.7U/10V_6 L15 VDD B19 NC C257 Dis@0.1U/16V_4
AB9 PEG_RXN1_C C351 PEG_RXP1 12 L17
PEX_TX0 Dis@0.22U/10V_4 C256 Dis@4.7U/10V_6 VDD
PEG_RXN1 12 M10
C225 Dis@4.7U/6.3V_6 VDD
PEX_RX0 AG6 C229 Dis@4.7U/10V_6 M12 VDD F11 3V3AUX_NC C349 Dis@4.7U/10V_6
+1.05V_GFX PEG_TXP1 12
C514 Dis@22U/6.3V_6 AA10 PEX_IOVDDQ PEX_RX0 AG7 C230 Dis@4.7U/10V_6 M14 VDD C348 Dis@1U/10V_6
PEG_TXN1 12
C524 Dis@22U/6.3V_6 AA12 PEX_IOVDDQ C264 Dis@4.7U/10V_6 M16 VDD V5 FERMI_RSVD1_NC
C593 *Dis@10U/6.3VS_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP2_C C347 Dis@0.22U/10V_4 C204 Dis@4.7U/10V_6 M18 VDD V6 FERMI_RSVD2_NC
PEG_RXP2 12
C520 Dis@10U/6.3VS_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN2_C C346 Dis@0.22U/10V_4 N11 VDD VDD33 G8 Near GPU
PEG_RXN2 12 +3V_GFX
C525 Dis@4.7U/10V_6 AA18 PEX_IOVDDQ N13 VDD VDD33 G9
AA19 PEX_IOVDDQ PEX_RX1 AF7 2 1 N15 VDD
PEG_TXP2 12
Near GPU AA20 AE7 C246 N17

+
PEX_IOVDDQ PEX_RX1 PEG_TXN2 12 VDD
AA21 PEX_IOVDDQ *Dis@330u_2.5V_3528_NC P10 VDD CONFIGURABLE C298 Dis@4.7U/10V_6
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP3_C C342 Dis@0.22U/10V_4 P12 VDD POWER CHANNELS C299 Dis@1U/10V_6
AC23 AC11 PEG_RXN3_C C343 PEG_RXP3 12 P14
PEX_IOVDDQ PEX_TX2 Dis@0.22U/10V_4 VDD * nc on substrate
AD24 PEG_RXN3 12 P16
Under GPU PEX_IOVDDQ VDD
C183 Dis@1U/6.3V_4 AE25 PEX_IOVDDQ PEX_RX2 AE9 P18 VDD G1 XPWR_G1 C293 Dis@0.1U/16V_4
PEG_TXP3 12
C200 *Dis@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 R11 VDD G2 XPWR_G2 C276 Dis@0.1U/16V_4
PEG_TXN3 12
AF27 PEX_IOVDDQ C588 Dis@22U/6.3V_8 R13 VDD G3 XPWR_G3
PEX_TX3 AC12 PEG_RXP4_C C344 Dis@0.22U/10V_4 C594 Dis@22U/6.3V_8 R15 VDD G4 XPWR_G4 Under GPU
AB12 PEG_RXN4_C C345 PEG_RXP4 12 R17 G5
PEX_TX3 Dis@0.22U/10V_4 VDD XPWR_G5
PEG_RXN4 12 T10 G6
C576 Dis@4.7U/25V_8 VDD XPWR_G6
PEX_RX3 AG9 C586 Dis@4.7U/25V_8 T12 VDD G7 XPWR_G7
PEG_TXP4 12
PEX_RX3 AG10 C580 Dis@4.7U/25V_8 T14 VDD
PEG_TXN4 12
C575 Dis@4.7U/25V_8 T16 VDD
PEX_TX4 AB13 C582 Dis@4.7U/25V_8 T18 VDD V1 XPWR_V1
PEX_TX4 AC13 U11 VDD V2 XPWR_V2
B Near GPU U13 VDD B
PEX_RX4 AF10 U15 VDD
+3V_AON PEX_RX4 AE10 U17 VDD
V10 VDD
PEX_TX5 AD14 V12 VDD W1 XPWR_W1
AA8 PEX_PLL_HVDD PEX_TX5 AC14 V14 VDD W2 XPWR_W2
C338 Dis@0.1U/16V_4 AA9 PEX_PLL_HVDD V16 VDD W3 XPWR_W3
C340 Dis@4.7U/10V_6 PEX_RX5 AE12 V18 VDD W4 XPWR_W4
C341 Dis@4.7U/10V_6 PEX_RX5 AF12
Near GPU AB8 PEX_SVDD_3V3
PEX_TX6 AC15 bga595-nvidia-n13p-gv2-s-a2 bga595-nvidia-n13p-gv2-s-a2 COMMON

AB15 COMMON
PEX_TX6

PEX_RX6 AG12
PEX_RX6 AG13

PEX_TX7 AB16 Power up


AC16
PEX_TX7
sequence
AF13
PEX_RX7
AE13 SYS_PEX_RST_MON#
ALL 3.3V
PEX_RX7 21 SYS_PEX_RST_MON# +3VGFX & +3V3_AON
PEX_TX8 AD17
NC
NC PEX_TX8 AC17
+3V_AON
PEX_RX8 AE15 +3V_AON
NC
NC PEX_RX8 AF15

F2 AC18
NVVDD t>0
VDD_SENSE PEX_TX9
48 VGPU_CORE_SENSE NC
NC PEX_TX9 AB18 +VGACORE
C C371 C
F1 GND_SENSE PEX_RX9 AG15 U11 Dis@0.1U/16V_4 C370
48 VSS_GPU_SENSE NC
AG16 Dis@MC74VHC1G08DFT2G *Dis@0.1U/16V_4
NC PEX_RX9 t>=0

5
PEX_VDD

5
PEX_TX10 AB19 2 R146
NC
PEX_TX10 AC19
4,28,30,35 PLTRST#
4 2 1 2 +1.05V_GFX
NC 2 1
1 4 PEGX_RST# t>=0
14 DGPU_HOLD_RST#
PEX_RX10 AF16 *SJ0402_NC 1
NC
NC PEX_RX10 AE16

3
U12 FBVDDQ

3
PEX_TX11 AD20 Dis@MC74VHC1G08DFT2G
NC
AC20 GPU_PEX_RST_HOLD# R160 +1.35V_GFX
NC PEX_TX11 21 GPU_PEX_RST_HOLD#
*Dis@100K/F_4 Power down
AE18
NC
NC
PEX_RX11
PEX_RX11 AF18 sequence
R161 *Dis@0_4_NC
PEX_TX12 AC21
NC
PEX_TX12 AB21
NC

Dis@200/F_4 R74 PEX_TSTCLK AF22 PEX_TSTCLK_OUT NC PEX_RX12 AG18


PEX_TSTCLK#AE22 PEX_TSTCLK_OUT PEX_RX12 AG19
NC
+3V_GFX
R85 Dis@0_6 PEX_TX13 AD23
+1.05V_GFX NC
NC PEX_TX13 AE23
Near GPU
Dis@4.7U/10V_6 C220 PEX_PLLVDD AA14 PEX_PLLVDD PEX_RX13 AF19 R166
NC PCIE_CLKREQ_VGA# 13
Dis@1U/6.3V_4 C249 AA15 PEX_PLLVDD NC PEX_RX13 AE19 Dis@4.7K_4

3
Dis@0.1U/16V_4 C238 NC PEX_TX14 AF24
Under GPU PEX_TX14 AE24 CLKREQ_C1 2 Q6
NC
D Dis@DRC5144E0L D
3

PEX_RX14 AE21
NC
PEX_RX14 AF21
NC
1
Dis@10K/F_4 R361 TESTMODE AD9 TESTMODE PEX_CLKREQ# 2
PEX_TX15 AG24
NC
NC PEX_TX15 AG25 Q7
Dis@DRC5144E0L
Quanta Computer Inc.
1

PEX_RX15 AG21
NC
NC PEX_RX15 AG22

GF117 GF119
PROJECT : AM8
Dis@2.49K/F_4 R322 PEX_TERMP AF25 PEX_TERMP Size Document Number Rev
1A
N16S-GM(PCIE I/F) /NVDD
bga595-nvidia-n13p-gv2-s-a2 COMMON Date: Friday, May 22, 2015 Sheet 18 of 53

Vinafix.com
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U18B
2/14 FBA FBA_D[63..0]
FBA_D[63..0] 22,23,24,25
R415 Dis@10K/F_4 PS_FB_CLAMP F3 FBA_D0 E18 FBA_D0

19
NC GF119
FBA_D1 F18 FBA_D1
E16 FBA_D2
FB_CLAMP GF117 FBA_D2
FBA_D3 F17 FBA_D3 FBVDDQ + FBVDD =4.328A
FBA_D4 D20 FBA_D4
FBA_D5 D21 FBA_D5
F20 FBA_D6 +1.35V_GFX U18D
FBA_D6
FBA_D7 E21 FBA_D7 12/14 FBVDDQ
FBA_D8 E15 FBA_D8
FBA_D9 D15 FBA_D9 C172 Dis@0.1U/16V_4 B26 FBVDDQ
+1.35V_GFX +1.35V_GFX
FBA_ODT (D31~0) FBA_CMD0 R313 Dis@10K/F_4 FBA_D10 F15 FBA_D10 C171 Dis@0.1U/16V_4 C25 FBVDDQ
FBA_D11 F13 FBA_D11 E23 FBVDDQ
FBA_ODT (D63~32) FBA_CMD16 R17 Dis@10K/F_4 FBA_D12 C13 FBA_D12 E26 FBVDDQ
A B13 FBA_D13 C179 Dis@1U/10V_6 F14 U18F FBA_CMD28 R238 Dis@100/F_4 A
FBA_D13 FBVDDQ
FBA_RST# FBA_CMD20 R224 Dis@10K/F_4 FBA_D14 E13 FBA_D14 C169 Dis@1U/10V_6 F21 FBVDDQ 13/14 GND R222 Dis@100/F_4 C447
FBA_D15 D13 FBA_D15 C178 Dis@4.7U/6.3V_6 G13 FBVDDQ A2 GND GND M13 Dis@0.1U/16V_4
FBA_CKE (D31~0) FBA_CMD3 R52 Dis@10K/F_4 FBA_D16 B15 FBA_D16 C181 Dis@4.7U/6.3V_6 G14 FBVDDQ AB17 GND GND M15 FBA_CMD11 R309 Dis@100/F_4
FBA_D17 C16 FBA_D17 C177 Dis@10U/6.3V_6 G15 FBVDDQ AB20 GND GND M17 R310 Dis@100/F_4
FBA_CKE(D63~32) FBA_CMD19 R18 Dis@10K/F_4 FBA_D18 A13 FBA_D18 C428 Dis@22U/6.3V_8 G16 FBVDDQ AB24 GND GND N10
FBA_D19 A15 FBA_D19 G18 FBVDDQ AC2 GND GND N12
FBA_D20 B18 FBA_D20 G19 FBVDDQ AC22 GND GND N14 FBA_CMD26 R22 Dis@100/F_4
FBA_D21 A18 FBA_D21 G20 FBVDDQ AC26 GND GND N16 R12 Dis@100/F_4
FBA_D22 A19 FBA_D22 G21 FBVDDQ AC5 GND GND N18 C445
FBA_D23 C19 FBA_D23 H24 FBVDDQ AC8 GND GND P11 FBA_CMD30 R49 Dis@100/F_4 Dis@0.1U/16V_4
FBA_D24 B24 FBA_D24 H26 FBVDDQ AD12 GND GND P13 R48 Dis@100/F_4
FBA_D25 C23 FBA_D25 J21 FBVDDQ AD13 GND GND P15
FBA_D26 A25 FBA_D26 K21 FBVDDQ A26 GND GND P17
FBA_D27 A24 FBA_D27 L22 FBVDDQ AD15 GND GND P2
FBA_D28 A21 FBA_D28 L24 FBVDDQ AD16 GND GND P23 FBA_CMD23 R21 Dis@100/F_4
FBA_D29 B21 FBA_D29 L26 FBVDDQ AD18 GND GND P26 R11 Dis@100/F_4
FBA_D30 C20 FBA_D30 M21 FBVDDQ AD19 GND GND P5 C446
FBA_D31 C21 FBA_D31 N21 FBVDDQ AD21 GND GND R10 FBA_CMD24 R223 Dis@100/F_4 Dis@0.1U/16V_4
FBA_D32 R22 FBA_D32 R21 FBVDDQ AD22 GND GND R12 R239 Dis@100/F_4
C27 FBA_CMD0 FBA_D33 R24 FBA_D33 T21 FBVDDQ AE11 GND GND R14
22,23 FBA_CMD0
C26 FBA_CMD1 FBA_D34 T22 FBA_D34 V21 FBVDDQ AE14 GND GND R16
23 FBA_CMD1
E24 FBA_CMD2 FBA_D35 R23 FBA_D35 W21 FBVDDQ AE17 GND GND R18
22 FBA_CMD2
F24 FBA_CMD3 FBA_D36 N25 FBA_D36 AE20 GND GND T11 FBA_CMD9 R307 Dis@100/F_4
22,23 FBA_CMD3
D27 FBA_CMD4 FBA_D37 N26 FBA_D37 AB11 GND GND T13 R306 Dis@100/F_4 C448
22,23,24,25 FBA_CMD4
D26 FBA_CMD5 FBA_D38 N23 FBA_D38 AF1 GND GND T15 Dis@0.1U/16V_4
22,23,24,25 FBA_CMD5
F25 FBA_CMD6 FBA_D39 N24 FBA_D39 AF11 GND GND T17 FBA_CMD15 R285 Dis@100/F_4
22,23,24,25 FBA_CMD6
F26 FBA_CMD7 FBA_D40 V23 FBA_D40 AF14 GND GND U10 R286 Dis@100/F_4
22,23,24,25 FBA_CMD7
F23 FBA_CMD8 FBA_D41 V22 FBA_D41 AF17 GND GND U12
22,23,24,25 FBA_CMD8
G22 FBA_CMD9 FBA_D42 T23 FBA_D42 AF20 GND GND U14
22,23,24,25 FBA_CMD9
G23 FBA_CMD10 FBA_D43 U22 FBA_D43 AF23 GND GND U16
22,23,24,25 FBA_CMD10
G24 FBA_CMD11 FBA_D44 Y24 FBA_D44 AF5 GND GND U18 R26 Dis@100/F_4
B 22,23,24,25 FBA_CMD11 B
F27 FBA_CMD12 FBA_D45 AA24 FBA_D45 AF8 GND GND U2 FBA_CMD21 R27 Dis@100/F_4
22,23,24,25 FBA_CMD12
G25 FBA_CMD13 FBA_D46 Y22 FBA_D46 AG2 GND GND U23 C449
22,23,24,25 FBA_CMD13
G27 FBA_CMD14 FBA_D47 AA23 FBA_D47 AG26 GND GND U26 R9 Dis@100/F_4 Dis@0.1U/16V_4
22,23,24,25 FBA_CMD14
G26 FBA_CMD15 FBA_D48 AD27 FBA_D48 AB14 GND GND U5 FBA_CMD22 R19 Dis@100/F_4
22,23,24,25 FBA_CMD15
M24 FBA_CMD16 FBA_D49 AB25 FBA_D49 B1 GND GND V11
24,25 FBA_CMD16
M23 FBA_CMD17 FBA_D50 AD26 FBA_D50 B11 GND GND V13
25 FBA_CMD17
K24 FBA_CMD18 FBA_D51 AC25 FBA_D51 B14 GND GND V15
24 FBA_CMD18
K23 FBA_CMD19 FBA_D52 AA27 FBA_D52 B17 GND GND V17 FBA_CMD8 R46 Dis@100/F_4
24,25 FBA_CMD19
M27 FBA_CMD20 FBA_D53 AA26 FBA_D53 B20 GND GND Y2 R47 Dis@100/F_4
22,23,24,25 FBA_CMD20
M26 FBA_CMD21 FBA_D54 W26 FBA_D54 B23 GND GND Y23 C450
22,23,24,25 FBA_CMD21
M25 FBA_CMD22 FBA_D55 Y25 FBA_D55 B27 GND GND Y26 FBA_CMD4 R271 Dis@100/F_4 Dis@0.1U/16V_4
22,23,24,25 FBA_CMD22
K26 FBA_CMD23 FBA_D56 R26 FBA_D56 B5 GND GND Y5 R270 Dis@100/F_4
22,23,24,25 FBA_CMD23
K22 FBA_CMD24 FBA_D57 T25 FBA_D57 B8 GND
22,23,24,25 FBA_CMD24
J23 FBA_CMD25 FBA_D58 N27 FBA_D58 E11 GND
22,23,24,25 FBA_CMD25
J25 FBA_CMD26 FBA_D59 R27 FBA_D59 E14 GND
22,23,24,25 FBA_CMD26
J24 FBA_CMD27 FBA_D60 V26 FBA_D60 E17 GND FBA_CMD27 R32 Dis@100/F_4
22,24 FBA_CMD27
K27 FBA_CMD28 FBA_D61 V27 FBA_D61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQR110 Dis@40.2/F_4 E2 GND R33 Dis@100/F_4
22,23,24,25 FBA_CMD28 +1.35V_GFX
K25 FBA_CMD29 FBA_D62 W27 FBA_D62 E20 GND C489
22,23,24,25 FBA_CMD29 FBA_DQM[7..0] 22,23,24,25
J27 FBA_CMD30 FBA_D63 W25 FBA_D63 E22 GND FBA_CMD13 R287 Dis@100/F_4 Dis@0.1U/16V_4
23,25 FBA_CMD30
J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R107 Dis@42.2/F_4 E25 GND R288 Dis@100/F_4
TP47
E5 GND
FBA_DQM0 D19 FBA_DQM0 E8 GND
FBA_DQM1 D14 FBA_DQM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND
R105 Dis@51.1/F_4 H2 GND
FBA_DQM2 C17 FBA_DQM2 H23 GND FBA_CMD12 R257 Dis@100/F_4
FBA_DQM3 C22 FBA_DQM3 H25 GND R258 Dis@100/F_4
P24 FBA_DQM4 bga595-nvidia-n13p-gv2-s-a2 H5 C479
+1.35V_GFX FBA_DQM4 GND
W24 FBA_DQM5 COMMON K11 FBA_CMD7 R268 Dis@100/F_4
For test and debug only FBA_DQM5 GND Dis@0.1U/16V_4
FBA_DQM6 AA25 FBA_DQM6 K13 GND R269 Dis@100/F_4
R109 *Dis@60.4_4 FBA_DEBUG0 F22 FBA_DEBUG0 FBA_DQM7 U25 FBA_DQM7 K15 GND
R112 *Dis@60.4_4 FBA_DEBUG1 J22 FBA_DEBUG1 K17 GND
L10 GND
FBA_DQS[7..0] 22,23,24,25
FBA_DQS_WP0 E19 FBA_DQS0 L12 GND FBA_CMD25 R278 Dis@100/F_4
C C15 FBA_DQS1 L14 R277 Dis@100/F_4 C
FBA_DQS_WP1 GND
22,23 FBA_CLK0 D24 FBA_CLK0 FBA_DQS_WP2 B16 FBA_DQS2 L16 GND C481
D25 FBA_CLK0 FBA_DQS_WP3 B22 FBA_DQS3 L18 GND FBA_CMD5 R245 Dis@100/F_4 Dis@0.1U/16V_4
22,23 FBA_CLK0#
N22 FBA_CLK1 FBA_DQS_WP4 R25 FBA_DQS4 L2 GND R246 Dis@100/F_4
24,25 FBA_CLK1
M22 FBA_CLK1 FBA_DQS_WP5 W23 FBA_DQS5 L23 GND
24,25 FBA_CLK1#
FBA_DQS_WP6 AB26 FBA_DQS6 L25 GND
FBA_DQS_WP7 T26 FBA_DQS7 L5 GND GND AA7
M11 GND GND AB7 FBA_CMD29 R20 Dis@100/F_4
FBA_DQSN[7..0] 22,23,24,25
R10 Dis@100/F_4
D18 FBA_WCK01 FBA_DQS_RN0 F19 FBA_DQSN0 C484
C18 FBA_WCK01 FBA_DQS_RN1 C14 FBA_DQSN1 FBA_CMD14 R255 Dis@100/F_4 Dis@0.1U/16V_4
D17 A16 FBA_DQSN2 bga595-nvidia-n13p-gv2-s-a2 COMMON R256 Dis@100/F_4
FBA_WCK23 FBA_DQS_RN2
D16 FBA_WCK23 FBA_DQS_RN3 A22 FBA_DQSN3
T24 FBA_WCK45 FBA_DQS_RN4 P25 FBA_DQSN4
U24 FBA_WCK45 FBA_DQS_RN5 W22 FBA_DQSN5
V24 FBA_WCK67 FBA_DQS_RN6 AB27 FBA_DQSN6 FBA_CMD10 R280 Dis@100/F_4
V25 FBA_WCK67 FBA_DQS_RN7 T27 FBA_DQSN7 R279 Dis@100/F_4
C487
L6 *Dis@HCB1608KF-300T30_NC FBA_CMD6 R248 Dis@100/F_4 Dis@0.1U/16V_4
R247 Dis@100/F_4
L1 Dis@HCB1005KF-330T30 +FB_PLLAVDD F16 FB_PLLAVDD
+1.05V_GFX
C206 Dis@10U/6.3V_6 P22 FB_PLLAVDD
C173 Dis@0.1U/16V_4
C175 Dis@0.1U/16V_4 H22 FB_DLLAVDD GF119
C197 Dis@0.1U/16V_4
FB_PLLAVDD GF117

D D
FB_VREF_PROBE D23 FB_VREF
TP7
L.H
bga595-nvidia-n13p-gv2-s-a2 COMMON

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
N16S-GM (MEMORY/GND)
Date: Friday, May 22, 2015 Sheet 19 of 53
1 2 3 4 5 6 7 8

Vinafix.com
1 2 3 4 5 6 7 8

U18G U18J

AA6
4/14 IFPAB

IFPAB_RSET
GF119 GF117

NC
GF117
NC
NC
GF119
IFPA_TXC
IFPA_TXC
AC4
AC3
7/14 IFPEF

GF119 GF117
GF117

NC
NC
DVI-DL

I2CY_SDA
I2CY_SCL
GF119
DVI-SL/HDMI

I2CY_SDA
I2CY_SCL
DP

IFPE_AUX
IFPE_AUX
J3
J2
20
IFPA_TXD0 Y3 J7 IFPEF_PLLVDD
NC NC
IFPA_TXD0 Y4
NC
IFPE_L3 J1
NC TXC TXC
V7 IFPAB_PLLVDD IFPE_L3 K1
NC NC TXC TXC
NC IFPA_TXD1 AA2 K7 IFPEF_PLLVDD NC
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 IFPE_L2 K3
NC NC NC TXD0 TXD0
A
IFPE_L2 K2 U18K A
NC TXD0 TXD0
3/14 DACA
IFPA_TXD2 AA1 K6 IFPEF_RSET IFPE_L1 M3
NC NC NC TXD1 TXD1 GF119
NC IFPA_TXD2 AB1 IFPE_L1 M2 GF117
GF117 GF119
NC TXD1 TXD1
W5 DACA_VDD I2CA_SCL B7 I2CA_SCL R409 Dis@1.8K_4
NC NC
IFPE_L0 M1 I2CA_SDA A7 I2CA_SDA R406 Dis@1.8K_4
NC TXD2 TXD2 NC
IFPA_TXD3 AA5 IFPE_L0 N1 AE2 DACA_VREF
NC NC TXD2 TXD2 TSEN_VREF
IFPA_TXD3 AA4
NC
AF2 DACA_RSET NC NC DACA_HSYNC AE3
IFPE NC DACA_VSYNC AE4
IFPB_TXC AB4
NC
IFPB_TXC AB5
NC
NC HPD_E HPD_E GPIO18 C2 DACA_RED AG3
GF119 GF117 NC
W6 IFPA_IOVDD IFPB_TXD4 AB2 DACA_GREEN AF4
NC NC NC
IFPB_TXD4 AB3
NC GF119 GF117
Y6 IFPB_IOVDD DACA_BLUE AF3
NC NC
H6 IFPE_IOVDD NC
NC IFPB_TXD5 AD2 GF119
IFPB_TXD5 AD3 J6 IFPF_IOVDD GF117
NC NC DVI-DL DVI-SL/HDMI DP
H4 bga595-nvidia-n13p-gv2-s-a2 COMMON
NC I2CZ_SDA IFPF_AUX
IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3
NC
NC IFPB_TXD6 AE1

NC TXC IFPF_L3 J5
IFPB_TXD7 AD5 NC TXC IFPF_L3 J4
NC
IFPB_TXD7 AD4
NC
NC TXD3 TXD0 IFPF_L2 K5
NC IFPF_L2 K4
TXD3 TXD0
B B
NC TXD4 TXD1 IFPF_L1 L4
IFPF NC TXD4 TXD1 IFPF_L1 L3
NC GPIO14 B3
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
bga595-nvidia-n13p-gv2-s-a2 COMMON

U18H
5/14 IFPC
IFPC NC HPD_F GPIO19 F7
GF119 GF117
T6 IFPC_RSET GF117 GF119
NC

DVI/HDMI DP

M7 N5 bga595-nvidia-n13p-gv2-s-a2 COMMON
IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX
N7 IFPC_PLLVDD NC I2CW_SCL IFPC_AUX N4
NC
PLLVDD = 38mA NC L3(0603,EOD) and populated L2(0402)
IFPC_L3 N3 L3 *Dis@HCB1608KF-300T30_NC
NC TXC
NC IFPC_L3 N2
TXC
L2 Dis@HCB1005KF-330T30 NV_PLLVDD
+1.05V_GFX
IFPC_L2 R3
NC TXD0
IFPC_L2 R2 C292 Dis@0.1U/16V_4
NC TXD0
C297 Dis@10U/6.3V_6
TXD1 IFPC_L1 R1
NC
T1 SP_PLLVDD = 17mA
NC TXD1 IFPC_L1 NC L5(0603) and populated L4(0402)
IFPC_L0 T3 L4 Dis@HCB1005KF-330T30 U18M
NC TXD2
C
IFPC_L0 T2 9/14 XTAL_PLL C
NC TXD2
L5 *Dis@HCB1608KF-301T20_NC SP_PLLVDD
+1.05V_GFX
C291 Dis@0.1U/16V_4 L6 PLLVDD
C290 Dis@0.1U/16V_4 M6 SP_PLLVDD C563
P6 IFPC_IOVDD NC GPIO15 C3 C296 Dis@10U/6.3V_6 27M_XTAL_IN
NC
C339 Dis@22U/6.3V_8 N6 VID_PLLVDD GF119

4
3
Dis@10P/50V_4
bga595-nvidia-n13p-gv2-s-a2 COMMON Y4
NC GF117
VID_PLLVDD = 41mA Dis@27MHZ +-10PPM

U18I C567

1
2
6/14 IFPD R391 Dis@10K/F_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R399 Dis@10K/F_4 27M_XTAL_OUT
GF119 GF117
Dis@10P/50V_4
U6 GF117 GF119 27M_XTAL_IN C11 B10 27M_XTAL_OUT
IFPD_RSET NC XTALIN XTALOUT
DVI/HDMI DP bga595-nvidia-n13p-gv2-s-a2 COMMON

T7 IFPD_PLLVDD NC NC I2CX_SDA IFPD_AUX P4


NC I2CX_SCL IFPD_AUX P3
R7 IFPD_PLLVDD
+3V_GFX
NC

IFPD_L3 R5
NC TXC
NC TXC IFPD_L3 R4 DGPU_PGOK-1
+3V_AON R87
IFPD_L2 T5 Dis@4.7K_4
NC TXD0
3

IFPD_L2 T4
NC TXD0
+1.05V_GFX R80 Dis@4.7K_4 DGPU_POK4 2 Q3
NC TXD1 IFPD_L1 U4 Dis@METR3904-G
DGPU_PWROK 14
IFPD NC TXD1 IFPD_L1 U3 R95
1

D C184 Dis@4.7K_4 D

3
IFPD_L0 V4 *Dis@1000P/50V_4
NC TXD2
IFPD_L0 V3
NC TXD2
2 Q4 R86
3

Dis@DRC5144E0L Dis@100K/F_4
R94 Dis@4.7K_4 DGPU_POK2 2 Q2
+1.35V_GFX
R6 D4 Dis@METR3904-G R79
IFPD_IOVDD GF119 NC GPIO17
Quanta Computer Inc.
1
C267
1

NC GF117 C265 *Dis@0_4_NC Dis@1000P/50V_4


*Dis@1000P/50V_4
PROJECT : AM8
Size Document Number Rev
1A
bga595-nvidia-n13p-gv2-s-a2 COMMON N16S-GM (DISPLAY)
Date: Friday, May 22, 2015 Sheet 20 of 53

Vinafix.com
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3V_GFX +3V_AON

21
U18L Default: HYNIX
10/14 MISC2

0423 Change R395 pull-up


R378 R402
TP33 E10 34.8K to +3V_GFX for HYNIX R395 *Dis@4.99K/F_4 *Dis@4.99K/F_4 R435 R434 R432
VMON_IN0
TP25 F10 VMON_IN1 ROM_CS D12 ROM_CS TP34 4G Dis@34.8K/F_4 Dis@49.9K/F_4 *Dis@10K/F_4 R430 *Dis@10K/F_4
*Dis@30.1K/F_4
ROM_SI B12 ROM_SI R433
ROM_SO A12 ROM_SO ROM_SI STRAP0 *Dis@10K/F_4
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK ROM_SO STRAP1
STRAP1 D2 STRAP1 ROM_SCLK STRAP2
STRAP2 E4 STRAP2 STRAP3
STRAP3 E3 STRAP3 STRAP4
A STRAP4 D3 A
STRAP4

2
4.99k CS24992FB26
R394 R377 R401 R429 R416 R419 10k CS31002FB26
GF119 GF117
*Dis@34.8K/F_4 Dis@4.99K/F_4 Dis@4.99K/F_4 *Dis@15K/F_4 *Dis@4.99K/F_4 *Dis@45.3K/F_4 15k CS31502FB24
C1 STRAP5_NC R418 R417 20k CS32002FB29
NC
BUFRST D11 *Dis@24.9K/F_4 *Dis@45.3K/F_4 24.9k CS32492FB16

1
30.1k CS33012FB18
R414 Dis@40.2K/F_4 F6 MULTISTRAP_REF0_GND PGOOD D10 34.8k CS33482FB22
Strap Configuration Table 45.3k CS34532FB18
GF119 GF117
F4 MULTISTRAP_REF1_GND Strap Pin Strap Mapping Resistance Note
NC
CEC E9 SYS_PEX_RST_MON# VRAM Configuration Table
F5 SYS_PEX_RST_MON# 18
MULTISTRAP_REF2_GND NC SOR3_EXPOSED
RAMCFG SOR2_EXPOSED 5Kohm , L
[3:0] DESCRIPTION Vendor DELL P/N QCI P/N ROM_SCLK SOR1_EXPOSED
bga595-nvidia-n13p-gv2-s-a2 COMMON
SOR0_EXPOSED
0001 10Kohm , L 0001 --> SAM (S.R.)
0x1 RAM_CFG[3] 45Kohm , H 1111 --> SAM (D.R.)
1111 K4W4G1646E-BC1A SAMSUNG NA AKD5PGDT502 RAM_CFG[2] 25Kohm , L 0100 --> Micron (S.R.)
0xF ROM_SI RAM_CFG[1] 30Kohm , H 1101 --> Micron (D.R.)
RAM_CFG[0] 15Kohm , L 0010 --> Hynix (S.R.)
0100 35Kohm , H 1110 --> Hynix (D.R.)
0x4 MT41J256M16HA-093G:E Micron NA AKD5PZSTL02
1101 DEVID_SEL
0xD PCIE_CFG 5Kohm , L 0000
ROM_SO SMB_ALT_ADDR
U18N 0010 VGA_DEVICE
8/14 MISC1 0x2
I2CS_SCL D9 GFX_SCL 1110 H5TC4G63CFR-N0C Hynix NA AKD5PZDTW00 Keep pull-up to +3.3V_ON & pull-down
I2CS_SDA D8 GFX_SDA 0xE STRAP0 to GND footprint , and stuff 50K pull-up
B B
I2CC_SCL A9 DGPU_EDIDCLK R390 Dis@1.8K_4 STRAP1
I2CC_SDA B9 DGPU_EDIDDATA R398 Dis@1.8K_4 STRAP2
STRAP3 RESERVED
STRAP4
TP13 THERMDN E12 THERMDN GF117 GF119
I2CB_SCL C9 N12E_SCL R397 Dis@1.8K_4 +3V_AON
NC
TP20 THERMDP F12 THERMDP I2CB_SDA C8 N12E_SDA R405 Dis@1.8K_4
NC
GPU_PWR_LEVEL R115 Dis@10K/F_4

TP81 JTAG_TCK AE5


AD6
JTAG_TCK
GPIO ASSIGNMENTS ( GB2B-64 )
TP82 JTAG_TMS JTAG_TMS GPU_PWM_PSI R421 Dis@10K/F_4
TP80 JTAG_TDI AE6 JTAG_TDI
TP78 JTAG_TDO AF6 JTAG_TDO
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 GPU_GPIO0 R411 Dis@0_4 GC6_FB_EN VGA_OVT# R404 Dis@10K/F_4
GC6_FB_EN 14
GPIO1 B2
GPIO2 D6
GPIO3 C7 ALERT R114 Dis@10K/F_4
GPIO4 F9
GPIO5 A3 3V_MAIN_EN 3V_MAIN_EN 48
GPIO6 A4 GPU_EVENT#_GPU 2 1 GPU_EVENT# GPU_PEX_RST_HOLD# R420 Dis@10K/F_4
B6 GPU_EVENT# 14
GPIO7 D14 Dis@MEK500V-40
OVERT A6 VGA_OVT#
GPIO9 F8 ALERT GPU_EVENT#_GPU R410 Dis@10K/F_4
GPIO10 C5
GPIO11 E7 GPU_PWM_VID
GPU_PWM_VID 48
GPIO12 D7 GPU_PWR_LEVEL 3V_MAIN_EN R431 Dis@10K/F_4
GPIO13 B4 GPU_PWM_PSI
GPU_PWM_PSI 48
SYS_PEX_RST_MON# R116 *Dis@10K/F_4
GF117 GF119

NC GPIO16 D5 GPU_GPIO16 TP79


NC GPIO20 E6
C C
NC GPIO21 C4 GPU_PEX_RST_HOLD#
GPU_PEX_RST_HOLD# 18 GC6_FB_EN R412 Dis@10K/F_4

JTAG_TRST# R385 Dis@10K/F_4


bga595-nvidia-n13p-gv2-s-a2 COMMON

18 PEGX_RST#
2

Q25A Dis@2N7002KDW
VGA_OVT# 1 3
SMBDAT3
Dual 3 4 GFX_SDA
DGPU_OVT# 38
35,37 SMBDAT3
R408 Dis@4.7K_4 +3V_AON Q33
Dis@2N7002K
5

+3V_AON
2

R407 Dis@4.7K_4 +3V_AON


GPU_PWR_LEVEL
GPU_PWR_LEVEL 48
SMBCLK3 6 1 GFX_SCL
35,37 SMBCLK3
Dual
3

Q25B
Dis@2N7002KDW 2 Q28
35 DGPU_PROCHOT_EC#
Dis@2N7002W
1

D D

Quanta Computer Inc.


Vinafix.com PROJECT : AM8
Size Document Number Rev
1A
N16S-GM (GPIO/STRAPS)
Date: Friday, May 22, 2015 Sheet 21 of 53
1 2 3 4 5 6 7 8
5 4 3 2 1

U19

19,23,24,25
19,23,24,25
VREFC_VMA1
VREFD_VMA1

FBA_CMD7
FBA_CMD10
VREFC_VMA1
VREFD_VMA1

FBA_CMD7
FBA_CMD10
FBA_CMD24
M8
H1

N3
P7
P3
VREFCA
VREFDQ

A0
A1
DQL0
DQL1
DQL2
DQL3
DQL4
E3
F7
F2
F8
H3
H8
FBA_D11
FBA_D13
FBA_D8
FBA_D15
FBA_D10
FBA_D14
19,23
19,23
19,23
19,23
19,23
19,23
Rank0
U16
22
19,23,24,25 FBA_CMD24 A2 DQL5
FBA_CMD6 N2 G2 FBA_D9 19,23
19,23,24,25 FBA_CMD6 A3 DQL6
FBA_CMD22 P8 H7 FBA_D12 19,23 VREFC_VMA1 M8 E3 FBA_D5 19,23
19,23,24,25 FBA_CMD22 A4 DQL7 VREFCA DQL0
FBA_CMD26 P2 VREFD_VMA1 H1 F7 FBA_D1 19,23
19,23,24,25 FBA_CMD26 A5 VREFDQ DQL1
FBA_CMD5 R8 F2 FBA_D7 19,23
19,23,24,25 FBA_CMD5 A6 FBA_CMD7 DQL2
FBA_CMD21 R2 D7 FBA_D17 19,23 N3 F8 FBA_D0 19,23
19,23,24,25 FBA_CMD21 A7 DQU0 FBA_CMD10 A0 DQL3
FBA_CMD8 T8 C3 FBA_D22 19,23 P7 H3 FBA_D4 19,23
D 19,23,24,25 FBA_CMD8 A8 DQU1 FBA_CMD24 A1 DQL4 D
FBA_CMD4 R3 C8 FBA_D16 19,23 P3 H8 FBA_D3 19,23
19,23,24,25 FBA_CMD4 A9 DQU2 FBA_CMD6 A2 DQL5
FBA_CMD25 L7 C2 FBA_D23 19,23 N2 G2 FBA_D6 19,23
19,23,24,25 FBA_CMD25 A10/AP DQU3 FBA_CMD22 A3 DQL6
FBA_CMD23 R7 A7 FBA_D19 19,23 P8 H7 FBA_D2 19,23
19,23,24,25 FBA_CMD23 A11 DQU4 FBA_CMD26 A4 DQL7
FBA_CMD9 N7 A2 FBA_D21 19,23 P2
19,23,24,25 FBA_CMD9 A12/BC DQU5 FBA_CMD5 A5
FBA_CMD12 T3 B8 FBA_D18 19,23 R8
19,23,24,25 FBA_CMD12 A13 DQU6 FBA_CMD21 A6
FBA_CMD14 T7 A3 FBA_D20 19,23 R2 D7 FBA_D31 19,23
19,23,24,25 FBA_CMD14 A14 DQU7 FBA_CMD8 A7 DQU0
M7 T8 C3 FBA_D25 19,23
TP75 A15 FBA_CMD4 A8 DQU1
R3 C8 FBA_D30 19,23
FBA_CMD25 L7 A9 DQU2 C2
FBA_CMD23 A10/AP DQU3 FBA_D24 19,23
FBA_CMD29 M2 B2 +1.35V_GFX R7 A7 FBA_D29 19,23
19,23,24,25 FBA_CMD29 BA0 VDD#B2 FBA_CMD9 A11 DQU4
FBA_CMD13 N8 D9 N7 A2 FBA_D27 19,23
19,23,24,25 FBA_CMD13 BA1 VDD#D9 FBA_CMD12 A12/BC DQU5
FBA_CMD27 M3 G7 T3 B8 FBA_D28 19,23
19,24 FBA_CMD27 BA2 VDD#G7 FBA_CMD14 A13 DQU6
K2 Dis@4.7U/10V_6 C560 T7 A3 FBA_D26 19,23
VDD#K2 K8 M7 A14 DQU7
VDD#K8 TP57 A15
N1 Dis@0.1U/16V_4 C557
J7 VDD#N1 N9
19,23 FBA_CLK0 CK VDD#N9 FBA_CMD29
19,23 FBA_CLK0# K7 R1 Dis@0.1U/16V_4 C555 GND M2 B2 +1.35V_GFX
K9 CK VDD#R1 R9 FBA_CMD13 N8 BA0 VDD#B2 D9
19,23 FBA_CMD3 CKE VDD#R9 FBA_CMD27 BA1 VDD#D9
M3 G7
BA2 VDD#G7 K2 Dis@4.7U/10V_6 C510
FBA_CMD0 K1 A1 VDD#K2 K8
19,23 FBA_CMD0 ODT VDDQ#A1 +1.35V_GFX VDD#K8
FBA_CMD2 L2 A8 N1 Dis@0.1U/16V_4 C106
19 FBA_CMD2 CS VDDQ#A8 VDD#N1
FBA_CMD11 J3 C1 FBA_CLK0 J7 N9
19,23,24,25 FBA_CMD11 RAS VDDQ#C1 CK VDD#N9
FBA_CMD15 K3 C9 Dis@4.7U/6.3V_6 C561 FBA_CLK0# K7 R1 Dis@0.1U/16V_4 C497 GND
19,23,24,25 FBA_CMD15 CAS VDDQ#C9 CK VDD#R1
FBA_CMD28 L3 D2 FBA_CMD3 K9 R9
19,23,24,25 FBA_CMD28 WE VDDQ#D2 CKE VDD#R9
E9 Dis@0.1U/16V_4 C556 FBA_CLK0
VDDQ#E9 F1
F3 VDDQ#F1 H2 Dis@0.1U/16V_4 C559 GND FBA_CMD0 K1 A1
19,23 FBA_DQS1 DQSL VDDQ#H2 FBA_CMD2 ODT VDDQ#A1 +1.35V_GFX
19,23 FBA_DQSN1 G3 H9 L2 A8
DQSL VDDQ#H9 R73 FBA_CMD11 J3 CS VDDQ#A8 C1
C Dis@162_4 FBA_CMD15 K3 RAS VDDQ#C1 C9 Dis@4.7U/6.3V_6 C509 C
E7 A9 FBA_CMD28 L3 CAS VDDQ#C9 D2
19,23 FBA_DQM1 DML VSS#A9 WE VDDQ#D2
19,23 FBA_DQM2 D3 B3 E9 Dis@0.1U/16V_4 C90
DMU VSS#B3 E1 FBA_CLK0# VDDQ#E9 F1
VSS#E1 G8 F3 VDDQ#F1 H2 Dis@0.1U/16V_4 C112 GND
VSS#G8 19,23 FBA_DQS0 DQSL VDDQ#H2
19,23 FBA_DQS2 C7 J2 19,23 FBA_DQSN0 G3 H9
B7 DQSU VSS#J2 J8 DQSL VDDQ#H9
19,23 FBA_DQSN2 DQSU VSS#J8 M1
VSS#M1 M9 E7 A9
VSS#M9 19,23 FBA_DQM0 DML VSS#A9
P1 19,23 FBA_DQM3 D3 B3
FBA_CMD20 T2 VSS#P1 P9 DMU VSS#B3 E1
19,24 FBA_CMD20 RESET VSS#P9 VSS#E1
T1 G8
FBA_ZQ0 L8 VSS#T1 T9 C7 VSS#G8 J2
GND ZQ VSS#T9 19,23 FBA_DQS3 DQSU VSS#J2
R379 Dis@243_4 19,23 FBA_DQSN3 B7 J8
DQSU VSS#J8 M1
B1 GND VSS#M1 M9
VSSQ#B1 B9 +1.35V_GFX +1.35V_GFX VSS#M9 P1
VSSQ#B9 D1 FBA_CMD20 T2 VSS#P1 P9
VSSQ#D1 D8 RESET VSS#P9 T1
VSSQ#D8 E2 FBA_ZQ1 L8 VSS#T1 T9
VSSQ#E2 GND ZQ VSS#T9
J1 E8 R380 R104
L1 NC#J1 VSSQ#E8 F9 Dis@1.33K/F_4 Dis@1.33K/F_4 Dis@243_4 R342
J9 NC#L1 VSSQ#F9 G1 B1 GND
L9 NC#J9 VSSQ#G1 G9 VSSQ#B1 B9
NC#L9 VSSQ#G9 VREFC_VMA1 VREFD_VMA1 VSSQ#B9 D1
96-BALL VSSQ#D1 D8
SDRAM DDR3 VSSQ#D8 E2
Dis@VRAM _DDR3_HYNIX_256MX16 R381 R106 J1 VSSQ#E2 E8
Dis@1.33K/F_4 C558 Dis@1.33K/F_4 C310 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1
Dis@0.01U/50V_4 Dis@0.01U/50V_4 NC#J9 VSSQ#G1
B L9 G9 B
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
Dis@VRAM _DDR3_HYNIX_256MX16

VRAM Configuration Table


+1.35V_GFX
RAMCFG
[3:0] DESCRIPTION Vendor DELL P/N QCI P/N
C512 Dis@10U/6.3V_6
0001
0x1 C511 Dis@10U/6.3V_6
1111 K4W4G1646E-BC1A SAMSUNG NA AKD5PGDT502
0xF C562 Dis@10U/6.3V_6
+1.35V_GFX
0100 +1.35V_GFX C528 Dis@0.1U/16V_4
0x4 MT41J256M16HA-093G:E Micron NA AKD5PZSTL02 C534 Dis@0.1U/16V_4
1101 C519 Dis@1U/6.3V_4 C549 Dis@1U/6.3V_4 C546 Dis@0.1U/16V_4
0xD C552 Dis@1U/6.3V_4 C518 Dis@1U/6.3V_4
C541 Dis@1U/6.3V_4 C527 Dis@1U/6.3V_4 C538 Dis@0.1U/16V_4
0010 C515 Dis@1U/6.3V_4 C529 Dis@1U/6.3V_4 C523 Dis@0.1U/16V_4
0x2 C532 Dis@0.1U/16V_4
1110 H5TC4G63CFR-N0C Hynix NA AKD5PZDTW00
0xE

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
DDR3L - RANK0
Date: Friday, May 22, 2015 Sheet 22 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

U10

19,22,24,25
19,22,24,25
VREFC_VMA1
VREFD_VMA1

FBA_CMD9
FBA_CMD24
VREFC_VMA1
VREFD_VMA1

FBA_CMD9
FBA_CMD24
FBA_CMD10
M8
H1

N3
P7
P3
VREFCA
VREFDQ

A0
A1
DQL0
DQL1
DQL2
DQL3
DQL4
E3
F7
F2
F8
H3
H8
FBA_D13
FBA_D11
FBA_D15
FBA_D8
FBA_D12
FBA_D9
19,22
19,22
19,22
19,22
19,22
19,22
Rank1
U9
23
19,22,24,25 FBA_CMD10 FBA_CMD13 A2 DQL5
N2 G2 FBA_D14 19,22
19,22,24,25 FBA_CMD13 FBA_CMD26 A3 DQL6
P8 H7 FBA_D10 19,22 VREFC_VMA1 VREFC_VMA1 M8 E3 FBA_D1 19,22
19,22,24,25 FBA_CMD26 FBA_CMD22 A4 DQL7 VREFCA DQL0
P2 VREFD_VMA1 VREFD_VMA1 H1 F7 FBA_D5 19,22
19,22,24,25 FBA_CMD22 FBA_CMD21 A5 VREFDQ DQL1
R8 F2 FBA_D0 19,22
19,22,24,25 FBA_CMD21 FBA_CMD5 A6 FBA_CMD9 DQL2
R2 D7 FBA_D22 19,22 N3 F8 FBA_D7 19,22
19,22,24,25 FBA_CMD5 FBA_CMD8 A7 DQU0 FBA_CMD24 A0 DQL3
T8 C3 FBA_D17 19,22 P7 H3 FBA_D2 19,22
D 19,22,24,25 FBA_CMD8 FBA_CMD23 A8 DQU1 FBA_CMD10 A1 DQL4 D
R3 C8 FBA_D23 19,22 P3 H8 FBA_D6 19,22
19,22,24,25 FBA_CMD23 FBA_CMD28 A9 DQU2 FBA_CMD13 A2 DQL5
L7 C2 FBA_D16 19,22 N2 G2 FBA_D3 19,22
19,22,24,25 FBA_CMD28 FBA_CMD4 A10/AP DQU3 FBA_CMD26 A3 DQL6
R7 A7 FBA_D20 19,22 P8 H7 FBA_D4 19,22
19,22,24,25 FBA_CMD4 FBA_CMD7 A11 DQU4 FBA_CMD22 A4 DQL7
N7 A2 FBA_D18 19,22 P2
19,22,24,25 FBA_CMD7 FBA_CMD14 A12/BC DQU5 FBA_CMD21 A5
T3 B8 FBA_D21 19,22 R8
19,22,24,25 FBA_CMD14 FBA_CMD12 A13 DQU6 FBA_CMD5 A6
T7 A3 FBA_D19 19,22 R2 D7 FBA_D25 19,22
19,22,24,25 FBA_CMD12 A14 DQU7 FBA_CMD8 A7 DQU0
M7 T8 C3 FBA_D31 19,22
TP14 A15 FBA_CMD23 A8 DQU1
R3 C8 FBA_D24 19,22
FBA_CMD28 L7 A9 DQU2 C2
FBA_CMD4 A10/AP DQU3 FBA_D30 19,22
M2 B2 +1.35V_GFX R7 A7 FBA_D26 19,22
19,22,24,25 FBA_CMD29 BA0 VDD#B2 FBA_CMD7 A11 DQU4
N8 D9 N7 A2 FBA_D28 19,22
19,22,24,25 FBA_CMD6 BA1 VDD#D9 FBA_CMD14 A12/BC DQU5
M3 G7 T3 B8 FBA_D27 19,22
19,25 FBA_CMD30 BA2 VDD#G7 FBA_CMD12 A13 DQU6
K2 Dis@4.7U/10V_6 C308 T7 A3 FBA_D29 19,22
VDD#K2 K8 M7 A14 DQU7
VDD#K8 TP8 A15
N1 Dis@0.1U/16V_4 C301
J7 VDD#N1 N9
19,22 FBA_CLK0 CK VDD#N9 FBA_CMD29
K7 R1 Dis@0.1U/16V_4 C306 GND M2 B2 +1.35V_GFX
19,22 FBA_CLK0# CK VDD#R1 FBA_CMD6 BA0 VDD#B2
K9 R9 N8 D9
19,22 FBA_CMD3 CKE VDD#R9 FBA_CMD30 BA1 VDD#D9
M3 G7
BA2 VDD#G7 K2 Dis@4.7U/10V_6 C121
K1 A1 VDD#K2 K8
19,22 FBA_CMD0 ODT VDDQ#A1 +1.35V_GFX VDD#K8
L2 A8 N1 Dis@0.1U/16V_4 C102
19 FBA_CMD1 CS VDDQ#A8 VDD#N1
J3 C1 FBA_CLK0 J7 N9
19,22,24,25 FBA_CMD11 RAS VDDQ#C1 CK VDD#N9
K3 C9 Dis@4.7U/6.3V_6 C307 FBA_CLK0# K7 R1 Dis@0.1U/16V_4 C77 GND
19,22,24,25 FBA_CMD15 CAS VDDQ#C9 CK VDD#R1
L3 D2 FBA_CMD3 K9 R9
19,22,24,25 FBA_CMD25 WE VDDQ#D2 CKE VDD#R9
E9 Dis@0.1U/16V_4 C303
VDDQ#E9 F1
F3 VDDQ#F1 H2 Dis@0.1U/16V_4 C302 GND FBA_CMD0 K1 A1
19,22 FBA_DQS1 DQSL VDDQ#H2 FBA_CMD1 ODT VDDQ#A1 +1.35V_GFX
G3 H9 L2 A8
19,22 FBA_DQSN1 DQSL VDDQ#H9 FBA_CMD11 CS VDDQ#A8
J3 C1
C FBA_CMD15 K3 RAS VDDQ#C1 C9 Dis@4.7U/6.3V_6 C122 C
E7 A9 FBA_CMD25 L3 CAS VDDQ#C9 D2
19,22 FBA_DQM1 DML VSS#A9 WE VDDQ#D2
19,22 FBA_DQM2 D3 B3 E9 Dis@0.1U/16V_4 C108
DMU VSS#B3 E1 VDDQ#E9 F1
VSS#E1 G8 F3 VDDQ#F1 H2 Dis@0.1U/16V_4 C127 GND
VSS#G8 19,22 FBA_DQS0 DQSL VDDQ#H2
19,22 FBA_DQS2 C7 J2 19,22 FBA_DQSN0 G3 H9
B7 DQSU VSS#J2 J8 DQSL VDDQ#H9
19,22 FBA_DQSN2 DQSU VSS#J8 M1
VSS#M1 M9 E7 A9
VSS#M9 19,22 FBA_DQM0 DML VSS#A9
P1 19,22 FBA_DQM3 D3 B3
T2 VSS#P1 P9 DMU VSS#B3 E1
19,24 FBA_CMD20 RESET VSS#P9 VSS#E1
T1 G8
FBA_ZQ2 L8 VSS#T1 T9 C7 VSS#G8 J2
GND ZQ VSS#T9 19,22 FBA_DQS3 DQSU VSS#J2
19,22 FBA_DQSN3 B7 J8
Dis@243_4 R78 DQSU VSS#J8 M1
B1 GND VSS#M1 M9
VSSQ#B1 B9 VSS#M9 P1
VSSQ#B9 D1 FBA_CMD20 T2 VSS#P1 P9
VSSQ#D1 D8 RESET VSS#P9 T1
VSSQ#D8 E2 FBA_ZQ3 L8 VSS#T1 T9
VSSQ#E2 GND ZQ VSS#T9
J1 E8
L1 NC#J1 VSSQ#E8 F9 Dis@243_4 R53
J9 NC#L1 VSSQ#F9 G1 B1 GND
L9 NC#J9 VSSQ#G1 G9 VSSQ#B1 B9
NC#L9 VSSQ#G9 VSSQ#B9 D1
96-BALL VSSQ#D1 D8
SDRAM DDR3 VSSQ#D8 E2
Dis@VRAM _DDR3_HYNIX_256MX16 J1 VSSQ#E2 E8
L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1
B L9 NC#J9 VSSQ#G1 G9 B
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
Dis@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

C123 Dis@10U/6.3V_6

C124 Dis@10U/6.3V_6

C309 Dis@10U/6.3V_6
+1.35V_GFX
+1.35V_GFX C268 Dis@0.1U/16V_4
C289 Dis@0.1U/16V_4
C304 Dis@1U/6.3V_4 C281 Dis@1U/6.3V_4 C250 Dis@0.1U/16V_4
C239 Dis@1U/6.3V_4 C305 Dis@1U/6.3V_4
C275 Dis@1U/6.3V_4 C136 Dis@1U/6.3V_4 C126 Dis@0.1U/16V_4
C513 Dis@1U/6.3V_4 C129 Dis@1U/6.3V_4 C131 Dis@0.1U/16V_4
C134 Dis@0.1U/16V_4

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
DDR3L - RANK0
Date: Friday, May 22, 2015 Sheet 23 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

VREFC_VMA3
VREFD_VMA3
VREFC_VMA3
VREFD_VMA3

FBA_CMD7
M8
H1

N3
U14

VREFCA
VREFDQ
DQL0
DQL1
DQL2
E3
F7
F2
F8
FBA_D34
FBA_D38
FBA_D35
FBA_D39
19,25
19,25
19,25
19,25
Rank0 24
19,22,23,25 FBA_CMD7 FBA_CMD10 A0 DQL3
P7 H3 FBA_D32 19,25 U13
19,22,23,25 FBA_CMD10 FBA_CMD24 A1 DQL4
P3 H8 FBA_D36 19,25
19,22,23,25 FBA_CMD24 FBA_CMD6 A2 DQL5
N2 G2 FBA_D33 19,25 VREFC_VMA3 M8 E3 FBA_D44 19,25
19,22,23,25 FBA_CMD6 FBA_CMD22 A3 DQL6 VREFCA DQL0
P8 H7 FBA_D37 19,25 VREFD_VMA3 H1 F7 FBA_D43 19,25
19,22,23,25 FBA_CMD22 FBA_CMD26 A4 DQL7 VREFDQ DQL1
P2 F2 FBA_D45 19,25
19,22,23,25 FBA_CMD26 FBA_CMD5 A5 FBA_CMD7 DQL2
R8 N3 F8 FBA_D40 19,25
D 19,22,23,25 FBA_CMD5 FBA_CMD21 A6 FBA_CMD10 A0 DQL3 D
R2 D7 FBA_D59 19,25 P7 H3 FBA_D47 19,25
19,22,23,25 FBA_CMD21 FBA_CMD8 A7 DQU0 FBA_CMD24 A1 DQL4
T8 C3 FBA_D62 19,25 P3 H8 FBA_D42 19,25
19,22,23,25 FBA_CMD8 FBA_CMD4 A8 DQU1 FBA_CMD6 A2 DQL5
R3 C8 FBA_D58 19,25 N2 G2 FBA_D46 19,25
19,22,23,25 FBA_CMD4 FBA_CMD25 A9 DQU2 FBA_CMD22 A3 DQL6
L7 C2 FBA_D63 19,25 P8 H7 FBA_D41 19,25
19,22,23,25 FBA_CMD25 FBA_CMD23 A10/AP DQU3 FBA_CMD26 A4 DQL7
R7 A7 FBA_D57 19,25 P2
19,22,23,25 FBA_CMD23 FBA_CMD9 A11 DQU4 FBA_CMD5 A5
N7 A2 FBA_D60 19,25 R8
19,22,23,25 FBA_CMD9 FBA_CMD12 A12/BC DQU5 FBA_CMD21 A6
T3 B8 FBA_D56 19,25 R2 D7 FBA_D52 19,25
19,22,23,25 FBA_CMD12 FBA_CMD14 A13 DQU6 FBA_CMD8 A7 DQU0
T7 A3 FBA_D61 19,25 T8 C3 FBA_D50 19,25
19,22,23,25 FBA_CMD14 A14 DQU7 FBA_CMD4 A8 DQU1
M7 R3 C8 FBA_D55 19,25
TP46 A15 FBA_CMD25 A9 DQU2
L7 C2 FBA_D51 19,25
FBA_CMD23 R7 A10/AP DQU3 A7
FBA_CMD9 A11 DQU4 FBA_D53 19,25
M2 B2 +1.35V_GFX N7 A2 FBA_D48 19,25
19,22,23,25 FBA_CMD29 BA0 VDD#B2 FBA_CMD12 A12/BC DQU5
N8 D9 T3 B8 FBA_D54 19,25
19,22,23,25 FBA_CMD13 BA1 VDD#D9 FBA_CMD14 A13 DQU6
M3 G7 T7 A3 FBA_D49 19,25
19,22 FBA_CMD27 BA2 VDD#G7 A14 DQU7
K2 Dis@4.7U/10V_6 C469 M7
VDD#K2 TP44 A15
K8
VDD#K8 N1 Dis@0.1U/16V_4 C456
J7 VDD#N1 N9 FBA_CMD29 M2 B2
19,25 FBA_CLK1 CK VDD#N9 FBA_CMD13 BA0 VDD#B2 +1.35V_GFX
K7 R1 Dis@0.1U/16V_4 C454 GND N8 D9
19,25 FBA_CLK1# CK VDD#R1 FBA_CMD27 BA1 VDD#D9
K9 R9 M3 G7
19,25 FBA_CMD19 CKE VDD#R9 BA2 VDD#G7 K2 Dis@4.7U/10V_6 C486
VDD#K2 K8
K1 A1 VDD#K8 N1 Dis@0.1U/16V_4 C506
19,25 FBA_CMD16 ODT VDDQ#A1 +1.35V_GFX VDD#N1
L2 A8 FBA_CLK1 J7 N9
19 FBA_CMD18 CS VDDQ#A8 CK VDD#N9
J3 C1 FBA_CLK1# K7 R1 Dis@0.1U/16V_4 C499 GND
19,22,23,25 FBA_CMD11 RAS VDDQ#C1 CK VDD#R1
K3 C9 Dis@4.7U/10V_6 C468 FBA_CMD19 K9 R9
19,22,23,25 FBA_CMD15 CAS VDDQ#C9 CKE VDD#R9
L3 D2
19,22,23,25 FBA_CMD28 WE VDDQ#D2 E9 Dis@0.1U/16V_4 C457
VDDQ#E9 F1 FBA_CMD16 K1 A1
VDDQ#F1 FBA_CMD18 ODT VDDQ#A1 +1.35V_GFX
19,25 FBA_DQS4 F3 H2 Dis@0.1U/16V_4 C26 GND L2 A8
C G3 DQSL VDDQ#H2 H9 FBA_CLK1 FBA_CMD11 J3 CS VDDQ#A8 C1 C
19,25 FBA_DQSN4 DQSL VDDQ#H9 FBA_CMD15 RAS VDDQ#C1
K3 C9 Dis@4.7U/6.3V_6 C483
FBA_CMD28 L3 CAS VDDQ#C9 D2
E7 A9 WE VDDQ#D2 E9 Dis@0.1U/16V_4 C490
19,25 FBA_DQM4 DML VSS#A9 VDDQ#E9
19,25 FBA_DQM7 D3 B3 F1
DMU VSS#B3 E1 F3 VDDQ#F1 H2 Dis@0.1U/16V_4 C508 GND
VSS#E1 19,25 FBA_DQS5 DQSL VDDQ#H2
G8 R50 19,25 FBA_DQSN5 G3 H9
C7 VSS#G8 J2 Dis@162_4 DQSL VDDQ#H9
19,25 FBA_DQS7 DQSU VSS#J2
19,25 FBA_DQSN7 B7 J8
DQSU VSS#J8 M1 E7 A9
VSS#M1 19,25 FBA_DQM5 DML VSS#A9
M9 19,25 FBA_DQM6 D3 B3
VSS#M9 P1 DMU VSS#B3 E1
T2 VSS#P1 P9 FBA_CLK1# VSS#E1 G8
19,22,23,25 FBA_CMD20 RESET VSS#P9 VSS#G8
T1 19,25 FBA_DQS6 C7 J2
FBA_ZQ4 L8 VSS#T1 T9 B7 DQSU VSS#J2 J8
GND ZQ VSS#T9 19,25 FBA_DQSN6 DQSU VSS#J8 M1
Dis@243_4 R237 VSS#M1 M9
B1 GND VSS#M9 P1
VSSQ#B1 B9 FBA_CMD20 T2 VSS#P1 P9
VSSQ#B9 D1 +1.35V_GFX +1.35V_GFX RESET VSS#P9 T1
VSSQ#D1 D8 FBA_ZQ5 L8 VSS#T1 T9
VSSQ#D8 GND ZQ VSS#T9
E2
J1 VSSQ#E2 E8 Dis@243_4 R240
L1 NC#J1 VSSQ#E8 F9 R28 R243 B1 GND
J9 NC#L1 VSSQ#F9 G1 Dis@1.33K/F_4 Dis@1.33K/F_4 VSSQ#B1 B9
L9 NC#J9 VSSQ#G1 G9 VSSQ#B9 D1
NC#L9 VSSQ#G9 VSSQ#D1 D8
96-BALL VREFC_VMA3 VREFD_VMA3 VSSQ#D8 E2
SDRAM DDR3 J1 VSSQ#E2 E8
Dis@VRAM _DDR3_HYNIX_256MX16 L1 NC#J1 VSSQ#E8 F9
B R29 R244 J9 NC#L1 VSSQ#F9 G1 B
Dis@1.33K/F_4 C73 Dis@1.33K/F_4 C480 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9
Dis@0.01U/50V_4 Dis@0.01U/50V_4
96-BALL
SDRAM DDR3
Dis@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

FOR EMI Request C452 Dis@10U/6.3V_6

+1.35V_GFX C427 Dis@10U/6.3V_6

C451 Dis@10U/6.3V_6
C453 *Dis@120P/50V_4 +1.35V_GFX
C463 *Dis@120P/50V_4 +1.35V_GFX C475 Dis@0.1U/16V_4
C433 *Dis@120P/50V_4 C443 Dis@0.1U/16V_4
C459 *Dis@120P/50V_4 C429 Dis@1U/6.3V_4 C438 Dis@1U/6.3V_4 C431 Dis@0.1U/16V_4
C473 *Dis@120P/50V_4 C432 Dis@1U/6.3V_4 C465 Dis@1U/6.3V_4
C440 *Dis@120P/50V_4 C430 Dis@1U/6.3V_4 C434 Dis@1U/6.3V_4 C444 Dis@0.1U/16V_4
C458 *Dis@120P/50V_4 C461 Dis@1U/6.3V_4 C460 Dis@1U/6.3V_4 C439 Dis@0.1U/16V_4
C441 *Dis@120P/50V_4 C442 Dis@0.1U/16V_4

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
DDR3L - RANK0
Date: Friday, May 22, 2015 Sheet 24 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

VREFC_VMA3
VREFD_VMA3
VREFC_VMA3
VREFD_VMA3

FBA_CMD9
M8
H1

N3
U5

VREFCA
VREFDQ
DQL0
DQL1
DQL2
E3
F7
F2
F8
FBA_D38
FBA_D34
FBA_D39
FBA_D35
19,24
19,24
19,24
19,24
Rank1 25
19,22,23,24 FBA_CMD9 FBA_CMD24 A0 DQL3
P7 H3 FBA_D37 19,24 U4
19,22,23,24 FBA_CMD24 FBA_CMD10 A1 DQL4
P3 H8 FBA_D33 19,24
19,22,23,24 FBA_CMD10 FBA_CMD13 A2 DQL5
N2 G2 FBA_D36 19,24 VREFC_VMA3 VREFC_VMA3 M8 E3 FBA_D43 19,24
19,22,23,24 FBA_CMD13 FBA_CMD26 A3 DQL6 VREFCA DQL0
P8 H7 FBA_D32 19,24 VREFD_VMA3 VREFD_VMA3 H1 F7 FBA_D44 19,24
19,22,23,24 FBA_CMD26 FBA_CMD22 A4 DQL7 VREFDQ DQL1
P2 F2 FBA_D40 19,24
19,22,23,24 FBA_CMD22 FBA_CMD21 A5 FBA_CMD9 DQL2
R8 N3 F8 FBA_D45 19,24
D 19,22,23,24 FBA_CMD21 FBA_CMD5 A6 FBA_CMD24 A0 DQL3 D
R2 D7 FBA_D62 19,24 P7 H3 FBA_D41 19,24
19,22,23,24 FBA_CMD5 FBA_CMD8 A7 DQU0 FBA_CMD10 A1 DQL4
T8 C3 FBA_D59 19,24 P3 H8 FBA_D46 19,24
19,22,23,24 FBA_CMD8 FBA_CMD23 A8 DQU1 FBA_CMD13 A2 DQL5
R3 C8 FBA_D63 19,24 N2 G2 FBA_D42 19,24
19,22,23,24 FBA_CMD23 FBA_CMD28 A9 DQU2 FBA_CMD26 A3 DQL6
L7 C2 FBA_D58 19,24 P8 H7 FBA_D47 19,24
19,22,23,24 FBA_CMD28 FBA_CMD4 A10/AP DQU3 FBA_CMD22 A4 DQL7
R7 A7 FBA_D61 19,24 P2
19,22,23,24 FBA_CMD4 FBA_CMD7 A11 DQU4 FBA_CMD21 A5
N7 A2 FBA_D56 19,24 R8
19,22,23,24 FBA_CMD7 FBA_CMD14 A12/BC DQU5 FBA_CMD5 A6
T3 B8 FBA_D60 19,24 R2 D7 FBA_D50 19,24
19,22,23,24 FBA_CMD14 FBA_CMD12 A13 DQU6 FBA_CMD8 A7 DQU0
T7 A3 FBA_D57 19,24 T8 C3 FBA_D52 19,24
19,22,23,24 FBA_CMD12 A14 DQU7 FBA_CMD23 A8 DQU1
M7 R3 C8 FBA_D51 19,24
TP3 A15 FBA_CMD28 A9 DQU2
L7 C2 FBA_D55 19,24
FBA_CMD4 R7 A10/AP DQU3 A7
FBA_CMD7 A11 DQU4 FBA_D49 19,24
M2 B2 +1.35V_GFX N7 A2 FBA_D54 19,24
19,22,23,24 FBA_CMD29 BA0 VDD#B2 FBA_CMD14 A12/BC DQU5
N8 D9 T3 B8 FBA_D48 19,24
19,22,23,24 FBA_CMD6 BA1 VDD#D9 FBA_CMD12 A13 DQU6
M3 G7 T7 A3 FBA_D53 19,24
19,23 FBA_CMD30 BA2 VDD#G7 A14 DQU7
K2 Dis@4.7U/10V_6 C36 M7
VDD#K2 TP6 A15
K8 Dis@0.1U/16V_4 C455
VDD#K8 N1 Dis@0.1U/16V_4 C27
J7 VDD#N1 N9 FBA_CMD29 M2 B2
19,24 FBA_CLK1 CK VDD#N9 FBA_CMD6 BA0 VDD#B2 +1.35V_GFX
19,24 FBA_CLK1# K7 R1 GND N8 D9
K9 CK VDD#R1 R9 FBA_CMD30 M3 BA1 VDD#D9 G7 Dis@4.7U/10V_6 C100
19,24 FBA_CMD19 CKE VDD#R9 BA2 VDD#G7 K2
VDD#K2 K8 Dis@0.1U/16V_4 C111
K1 A1 VDD#K8 N1 Dis@0.1U/16V_4 C436
19,24 FBA_CMD16 ODT VDDQ#A1 +1.35V_GFX VDD#N1
L2 A8 FBA_CLK1 J7 N9
19 FBA_CMD17 CS VDDQ#A8 CK VDD#N9
19,22,23,24 FBA_CMD11 J3 C1 Dis@4.7U/10V_6 C37 FBA_CLK1# K7 R1 GND
K3 RAS VDDQ#C1 C9 FBA_CMD19 K9 CK VDD#R1 R9
19,22,23,24 FBA_CMD15 CAS VDDQ#C9 CKE VDD#R9
19,22,23,24 FBA_CMD25 L3 D2 Dis@0.1U/16V_4 C28
WE VDDQ#D2 E9 Dis@0.1U/16V_4 C29
VDDQ#E9 F1 FBA_CMD16 K1 A1
VDDQ#F1 ODT VDDQ#A1 +1.35V_GFX
19,24 FBA_DQS4 F3 H2 GND FBA_CMD17 L2 A8
C G3 DQSL VDDQ#H2 H9 FBA_CMD11 J3 CS VDDQ#A8 C1 Dis@4.7U/6.3V_6C105 C
19,24 FBA_DQSN4 DQSL VDDQ#H9 RAS VDDQ#C1
FBA_CMD15 K3 C9
FBA_CMD25 L3 CAS VDDQ#C9 D2 Dis@0.1U/16V_4 C437
E7 A9 WE VDDQ#D2 E9 Dis@0.1U/16V_4 C107
19,24 FBA_DQM4 DML VSS#A9 VDDQ#E9
19,24 FBA_DQM7 D3 B3 F1
DMU VSS#B3 E1 F3 VDDQ#F1 H2 GND
VSS#E1 19,24 FBA_DQS5 DQSL VDDQ#H2
G8 19,24 FBA_DQSN5 G3 H9
C7 VSS#G8 J2 DQSL VDDQ#H9
19,24 FBA_DQS7 DQSU VSS#J2
19,24 FBA_DQSN7 B7 J8
DQSU VSS#J8 M1 E7 A9
VSS#M1 19,24 FBA_DQM5 DML VSS#A9
M9 19,24 FBA_DQM6 D3 B3
VSS#M9 P1 DMU VSS#B3 E1
T2 VSS#P1 P9 VSS#E1 G8
19,24 FBA_CMD20 RESET VSS#P9 VSS#G8
T1 19,24 FBA_DQS6 C7 J2
FBA_ZQ6 L8 VSS#T1 T9 B7 DQSU VSS#J2 J8
GND ZQ VSS#T9 19,24 FBA_DQSN6 DQSU VSS#J8 M1
Dis@243_4 R281 VSS#M1 M9
B1 GND VSS#M9 P1
VSSQ#B1 B9 FBA_CMD20 T2 VSS#P1 P9
VSSQ#B9 D1 RESET VSS#P9 T1
VSSQ#D1 D8 FBA_ZQ7 L8 VSS#T1 T9
VSSQ#D8 GND ZQ VSS#T9
E2
J1 VSSQ#E2 E8 Dis@243_4 R35
L1 NC#J1 VSSQ#E8 F9 B1 GND
J9 NC#L1 VSSQ#F9 G1 VSSQ#B1 B9
L9 NC#J9 VSSQ#G1 G9 VSSQ#B9 D1
NC#L9 VSSQ#G9 VSSQ#D1 D8
96-BALL VSSQ#D8 E2
SDRAM DDR3 J1 VSSQ#E2 E8
Dis@VRAM _DDR3_HYNIX_256MX16 L1 NC#J1 VSSQ#E8 F9
B J9 NC#L1 VSSQ#F9 G1 B
L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9
96-BALL
SDRAM DDR3
Dis@VRAM _DDR3_HYNIX_256MX16

+1.35V_GFX

FOR EMI Request C24 Dis@10U/6.3V_6

+1.35V_GFX C4 Dis@10U/6.3V_6

C3 Dis@10U/6.3V_6
C12 *Dis@120P/50V_4 +1.35V_GFX
C11 *Dis@120P/50V_4 +1.35V_GFX C31 Dis@0.1U/16V_4
C5 *Dis@120P/50V_4 C7 Dis@0.1U/16V_4
C8 *Dis@120P/50V_4 C435 Dis@1U/6.3V_4 C30 Dis@1U/6.3V_4 C14 Dis@0.1U/16V_4
C16 *1Dis@20P/50V_4 C9 Dis@1U/6.3V_4 C10 Dis@1U/6.3V_4
C33 *Dis@120P/50V_4 C15 Dis@1U/6.3V_4 C20 Dis@1U/6.3V_4 C19 Dis@0.1U/16V_4
C13 *Dis@120P/50V_4 C22 Dis@1U/6.3V_4 C6 Dis@1U/6.3V_4 C17 Dis@0.1U/16V_4
C18 *Dis@120P/50V_4 C32 Dis@0.1U/16V_4

A A

PROJECT :Y11X-6L
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
25 -- DDR3L - RANK0
Date: Friday, May 22, 2015 Sheet 25 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

eDP CONN(LDS) 5/8 Changed LVDS conn from 50 pin to 40 pin, P/N use
DFFC40FR036 and Modified connector pin define check co-lay in X03
R351 0_4 26
41
USBP7+_CN CAMERA
1 EL7
USBP7-_CN
2 USBP7+_CN 4 3 USBP7+
3 DMIC_DATA_CN R76 0_4 DMIC_DATA_CN C148 1 2 100P/50V_4 USBP7-_CN 1 2 USBP7- USBP7+ 12
4 DMIC_CLK_CN R77 0_4
DMIC_DATA 32 DMIC DMIC_CLK_CN C149 1 2 100P/50V_4 *DLP11SN900HL2L_NC USBP7- 12
5 DMIC_CLK 32
6
7 +3.3V_RUN R350 0_4
8
D 9 +5V_RUN D
10
11 +LCDVCC +5V_RUN
12 +LCDVCC eDP
13 LCD_TST EDP_AUXP_C C120 1 2 0.1U/16V_4 INT_EDP_AUXP
14 LCD_TST 35 INT_EDP_AUXP 2
EDP_HPD EDP_HPD 2 EDP_AUXN_C C115 1 2 0.1U/16V_4 INT_EDP_AUXN
15 INT_EDP_AUXN 2
16 LCD_PW M_IN C44 C48 C46
17
18 LCD_BAK_IN 4.7U/10V_6 0.1U/16V_4 0.1U/16V_4
19 TPSCR_EN EL5
20 TPSCR_EN 35 4 3
DCR_EN_CN R225 *0_4_NC DCR_EN EDP_TXP0_C EDP_TXP0_R C113 1 2 0.1U/16V_4 INT_EDP_TXP0
21 DCR_EN 14 1 2 INT_EDP_TXP0 2
EDP_TXN0_C EDP_TXN0_R C110 1 2 0.1U/16V_4 INT_EDP_TXN0
22 INT_EDP_TXN0 2
EDP_AUXP_C DLW 21HN900HQ2L
23 EDP_AUXN_C
24
25 EDP_TXP0_C +3.3V_RUN
26 EDP_TXN0_C
27
28 EDP_TXP1_C EDP_TXP1_C 4 3 EDP_TXP1_R C104 1 2 0.1U/16V_4 INT_EDP_TXP1
29 1 2 INT_EDP_TXP1 2
EDP_TXN1_C eDP EDP_TXN1_C EDP_TXN1_R C101 1 2 0.1U/16V_4 INT_EDP_TXN1
30 INT_EDP_TXN1 2
DLW 21HN900HQ2L EL4
31 USBP8+_TOUCH C135
32 USBP8-_TOUCH
TOUCH SCREEN 0.01U/16V_4
33
34 R43 0_4
35
36 EL3
37 +LED_BL
USBP8+_TOUCH 2 1 USBP8+
38 3 4 USBP8+ 12
USBP8-_TOUCH USBP8-
39 +LED_BL USBP8- 12
*DLP11SN900HL2L_NC
C 40 C
42

R31 0_4
C462 check co-lay in X03

1
0.1U/25V_6

2
CN5
Part Number = DFFC40FR036
51519-04001-001

touch screen power 5/7 Removed 3D camera funciton

+3.3V_RUN
LCD_VCC +LCDVCC
U3
Backlight Control(LDS) 4 1
5 IN OUT Backlight Power(LDS)
D6 2 IN
1 3 GND C63 +PW R_SRC +LED_BL
2 LCD_PW M EN 0.1U/16V_4
B 3 LCD_PW M_IN C103 B
G5243A
2 0.1U/16V_4 D1
35 LCD_PW M_EC
1

1 DP_ENVDD
DP_ENVDD 2
BAT54CW R275
100K_4 EN_LCDVCC 3
40mil
40mil 1 3
1

2 LCD_TST
2

R23 Q20

1
100K_4 BAT54CW R362 AO3409

2
C539
C464
2

100K_4 0.1U/25V_6
Backlight Enable(LDS) 0.1U/25V_6

2
D4
eDP_BL_EN 1
2,35 eDP_BL_EN
3 LCD_BAK_IN 2 1

2 R369 100K_4
35 LCD_BAK
2

*BAT54CW _NC R259

3
100K_4 R370 10K_4
1 2 2 Q19
R254 0_4 3D CAMERA Power +3.3V_RUN
2N7002W
1

1
A A

5/7 NC 3D camera power schematic

Quanta Computer Inc.


Vinafix.com PROJECT : AM8
Size Document Number Rev
1A
eDP CONN
Date: Friday, May 22, 2015 Sheet 26 of 53
5 4 3 2 1
1 2 3 4 5 6 7 8

Reserve for EMI and close to HDMI CONN(EMC)

HDMI_TX2-_R 1
EL10
2 HDMI_TX2-_C HDMI_TX0+_R 2
EL11
1 HDMI_TX0+_C
27
HDMI_TX2+_R 4 3 HDMI_TX2+_C HDMI_TX0-_R 3 4 HDMI_TX0-_C

EXC24CG900U EXC24CG900U
A A

EL9 EL8
HDMI_TX1+_R 4 3 HDMI_TX1+_C HDMI_CLK+_R 4 3 HDMI_CLK+_C
HDMI_TX1-_R 1 2 HDMI_TX1-_C HDMI_CLK-_R 1 2 HDMI_CLK-_C

EXC24CG900U EXC24CG900U

HDMI(HDM)
INT_HDMI_TXP2 C551 0.1U/16V_4 HDMI_TX2+_R
2 INT_HDMI_TXP2
INT_HDMI_TXN2 C547 0.1U/16V_4 HDMI_TX2-_R
HDMI_HPD spec VinH_min=2.0V
2 INT_HDMI_TXN2

2
2
INT_HDMI_TXP1
INT_HDMI_TXN1
INT_HDMI_TXP1
INT_HDMI_TXN1
C545
C540
0.1U/16V_4
0.1U/16V_4
HDMI_TX1+_R
HDMI_TX1-_R +3.3V_RUN HDMI HPD
INT_HDMI_TXP0 C554 0.1U/16V_4 HDMI_TX0+_R
2 INT_HDMI_TXP0
B INT_HDMI_TXN0 C553 0.1U/16V_4 HDMI_TX0-_R B
2 INT_HDMI_TXN0
INT_HDMI_TXCP C537 0.1U/16V_4 HDMI_CLK+_R
2 INT_HDMI_TXCP

3
INT_HDMI_TXCN C533 0.1U/16V_4 HDMI_CLK-_R
2 INT_HDMI_TXCN
Q16 2 1 2 HDMI_HPD
MMST3904-7-F 150K_4 R83
HDMI_SCL

1
2 HDMI_SCL HDMI_SDA INT_HDMI_HPD
2 HDMI_SDA INT_HDMI_HPD
2 INT_HDMI_HPD

2
R89
5.1K/F_4

1
R99 2 1 470_4 HDMI_TX2+_R
R98 2 1 470_4 HDMI_TX2-_R

R97 2 1 470_4 HDMI_TX1+_R


IB=(5V-0.7V)/(150K+(70+1)5.1K)=8.4uA
R96 2 1 470_4 HDMI_TX1-_R
IE=(1+70)X8.4uA=596.4uA
+HDMI_LS

R103 2 1 470_4 HDMI_TX0+_R


R101 2 1 470_4 HDMI_TX0-_R
VE=596.4uA X 5.1K=3.04V
R92 2 1 470_4 HDMI_CLK+_R
B=70
R90 2 1 470_4 HDMI_CLK-_R +5V_HDMIF1
3

2
C 2 C
+3.3V_RUN
Q23 D8 D7
2N7002W SDM10K45-7-F SDM10K45-7-F
HDMI Conn.(HDM)
1
1

R389 +3.3V_RUN
1M_4 CN6
+5V_HDMIF1_D

22
2

+5V_HDMIF1_D35 SHELL3 20
HDMI_TX2+_C 1 SHELL1
2 D2+
HDMI_TX2-_C 3 D2 Shield
D2-
1
3

HDMI_TX1+_C 4
5 D1+
D1 Shield
1
3

RP2 HDMI_TX1-_C 6
2.2KX2 HDMI_TX0+_C 7 D1-
RP1 8 D0+
Q22 FDV301N_G 2.2KX2 HDMI_TX0-_C 9 D0 Shield
2
4

HDMI_CLK+_C 10 D0-
HDMI_SCL 1 3 11 CK+
2
4

HDMI_CLK-_C 12 CK Shield
13 CK-
14 CE Remote
2

HDMI_CLK 15 NC
+3.3V_RUN DDC CLK
HDMI_DAT 16
DDC DATA
2

17
HDMIF1 1206L110THYR +5V_HDMIF1 18 GND
+5V_RUN +5V
HDMI_SDA 1 3 HDMI_HPD 19
HP DET 21
D SHELL2 D
23
Q21 FDV301N_G SHELL4

HDMI CONN_4 pin GND_2HE1655-001111F

0213 HDMI connector used DFHD19MR249 Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
HDMI CONN
Date: Friday, May 22, 2015 Sheet 27 of 53
1 2 3 4 5 6 7 8
5 4 3 2 1

LAN RTL8111GUS-CG (LAN)

VDD10 C130

C125
0.1U/16V_4

0.1U/16V_4
MDI0+
MDI0-

VDD10
MDI1+
+3VLANVCC
28
MDI1-
C170 0.1U/16V_4 MDI2+ R348
MDI2-
C132 0.1U/16V_4
D VDD10 Q15 1K_4 D

2
Each CAP near IC pin 3 , 8 , 22 , 30 2N7002W

3 1 PCIE_LAN_WAKE#
U8 35 LAN_EC_WAKE#

33
8
7
6
5
4
3
2
1
RTL8111G(S)/ RTL8111GUS
MDI3+

AVDD10

MDIN1
MDIP1

MDIN0
MDIP0

GND
MDIN2(NC)
MDIP2(NC)

AVDD10(NC)
MDI3-
C159 *4.7U/10V_6 C116 *4.7U/10V_6
+3VLANVCC

C133 0.1U/16V_4 C147 0.1U/16V_4


9 32 +3VLANVCC
10 MDIP3(NC) AVDD33 31 R68 2.49K/F
MDIN3(NC) RSET
SW mode
11 30 VDD10
PCIE_CLKREQ_LAN# 12 AVDD33(NC) AVDD10 29 LAN_XTALO
13 PCIE_CLKREQ_LAN# CLKREQB CKXTAL2
PCIE_TXP9_LAN 13 28 LAN_XTALI
12 PCIE_TXP9_LAN 14 HSIP CKXTAL1 27
PCIE_TXN9_LAN LAN_LED0 TP9
12 PCIE_TXN9_LAN HSIN LED0
15 26 LAN_LED1 TP10 L7 4.7uH_680mA_DCR=0.12 @7.96MHz

VDDREG(DVDD33)
13 CLK_PCIE_LANP 16 REFCLK_P LED1/GPO 25 LAN_LED2 TP58 REG_OUT VDD10
13 CLK_PCIE_LANN REFCLK_N LED2(LED1)

REGOUT(NC)
DVDD10(NC)
LANWAKEB
ISOLATEB
C199 C209

PERSTB
HSON
HSOP

0.1U/16V_4

4.7U/10V_6
17
18
19
20
21
22
23
24
C C
REG_OUT
+3VLANVCC
C118 0.1U/16V_4 PCIE_RXP9_C
12 PCIE_RXP9_LAN
C117 0.1U/16V_4 PCIE_RXN9_C VDD10
12 PCIE_RXN9_LAN
LAN_RST# C119 C114
LAN_ISOLAT#
PCIE_LAN_WAKE#

0.1U/16V_4

4.7U/10V_6
C158 C182

0.1U/16V_4

1U/6.3V_4
R59 *SJ0402_NC LAN_RST#
4,18,30,35 PLTRST# 2 1 0213 LAN connector used DFTJ08FR387
CN3
+3.3V_RUN 1K_4 R354 LAN_ISOLAT# near IC pin 23 EMI ESD2 +3.3V_ALW
near IC pin 22 MDI1+ 1 6 MDI0+
2 1 6 5
MDI1- 3 2 5 4 MDI0-
3 4 LAN_MX3- 8
*AZC099-04S_NC C190 LAN_MX3+ 7 RX1-
LAN_MX1- 6 RX1+
*0.1U/16V_4_NC RX0-
LAN_MX2- 5 9
LAN_MX2+ 4 TX1- GND2
ESD1 +3.3V_ALW LAN_MX1+ 3 TX1+ 10
LAN_XTALI C150 10P/50V_4 MDI3+ 1 6 MDI2+ LAN_MX0- 2 RX0+ GND1
2 1 6 5 LAN_MX0+ 1 TX0- 11
MDI3- 3 2 5 4 MDI2- TX0+ GND3
3 4
3
4

12
Y1 *AZC099-04S_NC C128 GND4
B B
7V25000011_25MHz *0.1U/16V_4_NC
1
2

RJ45_CONN_C100KE-10809-L
LAN_XTALO C151 10P/50V_4 DFTJ08FR387
rj45-jm3611-hp48ca01-9h-8p

T
R
A
N
S
F
O
R
M
E
R
PC80 EMI U7
1U/6.3V_4 EC14 *6.8P/50V/NPO_4_NC MDI0+ 1 24 LAN_MX0+
1 2 EC13 *6.8P/50V/NPO_4_NC MDI0- 2 TD1+ MX1+ 23 LAN_MX0-
+3.3V_ALW TD1- MX1-
EC12 *6.8P/50V/NPO_4_NC MDI1+ 5 20 LAN_MX1+
+3VLANVCC EC11 *6.8P/50V/NPO_4_NC MDI1- 6 TD2+ MX2+ 19 LAN_MX1-
U6 EC10 *6.8P/50V/NPO_4_NC MDI2+ 7 TD2- MX2- 18 LAN_MX2+
TPS22965DSGR EC9 *6.8P/50V/NPO_4_NC MDI2- 8 TD3+ MX3+ 17 LAN_MX2-
0318 Removed 0 ohm TD3- MX3-
EC8 *6.8P/50V/NPO_4_NC MDI3+ 11 14 LAN_MX3+
1 8 EC7 *6.8P/50V/NPO_4_NC MDI3- 12 TD4+ MX4+ 13 LAN_MX3-
VIN_01 VOUT_02 TD4- MX4-
0318 Removed 0 ohm 2 7 TRA_V_DAC 3 22 LAN_MCTG3 R334 75_4
VIN_02 VOUT_01 TCT1 MCT1
1

TRA_V_DAC 4 21 LAN_MCTG2 R62 75_4


LAN_PWR_EN_EC 3 6 PC81 TRA_V_DAC 9 TCT2 MCT2 16 LAN_MCTG1 R67 75_4
35 LAN_PWR_EN_EC ON CT TCT3 MCT3
0.1U/25V_4 TRA_V_DAC 10 15 LAN_MCTG0 R54 75_4 LAN_MCTG C526 10P/3KV_1808
2

4 5 TCT4 MCT4
+5V_ALW
PAD

VBIAS GND
1

A
PC83 NS692417 A
1

1000P/50V_4 C109
9

PC87 PC82 0.1U/16V_4


0.1U/25V_4 0.01U/16V_4
2

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
LAN(RTL8111GUS)/RJ45
Date: Friday, May 22, 2015 Sheet 28 of 53
Vinafix.com
5 4 3 2 1
5 4 3 2 1

USB3.0 Power Share(UBC) USB3.0/2.0 COMBO X 1


+USB_SIDE2_PW R

USB Power share


USBP0_BUS_SW_CB0 Mode
12 USB30_RX1-
USB30_RX1-
USB30_RX1+
DLW 21HN900HQ2L
4
1
3
2
+USB_SIDE2_PW R 1
CN7

VBUS
USB 3.0(UB3)

DET#
10
USB_CHG_DET# 36
29
12 USB30_RX1+
USBP1-_C 2
EL14 USBP1+_C 3 D- USB2.0
D+
Low DCP, Auto-detect
4
GND
D D
High CDP, BC Spec 1.2 USB3.0_RX1-_C 5
USB3.0_RX1+_C 6 SSRX-
DLW 21HN900HQ2L SSRX+
R337 mA C591 0.1U/16V_4 USB3.0_TX1-_R 4 3 USB3.0_TX1-_C 8 USB 3.0
12 USB30_TX1- SSTX-
C587 0.1U/16V_4 USB3.0_TX1+_R 1 2 USB3.0_TX1+_C 9 11
12 USB30_TX1+ SSTX+ GND 12
EL13 7 GND 13
OC 100k ohm 504 GND GND 14
limitation GND
22.1k ohm 2274 Applied Now YUSB0002-P001A
Part Number = DFHS10FR183

Current limit = 50250/(R337) EU1 AZ1045-04F


+USB_SIDE2_PW R USB3.0_RX1-_C 1 10 USB3.0_RX1-_C
close to conn 1- NC
+5V_ALW USB3.0_RX1+_C 2 9 USB3.0_RX1+_C
100 mil 1+ NC
R393 R392 3 8
GND GND

1
22.1K/F_4 78.7K/F_4 C578
C566 1 2 10U/6.3V_8 USB_OC0# C573 0.1U/16V_4 C577 USB3.0_TX1-_C 4 7 USB3.0_TX1-_C
USB_OC0# 12,29 2- NC
10U/6.3V_8 150P/50V_4

2
USB3.0_TX1+_C 5 6 USB3.0_TX1+_C
C570 2 1 0.1U/16V_4 17 2+ NC
16
15
14
13
U21 THRMPd +USB_SIDE2_PW R

ILIM_L
ILIM_H

GND
FAULT
5/13 Used CY5R5M90B00 for DVT1 build
C 1 12 EL12 C

12 USBP1-
2
3
IN
DM_OUT
OUT
DM_IN
11
10
USBP1-_R
USBP1+_R
1
4
2
3
USBP1-_C
USBP1+_C
ESD Function
12 USBP1+ R413 *0_4_NC 4 DP_OUT DP_IN 9
ILIM_SEL STATUS Place ESD diodes as close as USB connector.
DLP11SN900HL2L USBP1+_C USBP1-_C
R424 0_4
CTL1
CTL2
CTL3

+5V_ALW +5V_ALW
EN

1
TPS2546RTER

1
5
6
7
8

C584 C581
R426 TVM0G5R5M900R TVM0G5R5M900R

2
100K_4 CY5R5M90B00 CY5R5M90B00
35 USB_BACK_EN
35 USBP0_BUS_SW _CB0
2

M15 Design Requirement:


USB 3.0(UB3)
USB3.0/2.0 COMBO +5V_ALW
I continuous 1.5A ; OC 2.0A
U24
+USB_SIDE1_PW R
PUBAUU-09FLBS1NN4H0
BD82043FVJ-GE2 Part Number = DFHS09FR667 EU2 AZ1045-04F
2 8 +USB_SIDE1_PW R USB3.0_RX2-_C 1 10 USB3.0_RX2-_C
3 IN1 OUT3 7 CN10 1- NC
IN2 OUT2
1

C605 6 USB3.0_RX2+_C 2 9 USB3.0_RX2+_C


C607 4 OUT1 +USB_SIDE1_PW R 1 1+ NC
EN# 1 VBUS
*10U/6.3V_8_NC 0.1U/16V_4 1 USBP2-_C 2 3 8
D-
2

B GND 5 USB_OC0# USBP2+_C 3 2 GND GND B


OC# USB_OC0# 12,29 3 D+
4 USB3.0_TX2-_C 4 7 USB3.0_TX2-_C
USB3.0_RX2-_C 5 4 GND 2- NC
USB_2.0_EN# USB3.0_RX2+_C 6 5 SSRX- USB3.0_TX2+_C 5 6 USB3.0_TX2+_C
32,35 USB_2.0_EN# 6 SSRX+ 2+ NC
Active Low 7
USB3.0_TX2-_C 8 7 GND
USB3.0_TX2+_C 9 8 SSTX-
9 SSTX+

13
12
11
10
EL17

13
12
11
10
4 3
12 USB30_RX2-
1 2
12 USB30_RX2+

DLW 21HN900HQ2L

+5V_ALW

C611 0.1U/16V_4 USB3.0_TX2-_R 4


EL16
3
ESD Function
Place ESD diodes as close as USB connector.
12 USB30_TX2-
C610 0.1U/16V_4 USB3.0_TX2+_R 1 2
12 USB30_TX2+
ESD4
USBP2+_C 1 6
DLW 21HN900HQ2L 2 1 6 5
USBP2-_C 3 2 5 4
3 4
TVL ST23 04 AD0
+USB_SIDE1_PW R
A close to conn EL15
A

1 2 USBP2-_C
12 USBP2- 4 3 USBP2+_C
12 USBP2+
1

C608 DLP11SN900HL2L
C606 0.1U/16V_4 C609
10U/6.3V_8 150P/50V_4 Quanta Computer Inc.
2

PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
USB3/USB Charger
Date: Friday, May 22, 2015 Sheet 29 of 53
5 4 3 2 1
A B C D E

NGFF Wifi/BT connector(NGF)

30
+3.3V_RUN +3.3V_RUN
CN8 Place caps close to connector.

1
NGFF 2
USBP6+ 3 GND 3.3Vaux 4
12 USBP6+ USB_D+ 3.3Vaux

1
USBP6- 5 6
12 USBP6- 7 USB_D- LED#1(O) 8 C361 C362 C365 C364 C363
9 GND PCM_CLK(IO) 10 0.1U/16V_4 0.047U/10V_4 0.1U/16V_4 0.047U/10V_4 4.7U/10V_6

2
11 SDIO CLK(O) PCM_SYNC(IO) 12
4 4
13 SDIO CMD(IO) PCM_IN(O) 14
15 SDIO DAT0(IO) PCM_OUT(I) 16
17 SDIO DAT1(IO) LED#2(O) 18
19 SDIO DAT2(IO) GND 20
21 SDIO DAT3(IO) UART Wake(O) 22
23 SDIO Wake(I) UART Rx(O) 24
25 SDIO Reset(O) Notch 26
27 Notch Notch 28
29 Notch Notch 30
31 Notch Notch 32
33 Notch UART Tx(I) 34
35 GND UART RTS(O) 36
12 PCIE_TXP6_W LAN PETp0 UART CTS(I)
37 38
12 PCIE_TXN6_W LAN PETn0 CLink RESET(I)
39 40
41 GND CLink DATA 42
12 PCIE_RXP6_W LAN PERp0 CLink CLK
43 44
12 PCIE_RXN6_W LAN PERn0 COEX3
45 46
47 GND COEX2 48
13 CLK_PCIE_W LANP REFCLKP0 COEX1
49 50
13 CLK_PCIE_W LANN REFCLKN0 SUSCLK(32kHz)(O)
51 52 W LAN_PCIE_RST# R147 0_4 PLTRST#
GND PERST0#(O) PLTRST# 4,18,28,35
PCIE_CLKREQ_W LAN# 53 54 BT_RADIO_DIS# BT_RADIO_DIS# 14
13 PCIE_CLKREQ_W LAN# CLKREQ0# W_DISABLE#2(I)
NGFF_PCIE_W LAN_W AKE_R# 55 56 W LAN_OFF# W LAN_OFF# 14
TP35 PEWake0# W_DISABLE#1(I)
57 58
59 GND NFC I2C SM DATA(IO) 60
61 PETp1 NFC I2C SM CLK(I) 62
63 PETn1 NFC I2C IRQ(O) 64 LPC_LAD0_R R149 0_4
65 GND NFC Reset#(I) 66 LPC_LAD1_R R150 0_4 LAD0 10,35
67 PERp1 RESERVED 68 LPC_LAD2_R R151 0_4 LAD1 10,35
3 69 PERn1 RESERVED 70 LPC_LAD3_R R152 0_4 LAD2 10,35 3
GND RESERVED LAD3 10,35
10 LPC_CLK_DEBUG LPC_CLK_DEBUG 71 72
R148 0_4 LPC_LFRAME#_R 73 RESERVED 3.3Vaux 74
10,35 LFRAME# RESERVED 3.3Vaux
75 NC in X03

GND
GND
GND
NC in X03
APCI0085- P005A

76
77
Part Number = DFHS75FR119

2 2

1 1

Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
Wifi/BT NGFF
Date: Friday, May 22, 2015 Sheet 30 of 53
A B C D E
5 4 3 2 1

USB3.0 Redriver for 3D CAMERA(UB3) 5/7 NC USB3.0 redriver relevant schematic

31
D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
USB3.0 Redriver
Date: Friday, May 22, 2015 Sheet 31 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

TO LED DB
Charger LED (UIF)
32
CN15
BAT_LED_W# +5V_ALW
BAT_LED_W# 1
BAT_LED_AMBER# BAT_LED_AMBER# 2
3

6
Q34B
D 2 4 D
35 BAT_LED_W 5
6

3
2N7002KDW Q34A

1
5 7
BAT_LED_AMBER 35 8
2N7002KDW

4
50521-00641-V01
50521-00641-v01-6p-l

3
Q29A
5 Part Number = DFFC06FR071
12 SATA_LED#
2N7002KDW

4
Fingerprint(FPD)
6

Q29B 5/11 Changed LED conn from 4 pin to 6 pin


2
35 SATA_PWR_EN#
5/8 Modified connector pin define
2N7002KDW
1

+3.3V_RUN
CN14

USBP5+_R_FT 6 8
USBP5-_R_FT 5 7
4
C403 3
2
0.1U/16V_4 1

6916K-Q06N-08L
R209 0_4 Part Number = DFFC06FR162
C C

EL6
3 4 USBP5+_R_FT
To Small Board Codec BEEP function (ADO) 12
12
USBP5+
USBP5- *DLP11SN900HL2L_NC
2 1 USBP5-_R_FT

R208 0_4
+1.8V_HDA_CODEC

R211
10K_4
TO DB Connector
PCBEEP Part Number = DFHS40FS036
CN11 GS12401-1011P-7H

R212 1K_4 gs12401-1011-40p-r-nh-smt


PCH

41
11,14 ACZ_SPKR
3 LED / USB
2N7002W +5V_ALW 1
R210 1K_4 2
EC 35 BEEP Q10 2
3
1

4
Codec SPK +5V_RUN 5
6
7
8
B
Codec IC / CR +3.3V_RUN 9 B
10 42
+1.8V_HDA_CODEC 11
12
14 ACZ_RST#_AUDIO 13
14 ACZ_SYNC_AUDIO 14
14 ACZ_SDIN0 15
To Audio Codec 14 ACZ_SDOUT_AUDIO
PCBEEP 16
SATA HDD Connector 20pin(HDD) 14 BIT_CLK_AUDIO
17
18
35 NB_MUTE# 19
CN12 20
12 USB_OC1# 21
29,35 USB_2.0_EN# 22
0.01U/16V_4 C602 SATA_TXP0_C 20 24 23
12 SATA_TXP0 GND1 GND12 26 DMIC_CLK 24 43
19 23
RXP GND11 26 DMIC_DATA 25
0.01U/16V_4 C601 SATA_TXN0_C 18 22
12 SATA_TXN0 RXN GND10 26
17 21
0.01U/16V_4 C603 SATA_RXN0_C 16 GND2 GND9 12 USBP3- 27
12 SATA_RXN0 TXN 12 USBP3+ 28
15
0.01U/16V_4 C604 SATA_RXP0_C 14 TXP 29
12 SATA_RXP0 GND3 12 USB30_TX3- 30
12 USB30_TX3+ 31
13
Combo USB3.0 for Small Board 32
3.3V_0 12 USB30_RX3- 33
12
3.3V_1 12 USB30_RX3+ 34
11
10 3.3V_2 35
9 GND4 12 USBP4- 36
+5V_RUN 8 GND5 12 USBP4+ 37
7 GND6 CardReader 38
+5V_RUN 5V_0 36 POWER_SW_IN0# 39
6 Power Button
5V_1 35 BREATH_LED 40
C418 *10U/6.3V_6_NC 5

44
A 4 5V_2 A
C419 4.7U/10V_6 0_4 R213 DEVSLP0_R 3 GND7
12 DEVSLP0 RSVD
2
C420 4.7U/10V_6 1 GND8
NC
C407 0.1U/16V_4

CVS520EM1RB-NH
gs12201-1011-9f-20p-l-smt Quanta Computer Inc.
Part Number = DFHS20FS073
PROJECT : AM8
Size Document Number Rev
4/30 DVT1 use DFHS20FS073 1A
DB/LED/SATA/FP CONN
Date: Friday, May 22, 2015 Sheet 32 of 53

Vinafix.com
5 4 3 2 1
5 4 3 2 1

MY1 C323 1 2 100P/50V_4


Keyboard Connector(KBC) +5V_RUN Vi(on_max)= -1.7V MY2 C322 1 2 100P/50V_4

33
Vi(off_min)=-0.5 MY4 C328 1 2 100P/50V_4
Part Number = DFFC30FR166 MY0 C321 1 2 100P/50V_4
MY[0..16] 51643-03001-V01
35 MY[0..16]

1
51643-03001-v01-30p-l MX4 C312 1 2 100P/50V_4
Q18 MX6 C335 1 2 100P/50V_4
LTA014YUBFS8TL CN1 MX3 C331 1 2 100P/50V_4
MX[0..7] 47K
MX2 C334 1 2 100P/50V_4
35 MX[0..7]
2
10K MY5 C329 1 2 100P/50V_4
MY6 C326 1 2 100P/50V_4

31
D MY3 C324 1 2 100P/50V_4 D
1

3
MY7 C327 1 2 100P/50V_4

3
CAP_LED 2 2
35 CAP_LED 3
1 2 CAP_LED_L MY8 C325 1 2 100P/50V_4
Q17 330_4 R111 MY10 4 MY9 C315 1 2 100P/50V_4
High Active

1
2N7002W MY11 5 MY10 C313 1 2 100P/50V_4
MY9 6 MY11 C314 1 2 100P/50V_4
MY14 7
MY13 8 MX7 C311 1 2 100P/50V_4
MY15 9 MX0 C330 1 2 100P/50V_4
MY16 10 MX5 C333 1 2 100P/50V_4
MY12 11 MX1 C332 1 2 100P/50V_4
MY0 12
MY2 13 MY12 C320 1 2 100P/50V_4
MY1 14 MY13 C317 1 2 100P/50V_4
4.85mA MY3 15 MY14 C316 1 2 100P/50V_4
MY8 16 MY15 C318 1 2 100P/50V_4
MY6 17 MY16 C319 1 2 100P/50V_4
MY7 18
MY4 19
MY5 20
MX0 21
MX3 22
MX1 23
MX5 24
MX2
MX4
MX6
25
26
27
Key board illumination(KBL) 4/23 changed KB BL connector P/N to DFFC04FR126

MX7 28
C KB_DET# 29 +5V_RUN C
14 KB_DET# 30 Max Current : 500mA

32
+5V_RUN +KB_LED Part Number = DFFC04FR126
1206L050YR
1 2 51575-00401-V01
FS1 1206 +KB_LED 51575-00401-v01-4p-l

Touch Pad Connector(TPD) +KB_LED power trace width >10 mil


R217 100K_4 1
1
J1

KB_LED_DET 1 2 KB_LED_DET_R 2
+3.3V_TP 14 KB_LED_DET 2
3
3

1
LED_PW M 4
R198 4.7K_4 TPDATA +3.3V_RUN 4
R199 4.7K_4 TPCLK Q35 R216
2N7002K 200K_4
R194 4.7K_4 I2C0_PCH_DAT_CN 25 mils C421

2
R202 4.7K_4 I2C0_PCH_CLK_CN 5 LED_PW M 3 1
Q9A 0.1U/16V_4
+3.3V_TP 3 4
5/6 Stuffed R194 and R202 I2C0_PCH_DAT 14
2N7002KDW

2
KB_BACKLITE_EN
+3.3V_RUN 35 KB_BACKLITE_EN

+3.3V_TP C387 0.1U/16V_4


CN13
2

1 I2C0_PCH_DAT_CN Q9B
2 I2C0_PCH_CLK_CN 2N7002KDW 6 1
B 3 I2C0_PCH_CLK 14 B
4 TP_INTR#
5 TP_DIS#
Imax=35mA
6 TP_DIS# 35
TPDATA-1 0_4 R206
7 TPDATA 35 +3.3V_SUS +3.3V_TP
TPCLK-1 0_4 R207 TPCLK 35
8 +15V_ALW

196047-08021-3
88513-0801-8p-l
Part Number = DFFC08FR027 C401 C402
10P/50V_4 10P/50V_4

1
3 4
R188
100K_4 Q8A

5
2N7002KDW C374

TP_PW R_EN 0.1U/16V_4

6
Q8B
2 C377
D3 35 TP_PW R_EN#
2 1 TP_INTR# 2N7002KDW 0.1U/16V_4
2 PCH_TP_INTR#

1
SDM10K45-7-F
35 TP_INTR#
A A

Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
KB/KB BL/TP
Date: Friday, May 22, 2015 Sheet 33 of 53
5 4 3 2 1
5 4 3 2 1

For Skylake 8M+4M Byte


RTC BATTERY
For EC 64Mbit (8M Byte) +3.3V_ALW +RTC_CELL +3VPCU +5V_ALW 2
34

2
RTCR4
D 10K/F_4 D
R190 R191
1K_4 1K_4

1
3
Q1 2
MMST3904-7-F
35 EC_SPI_FDIO3
35 EC_SPI_FDIO2

2
RTCD1 RTCR1
2 24.3K/F_4
U25
1 8 3 RTCBT1
35 EC_SPI_CS#

1
6 CE# VDD RTCR2 1K_4 RTCR3 249/F_4
35 EC_SPI_SLK SCK
5 1 +RTC_2 1 2 +RTC_1 1 2 2 1
35 EC_SPI_DIN SI

1
2 7
35 EC_SPI_DO SO HOLD# C378 BAT54CW RTC_SOCKET/2032
3 4 0.1U/16V_4

2
WP# VSS

From EC External Serial Flash Interface W 25Q64FVSSIQ

1
C426
1U/6.3V_4

2
RTC1
C C

RTC-BATTERY

5*[24.3/(24.3+10)]-0.8=2.74V
RTC Battery Charger when lower than 2.74V

For PCH 32Mbit (4M Byte) +3.3V_SUS

B R174 R178 B
R180 *0_4_NC 1K_4 1K_4
35 EC_SPI_IO3
R181 *0_4_NC
35 EC_SPI_IO2

R179 33_4 PCH_SPI_IO3_R


10 PCH_SPI_IO3
R175 33_4 PCH_SPI_IO2_R
10 PCH_SPI_IO2

U23
R173 0_4 PCH_SPI_CS#_R 1 8
10 PCH_SPI_CS0# CE# VDD
R183 33_4 PCH_SPI_CLK_R 6
10 PCH_SPI_CLK SCK
R186 33_4 PCH_SPI_SI_R 5
10 PCH_SPI_SI SI

1
R182 33_4 PCH_SPI_SO_R 2 7
10 PCH_SPI_SO SO HOLD# C375
3 4 0.1U/16V_4

2
WP# VSS
W 25Q32FVSSIQ

10 PCH_SPI_CS1#

R441 0_4
35 HSPI_EC_SPI_CS0#
To EC Slave Interface R177 33_4
35 HSPI_EC_SPI_SO
R184 33_4
35 HSPI_EC_SPI_CLK
R187 33_4
A 35 HSPI_EC_SPI_SI A

Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
FLASH / RTC
Date: Friday, May 22, 2015 Sheet 34 of 53
5 4 3 2 1
5 4 3 2 1
Place these caps close to ITE8528.
+3.3V_ALW +3.3V_EC +3.3V_EC

35
R384 0_6 C564 1 2 *0.1U/16V_4_NC
+RTC_CELL
C565 1 2 C597 1U/6.3V_4
*0.1U/16V_4_NC +3.3V_ALW_AVCC
NB_MUTE# 32
C596 1 2 0.1U/16V_4
ALW_ON 36,41
C542 1 2 0.1U/16V_4
EC_PWROK 4,37
C592 1 2 0.1U/16V_4 C589 1 2 0.1U/16V_4
SIO_SLP_S4# 4,45
DGPU_PROCHOT_EC#
+3.3V_EC DGPU_PROCHOT_EC# 21
HSPI_EC_SPI_SI 34 +3.3V_ALW
+3.3V_RUN HSPI_EC_SPI_SO 34
HSPI_EC_SPI_CLK 34
D HSPI_EC_SPI_CS0# 34 D
U20 RP6 4.7KX2
CLKRUN# 10
IT8528E/FX SMBDAT0 1 2
SMBCLK0 3 4

114
121

127
EC46 2 1 *22P/50V_4_NC R427 *0_4_NC

11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
3
10 110 SMBCLK0 SMBDAT1 1 2

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

L80HLAT/BAO/GPE0
L80LLAT/GPE7

HMOSI/GPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/GPH3/ID3
CLKRUN#/GPH0/ID0
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
VCC

AVCC
10,30 LAD0 LAD0/GPM0(3) SMCLK0/GPB3 SMBCLK0 39,40
9 111 SMBDAT0 SMBCLK1 3 4
10,30 LAD1
8 LAD1/GPM1(3) SMDAT0/GPB4 115 SMBCLK1
SMBDAT0 39,40 Charge ,BAT RP5 2.2KX2
10,30 LAD2 LAD2/GPM2(3) SM BUS SMCLK1/GPC1 SMBCLK1 10
7 116 SMBDAT1
10,30 LAD3
22 LAD3/GPM3(3) SMDAT1/GPC2 117 PECI_EC_R SMBDAT1 10 R443
PCH 43_4
4,18,28,30 PLTRST# 13 LPCRST#/GPD2 PECI/SMCLK2/GPF6(3) 118 EC_PECI 2
SIO_SLP_S5# LID_SW# R428 10K_4
10 CLK_24M_KBC LPCCLK/GPM4(3) SMDAT2/GPF7(3) SIO_SLP_S5# 4,45
6
10,30 LFRAME# LFRAME#/GPM5(3) +3.3V_RUN
85
PS2CLK0/TMB0/CEC/GPF0 PCH_MELOCK 11
17 86 H_PROCHOT_EC RP4 4.7KX2
28 LAN_PWR_EN_EC LPCPD#/GPE6 PS2DAT0/TMB1/GPF1 89 SMBDAT3 1 2
126 PS2CLK2/GPF4 90 TPCLK 33 3 4
26 LCD_TST R440 0_4 LCD_TST_R SMBCLK3
GA20/GPB5(3) PS2DAT2/GPF5 TPDATA 33

PS/2
5
10 SERIRQ SERIRQ/GPM6(3)
D13 2 1 SDM10K45-7-F SMC_EXTSMI_N_C 15
12 SIO_EXT_SMI# ECSMI#/GPD4(3)
D10 2 1 SDM10K45-7-F SIO_EXT_SCI#_C 23 LPC
12 SIO_EXT_SCI# ECSCI#/GPD3
WRST# 14 GPIO SUS_ON R355 2 1 *100K_4_NC
D15 2 1 SDM10K45-7-F SIO_RCIN#_C 4 WRST#
10 EC_RCIN# KBRST#/GPB6(3)
16
28 LAN_EC_WAKE# PWUREQ#/BBO/SMCLK2ALT/GPC7(3)
24
PWM0/GPA0 25
BREATH_LED 32 0319 Modified THERM_STP# schematic

47
39
RUN_ON
PS_ID
119
123 CRX0/GPC0
CTX0/TMA0/GPB2(3) CIR
IT8528 PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
28
29
30
FAN1_PWM
IMVP_PWRGD
LCD_PWM_EC
37

KB_BACKLITE_EN
42
26
33
+3.3V_ALW
+3VPCU
31
USB_BACK_EN 29

2
PWM5/GPA5

2
C
PWM C
80 R423
4 RSMRST# DAC4/DCD0#/GPJ4(3)
104 47 100K_4 R436
34 EC_SPI_FDIO3 FDIO3/DSR0#/GPG6 TACH0A/GPD6(3) IMVP_VR_ON 42
USB_2.0_EN# 33 48 100K_4
29,32 USB_2.0_EN# FAN1_TACH 37

1
LID_SW# 88 GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7(3) WRST#

1
D12 2 1
SDM10K45-7-F SIO_PWRBTN#_C 81 PS2DAT1/RTS0#/GPF3 120
4 SIO_PWRBTN# DAC5/RIG0#/GPJ5(3) TMRI0/GPC4(3) eDP_BL_EN 2,26

3
TP_INTR# 87 124
33 TP_INTR# PS2CLK1/DTR0#/GPF2 TMRI1/GPC6(3) SIO_SLP_S3# 4,45,47
109 Q27A 5
4,16,38 HWPG TXD/SOUT0/GPB1
108 2N7002KDW
26 TPSCR_EN

6
RXD/SIN0/GPB0

4
BID1 71 125 Q27B 2 THERM_STP#
ADC5/DCD1#/GPI5(3) PWRSW/GPE4(3) SYS_PWR_SW# 36 THERM_STP# 37,38
IADP 72 UART port 18 C579 2N7002KDW
40 IADP ADC6/DSR1#/GPI6(3) RI1#/GPD0(3) PBAT_PRES# 39,40
73 21 2 1 1U/6.3V_4
37 T_POWER ACAV_IN 36,39,40

1
35 ADC7/CTS1#/GPI7(3) RI2#/GPD1 SDM10K45-7-F D11
26 LCD_BAK RTS1#/GPE5 WAKE UP
34
32 BEEP 107 PWM7/RIG1#/GPA7 112
34 EC_SPI_FDIO2 FDIO2/DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 AC_PRESENT 4
SMBDAT3 95
21,37 SMBDAT3 CTX1/SOUT1/GPH2/SMDAT3/ID2
SMBCLK3 94
Thermal, ALS 21,37 SMBCLK3 CRX1/SIN1/SMCLK3/GPH1/ID1
105
34 EC_SPI_SLK 101 FSCK
34 EC_SPI_CS# FSCE#
102 EXTERNAL SERIAL FLASH
34 EC_SPI_DIN FMOSI
103 66 BID0
34 EC_SPI_DO FMISO ADC0/GPI0(3) 67
ADC1/GPI1(3) USB_CHG_DET_EC# 36
MY16 56 68
57 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) 69 SUSWARN#_EC 4
4 SYS_PWROK KSO17/SMISO/GPC5(3) ADC3/GPI3(3) SATA_PWR_EN# 32
BAT_LED_AMBER 32 70 Board ID Straps
32 BAT_LED_AMBER PWM6/SSCK/GPA6 ADC4/GPI4(3)
SUS_ON 100 A/D D/A
44,46,47 SUS_ON SSCE0#/GPG2 +3.3V_ALW +3.3V_ALW
106 SPI ENABLE
29 USBP0_BUS_SW_CB0 SSCE1#/GPG0(Up) 76 CAP_LED 33
TACH2/HDIO2/GPJ0(3) EC_SPI_IO2 34
MY0 36 77
EC_SPI_IO3 34

2
B MY1 37 KSO0/PD0 HDIO3/GPJ1(3) 78 B
MY2 38 KSO1/PD1 DAC2/TACH0B/GPJ2(3) 79
EC_RTC_RST 13 5/8 modified resistor for board ID
KSO2/PD2 DAC3/TACH1B/GPJ3(3) TP_DIS# 33
MY3 39 R373 R387
MY4 40 KSO3/PD3 24.3K/F_4 45.3K/F_4
KSO4/PD4 KBMX
MY5 41 5/12 Added 10K pull low for battery LED issue

1
MY6 42 KSO5/PD5 BID0
33 MY[0..16] KSO6/PD6
MY7 43 BID1
MY8 44 KSO7/PD7 R453 1 2 10K_4
33 MX[0..7] 45 KSO8/ACK#
MY9 100K/F_4: CS41002FB28
MY10 46 KSO9/BUSY
KSO10/PE
45.3K/F_4: CS34532FB18
MY11 51 2 BAT_LED_W R376 R386 24.3K/F_4: CS32432FB19
BAT_LED_W 32
KSI3/SLIN#

KSO11/ERR# CK32KE/GPJ7(3)
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 CLOCK 128 TP_PWR_EN# 20K/F_4 20K/F_4 12K/F_4 : CS31202FB15


KSO12/SLCT CK32K/GPJ6(3) TP_PWR_EN# 33
MY13 53
VCORE

KSO13 6.49K/F_4: CS26492FB23


AVSS

MY14 54 R438 1 2 100K_4 1.65K/F_4: CS21652FB29


KSI4
KSI5
KSI6
KSI7

VSS

VSS
VSS
VSS
VSS
VSS

MY15 55 KSO14
KSO15
It is necessary to connect this pin to the ground
if “Crystal-Free” feature is activated and GPJ6 is
58
59
60
61
62
63
64
65

27
49
91
113
122

75

12

BD0
not configured as GPI/GPO. 000 0.5V PU 100K SKYLAKE UMA
LID 001 1.0V PU 45.3K SKYLAKE DIS S.R
2

C583 010 1.5V PU 24.3K SKYLAKE DIS D.R


0.1U/16V_4 100 2.0V PU 12K
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

101 2.5V PU 6.49K


1

110 3.0V PU 1.65K


+3.3V_ALW 111 0V NO PU
LID_SW#
+3.3V_EC L8 BD1
FCM1005KF-121T05_500mA PROCHOT# 000 0.5V PU 100K EVT (X00)
2 1 +3.3V_ALW_AVCC 001 1.0V PU 45.3K DVT1 (X01)
H_PROCHOT# 2,40,41,42
1

010 1.5V PU 24.3K DVT2 (X02)


2

HE1 C404 C571 100 2.0V PU 12K Pilot Build (A00)


OUT
VDD

A 0.1U/16V_4 L9 0.1U/16V_4 101 2.5V PU 6.49K A


C406 FCM1005KF-121T05_500mA 110 3.0V PU 1.65K
VSS

1U/6.3V_4 2 1 AVSS_EC C590 111 0V NO PU


3

2N7002W 47P/50V_4
APX9132H AI-TRG H_PROCHOT_EC 2
3

Q26
1

R425
*100K_4_NC
Quanta Computer Inc.
PROJECT : AM8
Size Document Number Rev
1A
SIO (ITE8528H)
Vinafix.com
Date: Friday, May 22, 2015 Sheet 35 of 53
5 4 3 2 1
A B C D E

3VALW ON POWER LOGIC(FSW)


+3.3V_ALW +3VPCU
36

2
R192
4 10K_4 4

2
R444 R445

POWER BUTTON SYS_PWR_SW# 35


100K_4 100K_4

1
1
BAT54CW
from IO board 2 C379
0.1U/16V_4

2
POWER_SW_IN0# 3
32 POWER_SW_IN0# 3.3V_ALW_ON 38
1

1
D2 C617

3
*0.1U/16V_4_NC

2
LATCH 5 Q32A
2N7002KDW 5/18 Reserved 0.1uF to ground

4
1
C598
*0.1U/16V_4_NC

6
2 Q32B
35,41 ALW_ON
2N7002KDW
3 3

1
3

1
2 2N7002W C618
35,39,40 ACAV_IN Q31 100P/50V_4
Stitching Capacitors

2
1
5/18 Added 100pF to ground
+3.3V_ALW +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +PWR_SRC +3.3V_ALW
2

1
R382
100K_4 C384 C382 C424 C423 C422 C425 C380
*0.1U/25V_4_NC 0.1U/25V_4 *0.1U/25V_4_NC *0.1U/25V_4_NC 0.1U/25V_4 0.1U/25V_4 0.1U/16V_4

2
1

BAT54CW
2
USB_CHG_DET_EC# 35
3
29 USB_CHG_DET#
1 LATCH

D9

2 2

HOLE(OTH)
HOLE12 HOLE11 HOLE8 HOLE9 HOLE1 PAD1
*H-C98D98N_NC *H-O98X130D98X130N_NC *h-c197d110p2_NC *h-c197d110p2_NC *h-c158d110p2_NC *spad-c197np_NC
1

stand off
HOLE4 HOLE6 HOLE5 HOLE3 HOLE10 HOLE2 HOLE7 HOLE13
*h-tc236bc197d142p2_NC *Hh-tc236bc197d154p2_NC *h-tc236bc197d154p2_NC *h-tc236bc197d161x142p2_NC *H-C150D150N_NC *h-tc197bc154d154pt_NC *h-tc197bc154d154pt_NC H-TC189BC142D142P2

1 1
1

Quanta Computer Inc.


Vinafix.com PROJECT : AM8
Size Document Number Rev
3VALW ON POWER LOGIC/Hole 1A
Date: Friday, May 22, 2015 Sheet 36 of 53
A B C D E
1 2 3 4 5 6 7 8

FAN CONN(THM)
37
A A

+5V_RUN
Max Current : 500mA
0213 FAN connector used DFHD04MR237
+5V_RUN

C383 4.7U/10V_6

C381 0.1U/16V_4

50278-00401-001
35 FAN1_PW M 1
35 FAN1_TACH 2
3
4
R189 10K_4 5
+3.3V_RUN 6

B FAN1 B

THERMAL IC(THM)
SYS_SHD#
OTP 85 degree C 2K 7.5K 10.5K 14K 18.7K
ALERT#
+V3.3_THERMAL R447 18.7K/F_4 THERM_ALERT#

+V3.3_THERMAL R437 2K/F_4 SYS_SHDN# 2K 77'C 87'C 97'C 107'C 117'C

Need closed to CPU OTP 85 degree : R22= 18.7K, R23 = 2K


7.5K 79'C 89'C 99'C 109'C 119'C

Place under CPU 10/20mils


C
10.5K 81'C 91'C 101'C 111'C 121'C C
REM_DIODE1_P

C600 C599 U22


3

1 8 SMBCLK3 14K 83'C 93'C 103'C 113'C 123'C


VDD SCL SMBCLK3 21,35
Q5 2 *2200P/50V_4_NC 2200P/50V_4
MMST3904-7-F 2 7 SMBDAT3
2

DP SDA SMBDAT3 21,35


1

50 REM_DIODE1_N 50 3 6 THERM_ALERT# 18.7K 85'C 95'C 105'C 115'C 125'C


DN ALERT#
4 5
NCT7718
SYS_SHDN# GND
SMBus address is 1001100xb (98h) (x is R/W bit).
NCT7718W
1

C595 +V3.3_THERMAL
0.1U/16V_4 SYS_SHDN# Max Current :mA
2

+3.3V_ALW

+V3.3_THERMAL
+3.3V_RUN

1
Q30 R439
2N7002W RT1
10K/NTC/TSM0B103J4252RE_4 2 1
*SJ0402_NC
1 3
THERM_STP# 35,38

2
T_POW ER
35 T_POW ER
2

D D

1
R396
4,35 EC_PW ROK 1.5K/F_4
2

Quanta Computer Inc.


2

R442
47K_4
PROJECT : AM8
Vinafix.com
1

Size Document Number Rev


1A
FAN & THERMAL
Date: Friday, May 22, 2015 Sheet 37 of 53
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

System Reset Circuit

+3.3V_RUN

A A
R365 0_4
R366
44 1.0V_SUS_PWRGD
10K_4

R367 0_4
45 DDR_PWRGD HWPG 4,16,35

1
C543
100P/50V_4

2
B B

+1.0V_RUN +5V_ALW
1

R320 R282
15K/F_4 100K_4 R422 0_4
THERM_STP# 35,37
2

HWPG R446 0_4


41 +3.3V_EN2 3.3V_ALW_ON 36
3

R448 0_4
DGPU_OVT# 21
+1.0V_PWRGD_G2 2 Q12
2N7002K R302
100K_4
3

C C
+1.0V_PWRGD_G1 2 Q13
1

METR3904-G
1

C500 R315
0.1U/16V_4 100K_4

For +1.0V Power Good

D D

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
System Reset Circuit
Date: Friday, May 22, 2015 Sheet 38 of 53
1 2 3 4 5 6 7 8

Vinafix.com
A B C D E

EC53 +VCHGR
4700P/50V_4
1 2

PC252
0.1U/25V_4
1 2

PC251
1000P/50V_4
1 2 +DC_IN_SS +DC_IN
+DCIN_JACK
PC250
1 2200P/50V_4 1
1 2
+3.3V_ALW

JBAT1

1
2 B9

1
EC47 EC49 EC51 EC54
1 A9 PR126 EC50 EC52 EC48 4700P/50V_4 0.1U/25V_4 1000P/50V_4 *10P/50V_4_NC

2
B8
10K_4 0.01U/50V_4 4700P/50V_4 68P/50V_4

2
A8 SMBCLK0_B PR116 1 2 100_4 SMBCLK0
B7 SMBCLK0 35,40

2
A7 SMBDAT0_B PR120 1 2 100_4 SMBDAT0
B6 SMBDAT0 35,40
A6 PR127 1 2 100_4
B5 PBAT_PRES# 35,40
A5
B4
A4
B3
A3
Reserve for EMI Solution Reserve for EMI Solution
B2 ESD3
A2 PBAT_PRES# 1 6 SMBCLK0
B1 2 1 6 5
A1 2 5 +3.3V_ALW
3 4 SMBDAT0
51202-00901-V01 3 4
DFHD09MR104 *TVL ST23 04 AD0_NC
gs73091-10272-7h-9p-luv_ab

2 0213 Battery connector used DFHD09MR104 +DC_IN 2

FL2
MHC2012S800UBP(80,5A)
1 2
1

1
+5V_ALW 2
PC239 PC245 PC242 PC254 PR216 PR218
2200P/50V_4 1000P/50V_4 0.1U/25V_4 0.1U/25V_4 6.8K_4 6.8K_4
2

2
1
PR213
100K_4

3
5 PQ28A
2N7002KDW

4
6
ACAV_IN 2 PQ28B
35,36,40 ACAV_IN
2N7002KDW

1
3 3

+5V_ALW 2
1 +3.3V_ALW

1
PR95
CN9 2.2K_4

5 +DCIN_JACK
Adapter2+
PQ9 PD1 2
3

4 FL1 FDV301N_G PR90 DA204UGT106


Adapter1+ BLM15AG102SN1D(1000,200MA) 33_4
3 DOCK_PSID 1 2 3 1 1 2 PS_ID 35
PSID
1

2 PR89
Adapter2- PR77 10K_4
2

1 100K_4 2 1 +5V_ALW 2
Adapter1-
3
2
1

50278-0050N-001 2 PQ11
4
PC115 MMST3904-7-F 4
1

100P/50V_4
2

PR76
15K_4
2

0225 DC IN connector used DFHD05MS074 Quanta Computer Inc.


PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
DCin & Bat
Date: Friday, May 22, 2015 Sheet 39 of 53
A B C D E
A B C D E

Reverse Input Voltage Protection

3
PR210
*1M/F_4_NC
2

PQ26
1 PR212 *LU1L002SNFS8_NC 1
*1M/F_4_NC

1
+DC_IN PQ29 +DC_IN_SS PQ30
RQ3E070BNFU7TB RQ3E070BNFU7TB PR219
PR217 0.01_PJ
8 3 3 8 0.01_0612
7 2 2 7 1 2 1 2 +VCHGR_IN
6 1 1 6 1P 1 2 2P
5 5 1P 2P
1

1
4

1
PR215 PC253 PC243 EC57 EC55 PC259 PC262 EC56 PC257 PC256
*2.2_12_NC 1000P/50V_4 0.047U/25V_4 PC247 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 4700P/50V_4 *10U/25V_8_NC *10U/25V_8_NC
2

2
1U/25V_6
2

2
Reserve by FAE suggest
1

1
PC246 REGN_LDO PC126
*2.2U/25V_4_NC 1 PR92 0.1U/25V_4
2

4.02K/F_4 1 2
PR88

2
1

1
VCHGR_DH

VCHGR_ACP

VCHGR_ACN
4.02K/F_4 TP36
PC124 PC128
2

PR207 1U/25V_4 0.1U/25V_4 TP42 VCHGR_DL

2
10K/F_4
2

2 2
35,36,39 ACAV_IN
REGN_LDO
+VCHGR +PWR_SRC
1

PU5 PC133

1
BQ24777RUYR 1U/10V_6
PR204 REGN_LDO 1 2

ACP

ACN
2

12.4K/F_4
PD5
2

5
6
7
8

5
6
7
8
+DC_IN 1SS355 VCHGR_CMSRC 3 24
CMSRC REGN PC132 + PC255
PR101
PD4 PR211 0.047U/25V_4 4 PQ33 4 PQ32 *15U/25V/E100_3528_NC +VCHGR
0_6
1

1SS355 10_12 VCHGR_ACDRV 4 25 VCHGR_BST 1 2 1 2 RQ3E070BNFU7TB RQ3E070BNFU7TB


2 1 1 2 ACDRV BTST PQ31
PL11 PR221 AON6413

1
2
3

1
2
3
5 26 VCHGR_DH 2.2UH+-20%12A(MMD-10DZ-2R2M-X2Q) 0.01_0612 1
1

PC130 ACOK HIDRV 1 2 1 2 2 5


1U/25V_6 1P 1 2 2P 3
PR82 1 2 VCHGR_VCC 28 27 1P 2P

1
220K/F_4 VCC PHASE

5
PC152
2

4
1

1
VCHGR_ACDET 6 23 VCHGR_DL D 2200P/50V_4

1 2
ACDET LODRV PQ34 PC260 PC263 EC58 EC59
G
PR79 0_4 4 RS1E200BNFU7TB 10U/25V_8 10U/25V_8 0.1U/25V_6 4700P/50V_4

1
1 2 SMBDAT0_P 11 22 S PR124 PC125
1

35,39 SMBDAT0 SDA GND 0.1U/25V_4 PC266 PC273


2.2_8

1
1
2
3
1

PR78 0_4 1 2 10U/25V_8 10U/25V_8 SJ7

2
PC117 PR83 1 2 SMBCLK0_P 12 20 VCHGR_SRP *SJ0603_NC

1
0.01U/50V_4 35.7K/F_4 35,39 SMBCLK0 SCL SRP
2

2
PC127 PC123
2

PR208 100K_4 19 VCHGR_SRN 0.1U/25V_4 0.1U/25V_4

2
1 2 VCHGR_CELL 16 SRN
3 CELL : 3S1P, 2S2P REGN_LDO CELL PR91 3
18 1 2
BATDRV#
PR201 0_4 0_4
1 2 VCHGR_PROC# 10
2,35,41,42 H_PROCHOT# PROCHOT#
PR85
PR203 0_4 10_6
1 2 VCHGR_IADP 7 17 1 2
35 IADP IADP BAT

1
PR81 0_4 PR84 0_4
1 2 VCHGR_IBAT 8 15 VCHGR_BATPRES# 1 2 PC122
IBAT BATPRES# PBAT_PRES# 35,39 1U/25V_4 REGN=5.4V

2
PR80 0_4 Fsw = 800KHz (Default)
1 2 VCHGR_PMON 9 14
42 PMON PMON CMPOUT
Place close to IC
1

PR103
PC230 PC116 PR75 100K/F_4 13
1 2 VCHGR_ILIM 21 CMPIN
100P/50V_4 100P/50V_4 *30K/F_4_NC REGN_LDO
2

ILIM
2

DVT1 4/24 38
1

GND
1

GND
GND
GND
GND
GND
GND
GND
GND
GND

PC129 PR98
0.01U/50V_4 13K/F_4
2

29
30
31
32
33
34
35
36
37

DVT1 5/19
4 4

R1

ILIM setting for discrete & UMA

Discrete config UMA config Quanta Computer Inc.


R1: 13K R1: 8.87K
PROJECT : AM8
Size Document Number Rev
P/N: CS31302FB19 P/N: CS28872FB08 1A
Charger (BQ24777)
Date: Friday, May 22, 2015 Sheet 40 of 53
A B C D E

Vinafix.com
5 4 3 2 1

+3VPCU

PC155
1U/6.3V_4
2 1
D D
PR125 PR130
30.9K/F_4 13K/F_4
TPS51225_FB1 1 2 TPS51225_VFB1 TPS51225_VFB2 1 2 TPS51225_FB2

1
PR222 PR121 PR132
0.01_PJ 20K/F_4 20K/F_4

1 2 +3/5V_ALW_PWR_SRC PR122 PR133 +3/5V_ALW_PWR_SRC

2
+PWR_SRC
47.5K/F_4 27.4K/F_4
1 2 1 2
5V_DH 3.3V_DH
TP38 TP41

1
5V_DL 3.3V_DL
TP37 TP43
PC153 PC264 EC39 EC38 EC40 EC37 PC265 PC154
10U/25V_8_H=1.8 10U/25V_8_H=1.8 0.1U/25V_6 2200P/50V_4 2200P/50V_4 0.1U/25V_6 10U/25V_8_H=1.8 10U/25V_8_H=1.8

2
1

5
CS1

VFB1

VREG3

VFB2

CS2
21
GPAD
22
+5V_ALW PR123 GPAD PR134 +3.3V_ALW
5 Volt +/- 5% 1
0_4
2 20 6 1
0_4
2
3.3 Volt +/- 5%
Fsw : 300K 35,36 ALW_ON EN1 EN2 +3.3V_EN2 38 Fsw : 355K
VCLK 19 7
TDC : 7.82A PQ36 PC148 PR118 VCLK PDDG PR135 PC165
TDC : 2.32A

8
7
6
5

5
6
7
8
AON7400AL 0.1U/25V_6 2.2_6 2.2_6 0.1U/25V_6
Peak : 11.2A 4
2 1 1 2 5V_BST 17
VBST1
PU7
VBST2
9 3.3V_BST 1 2 2 1
4
Peak : 3.32A
C TPS51275CRUKR PQ38 C
OCP : 14A PR109 5V_DH 16 10 3.3V_DH RQ3E070BNFU7TB PR113 OCP : 4.5A
0.01_PJ PL9 DRVH1 DRVH2 PL10 0.01_PJ
2.2UH20%14A(PCMC063T-2R2MN) 4.7U20%5.5A(PCMC063T-4R7MN)

3
2
1

1
2
3
1 2 +5V_ALW_P 5V_LX 18 8 3.3V_LX +3.3V_ALW_P 1 2
+5V_ALW SW1 SW2 +3.3V_ALW

1
8
7
6
5

5
6
7
8
PC157 25 23 PC163

VREG5
DRVL1

DRVL2
GPAD GPAD

1
*2200P/50V_4_NC *2200P/50V_4_NC

1 2

VO1

2
VIN

*SJ0201_NC
SJ8
4 5V_DL 26 24 3.3V_DL 4

1
GPAD GPAD
1

1
+ +

2
*SJ0201_NC
SJ4

*SJ0201_NC
SJ3

PC248 PC258 PQ37 PQ39 PC149 PC261


1

15

14

13

12

11
220U/6.3V/E25_7343 0.1U/16V_4 PR131 AON7754 RQ3E120ASFU7TB 0.1U/16V_4 150U/6.3V/E25_3528
2

3
2
1

1
2
3

2
2

*2.2_8_NC PR136
*2.2_8_NC

TPS51225_FB2
2

2
TPS51225_VO1

TPS51225_FB1

TPS51225_VO1
+PWR_SRC

+5V_ALW2

1
close to
PC156 PC160 output Cap
close to 1U/6.3V_4 0.1U/25V_6

2
output Cap

PR209
B B
1.5M_4
1 2
PC142
0.1U/25V_6 BAT54SW-7-F
2 1 2 PC147 +PWR_SRC +5V_ALW +5V_ALW
0.1U/25V_6
PD3 3 2 1

2 1 1

1
PC140 +3.3V_ALW
0.1U/25V_6 PC244 PC241 PR214

1
VCLK 0.01U/50V_4 100P/50V_4 100K_4

2
PR202
100K/F_4

2
BAT54SW-7-F
2 H_PROCHOT# 2,35,40,42
PC146
0.1U/25V_6 2

5
PD2 3 2 1 PQ27

3
1 2N7002W
1 + 4 2
+15V_ALW
3
- PU11

1
AZV331KTR-G1

2
2

1
PR108 PC139
*100K_4_NC 0.1U/25V_6 PR206 PC234 PC232 PC235 PC229
2

137K/F_4 100P/50V_4 0.01U/50V_4 100P/50V_4 0.01U/50V_4


2

2
A A
1

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
3V/5V (TPS51275CRUKR)
Date: Friday, May 22, 2015 Sheet 41 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

+VCCSTPLL

81206_CSN_1a_P 43 81206_CSP_1a_P 43

1
PC209
1000P/50V_4 Place close to PR61

1
1 2 VCC Choke 8.25K/F_4

1
PR55 PR177 PR57
100/F_4 *75/F_4_NC 45.3/F_4 PC105 PR171 PR152 PR62

2
0.1U/25V_4 56.2K/F_4 100K/F_4/NTC/B4250 15K/F_4

2
2 1 1 2 2 1

2
PC213 PR173 PC100
D 1500P/50V_4 2.49K/F_4 0.022U/25V_4 D
2 1 1 2 2 1
PR175
100/F_4 PC211 PC103 PR178
1 2 81206_VR_HOT# 15P/50V_4 8200P/25V_4 61.9K/F_4
2,35,40,41 H_PROCHOT# 2 1 2 1 2 1
PR54 10/F_4
1 2 81206_SDIO PC212 DVT1 4/29 PR179 PR149
5 VR_SVID_DATA 100P/50V_4 0_4 100K/F_4/NTC/B4250 Place close to
PR176 0_4 2 1 1 2 1 2 VCC MosFET
1 2 81206_ALERT#
5 VR_SVID_ALERT#
PR174 PC210
PR56 49.9/F_4 107K/F_4 0.1U/25V_4
1 2 81206_SCLK 1 2 1 2
5 VR_SVID_CLK
DVT1 4/29 R1 PR165
PC106 PR60 30.1K/F_4
1000P/50V_4 3.83K/F_4 81206_VR_HOT# 1 2
2 1 1 2 81206_SDIO
81206_ALERT# PR168 PMON setting for discrete & UMA
PR52 81206_SCLK 0_4
PR64 0_4 3.83K/F_4 1 2
1 2 1 2 PMON 40
5 VCC_SENSE Discrete config: 65W UMA config: 45W
PR36
1

1K/F_4
PC107 PR53 1 2 PC202 R1: 30.1K R1: 44.2K
+PWR_SRC
PR63 0_4 1000P/50V_4 0_4 1U/6.3V_4
P/N: CS33012FB18 P/N: CS34422FB00
2

1 2 1 2 PC88 1 2
5 VSS_SENSE
0.01U/50V_4
PC101 1 2 PR164
2200P/50V_4 2.2_6
2 1 1 2

PR38 0_4 PR41 0_4


1 2 1 2

81206_TSENSE_1ph
7 VCCGT_SENSE

81206_CSN_1a_P
+5V_ALW

81206_COMP_1a
1

81206_IOUT_1a

81206_CSP_1a
81206_ILIM_1a
PC91 PR39 PC204

81206_VRMP
DVT1 4/29

81206_PSYS

81206_VCC
C PR37 0_4 1000P/50V_4 1.13K/F_4 1U/6.3V_4 DVT1 4/24 C
2

1 2 1 2 1 2
7 VSSGT_SENSE
PC92
HG3 43
3300P/50V_4
2 1 PR50 PC97
0.22U/25V_6

38
37
36
35
34
30
31
32
33
27
50
12
13
0_6
PC95 1 2 2 1
1000P/50V_4

SCLK
ALERT#
SDIO
VR_HOT#
IOUT_1a
COMP_1a
ILIM_1a
CSN_1a
CSP_1a
TSENSE_1ph
PSYS
VRMP
VCC
2 1
SW3 43
PR43
LG3 43
PR46 0_4 2.61K/F_4
1 2 1 2 PR47 VCCSA ICCMAX
6 VCCSA_SENSE
11K/F_4
1

1 2
PC94 PR48 DVT1 4/29 18
PR45 0_4 1000P/50V_4 1K/F_4 PVCC 25
2

1 2 1 2 28 HG3 26 HG1 43
81206_VSP_1a
6 VSSSA_SENSE 29 VSP_1a BST3 24
81206_VSN_1a PR40 PC93
PC96 81206_VSP_2ph 51 VSN_1a SW3 23 0.22U/25V_6
VSP_2ph LG3/ICCMAX_1b 0_6
2200P/50V_4 81206_VSN_2ph 52 15 1 2 2 1
2 1 81206_VSP_1b 49 VSN_2ph PU4 HG1 14
81206_VSN_1b 48 VSP_1b NCP81206MNTXG BST1 16
1 2 0_4 41 VSN_1b SW1 17 SW1 43
PR59 81206_EN
35 IMVP_VR_ON 1 2 0_4 42 EN LG1/ROSC 21
PR58 81206_VR_RDY
35 IMVP_PWRGD 1 2 81206_CSN_1b_P 45 VR_RDY HG2 22 LG1 43
+3.3V_RUN CSN_1b BST2

DIFFOUT_2ph/ICCMAX_2ph
PR182 10K_4 81206_CSP_1b 44 20 PR42 ROSC setting
81206_IOUT_1b 43 CSP_1b SW2 19 14K/F_4
43 81206_CSP_1b_P 43 81206_CSN_1b_P 46 IOUT_1b LG2/ICCMAX_1a 40 1 2
81206_ILIM_1b
ILIM_1b PWM/ADDR_VBOOT
1

81206_COMP_1b 47 39
PR51 COMP_1b DRON
Place close to
8.25K/F_4 VCCSA Choke

CSCOMP_2ph

TSENSE_2ph
PR44 VCC ICCMAX

CSSUM_2ph

CSREF_2ph
COMP_2ph
PR49 PR153 22.6K/F_4

CSP1_2ph

CSP2_2ph
IOUT_2ph
2

ILIM_2ph
15K/F_4 100K/F_4/NTC/B4250 1 2

FB_2ph
2 1 1 2
PAD

PC98
B 81206_PWM 43 B
0.018U/16V_4 DVT1 4/29
53

1
81206_DIFFIOUT_2ph 2
3
4
5
81206_CSCOMP_2ph 6
7
10
8
9
81206_TSENSE_2ph 11
2 1 PR172 VBoot setting
51.1K/F_4
81206_CSSUM_2ph

81206_CSREF_2ph
PC99 1 2
81206_COMP_2ph

81206_CSP1_2ph

81206_CSP2_2ph
81206_IOUT_2ph

81206_ILIM_2ph

*0.018U/25V_4_NC
81206_FB_2ph

2 1
81206_DRON 43
PR167
61.9K/F_4
2 1

PC208 PR162 PR150 Place close to


100P/50V_4 0_4 100K/F_4/NTC/B4250 VCCGT MosFET
2 1 1 2 1 2

PR169 PC203
88.7K/F_4 PC201 0.1U/25V_4
1 2 470P/50V_4 1 2
2 1
PC207 DVT1 4/29 PR33 0_4
1000P/50V_4 PR163 1 2 PC200
+5V_ALW
2 1 29.4K/F_4 0.1U/25V_4
1 2 1 2
PR170 DVT1 4/24
33.2K/F_4
1 2

PR166 PC205 DVT1 4/29 PR29


1.5K/F_4 8200P/25V_4 1 2 VCCGT_SEN1P
2 1 2 1 VCCGT ICCMAX DVT1 4/29
1

48.7K/F_4 DVT1 4/29


PC206 PR32 PR35 PC84 PR31 PC86 PC89 PR30
1

15P/50V_4 100K/F_4 590/F_4 2200P/50V_4 4.75K/F_4 *180P/50V_4_NC 1000P/50V_4 75K/F_4


2

2 1 2 1 1 2 1 2 2 1 2 1 PR27
165K/F_4

PC85 PR28 PC90 PR34 PR151 PR160 PC199 PR161


2

470P/50V_4 49.9/F_4 15P/50V_4 14K/F_4 220K/NTC/B4500_4 4.87K/F_4 0.047U/25V_4 10/F_4


A 2 1 2 1 1 2 2 1 1 2 1 2 1 2 1 2 A
43 VCCGT_SEN1P VCCGT_SENxN 43
Place close to
VCCGT Choke

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
VCC_CORE (NCP81206)
Vinafix.com
Date: Friday, May 22, 2015 Sheet 42 of 53

5 4 3 2 1
5 4 3 2 1

PR146
0.01_PJ

+VCC_CORE_PWR_SRC 1 2
+PWR_SRC

1
EC1 EC2 PC12 PC172 PC6 + PC18
42 HG3
2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 10U/25V_8 *15U/25V/E100_3528_NC

2
Place Cap close
to input MLCC

D1 2

G1 1
+VCC_CORE

D1
D1

PQ21
D FDMS3660S
+VCC_CORE rail D
PL5 Fsw : 600KHz
S1/D2
0.15U20%,36A(PCME064T-R15MS0R667)
9 SW3 1 2 TDC : 17A
3 4 Peak : 21A
8 G2
5 S2

6 S2

7 S2

IccMax : 29A

1
*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC
VBoot : 0V

1
+

PC53

PC54

PC56

PC46

PC57

PC55

PC51

PC52
PC23
2200P/50V_4
PC47
22U/6.3V_6
PC48
22U/6.3V_6
PC44
22U/6.3V_6
PC45
22U/6.3V_6
PC50
22U/6.3V_6
PC49
22U/6.3V_6
PC184
330U/2V/E9_7343
R_DC_LL : 2.4(mV/A)

2
42 LG3 R_AC_LL : 2.4(mV/A)
2
1

DVT1 NC PC53,PC54,PC56,PC46,PC57,PC55,PC51,PC52 by EA result 4/30


PR9
2.2_8
81206_CSN_1a_P
81206_CSN_1a_P 42
2

81206_CSP_1a_P
42 SW3 81206_CSP_1a_P 42

PR148
0.01_PJ

+VCCGT_PWR_SRC 1 2
+PWR_SRC
+VccGT rail
Fsw : 600KHz
1

1
EC3 EC6 PC170 PC171 PC4 PC5 + PC176 TDC : 15A
2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 10U/25V_8 10U/25V_8 *15U/25V/E100_3528_NC
Peak : 18A
2

2
Place Cap close
42 HG1 to input MLCC IccMax : 31A
VBoot : 0V
C R_DC_LL : 3.1(mV/A) C

R_AC_LL : 3.1(mV/A)
D1 2

G1 1

D1 2

G1 1

+VCCGT
D1

D1
D1

D1

PQ1 PQ22
*FDMS3660S_NC FDMS3660S
PL6
S1/D2

S1/D2

0.15U20%,36A(PCME064T-R15MS0R667)
9 9 SW1 1 2

3 4
8 G2

8 G2
5 S2

6 S2

7 S2

5 S2

6 S2

7 S2

1
*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC
1

1
+
1

PC198

PC197

PC196

PC195

PC194

PC193

PC192

PC191

PC190

PC189

PC188
PC22 PC59 PC183
2200P/50V_4 22U/6.3V_6 330U/2V/E9_7343
2

2
42 LG1
2
1

PR8
2.2_8
VCCGT_SENxN
VCCGT_SENxN 42
2

VCCGT_SEN1P
42 SW1 VCCGT_SEN1P 42
+VCCGT
DVT1
1. Del PC69,PC70,PC71,PC72,PC73,PC74,PC75,PC76,PC77,PC78,PC79 for more TOP shape into CPU
2. NC PC188,PC189,PC190,PC191,PC192,PC193,PC194,PC195,PC196,PC197,PC198 by EA result 4/30
1

1
PC67 PC66 PC65 PC64 PC63 PC62 PC61 PC60 PC58
22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6
2

2
B FAE suggestion place 22uF*8 under CPU B

PR6
0.01_PJ

+VCCSA_PWR_SRC 1 2
+PWR_SRC
+VccSA rail
Fsw : 600KHz
1

PR147 EC43 EC44 PC8 PC7 + PC2 TDC : 4A


2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 *15U/25V/E100_3528_NC
0_6 Peak : 4A
2

1 2 Place Cap close


to input MLCC IccMax : 4.5A
VBoot : 1.05V
1

PC181 R_DC_LL : 10.3(mV/A)


5
6
7
8

0.1U/25V_6 +VCCSA
2

R_AC_LL : 10.3(mV/A)
1 8 81253_DRVH 4 PQ20
BST DRVH RQ3E070BNFU7TB
PL4
2 0.47UH 20% 26A(PCMC063T-R47MN) DVT1 NC PC32,PC28,PC40,PC41 by EA result 4/30
42 81206_PWM
1
2
3

PR12 0_4 PWM PU1 7 81253_SW 1 2


1 281253_EN 3 NCP81253 SW
42 81206_DRON EN
5
6
7
8

3 4
*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC

*22U/6.3V_6_NC
4 5 81253_DRVL 4 PQ23
GND

+5V_ALW
PAD

VCC DRVL
1

1
RQ3E120ASFU7TB PC16
PC32

PC28

PC40

PC41
2200P/50V_4 PC102 PC104 PC35 PC185 PC42
1

DVT1 4/24 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6 22U/6.3V_6


9
6

1
2
3

2
PC27
2.2U/6.3V_4
2

PR2 FAE suggestion place 22uF*3 under CPU


2.2_8
2

81206_CSN_1b_P
81206_CSN_1b_P 42
81206_CSP_1b_P
81206_CSP_1b_P 42
A A

Vinafix.com Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
VCC_CORE (NCP81206)
Date: Friday, May 22, 2015 Sheet 43 of 53
5 4 3 2 1
1 2 3 4 5

A A

PR1
PR4 0.01_PJ
0_4

2
+5V_ALW 1 2 1P0V_VCC +1.0V_SUS_PWR_SRC 1 2 +PWR_SRC
PR154
PC21 470K/F_4 +1.0V_SUS

1
1U/6.3V_4

1
2 1 EC5 EC4
0.1U/25V_6
PC178
10U/25V_8
PC13
10U/25V_8
PC177
*10U/25V_8_NC
1.0 Volt +/- 5%
Q1 2200P/50V_4
Fsw : 290K

2
7

5
6
7
8
TDC : 5.86A

VCC

RF
PR156
UGATE
9 1P0V_DH 4 PQ18 Peak : 8.4A
76.8K/F_4 PR5 PC15 RQ3E070BNFU7TB
1 2 1P0V_CS 2
CS 0_6 0.1U/25V_6 OCP : 10.5A
10 1P0V_BST 1 2 1 2 PR16

1
2
3
BOOT PL3 0.001_PJ
PU2 1UH 20%11A(PCMC063T-1R0MN)
B B
1 RT8237CZQW 8 1P0V_LX +1.0V_SUS_P 1 2 +1.0V_SUS
38 1.0V_SUS_PWRGD PGOOD PHASE
PR19

5
6
7
8

1
*0_4_NC
1 2 1P0V_EN 3 PC19
35,46,47 SUS_ON EN 6 1P0V_DL 4 PQ19 *2200P/50V_4_NC
PAD
PAD
PAD
PAD
PAD
PAD

1 2
LGATE RQ3E120ASFU7TB

FB
1

1
PR157

1
*SJ0402_NC
SJ2
10K/F_4 PC37 +

1
11
12
13
14
15
16

1
2
3
1 2 PR7 PC33 PC182
46 1.8V_SUS_PWRGD 4700P/25V_4 Q2
2

2
*2.2_8_NC 0.1U/16V_4 330U/2V/E9_7343

2
1P0V_DH TP2

2
1P0V_DL TP1

2
1
Follow the Intel design guide, the sense point PR21
PC38 4.3K/F_4
R1
need to be placed close to PCH I/O rails/power
C
planes --- PLLEBB, MPHYPLL, SRAM *1500P/50V_NC C

1
0.7V
Vout = 0.7 * (1 + R1/R2)

1
PR17
10K/F_4
R2

2
D D

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
+1.0V_SUS (RT8237CZQW)
Date: Friday, May 22, 2015 Sheet 44 of 53
1 2 3 4 5

Vinafix.com
5 4 3 2 1

D D

38 DDR_PWRGD

PR117
0_4
1 2
4,35 SIO_SLP_S4#

PR114

2
*0_4_NC
1 2 1P35V_S5
4,35 SIO_SLP_S5#
PR106 PR107 PR137
1K_4 29.4K/F_4 0.01_PJ
PR111

1P35V_MODE 1

1P35V_TRIP 1
10K_4 +1.35V_SUS_PWR_SRC 1 2 +PWR_SRC
1 2 1P35V_S3 1P35V_DH TP40
4,35,47 SIO_SLP_S3#
PR112
R1 1P35V_DL TP39
*0_4_NC

1
1 2
3 DDR_VTT_CNTL
PC143 EC42 EC41 PC162 PC161 +1.35V_SUS
0.047U/10V_4 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 1.35 Volt +/- 5%

2
17

16

20

19

18
C
Fsw : 500KHz C
24
Q1 TDC : 2.87A

S3

S5

PGOOD

MODE

TRIP
PwPd

5
6
7
8
25
+0.675V_DDR_VTT 23 PwPd
Peak : 4.1A
PwPd
0.675 Volt +/- 5% 22 PwPd
26
PC151
4 PQ40
RQ3E070BNFU7TB OCP : 5.5A
PR119
TDC : 0.6A PwPd
0_6 0.1U/25V_6
4 15 1P35V_VBST 1 2 1 2

1
2
3
VTTGND VBST PR220
1 14 1P35V_DH PL12 0.001_PJ
VTTSNS DRVH 1UH 20%11A(PCMC063T-1R0MN)
3 PU6 13 1P35V_LX +1.35V_SUS_P 1 2
+0.675V_DDR_VTT VTT SW +1.35V_SUS
TPS51716RUKR
+DDR_VTTREF
5 11 1P35V_DL
VTTREF DRVL

1
1P35V_VLDOIN 2 12 +5V_ALW PC159
VLDOIN V5IN
1

5
6
7
8
*2200P/50V_4_NC

1
PC141
1

1
VDDQSNS
0.22U/6.3V_4 4 PQ35 PC272 PC268 PC269 PC270 PC271 PC267 PC275 PC274
2

1
PC138 PC150 RQ3E120ASFU7TB 0.1U/16V_4 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 *22U/6.3V_8_NC

2
1

1
REFIN

PGND
VREF

PwPd
10U/4V_8 1U/6.3V_4

GND
2

*SJ0201_NC
SJ6

*SJ0603_NC
SJ5
PC249 PR128
Q2

1
1
2
3
10U/4V_8 *2.2_8_NC
2

2
6

10

21

2
B B
1

PR110
10K/F_4 1P35V_VDDQSNS
2
1
1

PR115
PC144 30K/F_4 PC145
0.1U/16V_4 0.01U/50V_4
2

2
2

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
1.35V_SUS/0.675V(TPS51716RUKR)
Date: Friday, May 22, 2015 Sheet 45 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

D D

+3.3V_ALW

1
PR159
10K_4
+3.3V_SUS 1 2
PR138 47K_4
+1.8V_SUS

2
PU9 PR15
Max : 0.033A
C G9661-25ADJF12U 0.01_PJ C
44 1.8V_SUS_PWRGD
1 8
1 2 2 POK GND 6 +1.8V_SUS_P 1 2
35,44,47 SUS_ON VEN VO 7 +1.8V_SUS
PR139 *0_4_NC 3
+3.3V_ALW VIN ADJ 5
+5V_ALW 4
VPP NC

9
PR155
R1

9
52.3K/F_4

PC169 PC3 PC167 PC179


0.8V PC31
10U/4V_8 0.1U/16V_4 0.1U/16V_4 1U/6.3V_4 10U/4V_8
PR158
41.2K/F_4
R2

B B

A A
Quanta Computer Inc.
PROJECT : AM8
Size Document Number Rev
Vinafix.com +1.8V_SUS (G9661-25ADJF12U) 1A

Date: Friday, May 22, 2015 Sheet 46 of 53


5 4 3 2 1
5 4 3 2 1

+5V_ALW2 +15V_ALW +5V_ALW +5V_RUN +5V_ALW2 +15V_ALW +3.3V_ALW +3.3V_SUS


PQ17 +5V_RUN PQ15 +3.3V_SUS
8
RQ3E100BNFU7TB
3
Current : 3.856A 6
AO6402A Current : 327mA
5/8 Added D16 and S3# net

1
7 2 5 4
6 1 2
D16 BAT54CW PR102 PR100 5 PR97 PR99 1

1
100K_4 100K_4 100K_4 100K_4
D
1 PC164 PC137 D
4,35,45 SIO_SLP_S3#

3
RUN_ON_ENABLE 1 2 0.1U/16V_4 SUS_ON_ENABLE 1 2 0.1U/16V_4

2
3 50uA 50uA

1
PR129 PR104
2 RUN_ON# 5 PQ14A 100K_4 PC158 SUS_ON# 5 PQ13A 100K_4 PC134
35 RUN_ON
2N7002KDW 4700P/25V_4 2N7002KDW 4700P/25V_4

2
6

6
4

4
2 PQ14B 2 PQ13B
35,44,46 SUS_ON
2N7002KDW 2N7002KDW

1
1 PC131

*100P/50V_4_NC
2

+3.3V_ALW +3.3V_RUN
PQ16 +3.3V_RUN +1.0V_SUS +VCCSTPLL

8
RQ3E100BNFU7TB
3
Current : 1.387A PQ3
RQ3E100BNFU7TB +1.0V_VCCSTPLL
7
6
2
1
8
7
3
2
Current : 168mA
5 6 1

1
5

1
PC136

4
1 2 0.1U/16V_4 PC20

4
1 2 0.1U/16V_4

2
1
PR105

1
100K_4 PC135 PR13
C 4700P/25V_4 100K_4 PC24 C

2
0.047U/25V_4

2
+1.0V_SUS +1.0V_RUN
PQ4
RQ3E150BNFU7TB +1.0V_VCCIOSTG
8
7
3
2
Current : 2.2A +3.3V_SUS discharge circuit
6 1
5
+3.3V_SUS

4
PQ2
RQ3E150BNFU7TB PR96
8 3 *22_6_NC
7 2
6 1 PQ12
5 *2N7002W_NC

3
B B
4

1 2 SUS_ON# 2
1

PR11

1
200K_4 PC36
0.1U/16V_4
2
1

PC17
0.047U/25V_4
2

+1.8V_SUS +1.8V_HDA_CODEC
PQ10
AO6402A +1.8V_HDA_CODEC
6
5 4
Current : 19mA
2
1
1

PC121
3

1 2 0.1U/16V_4
2
1

A PR93 A
100K_4 PC120
0.047U/25V_4
2

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
Load Switch
Vinafix.com Date: Friday, May 22, 2015 Sheet 47 of 53

5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

1
PR69 +PWR_SRC
*10K/F_4_NC PC112
PR72 0.1U/16V_4 PR94

2
*0_4_NC 0.01_PJ
2 1 1 2
+VGACORE_PWR_SRC 1 2

PR70
0_4

1
2 1 81172_HG1
GPU_PWM_PSI 21 +
EC18 EC17 PC231 PC236 PC240
PR195 PR74 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 *15U/25V/E100_3528_NC

2
D D
0_4 0_4
2 1 81172_EN 2 1 PQ25
21 GPU_PWM_VID +3V_GFX Place Cap close

2
HP8S36TB
to input MLCC

G1

D1

D1

D1
PR67 PR194 Need RC delay ( NV spec :
20K/F_4 20K/F_4
81172_VREF 2 1 2 1 PC227
All power need ramp up after 3.3V) PL7
PR199

S1/D2
0_6 0.22U/25V_6 0.24UH (ETQP4LR24AFM)

1
1 2 2 1 81172_PH1 9 1 2

PR193 +VGACORE

G2

S2

S2

S2
PR185 PR189 2K/F_4 TDC : 20A

1
0_4 18K/F_4 EOD issue Peak: 32A

1
2 1 2 1 81172_HG1 PC118 + +

HG1

BST1
VIDBUF

VID

PSI

EN
DVT1 5/19 1000P/50V_4 PC221 PC224 PC225
Min OCP : 45A

2
PC217 0.1U/16V_4 330U/2V/E6_7343 330U/2V/E6_7343

2
2700P/50V_4 81172_LG1

1
2 1 7 24 81172_PH1
REFIN PH1
PC218 PR87
0.01U/50V_4 2.2_8
2 1 81172_VREF 8 23 81172_LG1

2
VREF LG1

1
PR190
39K/F_4 +5V_RUN
2 1 9
FS PU10 PGND
22 PR200
6.98K/F_4
PC228 +VGACORE
NCP81172MNTXG

2
4.7U/10V_6
81172_FBRTN 10 21 1 2
FBRTN PVCC

+VGACORE_PWR_SRC
81172_FB 11 20 81172_LG2
FB LG2

1
81172_HG2
81172_COMP 12 19 81172_PH2 EC19 EC20 PC238 PC237 + PC233
COMP PH2 2200P/50V_4 0.1U/25V_6 10U/25V_8 10U/25V_8 *15U/25V/E100_3528_NC
TALERT#

2
PGOOD
C C
PQ24
TSNS

Place Cap close

BST2
GND

VCC

HG2

2
81172_HG2 HP8S36TB
to input MLCC

G1

D1

D1

D1
25

13

14

15

16

17

18
PR198 PC226
PC219 0_6 0.22U/25V_6 PL8

S1/D2
10P/50V_4 1 2 2 1 0.24UH (ETQP4LR24AFM)
2 1 81172_PH2 9 1 2
1

PR68

G2

S2

S2

S2
5.9K/F_4 PR197

1
PR192 81172_VREF 2 1 10K/F_4 EOD issue

1
82K/F_4 2 1 PC119 + +
+3.3V_RUN DVT1 5/19
1

1000P/50V_4 PC223 PC113 PC114


1 2

2
1

0.1U/16V_4 *330U/2V/E6_7343_NC 330U/2V/E6_7343

2
DGPU_VC_EN 50
PC220 PR196 81172_LG2

1
PC216 PR205 0.1U/16V_4 2.2_6
2

100P/50V_4 100K/NTC/B4250_4 2 1 +5V_RUN


2

PR86
2.2_8
1

Place NTC close PC222

2
1U/25V_6
PR187 PR188 to hot spot
51_4 10K/F_4
PR73
2

+VGACORE *10K/F_4_NC
2 1
+3.3V_RUN
1

PC214 PR71
47P/50V_4 0_4
2

PR183 2 1
GPU_PWR_LEVEL 21
100/F_4
PR184
2

0_4
2 1
VGPU_CORE_SENSE 18
1

PC215 PR191
1000P/50V_4 0_4
2

B B
2 1
VSS_GPU_SENSE 18

+3V_GFX +3V_AON
1

PR186
Peak Current : 350mA Peak Current : 250mA
100/F_4 +15V_ALW +15V_ALW
+5V_ALW2 +3.3V_ALW +3V_GFX +5V_ALW2 +3.3V_ALW +3V_AON
2

PQ7 PQ8
AO6402A AO6402A
1

1
6 6
5 4 5 4
1

1
PR66 2 PR65 2
100K_4 1 100K_4 1
PR180 PR181
2

2
1

1
100K_4 100K_4

3
PC108 PC110
2

2
0.1U/16V_4 0.1U/16V_4

2
3

3
1

1
+3V_MAIN_EN# 5 PQ5A DGPU_PWR_EN# 5 PQ6A
2N7002KDW PC109 2N7002KDW PC111
6

6
4700P/25V_4 4700P/25V_4
4

2
2 PQ5B 2 PQ6B
21 3V_MAIN_EN 14 DGPU_PWR_EN
2N7002KDW 2N7002KDW
1

1
A A

Quanta Computer Inc.


Vinafix.com PROJECT : AM8
Size Document Number Rev
1A
+VGA_CORE (NCP81172MNTXG)
Date: Friday, May 22, 2015 Sheet 48 of 53
5 4 3 2 1
5 4 3 2 1

D D

+FBVDD
+PWR_SRC
1.35 Volt +/-5%
PR26 Fsw : 500KHz
0.01_PJ PR14
0_6
TDC : 3.42A
1 2 +1.35V_GFX_PWR_SRC 1 2 Peak : 4.89A
OCP : 11A

1
1

1
PR24 +1.35V_GFX

22

20
8

7
PC39 PC29 PC186 EC45 120K/F_4 PC26
10U/25V_8 10U/25V_8 0.1U/25V_4 2200P/50V_4 0.1U/25V_6 PR10

IN

IN

IN

NC

BST
2

2
PL1 0.001_PJ

2
C 1UH 20%11A(PCMC063T-1R0MN) C
6 18 +1.35V_GFX_P 1 2
TON LX
1 17
TP5 PGOOD LX

1
1 2 2 16 PC1
50 1.05V_GFX_PWRGD EN LX

1
0_4 PR25 PU3 *2200P/50V_4_NC SJ1

1
2
3 AOZ1267QI-03 11 *SJ0201_NC PC174 PC173 PC10 PC11 PC9
PFM LX

2
22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.1U/25V_4

2
1
4 10

2
AGND LX
23 PR3
PC68 SS *2.2_8_NC

PGND

PGND

PGND

PGND

PGND
*0.47U/6.3V_4_NC

VCC

2
PC43
R1

FB
0.01U/50V_4

21

12

13

14

15

19

5
PR23
13.7K/F_4
2 1
B B
PR18 0.8V Vout = 0.8 * (1 + R1/R2)

1
10_6
+5V_ALW 2 1
PR22
R2

1
20K/F_4
PC34

2
4.7U/10V_6

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
+FBVDD (AOZ1267QI-03)
Date: Friday, May 22, 2015 Sheet 49 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

D D

+1.05V_GFX
1.05 Volt +/- 5%
Fsw : 1MHz
+3.3V_RUN TDC : 1.463A
Peak : 2.09A
OCP : 4A

1
PR145
10K/F_4 +1.05V_GFX
C C
PR20

2
PL2 0.001_PJ
+5V_ALW 2.2UH 20% 5.5A MMD-05CZ-2R2M-X1Q
PR143 4 1 +1.05V_GFX_P 1 2
49 1.05V_GFX_PWRGD PGOOD LX1
0.01_PJ
2
LX2

1
1 2 +1.05V_GFX_PWR_SRC 9
PVIN

1
3 PC168 PR142
10 LX3 *22P/50V_4_NC
PVIN 75K/F_4
PU8 7

2
RT8068AZQW NC

1
8 6
SVIN FB PC25 PC187 PC30
11 5 2 1
0.6V
0.1U/25V_4 22U/6.3V_8 22U/6.3V_8
DGPU_VC_EN 48

2
GND EN

1
1

PR140 PR141
PC175 PC14 PC180 0_4 Vout = 0.6 * (1 + R1/R2) 100K/F_4
10U/6.3V_6 0.1U/25V_4 1U/6.3V_4
2

2
B B
PC166
0.047U/25V_4 2 1 +3V_GFX

2
PR144
*0_4_NC

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
1.05V_GFX (RT8068AZQW)
Date: Friday, May 22, 2015 Sheet 50 of 53
5 4 3 2 1

Vinafix.com
5 4 3 2 1

Adapter 65W/45W

Charger
D
(BQ24777RUYR) +PWR_SRC D

Battery 3S1P

+3.3V_EN2 ALW_ON SIO_SLP_S4# SIO_SLP_S3# +3.3V_SUS H_VR_ENABLE_MCP IMVP_VR_ON +3V_GFX 1.05V_GFX_PWRGD

TI TI GMT RTK ON ON AOS


TPS51275CRUKR TPS51716RUKR G9661-25ADJF12U RT8237CZQW NCP81206MNTXG NCP81172MNTXG AOZ1267QI-03

C C

+3.3V_ALW +5V_ALW +15V_ALW +1.35V_SUS +0.675V_DDR_VTT +1.8V_SUS +1.0V_SUS +VCC_CORE +VCCGT +VCCSA +VGA_CORE +FBVDD

DGPU_VC_EN
SUS_ON RUN_ON DGPU_PWR_EN 3V_MAIN_EN RUN_ON RUN_ON SUS_ON RUN_ON
B B

Load Switch Load Switch Load Switch Load Switch Load Switch RTK Load Switch Load Switch Load Switch
AO6402A RQ3E100BN AO6402A AO6402A RQ3E100BN RT8068AZQW AO6402A RQ3E100BN RQ3E150BN

+3.3V_SUS +3.3V_RUN +3V_AON +3V_GFX +5V_RUN +1.05V_GFX +1.8V_HDA_CODEC +VCCSTPLL +1.0V_RUN

A A

Quanta Computer Inc.


PROJECT : AM8
Size Document Number Rev
1A
Power Block Diagram
Date: Friday, May 22, 2015 Sheet 51 of 53
5 4 3 2 1

Vinafix.com
1 2 3 4 5 6 7 8

AM8 PSequence G3 to S0
+PWR_SRC
+5V_ALW2 G3 mode: > EC reset time + output ALW_ON
+3VPCU S5 mode: > Power button DE-BOUNCE time

H/W: PWRBTN POWER_ SW_IN0#


3.3V_ALW_ON G3 mode: Asserted by HW latch of power button event
(+3.3V_EN2) S0 mode: Be keeped on high by ALW_ON

+3.3V_ALW

ALW_ON(EC) G3 mode: > 1650 Tick (50 ms)

+5V_ALW
A A

+15V_ALW

H/W: PWRBTN SYS_PWR_SW# G3 mode: EC don't care this event.


S5 mode: Upon power always exist, and this pin keeped on high. Start from this event.

SUS_ON(EC) ? ms (EC, ALW_ON to SUS_ON, EC)

VCCDSW_3P3 / VCCSPI / VCCPRIM_3P3 / VCCRTCPRIM_3P3


+3.3V_SUS (For platforms NOT supporting Deep Sx, DSWPWROK can be tied to RSMRST#)
VCCATS_1P8 / VCCPGPPF
+1.8V_SUS
VCCPRIM_CORE / VCCMPHYAON_1P0 / VCCMPHYGT_1P0 / VCCAMPHYPLL_1P0 / VCCAPLL_1P0 / VCCPRIM_1P0
VCCSRAM_1P0 / VCCPRIM_1P0 / VCCAPLLEBB / VCCCLK1~6/ VCCPGPPA~E / VCCPGPPG
VCCPLL / VCCST
+1.0V_SUS max = 20 ms All PCH Primary Rails should ramp up within this window. tPCH34 max = 20ms
+VCCSTPLL
RSMRST#(EC) min = 10 ms tPLT02,03 = min 10 ms
DSWROK_EC_R (EC)

SUSACK#
SUSPWRDNACK (not support Deep Sx)
SUSWARN# (CPU)
PWRBTN#
SIO_PWRBTN#(EC) min = 95 ms DSW_PWROK assertion to PWRBTN# monitored tPLT43 = min 95 ms

SIO_SLP_S5#(CPU)

SIO_SLP_S4#(CPU)
VCCPLL_OC / VDDQ
+1.35V_SUS

SIO_SLP_S3#(CPU)
B B
1 ms
RUN_ON(EC)
VTT
+0.675V_DDR_VTT

DDR_PWRGD
VCCHDA
+1.8V_HDA_CODEC
VCCIO / VCCSTG
+1.0V_RUN
VCCST_PWRGD
HWPG (H_VCCST_PWRGD)

+5V_RUN

+3.3V_RUN

IMVP_VR_ON(EC) 5 ms EC: HWPG to IMVP_VR_ON delay 5ms

+VCC_CORE VCC_CORE turn on after SVID vaild.


Vboot

VCCSA
+VCCSA

IMVP_PWRGD

PCH CLK valid Last un-core power rail stable to DRAMPWROK assertion.

H_PWRGOOD(PCH)

C C
+VCCGT

CPU SVID BUS(CPU)


valid

PCH_PWROK / SYS_PWROK
SYS_PWROK (EC) 100 ms 124 ms(HPWG to SYS_PWROK, t15 min = 5~99 ms)
EC_PWROK (EC) EC: HPWG to EC_PWROK(EC) Delay 100 ms

PLTRST# 2.08 ms (SYS_PWROK to PLTRST#, t21+t22 = min 1.06 ms)


PLTRST# could de-assert prior to final SVID value

PCH_PWROK

D D

PCH CLK

SYS_PWROK

EC_PWROK

Vinafix.com
Quanta Computer Inc.
PROJECT : AM8
Size Document Number Rev
1A
06 PS_G3 to S0
Date: Friday, May 22, 2015 Sheet 52 of 53
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+PWR_SRC
AM9 PSequence G3 to S0 Block (Battery mode)
2 +3.3V_RTC_LDO
+3.3V_RTC_LDO VCC
+3.3V_ALW
1 1a
4 +PWR_SRC +VCHGR
3V/5V
+5V_ALW 7
VR CHARGER Battery
+15V_ALW 7a

EN2

EN1
A A
PWR SW 3
+5V_ALW
5 3.3V_ALW_ON
(+3.3V_EN2)
POWER_ SW_IN0#
+PWR_SRC VCC +V_VDDQ 16
6 ALW_ON

+V_VDDQ +DDR_VTT 25 5a
DDR/0.675V +3.3V_ALW
SYS_PWR_SW#
VR
DDR_PWRGD 17
PG
23 VCC RSMRST# 10
S4

S3

RSMRST#(DPWROK)
9b 1.00V_PWRGD HWPG
DDR_VTT_CTRL 24 AC_PRESENT 11
ACPRESENT
SIO_SLP_S4# 14 22 VCCIO_PGOOD EC_PWRBTN# 13
PWRBTN#
EC
SUS_PWR_ACK 12
SUS_PWR_ACK
B B

14 SLP_S5#
SLP_S5#

IMVP_VR_ON

SIO_SLP_S3#

SIO_SLP_S4#

SIO_SLP_S5#
15 SLP_S4#

EC_PWROK
SLP_S4#

SUS_ON

RUN_ON
16 SLP_S3#
SLP_S3#

28 IMVP_PWRGD PCH
8 18 33 26 16 15 14 PCH_PWROK

PLTRST_PROC#
29 PCH_CLK
PCH_CLK

PROCPWRGD
37 PCI_PLTRST#
PLTRST#
33 EC_PWROK
SYS_PWROK

C C

CPU_PLTRST#
H_PWRGOOD
+PWR_SRC
+5V_ALW
+3V_ALW SUS +3.3V_SUS 27
LS 9 +PWR_SRC VCC +VCCIN
+PWR_SRC VCC +VCC_1.00V 9a
G 30 36
1.00V IMVP 32
SUS_ON 8 +VCCGT
VR 1.00V_PWRGD 9b VR
PG 23 HWPG
EN

RESET#
PWRGOOD
VCCST_PWRGD
+5V_ALW +5V_RUN 19 28
SUS_ON 8 RUN 24 DDR_VTT_CTRL
IMVP_PWRGD DDR_VTT_CTRL
SVID

PG

EN
+3.3V_ALW LS +3.3V_RUN 20
+3.3V_ALW 31 31 SVID
SVID IMVP_VR_ON 26 CPU
+3.3V_ALW VCC +VCCIO 21 CPU power
G G
D
VCCIO D

VCCIO_PGOOD 22
VR
EN

RUN_ON 18
RUN_ON 18 RUN_ON 18 Quanta Computer Inc.
PROJECT : AM8
Vinafix.com Size Document Number Rev
1A
PSeq_G3 to S0 Block_vPRO
Date: Friday, May 22, 2015 Sheet 53 of 53
1 2 3 4 5 6 7 8

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