PART A

Construct Half adder & Full adder circuits.

Evaluate the logic circuit of 2-bit comparator.

What is priority encoder?

What is multiplexer?

Give the applications of Mux and Demux.

Give the logic diagram & excitation table of JK Flip flop

Differentiate latch and flip flop.

Distinguish Sequential logic with combinational logic.

Define State Reduction and explain why it is necessary?

Define register & counter.

or

Define Combinational Circuit?

Define Half Adder. Give the truth table and logic diagram.
What is carry propagation delay and define how to overcome that?
Define Magnitude Comparator?
Write the difference between Encoder and Decoder?
Define Sequential Logic Circuits with a neat block diagram?
Mention the types of Flipflops with its characteristics equation.
Differentiate Moore and Mealy FSM?
Define state diagram and state table.

PART B

(i) Design a full adder using two half adders.

(ii) Simplify the function using multiplexer:

F=∑ (0,1,3,4,8,9,15)

2.Demonstrate 4-bit Magnitude Comparator with three outputs: A>B; A=B; A<B.

(i) What is a K-Map? Simplify the Boolean function F together with don’t care condition using
Karnaugh method.

F(A,B,C,D)= ∑m(4,6,7,8,12,15) ,d(2,3,5,10,11,14)

(ii)Implement the following Boolean function using 8:1 MUX.

(F (A, B, C, D) =A’BD’+ACD+B’CD+A’C’D

3.Outline the design of three-to-eight-line decoder circuit using “Inverters” &“NOT” gate. Also present
the truth table for the same.

4.Draw and explain the block diagram of 4-bit parallel adder.

(i) Outline the Mealy model & Moore model of sequential circuits with diagram.
(ii) Explain State reduction and use binary state assignment with a neat example

(i) Realize D flip flop using SR flip flop.

(ii) Explain in detail about Triggering of Flip Flops and its types.

(i)Distinguish between Synchronous and Asynchronous sequential circuits.

(ii)Give the analysis & design of clocked sequential circuits.

A sequential circuit with two D flip flops A&B; two inputs x&y and one output z; is specified by the
following next state & output equation: A(t+1) = x’y + xA

B(t+1) = x’B + xA

Z=B

(i)Implement the following Boolean function using 8×1 Multiplexer. Considering D as the input & A, B,
C as selection lines.
F (A, B, C, D) =AB’+BD+B’CD’

(ii)Design a binary decoder circuit.

(i) Distinguish Combinational and sequential logic circuits.

(ii)Design a combinational logic circuit with 4 inputs A,B,C,D. The output Y goes HIGH if and only if A
and C inputs go HIGH. Draw the truth table. Minimize the Boolean function using K-map. Draw the
circuit diagram.

A sequential circuit with two JK flip flops A&B & one input x. The circuit is described by the following
flip-flop input equations.

JA=X; KA=B’

JB=X; KB=A

Derive the state equation A(t+1) &B(t+1) by substituting the input equations for J&K variables. Draw
state diagram of the circuit.

Illustrate the different types of Flipflop with its Truth table, characteristics table & equation and
Excitation table with a neat diagram.