Department of Electrical Engineering, IIEST, Shibpur

Embedded Systems Laboratory Expt. on Simulation of a physical system using FPGA

DEPARTMENT OF ELECTRICAL ENGINEERING

INDIAN INSTITUTE OF ENGINEERING SCIENCE AND TECHNOLOGY,
SHIBPUR

Embedded Systems Laboratory 7th Semester EE

Experiment No.: 4

Simulation of a physical system (R-L-C series circuit) using FPGA

A. Preparatory Notes:
i. Equip yourself with (a) the basic concept of an FPGA (b) the time response
characteristics of a series R-L-C circuit and (c) the basic theory of real time simulation.

ii. A particular student will be allowed to conduct the experiments only after she/he has
made a detailed survey of the working of the R-L-C circuit and made clear to himself /
herself certain pertinent points. As an example, the following points should be clear:
(a) What is an FPGA? Why is it being increasingly used as a digital controller?
(b) What is meant by ‘real time simulation’? Why is it important?
(c) What is the basic principle of a DAC? Why is it used with a digital simulation device?
(d) What is the time response characteristic of a series R-L-C circuit? In this connection,
what is rise time, settling time, peak overshoot, steady state error etc.?

iii. Suggested Readings:

(a) FPGA based system design by Wayne Wolf, Prentice Hall.
(b) FPGAs: Fundamentals, Advanced Features, and Applications in Industrial Electronics by
Andina, Arnanz and Valdes, CRC Press
(c) Altera DE2-115 Development and Education Board details :
https://www.altera.com/.../terasic.../altera-de2-115-development-and-education-board
(d) Cyclone IV FPGA device family overview:
https://www.altera.com/en_US/pdfs/literature/hb/cyclone-iv/cyiv-51001.pdf

1.
B. Objective:
i. To study and understand the working principle of the Cyclone IV EP4CE115F29 FPGA,
as used in this experiment.
ii. To study and understand the concept of ‘real time simulation’ and why an FPGA is
ideally suited for this.

Prof. D. Ganguly, Dept. of EE, IIEST Shibpur Page 1 of 5

Department of Electrical Engineering, IIEST, Shibpur
Embedded Systems Laboratory Expt. on Simulation of a physical system using FPGA

iii. To study and understand how the Quartus software from Altera works and how it can
be used to program an FPGA using USB cable.
iv. To understand how the schematic file in Quartus (.bdf) represents the series RLC circuit
driven from a DC source.
v. To understand how the DAC card is used to convert the data output from the FPGA into
analog signal using I2C protocol.
vi. To observe the responses of current and capacitor voltage from the simulation using
DSO.

C. Set Under Test:

An Altera Terasic DE2-115 board featuring a Cyclone IV E FPGA connected to two 12 bit
DACs.

D. Apparatus:
(a) Digital Storage Oscilloscope
(b) Windows based PC (loaded with Quartus software for programming the FPGA)

Present the apparatus list in the format below:

Sl. Description of Quantity Range and Maker’s Maker’s
No. Apparatus used rating name number

E. Circuit Diagram:
Kindly refer to the figures below for the circuit diagram.

Fig. 1. Clock section

Prof. D. Ganguly, Dept. of EE, IIEST Shibpur Page 2 of 5
Department of Electrical Engineering, IIEST, Shibpur
Embedded Systems Laboratory Expt. on Simulation of a physical system using FPGA

Fig. 2 Error Calculation section

Fig. 3 Output section

Fig. 4 DAC section

Prof. D. Ganguly, Dept. of EE, IIEST Shibpur Page 3 of 5

Department of Electrical Engineering, IIEST, Shibpur
Embedded Systems Laboratory Expt. on Simulation of a physical system using FPGA

F. Procedure and Results:

DO NOT TURN ON THE SET UP WITHOUT CONSULTING YOUR TEACHER.

Caution: Plug in the power supply to the FPGA board only through the adaptor to a 230 V,
50 Hz, 1-ph socket.

RUN-1:- STARTING/RUNNING THE SIMULATION ON FPGA

a) After powering on the PC, run the Quartus (32 bit) software. Go to File menu, select
‘Open Project’ and choose rlc.qpf file from rlc2 folder in desktop.
b) Double click on rlc project in project navigation window. The rlc.bdf block diagram
will open up.
c) Compile the design by clicking on Assembler [generate programming file].
d) Turn on the power to the FPGA kit through the adaptor only. Also turn on the DSO.
e) Open Programmer. Add the file. Go to output files and select rlc.sof.

f) Press ‘Start’ and check the progress bar for 100%

g) The brown-black pair of wires carry the current output (0 – 5 V) and the green-black
pair carries the voltage output (0 – 3.3 V).
h) Note the waveforms at the outputs of the two DACs. (i) current in the R-L-C circuit (ii)
voltage across C in the same circuit
i) Measure the following parameters as mentioned in Table I below.
Table-I

Signal FPGA Simulation

Peak Rise time Fall Settling Frequency
magnitude (ms) time(ms) Time (s) (Hz.)
(V)
Circuit
Current
Capacitor
Voltage

G. Report:
i. Explain the working of R-L-C series circuit through the two linear differential equations
representing the current in the circuit (i) and the voltage across the capacitor (vc)
ii. Following from the equations above, develop an expression for the errors in current and
capacitor voltage (di and dvc).
iii. Deduce the per unitized values of the time constants L/R and RC.

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Department of Electrical Engineering, IIEST, Shibpur
Embedded Systems Laboratory Expt. on Simulation of a physical system using FPGA

APPENDIX (For the instructor only)

After normalization (with base values),

Vg = R * i + L * di/dt + vc Vg/Vb = R/Rb * i/ib + L/Rb * (di/ib)/dt + vc/Vb
vc = C * dvc/dt vc /Vb = C Rb * (dvc/Vb)/dt

Vg* = 1 p.u. = 16383d (with frequency 5.96 Hz.)

R* = 1 p.u. = 16383d
dt = 10.24 s
dtLR = 209d
dtCR = 4194d

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