PD - 94946

SMPS MOSFET IRFB31N20DPbF

IRFS31N20DPbF
IRFSL31N20DPbF
Applications HEXFET® Power MOSFET
l High Frequency DC-DC converters
l Lead-Free VDSS RDS(on) max ID
200V 0.082Ω 31A

Benefits
l Low Gate to Drain to Reduce Switching
Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design,(See
AN 1001)
l Fully Characterized Avalanche Voltage
and Current
TO-220AB D2Pak TO-262
IRFB31N20DPbF IRFS31N20DPbF IRFSL31N20DPbF

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 31
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 21 A
IDM Pulsed Drain Current  124
PD @TA = 25°C Power Dissipation ‡ 3.1 W
PD @TC = 25°C Power Dissipation 200
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dt Peak Diode Recovery dv/dt ƒ 2.1 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torqe, 6-32 or M3 screw† 10 lbf•in (1.1N•m)

Applicable Off Line SMPS Topologies

l Telecom 48V Input DC/DC Active Clamp Reset Forward Converter

Notes  through † are on page 11

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IRFB/S/SL31N20DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 200 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.25 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.082 Ω VGS = 10V, ID = 18A „
VGS(th) Gate Threshold Voltage 3.0 ––– 5.5 V VDS = VGS, ID = 250µA
––– ––– 25 VDS = 200V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 160V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 17 ––– ––– S VDS = 50V, ID = 18A
Qg Total Gate Charge ––– 70 107 ID = 18A
Qgs Gate-to-Source Charge ––– 18 23 nC VDS = 160V
Qgd Gate-to-Drain ("Miller") Charge ––– 33 65 VGS = 10V „
td(on) Turn-On Delay Time ––– 16 ––– VDD = 100V
tr Rise Time ––– 38 ––– ns ID = 18A
td(off) Turn-Off Delay Time ––– 26 ––– RG = 2.5Ω
tf Fall Time ––– 10 ––– RD = 5.4Ω, „
Ciss Input Capacitance ––– 2370 ––– VGS = 0V
Coss Output Capacitance ––– 390 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 78 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 2860 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 150 ––– VGS = 0V, VDS = 160V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 170 ––– VGS = 0V, VDS = 0V to 160V
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy‚ ––– 420 mJ
IAR Avalanche Current ––– 18 A
EAR Repetitive Avalanche Energy ––– 20 mJ
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75
RθCS Case-to-Sink, Flat, Greased Surface † 0.50 ––– °C/W
RθJA Junction-to-Ambient† ––– 62
RθJA Junction-to-Ambient‡ ––– 40
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 31
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 124

(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 18A, VGS = 0V „
trr Reverse Recovery Time ––– 200 300 ns TJ = 25°C, IF = 18A
Qrr Reverse RecoveryCharge ––– 1.7 2.6 µC di/dt = 100A/µs „
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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 IRFB/S/SL31N20DPbF

1000 VGS 1000

VGS
TOP 15V TOP 15V
12V 12V
10V 10V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
6.5V 6.5V
100 6.0V 6.0V
BOTTOM 5.5V BOTTOM 5.5V
100

10

10
1 5.5V

20µs PULSE WIDTH 20µs PULSE WIDTH

5.5V TJ = 25 °C TJ = 175 °C
0.1 1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.0
ID = 30A
R DS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

2.5

100
TJ = 175 ° C 2.0
(Normalized)

10 1.5

TJ = 25 ° C
1.0
1

0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
0.1 0.0
5 6 7 8 9 10 11 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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IRFB/S/SL31N20DPbF

100000
20
VGS = 0V, f = 1 MHZ
ID = 18A
Ciss = Cgs + Cgd, Cds SHORTED VDS = 160V

VGS , Gate-to-Source Voltage (V)

Crss = Cgd VDS = 100V
16 VDS = 40V
10000 Coss = Cds + Cgd
C, Capacitance(pF)

Ciss 12

1000

Coss 8

100
Crss 4

FOR TEST CIRCUIT

10 SEE FIGURE 13
0
1 10 100 1000 0 20 40 60 80 100
VDS, Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

100
I D , Drain Current (A)

100
10us
TJ = 175 ° C

10
100us

10
TJ = 25 ° C
1 1ms

TC = 25 ° C
TJ = 175° C 10ms
V GS = 0 V Single Pulse
0.1 1
0.2 0.4 0.6 0.8 1.0 1.2 1 10 100 1000
VSD ,Source-to-Drain Voltage (V) VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFB/S/SL31N20DPbF

30 RD
V DS

VGS
25 D.U.T.
RG
+
ID , Drain Current (A)

-VDD
20
10V
Pulse Width ≤ 1 µs
15
Duty Factor ≤ 0.1 %

10 Fig 10a. Switching Time Test Circuit

VDS
5
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

1
Thermal Response (Z thJC )

D = 0.50

0.20

0.1 0.10

PDM
0.05
t1
0.02 t2
SINGLE PULSE
0.01 (THERMAL RESPONSE)
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFB/S/SL31N20DPbF

1000
15V ID

EAS , Single Pulse Avalanche Energy (mJ)

TOP 7.3A
15A
DRIVER 800 BOTTOM 18A
VDS L

RG D.U.T + 600
V
- DD
IAS A
20V
tp 0.01Ω
400

Fig 12a. Unclamped Inductive Test Circuit

200

V(BR)DSS
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)

Fig 12c. Maximum Avalanche Energy

I AS Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

QG
50KΩ

10 V 12V .2µF
.3µF
QGS QGD +
V
D.U.T. - DS

VG VGS

3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRFB/S/SL31N20DPbF

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRFB/S/SL31N20DPbF

TO-220AB Package Outline

Dimensions are shown in millimeters (inches)

10.54 (.415) 3.78 (.149) -B-

2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045) LEAD ASSIGNMENTS
MIN HEXFET IGBTs, CoPACK
1 - GATE
1 2 3 2 - DRAIN
1- GATE 1- GATE
2- DRAIN
3 - SOURCE 2- COLLECTOR
3- SOURCE
4 - DRAIN 3- EMITTER
4- DRAIN 4- COLLECTOR
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)

3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M 2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information

E XAMPL E : T HIS IS AN IR F 1010

L OT CODE 1789
AS S E MB L E D ON WW 19, 1997 INT E R NAT IONAL PAR T NU MB E R
IN T H E AS S E MB L Y L INE "C" R E CT IF IE R
L OGO
Note: "P" in assembly line
position indicates "Lead-Free" DAT E CODE
YE AR 7 = 1997
AS S E MB L Y
L OT CODE WE E K 19
L INE C

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 IRFB/S/SL31N20DPbF

D2Pak Package Outline

Dimensions are shown in millimeters (inches)

D2Pak Part Marking Information (Lead-Free)

T H IS IS AN IR F 5 3 0 S W IT H P AR T N U M B E R
L OT COD E 80 2 4 IN T E R N AT IO N AL
AS S E M B L E D ON W W 0 2, 20 00 R E C T IF IE R F 5 30 S
IN T H E AS S E M B L Y L IN E "L " L OGO
D AT E C O D E
N ote: "P " in as s em bly lin e Y E AR 0 = 2 0 0 0
po s itio n in dicates "L ead-F r ee" AS S E M B L Y
L O T CO D E W E E K 02
L IN E L

OR
P AR T N U M B E R
IN T E R N AT IO N AL
R E C T IF IE R F 530S
L O GO
D AT E CO D E
P = D E S IG N AT E S L E AD -F R E E
AS S E M B L Y P R O D U C T (O P T IO N AL )
L OT COD E Y E AR 0 = 2 0 0 0
W E E K 02
A = AS S E M B L Y S IT E CO D E

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IRFB/S/SL31N20DPbF

TO-262 Package Outline

IGBT
1- GATE
2- COLLECTOR
3- EMITTER

TO-262 Part Marking Information

EXAMPLE: T HIS IS AN IRL3103L
LOT CODE 1789 PART NUMBER
INT ERNAT IONAL
AS SEMBLED ON WW 19, 1997
RECT IFIER
IN T HE ASS EMBLY LINE "C" LOGO
Note: "P" in as s embly line DAT E CODE
pos ition indicates "Lead-Free" YEAR 7 = 1997
ASS EMBLY
LOT CODE WEEK 19
LINE C

OR
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
DAT E CODE
P = DES IGNAT ES LEAD-FREE
AS S EMBLY PRODUCT (OPTIONAL)
LOT CODE YEAR 7 = 1997
WEEK 19
A = AS S EMBLY S ITE CODE

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 IRFB/S/SL31N20DPbF
D2Pak Tape & Reel Infomation
Dimensions are shown in millimeters (inches)

TRR

1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161) 1.50 (.059)
3.90 (.153) 0.368 (.0145)
0.342 (.0135)

FEED DIRECTION 1.85 (.073) 11.60 (.457)

1.65 (.065) 11.40 (.449) 24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429) 1.25 (.049)
10.70 (.421) 4.72 (.136)
16.10 (.634) 4.52 (.178)
15.90 (.626)

FEED DIRECTION

13.50 (.532) 27.40 (1.079)

12.80 (.504) 23.90 (.941)

330.00 60.00 (2.362)

(14.173) MIN.
MAX.

30.40 (1.197)
NOTES : MAX.
1. COMFORMS TO EIA-418. 26.40 (1.039) 4
2. CONTROLLING DIMENSION: MILLIMETER. 24.40 (.961)
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 3

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
‚ Starting TJ = 25°C, L = 3.8mH Coss eff. is a fixed capacitance that gives the same charging time
RG = 25Ω, IAS = 18A. as Coss while VDS is rising from 0 to 80% VDSS
ƒ ISD ≤ 18A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS, † This is only applied to TO-220AB package
TJ ≤ 175°C
‡ This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.

Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/