Bu2 System Diagram: AMD Griffin

1 2 3 4 5 6 7 8
PCB STACK UP
LAYER 1 : TOP
BU2 SYSTEM DIAGRAM 01
LAYER 2 : SGND DDRII-SODIMM1 DDRII 667/800 MHz
AMD Lion CPU THERMAL
A LAYER 3 : IN1 PAGE 8 Sabie SENSOR A
Griffin 14.318MHz
LAYER 4 : SVCC S1G2 Processor PAGE 6
DDRII-SODIMM2 DDRII 667/800 MHz
638P (uPGA)/35W
LAYER 5 : IN2 CPU_CLK
PAGE 8 PAGE 4,5,6,7
LAYER 6 : IN3 NBGFX_CLK CLOCK GEN
NBGPP_CLK ICS9LPRS480AKLFT
LAYER 7 : SGND1 SBLINK_CLK SLG8SP628VTR
HT LINK
LAYER 8 : BOT RTM880N-795
PAGE 3
PCI-E HDMI/CEC
PAGE 18
X1 X1 X1 X1 NORTH BRIDGE
CRT
LAN Express Card Mini PCI-E Card Mini PCI-E Card RS780M
Marvell
PAGE 19
PCIE-LAN (NEW CARD) HD-DVD (Wireless LAN) 21mm X 21mm, 528pin BGA
B B
8040T/8072 (ROBSON/TV) LVDS
(10/100/GagaLAN)
PAGE 17
PAGE 24 PAGE 24 PAGE 23 PAGE 23
PAGE 9,10,11 LED Driver LED Panel
Mini PCI-E Card x1
RJ45/RJ11 Board
PAGE 17 PAGE 17 HD DVD DECODER x1
PCIE X4 SBSRC_CLK
PAGE 24 NAND FLASH CARD 4,8
IDE/133 USB2.0
PAGE 23 0,10,11 1 2 5 6 7
SATA0 150MB USB2.0 Ports Felice Webcam Fingerprint Bluetooth NEW CARD
SATA - HDD SOUTH BRIDGE
SYSTEM CHARGER(ISL88731) X4 PAGE 20,23 PAGE 25 X1 PAGE 17 PAGE 25 PAGE 25 PAGE 24
PAGE 20
PAGE 30 SB700 PAGE 19
SATA - CD-ROM
SATA1 150MB 21mm X 21mm, 528pin BGA
PCI BUS / 33MHz
SYSTEM POWER ISL6237IRZA-T PAGE 20 4.5W(Ext)
C C
PAGE 31 4.3W(Int)
E-SATA
SATA2 150MB Azalia
PAGE 12,13,14,15,16
CPU CORE ISL6265A
PAGE 20 PCMCIA O2 OZ129T
Controller
PAGE 32 CB1410
G-Sensor SMBUS PAGE22
MDC/FM TUNER PAGE21
LIS3L02AQ3 PAGE 19 LPC CONEXANT
VCCP +1.1V AND +1.2V(MAX8717) CX20561
CONNECTOR
PAGE 33
Keyboard PAGE 29 PAGE 27 PAGE 26 IEEE1394 Memory
CIR PAGE 28 WINBOND KBC PCMCIA CONN CardReader
DDR II SMDDR_VTERM WPC8763LDG PAGE 21 PAGE 22 PAGE 22
1.8V/1.8VSUS(TPS51116REGR) Touch Pad PAGE 25 MDC/FM TUNER HP Audio
PAGE 34 Kill SW PAGE 29 Module Amplifier Amplifier
G1412 G1441 PCI ROUTING
PAGE 28 PAGE 27 TABLE IDSEL INTERUPT DEVICE
DISCHARGE 1.5/1.25/1.2/1.1V
VR (AUDIO CONN)
PAGE 27 PAGE 26 REQ0# / GNT0# AD17 INTE# OZ129T
D PAGE 27 D
PAGE 35 REQ1# / GNT1# AD18 INTF# CB1410
FAN FLASH Digital MIC AUDIO CONN SPEAKER

SPI (HP/ MIC) Conn PROJECT : BU2
PAGE 6 PAGE 28 PAGE 16,26 PAGE 27 PAGE 26 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
BLOCK DIAGRAM
NB4
Date: Wednesday, January 30, 2008 Sheet 1 of 35
1 2 3 4 5 6 7 8
5 4 3 2 1
INDEX
PAGE# DESCRIPTION NOTE
AC IN
Power Sequence
02
1 SCHEMATIC BLOCK DIAGRAM
3V/5VPCU
2 SYSTEM INFORMATION
D D
3 CLOCK GENERATOR_SLG8SP628 NBSWON#

SB700 SM BUS
4 S1G2 HT I/F 1/4
DNBSWON#
5 S1G2 DDRII MEMORY I/F 2/4
SB700 SMBUS SMBUS Function Define
S5_ON/S5
6 S1G2 CTRL & DEBUG 3/4
SMBCLK0
DDR / DDR THER / CLOCK GEN (+3V)
7 S1G2 PWR & GND 4/4 RSMRST# SMBDAT0
SMBCLK1
8 DDR2 SODIMMS: A/B CHANNEL Mini Card/New Card (+3VS5)
SMBDAT1
PCIE_WAKE#
9 RS740/RS780-HT LINK/PCIE I/F 1/4 SMBCLK2
HDMI CEC (+3VS5)
SMBDAT2
10 RS740/RS780-SYSTEM I/F 3/5 SUSC
11 RS740/RS780-POWER5/5
SUSB
12 SB700-PCIE/PCI/CPU/LPC 1/4
C C
SUSON
13 SB700-ACPI/GPIO/USB 2/4
14 SB700-ACPI/GPIO/USB 2/4 MAINON KBC(EC) SM BUS

15 SB700-PWR/DECOUPLING 4/4
VR_ON
16 SB700-STRAPS & PWRGD KBC SMBUS SMBUS Function Define
CPU_CORE
17 LCD/LED PANEL/LID/CAMERA MBCLK
BATTERY (+3VPCU)
MBDAT
18 HDMI/HDMI-CEC(R5F211A) VRM_PWRGD
2ND_MBCLK
CPU THER / SENSOR/EC (+3V/PCU)
19 CRT & G-SENSOR(LIS3L02A) 2ND_MBDATA
1.2_ON
3ND_MBCLK
20 SATA HDD/ODD & ESATA/USB HDMI CEC / TOUCH SEN(+3VS5)
3ND_MBDATA
NB_CORE
21 PCMCIA(CB1410) -OPTION
22 OZ129T(5IN1/1394) HWPG
B B
23 MINI CARD & NAND FLASH CARD

ECPWROK
24 NEW CARD & RJ45 BOARD/BEEP
NB_PWRGD_IN
25 TP/FP/BT/PB/FELICA/MMB CONN
26 CONEXANT(CX205601)/SPK/AMP SB_PWRGD_IN
27 JACK/VR/FM/MIC/MDC/AMPLIFIER
CPU CLK IN
28 EC(KBC)-WPCPC8763/WPC8769
CPU RESET
29 KEYBOARD/LED/KILL SW/HOLE
30 CHARGER (ISL6251A) CPU POWER OK
31 SYSTEM 5V/3V (ISL6237)

CPU_LDTSTOP#
32 AMD GRIFFIN (ISL6265)
A A
33 +NB_CORE (RT8202)
34 DDR 1.8V(TPS51116)
35 DISCHARGE (1.25V/1.5V)
PROJECT : BU2
Quanta Computer Inc.
Custom 1A
SYSTEM INFORMATION
NB4
Date: Thursday, November 08, 2007 Sheet 2 of 35
5 4 3 2 1
5 4 3 2 1
CLK_GEN_SLG8SP628 03
+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO
L45 L46
BK1608HS600 BK1608HS600
C448 C238 C453 C232 C233 C472 C474 C241 C454 C473 C455 C463 C458 C452
D 22u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 22u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 D
ICS9LPRS480 P/N : Clock chip has internal serial terminations

for differencial pairs, external resistors are
SLG8SP628 P/N : AL8SP628000 reserved for debug purpose.
RTM880N-796 P/N : AL000880000

Place within 0.5"
of CLKGEN R369
U31
*261/F_4
4 50 CPUCLKP_R RP63 1 2 0_4P2R_4
+3V +3V_CLK_48 +3V_CLK_VDD VDDDOT CPUK8_0T CPU_CLKP (6,12)
16 49 CPUCLKN_R 3 4 To CPU
VDDSRC CPUK8_0C CPU_CLKN (6,12)
L49 26
VDDATIG
35
BK1608HS600 VDDSB_SRC NBGFX_CLKP_R RP66
40 30 1 2 0_4P2R_4 NBGFX_CLKP (10)
C461 VDDSATA ATIG0T NBGFX_CLKN_R To NB
48 29 3 4 NBGFX_CLKN (10)
VDDCPU ATIG0C
55 28
2.2u/6.3V_6 VDDHTT ATIG1T
56 27
VDDREF ATIG1C
63
VDD48
37 SBLINK_CLKP_R RP62 1 2 0_4P2R_4
C SB_SRC0T SB_REFCLKP (10) C
11 36 SBLINK_CLKN_R 3 4 To NB
+1.2V_CLK_VDDIO VDDSRC_IO0 SB_SRC0C SB_REFCLKN (10)
17 32 SBSRC_CLKP_R RP64 1 2 0_4P2R_4
VDDSRC_IO1 SB_SRC1T SBSRC_CLKP (12)
25 31 SBSRC_CLKN_R 3 4 To SB
VDDATIG_IO SB_SRC1C SBSRC_CLKN (12)
34
VDDSB_SRC_IO
47
VDDCPU_IO NBGPP_CLKP_R RP67 0_4P2R_4 NBGPP_CLKP
22 1 2 T101
SRC0T NBGPP_CLKN_R NBGPP_CLKN
21 3 4 T102
SRC0C CLK_PCIE_NEW_R RP68 NEW@0_4P2R_4
1 20 1 2 CLK_PCIE_NEW (12,24)
C460 GND48 SRC1T CLK_PCIE_NEW#_R To New Card
7 19 3 4 CLK_PCIE_NEW# (12,24)
CG_XIN GNDDOT SRC1C CLK_PCIE_MINI_R RP72 0_4P2R_4 CLK_PCIE_MINI
10 15 1 2
GNDSRC0 SRC2T CLK_PCIE_MINI#_R CLK_PCIE_MINI# To Mini PCIE Slot
18 14 3 4
2
33p/50V_4 GNDSRC1 SRC2C CLK_PCIE_MINI2_R RP71 0_4P2R_4

Y6
24
33
GNDATIG QFN64 SRC3T
13
12 CLK_PCIE_MINI2#_R
1
3
2
4
CLK_PCIE_MINI2 (12,23)
To Mini PCIE Slot
GNDSB_SRC SRC3C CLK_PCIE_MINI2# (12,23)
14.318MHZ 43 9 CLK_PCIE_LAN_R RP73 1 2 0_4P2R_4 CLK_PCIE_LAN
C462 GNDSATA SRC4T CLK_PCIE_LAN#_R CLK_PCIE_LAN# To LAN Controller
46 8 3 4
1
CG_XOUT GNDCPU SRC4C

52
GNDHTT NB CLOCK INPUT TABLE
60
33p/50V_4 GNDREF NB CLOCKS RX780 RS780
42 T40
SRC6T/SATAT
41 T42
CG_XIN SRC6C/SATAC HT_REFCLKP 100M DIFF 100M DIFF
61 6 T45
CG_XOUT X1 SRC7T/27M_SS
62 5 T44
X2 SRC7C/27M_NS
Rev:2A 12/07 Cahnge C460/C462 Load Capacitance For Matching Crystal.. HT_REFCLKN 100M DIFF 100M DIFF
2 54 NBHT_REFCLKP_R RP65 1 2 0_4P2R_4 REFCLK_P 14M SE (1.8V) 14M SE (1.1V)

(8,13) PCLK_SMB SMBCLK HTT0T/66M HT_REFCLKP (10)
3 53 NBHT_REFCLKN_R 3 4 To NB
(8,13) PDAT_SMB SMBDAT HTT0C/66M HT_REFCLKN (10)
REFCLK_N NC vref
CLK_PD# 51 64 CLK_48M_USB_R R385 33_4 To SB GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*

PD# 48MHz_0 CLK_48M_USB (13)
GPP_REFCLK 100M DIFF NC or 100M DIFF OUTPUT
T43 23 59 SEL_HTT66
New Card CLKREQ# NEW_CLKREQ# CLKREQ0# REF0/SEL_HTT66 SEL_SATA GPPSB_REFCLK 100M DIFF 100M DIFF
(13,24) NEW_CLKREQ# 45 58
CLKREQ1# REF1/SEL_SATA SEL_27 R178 158/F_4 To NB
B
T41 44 57 EXT_NB_OSC (10)
B
C227 CLKREQ2# REF2/SEL_27 R374 90.9/F_4
T38 39
CLKREQ3#
T39 38
0.1u/10V_4 CLKREQ4#
TGND0
TGND1
TGND2
TGND3
TGND4
TGND5
TGND6
TGND7
TGND8
TGND9
R4004/R4005 (value may change)

NB_OSC
+3V_CLK_VDD SLG8SP628
65
66
67
68
69
70
71
72
73
74
RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11

R368 8.2K_4 NEW_CLKREQ# RX780 1.8V 82.5R/130R RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15
R371 8.2K_4 CLK_PD#
RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00
RS780 1.1V 158R/90.9R RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15
+3V_CLK_VDD FOR EXTERMAL/INTERNAL CLOCK

R377 CLK_PCIE_MINI 4 3 RP70
PCIE_CLK_MINI (12,23)
8.2K_4 1 66 MHz 3.3V single ended HTT clock CLK_PCIE_MINI# 2 1 0_4P2R_4
PCIE_CLK_MINI# (12,23)
SEL_HTT66
SEL_SATA 0* 100 MHz differential HTT clock
SEL_HTT66 CLK_PCIE_LAN 2 1 RP45
PCIE_CLK_LAN (12,24)
SEL_27 1* 100 MHz non-spreading differential SRC clock CLK_PCIE_LAN# 4 3 0_4P2R_4
PCIE_CLK_LAN# (12,24)
SEL_SATA
0 100 MHz spreading differential SRC clock
R181 R380 R373
*8.2K_4 8.2K_4 8.2K_4 1 27MHz and 27M SS outputs
A
SEL_27
0* 100 MHz SRC clock
Place Close to Drivers Side A
* default
PROJECT : BU2
Custom 1A
CLOCK GENERATOR_SLG8SP628
NB4
Date: Thursday, July 24, 2008 Sheet 3 of 35
5 4 3 2 1
5 4 3 2 1
04
+1.2V_VLDT U26A +1.2V_VLDT
D D
D1 VLDT_A0 HT LINK VLDT_B0 AE2

D2 VLDT_A1 VLDT_B1 AE3
(9) HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 (9)

(9) HT_NB_CPU_CAD_L0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 HT_CPU_NB_CAD_L0 (9)
(9) HT_NB_CPU_CAD_H1 E1 L0_CADIN_H1 L0_CADOUT_H1 AC2 HT_CPU_NB_CAD_H1 (9)
(9) HT_NB_CPU_CAD_L1 F1 L0_CADIN_L1 L0_CADOUT_L1 AC3 HT_CPU_NB_CAD_L1 (9)
(9) HT_NB_CPU_CAD_H2 G3 L0_CADIN_H2 L0_CADOUT_H2 AB1 HT_CPU_NB_CAD_H2 (9)
(9) HT_NB_CPU_CAD_L2 G2 L0_CADIN_L2 L0_CADOUT_L2 AA1 HT_CPU_NB_CAD_L2 (9)
(9) HT_NB_CPU_CAD_H3 G1 L0_CADIN_H3 L0_CADOUT_H3 AA2 HT_CPU_NB_CAD_H3 (9)
(9) HT_NB_CPU_CAD_L3 H1 L0_CADIN_L3 L0_CADOUT_L3 AA3 HT_CPU_NB_CAD_L3 (9)
J1 W2 +1.2V +1.2V_VLDT
HT_CPU_NB_CAD_H4 (9)
(9)
(9)
(9)
HT_NB_CPU_CAD_H4
HT_NB_CPU_CAD_L4
HT_NB_CPU_CAD_H5
K1
L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
W3
V1
HT_CPU_NB_CAD_L4 (9)
HT_CPU_NB_CAD_H5 (9) R82 0_8 Place close to socket
(9) HT_NB_CPU_CAD_L5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 HT_CPU_NB_CAD_L5 (9)
(9) HT_NB_CPU_CAD_H6 L1 L0_CADIN_H6 L0_CADOUT_H6 U2 HT_CPU_NB_CAD_H6 (9)
M1 U3 HT_CPU_NB_CAD_L6 (9) R81 0_8
(9) HT_NB_CPU_CAD_L6 L0_CADIN_L6 L0_CADOUT_L6
(9) HT_NB_CPU_CAD_H7 N3 L0_CADIN_H7 L0_CADOUT_H7 T1 HT_CPU_NB_CAD_H7 (9)
(9) HT_NB_CPU_CAD_L7 N2 L0_CADIN_L7 L0_CADOUT_L7 R1 HT_CPU_NB_CAD_L7 (9)
E5 AD4 HT_CPU_NB_CAD_H8 (9) C221 C220 C219 C71 C218 C80 C72
(9) HT_NB_CPU_CAD_H8 L0_CADIN_H8 L0_CADOUT_H8
C (9) HT_NB_CPU_CAD_L8 F5 L0_CADIN_L8 L0_CADOUT_L8 AD3 HT_CPU_NB_CAD_L8 (9) C
F3 AD5 HT_CPU_NB_CAD_H9 (9) 4.7u/6.3V_6 4.7u/6.3V_6 0.22u/6.3V_4 0.22u/6.3V_4 180P_4 180P_4 4.7u/6.3V_6
(9) HT_NB_CPU_CAD_H9 L0_CADIN_H9 L0_CADOUT_H9
(9) HT_NB_CPU_CAD_L9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 HT_CPU_NB_CAD_L9 (9)
(9) HT_NB_CPU_CAD_H10 G5 L0_CADIN_H10 L0_CADOUT_H10 AB4 HT_CPU_NB_CAD_H10 (9)
(9) HT_NB_CPU_CAD_L10 H5 L0_CADIN_L10 L0_CADOUT_L10 AB3 HT_CPU_NB_CAD_L10 (9)
(9) HT_NB_CPU_CAD_H11 H3 L0_CADIN_H11 L0_CADOUT_H11 AB5 HT_CPU_NB_CAD_H11 (9)
(9) HT_NB_CPU_CAD_L11 H4 L0_CADIN_L11 L0_CADOUT_L11 AA5 HT_CPU_NB_CAD_L11 (9)
(9) HT_NB_CPU_CAD_H12 K3 L0_CADIN_H12 L0_CADOUT_H12 Y5 HT_CPU_NB_CAD_H12 (9) * If VLDT is connected only on one side,
(9) HT_NB_CPU_CAD_L12 K4 L0_CADIN_L12 L0_CADOUT_L12 W5 HT_CPU_NB_CAD_L12 (9) one 4.7uF cap should be added to
(9) HT_NB_CPU_CAD_H13 L5 L0_CADIN_H13 L0_CADOUT_H13 V4 HT_CPU_NB_CAD_H13 (9)
M5 V3 HT_CPU_NB_CAD_L13 (9)
the island side
(9) HT_NB_CPU_CAD_L13 L0_CADIN_L13 L0_CADOUT_L13
(9) HT_NB_CPU_CAD_H14 M3 L0_CADIN_H14 L0_CADOUT_H14 V5 HT_CPU_NB_CAD_H14 (9)
(9) HT_NB_CPU_CAD_L14 M4 L0_CADIN_L14 L0_CADOUT_L14 U5 HT_CPU_NB_CAD_L14 (9)
(9) HT_NB_CPU_CAD_H15 N5 L0_CADIN_H15 L0_CADOUT_H15 T4 HT_CPU_NB_CAD_H15 (9)
(9) HT_NB_CPU_CAD_L15 P5 L0_CADIN_L15 L0_CADOUT_L15 T3 HT_CPU_NB_CAD_L15 (9)
(9) HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 (9)

(9) HT_NB_CPU_CLK_L0 J2 L0_CLKIN_L0 L0_CLKOUT_L0 W1 HT_CPU_NB_CLK_L0 (9)
(9) HT_NB_CPU_CLK_H1 J5 L0_CLKIN_H1 L0_CLKOUT_H1 Y4 HT_CPU_NB_CLK_H1 (9)
(9) HT_NB_CPU_CLK_L1 K5 L0_CLKIN_L1 L0_CLKOUT_L1 Y3 HT_CPU_NB_CLK_L1 (9)
(9) HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 (9)

(9) HT_NB_CPU_CTL_L0 P1 L0_CTLIN_L0 L0_CTLOUT_L0 R3 HT_CPU_NB_CTL_L0 (9)
(9) HT_NB_CPU_CTL_H1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CPU_NB_CTL_H1 (9)
B (9) HT_NB_CPU_CTL_L1 P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5 HT_CPU_NB_CTL_L1 (9) B
SOCKET_638_PIN
C26 D26 E26 F26 G26 H26 J26 K26 L26 M26 N26 P26 R26 T26 U26 V26 W26 Y26 AA26 AB26 AC26 AD26
B25 C25 D25 E25 F25 G25 H25 J25 K25 L25 M25 N25 P25 R25 T25 U25 V25 W25 Y25 AA25 AB25 AC25 AD25 AE25
A24 B24 C24 D24 E24 F24 G24 H24 J24 K24 L24 M24 N24 P24 R24 T24 U24 V24 W24 Y24 AA24 AB24 AC24 AD24 AE24 AF24
A20 B20 C20 D20 E20 F20 H20 J20 K20 L20 M20 N20 P20 R20 T20 U20 V20 Y20 AA20 AB20 AC20 AD20 AE20 AF20
A19 B19 C19 D19 E19 F19 H19 J19 K19 L19 M19 N19 P19 R19 T19 U19 V19 Y19 AA19 AB19 AC19 AD19 AE19 AF19
A15 B15 C15 D15 E15 F15 G15 H15 J15 K15 L15 T15 U15 V15 W15 Y15 AA15 AB15 AC15 AD15 AE15 AF15
A A
A8 B8 C8 D8 E8 F8 H8 J8 K8 L8 M8 N8 P8 R8 T8 U8 V8 W8 AA8 AB8 AC8 AD8 AE8 AF8
A7 B7 C7 D7 E7 F7 H7 J7 K7 L7 M7 N7 P7 R7 T7 U7 V7 W7 AA7 AB7 AC7 AD7 AE7 AF7
PROJECT : BU2
CPU

A3 B3 C3 D3 E3 F3 G3 H3 J3 K3 L3 M3 N3 P3 R3 T3 U3 V3 W3 Y3 AA3 AB3 AC3 AD3 AE3
C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 N2 P2 R2 T2 U2 V2 W2 Y2 AA2 AB2 AC2 AD2 AE2
A1 C1 D1 E1 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 AC1 AD1
BGA638_50_26SQ_S1G2_OEM Size Document Number Rev

B 1A
S1G2 HT I/F 1/4
NB4
5 4 3 2 1
A B C D E
CPU
+1.8VSUS
R327
1K/F_4
05
Processor Memory Interface
+SMDDR_VTERM U26B +SMDDR_VTERM R323 C398 C388 U26C
PLACE THEM CLOSE MEM:DATA
(8) MEM_MB_DATA[0..63] MEM_MA_DATA[0..63] (8)
4 D10 W10 1K/F_4 MEM_MB_DATA0 C11 G12 MEM_MA_DATA0 4
TO CPU WITHIN 1" VTT1
C10 MEM:CMD/CTRL/CLK VTT5 AC10 1000P_4 0.1u/10V_4 MEM_MB_DATA1 A11
MB_DATA0 MA_DATA0
F12 MEM_MA_DATA1
VTT2 VTT6 MEM_MB_DATA2 MB_DATA1 MA_DATA1 MEM_MA_DATA2
B10 AB10 A14 H14
AD10 AA10 B14 G14
A10 G11 H11
R324 39.2F_4 M_ZP VTT9 MEM_MB_DATA5 MB_DATA4 MA_DATA4 MEM_MA_DATA5
AF10 E11 H12
R325 39.2F_4 M_ZN MEMZP CPU_VTT_SENSE MEM_MB_DATA6 MB_DATA5 MA_DATA5 MEM_MA_DATA6
+1.8VSUS AE10 Y10 CPU_VTT_SENSE (34) D12 C13
MEMZN VTT_SENSE MEM_MB_DATA7 MB_DATA6 MA_DATA6 MEM_MA_DATA7
A13 E13
MEM_MA_RESET# MEMVREF_CPU MEM_MB_DATA8 MB_DATA7 MA_DATA7 MEM_MA_DATA8
T32 H16 W17 A15 H15
RSVD_M1 MEMVREF MEM_MB_DATA9 MB_DATA8 MA_DATA8 MEM_MA_DATA9
A16 E15
MEM_MB_RESET# MEM_MB_DATA10 MB_DATA9 MA_DATA9 MEM_MA_DATA10
(8) MEM_MA0_ODT0 T19 B18 T97 A19 E17
MA0_ODT0 RSVD_M2 MEM_MB_DATA11 MB_DATA10 MA_DATA10 MEM_MA_DATA11
(8) MEM_MA0_ODT1 V22 A20 H17
MEM_MA1_ODT0 MA0_ODT1 MEM_MB_DATA12 MB_DATA11 MA_DATA11 MEM_MA_DATA12
T15 U21 W26 MEM_MB0_ODT0 (8) C14 E14
MEM_MA1_ODT1 MA1_ODT0 MB0_ODT0 MEM_MB_DATA13 MB_DATA12 MA_DATA12 MEM_MA_DATA13
T14 V19 W23 MEM_MB0_ODT1 (8) D14 F14
MA1_ODT1 MB0_ODT1 MEM_MB1_ODT0 MEM_MB_DATA14 MB_DATA13 MA_DATA13 MEM_MA_DATA14
Y26 T83 C18 C17
MB1_ODT0 MEM_MB_DATA15 MB_DATA14 MA_DATA14 MEM_MA_DATA15
(8) MEM_MA0_CS#0 T20 D18 G17
MA0_CS_L0 MEM_MB_DATA16 MB_DATA15 MA_DATA15 MEM_MA_DATA16
(8) MEM_MA0_CS#1 U19 V26 MEM_MB0_CS#0 (8) D20 G18
CPU_MA1_CS_L0 MA0_CS_L1 MB0_CS_L0 MEM_MB_DATA17 MB_DATA16 MA_DATA16 MEM_MA_DATA17
T11 U20 W25 MEM_MB0_CS#1 (8) A21 C19
CPU_MA1_CS_L1 MA1_CS_L0 MB0_CS_L1 CPU_MB1_CS_L0 MEM_MB_DATA18 MB_DATA17 MA_DATA17 MEM_MA_DATA18
T10 V20 U22 T18 D24 D22
MA1_CS_L1 MB1_CS_L0 MEM_MB_DATA19 MB_DATA18 MA_DATA18 MEM_MA_DATA19
C25 E20
MEM_MB_DATA20 MB_DATA19 MA_DATA19 MEM_MA_DATA20
(8) MEM_MA_CKE0 J22 J25 MEM_MB_CKE0 (8) B20 E18
MA_CKE0 MB_CKE0 MEM_MB_DATA21 MB_DATA20 MA_DATA20 MEM_MA_DATA21
(8) MEM_MA_CKE1 J20 H26 MEM_MB_CKE1 (8) C20 F18
MA_CKE1 MB_CKE1 MEM_MB_DATA22 MB_DATA21 MA_DATA21 MEM_MA_DATA22
B24 B22
CPU_MA_CLK_H5 CPU_MB_CLK_H5 MEM_MB_DATA23 MB_DATA22 MA_DATA22 MEM_MA_DATA23
T26 N19 P22 T22 C24 C23
CPU_MA_CLK_L5 MA_CLK_H5 MB_CLK_H5 CPU_MB_CLK_L5 MEM_MB_DATA24 MB_DATA23 MA_DATA23 MEM_MA_DATA24
To SODIMM socket A (near)

T24 N20 R22 T19 E23 F20
MEM_MA_CLK1_P MA_CLK_L5 MB_CLK_L5 MEM_MB_CLK1_P MEM_MB_DATA25 MB_DATA24 MA_DATA24 MEM_MA_DATA25
(8) MEM_MA_CLK1_P E16 A17 MEM_MB_CLK1_P (8) E24 F22
MEM_MA_CLK1_N MA_CLK_H1 MB_CLK_H1 MEM_MB_CLK1_N MEM_MB_DATA26 MB_DATA25 MA_DATA25 MEM_MA_DATA26
F16 A18 G25 H24
To SODIMM socket B (Far)

(8) MEM_MA_CLK1_N MA_CLK_L1 MB_CLK_L1 MEM_MB_CLK1_N (8) MB_DATA26 MA_DATA26
MEM_MA_CLK7_P Y16 AF18 MEM_MB_CLK7_P MEM_MB_DATA27 G26 J19 MEM_MA_DATA27
(8) MEM_MA_CLK7_P MA_CLK_H7 MB_CLK_H7 MEM_MB_CLK7_P (8) MB_DATA27 MA_DATA27
MEM_MA_CLK7_N AA16 AF17 MEM_MB_CLK7_N MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
(8) MEM_MA_CLK7_N MA_CLK_L7 MB_CLK_L7 MEM_MB_CLK7_N (8) MB_DATA28 MA_DATA28
T23 CPU_MA_CLK_H4 P19 R26 CPU_MB_CLK_H4 MEM_MB_DATA29 D26 E22 MEM_MA_DATA29
MA_CLK_H4 MB_CLK_H4 T85 MB_DATA29 MA_DATA29
T17 CPU_MA_CLK_L4 P20 R25 CPU_MB_CLK_L4 MEM_MB_DATA30 G23 H20 MEM_MA_DATA30
MA_CLK_L4 MB_CLK_L4 T87 MB_DATA30 MA_DATA30
MEM_MB_DATA31 G24 H22 MEM_MA_DATA31
(8) MEM_MA_ADD[0..15] MEM_MB_ADD[0..15] (8) MB_DATA31 MA_DATA31
MEM_MA_ADD0 N21 P24 MEM_MB_ADD0 MEM_MB_DATA32 AA24 Y24 MEM_MA_DATA32
3
MEM_MA_ADD1 MA_ADD0 MB_ADD0 MEM_MB_ADD1 MEM_MB_DATA33 MB_DATA32 MA_DATA32 MEM_MA_DATA33
3
M20 N24 AA23 AB24
N22 P26 AD24 AB22
M19 N23 AE24 AA21
M22 N26 AA26 W22
L20 L23 AA25 W21
M24 N25 AD26 Y22
L21 L24 AE25 AA22
L19 M26 AC22 Y20
K22 K26 AD22 AA20
R21 T26 AE20 AA18
L22 L26 AF20 AB18
K20 L25 AF24 AB21
V24 W24 AF23 AD21
K24 J23 AC20 AD19
K19 J24 AD20 Y18
MA_ADD15 MB_ADD15 MEM_MB_DATA48 MB_DATA47 MA_DATA47 MEM_MA_DATA48
AD18 AD17
(8) MEM_MA_BANK0 R20 R24 MEM_MB_BANK0 (8) AE18 W16
MA_BANK0 MB_BANK0 MEM_MB_DATA50 MB_DATA49 MA_DATA49 MEM_MA_DATA50
(8) MEM_MA_BANK1 R23 U26 MEM_MB_BANK1 (8) AC14 W14
(8) MEM_MA_BANK2 J21 J26 MEM_MB_BANK2 (8) AD14 Y14
AF19 Y17
(8) MEM_MA_RAS# R19 U25 MEM_MB_RAS# (8) AC18 AB17
MA_RAS_L MB_RAS_L MEM_MB_DATA54 MB_DATA53 MA_DATA53 MEM_MA_DATA54
(8) MEM_MA_CAS# T22 U24 MEM_MB_CAS# (8) AF16 AB15
MA_CAS_L MB_CAS_L MEM_MB_DATA55 MB_DATA54 MA_DATA54 MEM_MA_DATA55
(8) MEM_MA_WE# T24 U23 MEM_MB_WE# (8) AF15 AD15
MA_WE_L MB_WE_L MEM_MB_DATA56 MB_DATA55 MA_DATA55 MEM_MA_DATA56
AF13 AB13
AC12 AD13
SOCKET_638_PIN MEM_MB_DATA58 MB_DATA57 MA_DATA57 MEM_MA_DATA58
AB11 Y12
Y11 W11
AE14 AB14
AF14 AA14
AF11 AB12
AD11 AA12
MEM_MA_CLK1_P MEM_MB_CLK1_P MB_DATA63 MA_DATA63
(8) MEM_MB_DM[0..7] MEM_MA_DM[0..7] (8)
2 MEM_MB_DM0 A12 E12 MEM_MA_DM0 2
C439 C435 MEM_MB_DM1 MB_DM0 MA_DM0 MEM_MA_DM1
B16 C15
1.5P_4 MEM_MB_DM2 MB_DM1 MA_DM1 MEM_MA_DM2
A22 E19
1.5P_4 MEM_MB_DM3 MB_DM2 MA_DM2 MEM_MA_DM3
E25 F24
MEM_MA_CLK1_N MEM_MB_CLK1_N MEM_MB_DM4 MB_DM3 MA_DM3 MEM_MA_DM4
AB26 AC24
MEM_MB_DM5 MB_DM4 MA_DM4 MEM_MA_DM5
AE22 Y19
MEM_MB_DM6 MB_DM5 MA_DM5 MEM_MA_DM6
AC16 AB16
MEM_MA_CLK7_P MEM_MB_CLK7_P MEM_MB_DM7 MB_DM6 MA_DM6 MEM_MA_DM7
AD12 Y13
MB_DM7 MA_DM7
C64 C399 C12 G13
(8) MEM_MB_DQS0_P MB_DQS_H0 MA_DQS_H0 MEM_MA_DQS0_P (8)
1.5P_4 B12 H13
(8) MEM_MB_DQS0_N MB_DQS_L0 MA_DQS_L0 MEM_MA_DQS0_N (8)
1.5P_4 D16 G16
MEM_MA_CLK7_N MEM_MB_CLK7_N
Place close to CPU within 1500 mils (8) MEM_MB_DQS1_N C16
A24
MB_DQS_L1 MA_DQS_L1
G15
C22
MEM_MA_DQS1_N (8)
(8) MEM_MB_DQS2_N A23 C21 MEM_MA_DQS2_N (8)
MB_DQS_L2 MA_DQS_L2
(8) MEM_MB_DQS3_P F26 G22 MEM_MA_DQS3_P (8)
MB_DQS_H3 MA_DQS_H3
(8) MEM_MB_DQS3_N E26 G21 MEM_MA_DQS3_N (8)
MB_DQS_L3 MA_DQS_L3
(8) MEM_MB_DQS4_P AC25 AD23 MEM_MA_DQS4_P (8)
MB_DQS_H4 MA_DQS_H4
(8) MEM_MB_DQS4_N AC26 AC23 MEM_MA_DQS4_N (8)
+SMDDR_VTERM MB_DQS_L4 MA_DQS_L4
(8) MEM_MB_DQS5_P AF21 AB19 MEM_MA_DQS5_P (8)
MB_DQS_H5 MA_DQS_H5
(8) MEM_MB_DQS5_N AF22 AB20 MEM_MA_DQS5_N (8)
MB_DQS_L5 MA_DQS_L5
(8) MEM_MB_DQS6_P AE16 Y15 MEM_MA_DQS6_P (8)
MB_DQS_H6 MA_DQS_H6
(8) MEM_MB_DQS6_N AD16 W15 MEM_MA_DQS6_N (8)
C390 C389 C225 C224 C397 C394 C392 C396 MB_DQS_L6 MA_DQS_L6
(8) MEM_MB_DQS7_P AF12 W12 MEM_MA_DQS7_P (8)
MB_DQS_H7 MA_DQS_H7
(8) MEM_MB_DQS7_N AE12 W13 MEM_MA_DQS7_N (8)
4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 0.22u/6.3V_4 MB_DQS_L7 MA_DQS_L7
SOCKET_638_PIN
+SMDDR_VTERM
1 1
C391 C395 C400 C393 C198 C94 C222 C223
1000P_4 1000P_4 1000P_4 1000P_4 180P_4 180P_4 180P_4 180P_4
PROJECT : BU2
Place close to socket
Custom 1A
S1G2 DDRII MEMORY I/F 2/4
NB4
A B C D E
5 4 3 2 1
CPU THERM
06
+2.5V
L44 250mA
CPU 0805CS_820EGTS_8
+2.5V_CPU_VDDA_RUN
1
C226 C444 82NH 2% 400MA C437 C438 C436
C440 3900P_4 U26D +1.8VSUS
(3,12) CPU_CLKP
10u/6.3V_8 4.7u/6.3V_6 0.22u/6.3V_4 3300P_4
*100u/6.3V_3528 F8 M11
2
VDDA1 KEY1
CPU CLK R352 F9 VDDA2 KEY2 W18
3
169/F_6 CPU_CLKIN_P A9 A6 CPU_SVC_R Q13
W/S= 15 mil/20mil (3,12) CPU_CLKN
C441 3900P_4 CPU_CLKIN_N A8
CLKIN_H
CLKIN_L
SVC
SVD A4 CPU_SVD_R
R74
(16,28,32) VRM_PWRGD 2
CPU_LDT_RST# B7
CPU_PWRGD RESET_L *0_4
(12) CPU_PWRGD A7 PWROK
D CPU_LDT_STOP# CPU_THERMTRIP_L# FDV301N D
(10,12) CPU_LDT_STOP# F10 LDTSTOP_L THERMTRIP_L AF6
CPU_LDT_REQ#_CPU C6 AC7 CPU_PROCHOT_L#
1
LDTREQ_L PROCHOT_L CPU_MEMHOT_L#
MEMHOT_L AA8
SideBand Temp sense I2C CPU_SIC AF4
CPU_SID SIC
AF5 SID
place them to CPU within 1.5" CPU_ALERT AE6 W7 CPU_THERMDC R97 0_4 H_THRMDC +1.8VSUS R73
ALERT_L THERMDC CPU_THERMDA R100 0_4 H_THRMDA R62
W8
CPU POWER-UP Rev:3A 01/29 Change to S0 domain save power during S3 since SB .
+1.2V_VLDT
R106
R110
44.2/F_4
44.2/F_4
CPU_HTREF0
CPU_HTREF1
R6
P6
HT_REF0
HT_REF1
THERMDA
R68
1K_4
100K_4
(32) CPU_VDD0_RUN_FB_H F6 VDD0_FB_H VDDIO_FB_H W9 VDDIO_FB_H (34)
2
E6 Y9 300_4
+1.8V (32) CPU_VDD0_RUN_FB_L VDD0_FB_L VDDIO_FB_L VDDIO_FB_L (34)
Y6 H6 CPU_THERMTRIP_L# 1 3
(32) CPU_VDD1_RUN_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_RUN_FB_H (32) SYS_SHDN# (31)
CPU_LDT_RST# R354 300_4 AB6 G6 Q12
(32) CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L (32)
MMBT3904
CPU_LDT_STOP# R353 300_4 CPU_DBRDY G10
CPU_TMS DBRDY CPU_DBREQ# R61 *0_4
AA9 TMS DBREQ_L E10 route as differential CPU_THERMTRIP# (13)
C577 0.1U/10V_4 CPU_PWRGD R355 300_4 CPU_TCK AC9 as short as possible
CPU_TRST# TCK CPU_TDO
AD9 TRST_L TDO AE9 testpoint under package
CPU_LDT_REQ#_CPU R356 300_4 CPU_TDI AF9 Rev:3A 02/05 System will Leakage when system into G3 mode.
TDI
CPU_TEST23_TSTUPD AD7 J7 CPU_TEST28_H_PLLCHRZ
T77 TEST23 TEST28_H T28
H8 CPU_TEST28_L_PLLCHRZ +1.8VSUS +1.8VSUS +3V
TEST28_L T29
Rev:2A 12/06 Add 0.1u For AMD CPU issue. CPU_TEST18_PLLTEST0 H10
T25 TEST18
Rev:3A 01/29 Change to 4.7K CPU_TEST19_PLLTEST1 G9 D7 CPU_TEST17_BP3
+3V T31 TEST19 TEST17 T95
R577 *300_4 E7 CPU_TEST16_BP2
TEST16 T35
+3V CNTR_VREF +1.8VSUS R357 *300_4 CPU_TEST25_BYPASSCLK_H E9 F7 CPU_TEST15_BP1 R55 R78 R86
TEST25_H TEST15 T98
R358 *300_4 CPU_TEST25_BYPASSCLK_L E8 C7 CPU_TEST14_BP0
TEST25_L TEST14 T96
R63 +1.8VSUS R578 *300_4 300_4 10K_4 *10K_4
R75 20K/F_04 CNTR_VREF CPU_TEST21_SCANEN AB8 C3
T78 TEST21 TEST7
4.7K_4 CPU_TEST20_SCANCLK2 AF7 K8
T76 TEST20 TEST10
2
2
Q11 CPU_TEST24_SCANCLK1 AE7
T75 TEST24
C68 0.1U/10V_4 CPU_TEST22_SCANSHIFTEN AE8 C4
C T74 TEST22 TEST8 C
1 3 CPU_LDT_RST_HTPA# CPU_TEST12_SCANSHIFTEN AC8 CPU_PROCHOT_L# 1 3
T79 TEST12 AMD_PROCHOT# (28)
+1.8VSUS R326 *300_4 CPU_TEST27_SINGLECHAIN AF8 Q15
FDV301N TEST27 CPU_TEST29_H_FBCLKOUT MMBT3904
TEST29_H C9 T36
R76 34.8K/F_4 R347 0_4 CPU_TEST9_ANALOGIN C2 C8 CPU_TEST29_L_FBCLKOUT
TEST9 TEST29_L T37
AA6 R84 0_4
TEST6 CPU_PROCHOT# (12)
G5 1 2 *SHORT_ PAD1 For Debug Only
2
Q14 A3 H18
RSVD1 RSVD10
A5 RSVD2 RSVD9 H19
CPU_LDT_REQ#_CPU 1 3 B3 AA7
R77 0_4 CPU_LDT_RST# RSVD3 RSVD8
CPU_LDT_RST# (10,12) B5 RSVD4 RSVD7 D5
*FDV301N C1 C5 +1.8VSUS +1.8VSUS
RSVD5 RSVD6
R65 0_4
CPU_LDT_REQ# (10)
Rev:3C 05/09 Follow AMD Design Guide add termination resistor. SOCKET_638_PIN
R80 R79
300_4 10K_4
Rev:3A 01/29 Change pull-up Resistors to 2.2K
+3V
CPU FAN
2
Q16
+5V CNTR_VREF +1.8VSUS MMBT3904
R307 CPU_MEMHOT_L#
FANPWR = 1.6*VSET 3 1 CPU_MEMHOT# (8,13)
10K_4
C32 R69 R72 R88
(28) FANSIG
2.2u/16V_6 C378
*.01u/16V_4
2.2K_4 2.2K_4 *1K_4 Reserve Test Port +1.8VSUS
CN18 R70 *0_4 CPU_SIC CPU_DBREQ# R591 300_4
(13) SB_SCLK3
U3
2 3 TH_FAN_POWER CPU_TEST20_SCANCLK2 R594 300_4
VIN VO 1 R71 *0_4 CPU_SID
GND 5 2 (13) SB_SDATA3
B R25 0_4 1 6 CPU_TEST21_SCANEN R592 300_4 B
/FON GND 3
2
7 C377 C376
GND Q18 CPU_TEST23_TSTUPD R595 300_4
(28) VFAN 4 VSET GND 8
10u/16V_8 .01u/16V_4 SMBALERT# 3 1 CPU_ALERT
G995 FAN_CON CPU_TEST24_SCANCLK1 R593 300_4
G995/Pin1- internal pull high (+5V)
*BSS138_NL/SOT23
Rev:3A/3C 05/09 AMD CPU noise sensitivity be added termination resistor.
CPU H/W MONITOR

CPU_PWRGD R156
R161
0_4
*2.2K_4
CPU_PWRGD_SVID_REG (32) HDT Connector
+3V +1.8VSUS
R164 *220_4 +1.8VSUS
+3V
2
Q21 Rev:3A 02/29 GMT G781 Reverse R133 0 Ohm For Thermal Sensor issue. C387
CPU_SVC_R R154 0_4
CPU_SVC (32)
(19,28) 2ND_MBCLK 3 1 R95 R103 R105 R109 *0.1u/10_4 CN22
+1.8VSUS R159 1K_4 Serial VID Clock
10K_4 10K_4 10K_4 200_4 1 2
RHU002N06 R163 *220_4 3 4
5 6
+3V_THERM C114 0.1u/10V_4 CPU_DBREQ# 7 8
+3V CPU_DBRDY 9 10
U12 CPU_TCK 11 12
CPU_SVD_R R153 0_4 CPU_TMS 13 14
CPU_SVD (32)
2
Q22 LM86_SMC 8 1 H_THRMDA +3V CPU_TDI 15 16

SCLK VCC R155 1K_4 CPU_TRST#
+1.8VSUS Serial VID Data 17 18
3 1 LM86_SMD 7 2 C96 CPU_TDO 19 20
(19,28) 2ND_MBDATA SDA DXP R160 *220_4 21 22
A R108 *0_4 SMBALERT# 6 3 2200P_4 23 24 CPU_LDT_RST_HTPA# A
RHU002N06 ALERT# DXN H_THRMDC R89
KEY 25
THERM_SHD# 4 5
OVERT# GND R92 330_4 VFIX MODE VID Override Circuit
MSOP R133 *0_4 *HDT CONN
ADM1032 10K_4
SVC SVD Voltage Output(CPU Power)
2
MAX6657,G781P8,W83L771G Q17
(14) PM_THERM#
1 3
MMBT3904
SYS_SHDN#
0 0 1.4V PROJECT : BU2
0 1 1.2V Quanta Computer Inc.
OVERT# Check EC Setting Degree
ADDRESS: 98H
C82 *1u/16V_6
Serial VID 1 0 1.0V
Size
Custom
Document Number Rev
1A
1 1 0.8V S1G2 CTRL & DEBUG 3/4
NB4
5 4 3 2 1
5 4 3 2 1
CPU 07
U26F
D
AA4 VSS1 VSS66 J6 D
AA11 VSS2 VSS67 J8
AA13 J10
AA15
AA17
VSS3
VSS4
VSS5
VSS68
VSS69
VSS70
J12
J14 CPU_CORE0 BOTTOM SIDE DECOUPLING
AA19 VSS6 VSS71 J16
AB2 VSS7 VSS72 J18
U26E AB7 VSS8 VSS73 K2
CPU_CORE0 CPU_CORE1 AB9 K7 C151 C176 C171 C192 C191 C170 C157
VSS9 VSS74
AB23 VSS10 VSS75 K9
G4 P8 AB25 K11 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 0.22u/6.3V_4 0.01u/16V_4 180P_4
VDD0_1 VDD1_1 VSS11 VSS76
H2 VDD0_2 VDD1_2 P10 AC11 VSS12 VSS77 K13
J9 VDD0_3 VDD1_3 R4 AC13 VSS13 VSS78 K15
J11 VDD0_4 VDD1_4 R7 AC15 VSS14 VSS79 K17
J13 VDD0_5 VDD1_5 R9 AC17 VSS15 VSS80 L6
J15 R11 AC19 L8 CPU_CORE1
K6 VDD0_7 VDD1_7 T2 AC21 VSS17 VSS82 L10
K10 VDD0_8 VDD1_8 T6 AD6 VSS18 VSS83 L12
K12 VDD0_9 VDD1_9 T8 AD8 VSS19 VSS84 L14
K14 T10 AD25 L16 C86 C85 C116 C89 C136 C106 C132 C139
L4 VDD0_11 VDD1_11 T12 AE11 VSS21 VSS86 L18
L7 T14 AE13 M7 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 0.22u/6.3V_4 0.01u/16V_4 0.01u/16V_4 180P_4
L9 VDD0_13 VDD1_13 U7 AE15 VSS23 VSS88 M9
L11 VDD0_14 VDD1_14 U9 AE17 VSS24 VSS89 AC6
L13 VDD0_15 VDD1_15 U11 AE19 VSS25 VSS90 M17
L15 VDD0_16 VDD1_16 U13 AE21 VSS26 VSS91 N4
M2 U15 AE23 N8 CPU VDDNB_CORE +1.8VSUS
M6 VDD0_18 VDD1_18 V6 B4 VSS28 VSS93 N10
C M8 VDD0_19 VDD1_19 V8 B6 VSS29 VSS94 N16 C
M10 VDD0_20 VDD1_20 V10 B8 VSS30 VSS95 N18
N7 V12 B9 P2 C92 C105 C117 C172 C133 C101 C141 C183 C110
N9 VDD0_22 VDD1_22 V14 B11 VSS32 VSS97 P7
CPU VDDNB_CORE N11 W4 B13 P9 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 0.22u/6.3V_4 0.22u/6.3V_4 180P_4 180P_4
VDD1_24 Y2 B15 VSS34 VSS99 P11
K16 VDDNB_1 VDD1_25 AC4 B17 VSS35 VSS100 P17
M16 AD2 +1.8VSUS B19 R8
VDDNB_2 VDD1_26 VSS36 VSS101
P16 VDDNB_3 B21 VSS37 VSS102 R10
T16 VDDNB_4 VDDIO27 Y25 B23 VSS38 VSS103 R16
+1.8VSUS V16 V25 B25 R18
VDDNB_5 VDDIO26 VSS39 VSS104
VDDIO25 V23 D6 VSS40 VSS105 T7
H25 VDDIO1 VDDIO24 V21 D8 VSS41 VSS106 T9
J17 VDDIO2 VDDIO23 V18 D9 VSS42 VSS107 T11
K18 VDDIO3 VDDIO22 U17 D11 VSS43 VSS108 T13
K21 T25 D13 T15
K23
K25
VDDIO4
VDDIO5
VDDIO21
VDDIO20 T23
T21
D15
D17
VSS44
VSS45
VSS109
VSS110 T17
U4
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO6 VDDIO19 VSS46 VSS111
L17 T18 D19 U6
M18
M21
VDDIO7
VDDIO8
VDDIO18
VDDIO17 R17
P25
D21
D23
VSS47
VSS48
VSS112
VSS113 U8
U10
PLACE CLOSE TO PROCESSOR AS POSSIBLE
M23 VDDIO10 VDDIO15 P23 D25 VSS50 VSS115 U12
M25 P21 E4 U14 +1.8VSUS
N17 VDDIO12 VDDIO13 P18 F2 VSS52 VSS117 U16
F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
SOCKET_638_PIN F15 V7 C97 C95 C174 C138 C99 C142
VSS55 VSS120
B
F17 VSS56 VSS121 V9 B
F19 V11 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 4.7u/6.3V_6 0.22u/6.3V_4 0.22u/6.3V_4
VSS57 VSS122
F21 VSS58 VSS123 V13
H7 VSS61 VSS126 W6
H9 Y21 +1.8VSUS
VSS62 VSS127
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65 C165 C100 C177 C178 C119
SOCKET_638_PIN
0.22u/6.3V_4 0.22u/6.3V_4 0.01u/16V_4 0.01u/16V_4 180P_4
PROCESSOR POWER AND GROUND
A A
PROJECT : BU2
Custom 1A
S1G2 PWR & GND 4/4
NB4
Date: Wednesday, December 19, 2007 Sheet 7 of 35
5 4 3 2 1
5 4 3 2 1
+SMDDR_VTERM +SMDDR_VTERM
+SMDDR_VTERM
TERMINATOR DECOUPLING CAPACITOR DDR2 TERMINATOR +SMDDR_VTERM MEM_MA_BANK2 RP61 4 3 47_4P2R_4 MEM_MB_CKE0 RP39 4 3 47_4P2R_4
MEM_MA_CKE0 2 1 MEM_MB_BANK2 2 1
MEM_MA0_CS#0 RP24 4 3 47_4P2R_4 MEM_MA_ADD9 RP60 4 3 47_4P2R_4 MEM_MB_ADD12 RP34 4 3 47_4P2R_4
C195 C115 C163 C212 C414 C111 C415 C175 C193 C152 C144 C208 C196 C430 C179 C207 MEM_MA_RAS# 2 1 MEM_MA_ADD12 2 1 MEM_MB_ADD9 2 1
MEM_MA_ADD5 RP59 4 3 47_4P2R_4 MEM_MB_ADD8 RP31 4 3 47_4P2R_4
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 MEM_MA_CAS# RP56 4 3 47_4P2R_4 MEM_MA_ADD8 2 1 MEM_MB_ADD5 2 1
MEM_MA_WE# 2 1 MEM_MA_ADD1 RP58 4 3 47_4P2R_4 MEM_MB_ADD3 RP28 4 3 47_4P2R_4
MEM_MA_ADD3 2 1 MEM_MB_ADD1 2 1
MEM_MA0_ODT1 RP55 4 3 47_4P2R_4 MEM_MA_BANK0 RP57 4 3 47_4P2R_4 MEM_MB_ADD10 RP25 4 3 47_4P2R_4
MEM_MA0_CS#1 2 1 MEM_MA_ADD10 2 1 MEM_MB_BANK0 2 1
+SMDDR_VTERM MEM_MB0_CS#0 RP23 4 3 47_4P2R_4 MEM_MA_ADD15 RP38 4 3 47_4P2R_4 MEM_MB_CKE1 RP40 4 3 47_4P2R_4
MEM_MB_RAS# 2 1 MEM_MA_CKE1 2 1 MEM_MB_ADD15 2 1
D D
MEM_MB_WE# RP22 4 3 47_4P2R_4 MEM_MA_ADD6 RP32 4 3 47_4P2R_4 MEM_MB_ADD6 RP33 4 3 47_4P2R_4
C145 C126 C216 C186 C410 C412 C426 C125 C213 C143 C112 C214 C201 C124 C419 MEM_MB_CAS# 2 1 MEM_MA_ADD11 2 1 MEM_MB_ADD11 2 1
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 MEM_MB0_CS#1 RP19 4 3 47_4P2R_4 MEM_MA_ADD4 2 1 MEM_MB_ADD4 2 1
MEM_MB0_ODT1 2 1 MEM_MA_BANK1 RP26 4 3 47_4P2R_4 MEM_MB_BANK1 RP27 4 3 47_4P2R_4
MEM_MA_ADD13 RP20 4 3 47_4P2R_4 MEM_MB0_ODT0 RP21 4 3 47_4P2R_4
+1.8VSUS MEM_MA0_ODT0 2 1 MEM_MB_ADD13 2 1
+1.8VSUS +1.8VSUS
08
103
104
111
112
117
118
103
104
111
112
117
118
81
82
87
88
95
96
81
82
87
88
95
96
CN25 CN24
(5) MEM_MA_ADD[0..15] MEM_MA_DATA[0..63] (5) (5) MEM_MB_ADD[0..15] MEM_MB_DATA[0..63] (5)
MEM_MA_ADD0 102 5 MEM_MA_DATA1 MEM_MB_ADD0 102 5 MEM_MB_DATA4
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA0 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA5
101 7 101 7
100 17 100 17
99 19 99 19
98 4 98 4
97 6 97 6
94 14 94 14
92 16 92 16
93 23 93 23
91 A9 DQ9 25 91 A9 DQ9 25
90 A11 DQ11 37 90 A11 DQ11 37
116 A13 DQ13 22 116 A13 DQ13 22
84 38 84 38
A15 DQ15 MEM_MA_DATA16 A15 DQ15 MEM_MB_DATA16
43 43
MEM_MA_BANK0 DQ16 MEM_MA_DATA17 MEM_MB_BANK0 DQ16 MEM_MB_DATA21
107 45 107 45
C (5) MEM_MA_BANK0
MEM_MA_BANK1 106
BA0 DQ17
55 MEM_MA_DATA19
(5) MEM_MB_BANK0
MEM_MB_BANK1 106
BA0 DQ17
55 MEM_MB_DATA18 +1.8VSUS PLACE CLOSE TO SOCKET( PER EMI/EMC) C
(5) MEM_MA_BANK1 BA1 DQ18 (5) MEM_MB_BANK1 BA1 DQ18
MEM_MA_BANK2 85 57 MEM_MA_DATA18 MEM_MB_BANK2 85 57 MEM_MB_DATA19
(5) MEM_MA_BANK2 BA2 DQ19 (5) MEM_MB_BANK2 BA2 DQ19
44 MEM_MA_DATA20 44 MEM_MB_DATA20
MEM_MA_DM0 DQ20 MEM_MA_DATA21 MEM_MB_DM0 DQ20 MEM_MB_DATA17
10 DM0 DQ21 46 10 DM0 DQ21 46
MEM_MA_DM1 26 56 MEM_MA_DATA22 MEM_MB_DM1 26 56 MEM_MB_DATA22 C128 C200 C158 C162 C169 C184 C173
MEM_MA_DM2 DM1 DQ22 MEM_MA_DATA23 MEM_MB_DM2 DM1 DQ22 MEM_MB_DATA23
52 DM2 DQ23 58 52 DM2 DQ23 58
MEM_MA_DM3 67 61 MEM_MA_DATA25 MEM_MB_DM3 67 61 MEM_MB_DATA25 10U/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
130 DM4 DQ25 63 130 DM4 DQ25 63
MEM_MA_DM4 147 73 MEM_MA_DATA30 MEM_MB_DM4 147 73 MEM_MB_DATA27
170 75 170 75
(5) MEM_MA_DM[0..7] 185 62 (5) MEM_MB_DM[0..7] 185 62
DM7 DQ28 MEM_MA_DATA29 DM7 DQ28 MEM_MB_DATA24
DQ29 64 DQ29 64
13 74 MEM_MA_DATA31 13 74 MEM_MB_DATA30
(5) MEM_MA_DQS0_P DQS0 DQ30 (5) MEM_MB_DQS0_P DQS0 DQ30
(5) MEM_MA_DQS3_P DQS3 DQ33 (5) MEM_MB_DQS3_P DQS3 DQ33 +1.8VSUS
134 MEM_MA_DATA53 134 MEM_MB_DATA53 C189 C180 C190 C148 C194 C166 C202
DQ38 MEM_MA_DATA48 DQ38 MEM_MB_DATA52
(5) MEM_MA_DQS0_N 11 136 (5) MEM_MB_DQS0_N 11 136
DQS0 DQ39 MEM_MA_DATA32 DQS0 DQ39 MEM_MB_DATA36 10U/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1U/10V/04
(5) MEM_MA_DQS1_N 29 141 (5) MEM_MB_DQS1_N 29 141
DQS1 DQ40 MEM_MA_DATA36 DQS1 DQ40 MEM_MB_DATA37
(5) MEM_MA_DQS2_N 49 DQS2 DQ41 143 (5) MEM_MB_DQS2_N 49 DQS2 DQ41 143
(5) MEM_MA_DQS3_N DQS3 DQ42 (5) MEM_MB_DQS3_N DQS3 DQ42
157 157
(5) MEM_MA_CLK1_P 30 159 (5) MEM_MB_CLK1_P 30 159
CK0 DQ49 MEM_MA_DATA42 CK0 DQ49 MEM_MB_DATA43
(5) MEM_MA_CLK1_N 32 173 (5) MEM_MB_CLK1_N 32 173
(5) MEM_MA_CLK7_P 164 175 (5) MEM_MB_CLK7_P 164 175
(5) MEM_MA_CLK7_N 166 158 (5) MEM_MB_CLK7_N 166 158
B 160 160 B
MEM_MA_CKE0 DQ53 MEM_MA_DATA47 MEM_MB_CKE0 DQ53 MEM_MB_DATA42
(5) MEM_MA_CKE0 79 CKE0 DQ54 174 (5) MEM_MB_CKE0 79 CKE0 DQ54 174
MEM_MA_CKE1 80 176 MEM_MA_DATA46 (5) MEM_MB_CKE1 MEM_MB_CKE1 80 176 MEM_MB_DATA46
(5) MEM_MA_CKE1 CKE1 DQ55 CKE1 DQ55
MEM_MA_RAS# DQ56 MEM_MA_DATA60 MEM_MB_RAS# DQ56 MEM_MB_DATA60
(5) MEM_MA_RAS# 108 181 (5) MEM_MB_RAS# 108 181
MEM_MA_CAS# RAS DQ57 MEM_MA_DATA63 MEM_MB_CAS# RAS DQ57 MEM_MB_DATA58
(5) MEM_MA_CAS# 113 189 (5) MEM_MB_CAS# 113 189
MEM_MA_WE# CAS DQ58 MEM_MA_DATA62 MEM_MB_WE# CAS DQ58 MEM_MB_DATA59
(5) MEM_MA_WE# 109 191 (5) MEM_MB_WE# 109 191
MEM_MA0_CS#0 WE DQ59 MEM_MA_DATA56 MEM_MB0_CS#0 WE DQ59 MEM_MB_DATA56
(5) MEM_MA0_CS#0 110 180 (5) MEM_MB0_CS#0 110 180
(REVERSE)
MEM_MA0_CS#1 S0 DQ60 MEM_MA_DATA57 MEM_MB0_CS#1 S0 DQ60 MEM_MB_DATA61

(5) MEM_MA0_CS#1 115 182 (5) MEM_MB0_CS#1 115 182
S1 DQ61 MEM_MA_DATA58 S1 DQ61 MEM_MB_DATA62
192 192
MEM_MA0_ODT0 DQ62 MEM_MA_DATA59 MEM_MB0_ODT0 DQ62 MEM_MB_DATA63
114 194 114 194
SO-DIMM
(5) MEM_MA0_ODT0 (5) MEM_MB0_ODT0
(REVERSE)
MEM_MA0_ODT1 ODT0 DQ63 MEM_MB0_ODT1 ODT0 DQ63
(5) MEM_MA0_ODT1 119 (5) MEM_MB0_ODT1 119
ODT1 MEMHOT_DIMM#_1 R157 0_4 MEMHOT_DIMM# ODT1 MEMHOT_DIMM#_2 R158 0_4 MEMHOT_DIMM#
50 50
R58 10K_4 DIM1_SA0 NC1 MEM_MA_RESET#1 R57 10K_4 DIM2_SA0 NC1 MEM_MB_RESET#2
198 69 +3V 198 69
SO-DIMM
SA0 NC2 T90 SA0 NC2 T91
R56 10K_4 DIM1_SA1 200 83 R60 10K_4 DIM2_SA1 200 83
SA1 NC3 SA1 NC3
NC4 120 NC4 120
PDAT_SMB 195 163 PDAT_SMB 195 163
(3,13) PDAT_SMB SDA NC/TEST SDA NC/TEST
PCLK_SMB 197 PCLK_SMB 197 Rev:2A 12/13 No-Sutff DDRII H/W Montor Circuit.
(3,13) PCLK_SMB SCL SCL +3V
+3V C63 0.1u/10V_4 199 +3V C62 0.1U/10V_4 199
VDDspd VDDspd
+1.8VSUS C237 0.1u/10V_4 SMVREF_DIM 1 196 +1.8VSUS C231 0.1u/10V_4 SMVREF_DIM 1 196 C449 *0.1u/10V_4
VREF VSS56 VREF VSS56
193 193
C235 C230 VSS55 C228 C229 VSS55
2 190 2 190
VSS0 VSS54 VSS0 VSS54
3 187 3 187
2.2u/6.3V_6 1000P_4 VSS1 VSS53 2.2u/6.3V_6 1000P_4 VSS1 VSS53 R376
8 184 8 184
VSS2 VSS52 oVSS2 VSS52 U30
9 VSS3 VSS51 183 9 VSS3 VSS51 183
12 178 12 178 *10K_4
15
18
21
VSS4
VSS5
VSS6
(H=5.6) VSS50
VSS49
VSS48
177
172
171
15
18
21
VSS4
VSS5
VSS6
(H=10.1) VSS50
VSS49
VSS48
177
172
171
+3V
7
6
5
A0
A1
+VS
8
VSS7 VSS47 VSS7 VSS47 A2 MEMHOT_DIMM# R375 *0_4

24 168 24 168 3 CPU_MEMHOT# (6,13)
VSS8 VSS46 +SMDDR_VREF +1.8VSUS VSS8 VSS46 O.S
27 165 27 165
VSS9 VSS45 VSS9 VSS45 PDAT_SMB
28 162 28 162 1
VSS10 VSS44 VSS10 VSS44 PCLK_SMB SDA
33 161 33 161 2 4
VSS11 VSS43 VSS11 VSS43 SCL GND
34 156 34 156
VSS12 VSS42 R175 R173 VSS12 VSS42
39 155 39 155
A VSS13 VSS41 VSS13 VSS41 *DS75U+T&R A
40 150 40 150
VSS14 VSS40 *0_4 1K/F_4 VSS14 VSS40
41 VSS15 VSS39 149 41 VSS15 VSS39 149
42 VSS16 VSS38 145 42 VSS16 VSS38 145 ADDRESS: 92H Close DDR2 socket
47 144 SMVREF_DIM 47 144
48 139 48 139
DDRII
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
53 VSS19 VSS35 138 53 VSS19 VSS35 138
54 133 C234 R176 54 133
0.1u/10V_4 1K/F_4
59
60
65
66
71
72
77
78
121
122
127
128
132
59
60
65
66
71
72
77
78
121
122
127
128
132
PROJECT : BU2
DDR SO-DIMM SOCKET 1.8V DDR SO-DIMM SOCKET 1.8V
SMbus Address A0 SMbus Address A2 Size
Custom
Document Number
DDR2 SODIMMS: A/B CHANNEL
Rev
1A
NB4
5 4 3 2 1
5 4 3 2 1
RS780 RS780 Display Port Support (muxed on GFX)

09
GFX_TX0,TX1,TX2 and TX3
DP0
AUX0 and HPD0
D D
GFX_TX4,TX5,TX6 and TX7
DP1
AUX1 and HPD1
Close to North Bridge

U25A U25B
Y25 D24 D4 A5 GFX_TX0P_C C422 0.1u/10V_4 HDMI_DATA2P
(4) HT_CPU_NB_CAD_H0 HT_RXCAD0P HT_TXCAD0P HT_NB_CPU_CAD_H0 (4) GFX_RX0P GFX_TX0P HDMI_DATA2P (18)
Y24 PART 1 OF 6 D25 C4 PART 2 OF 6 B5 GFX_TX0N_C C423 0.1u/10V_4 HDMI_DATA2N Red
(4) HT_CPU_NB_CAD_L0 HT_RXCAD0N HT_TXCAD0N HT_NB_CPU_CAD_L0 (4) GFX_RX0N GFX_TX0N HDMI_DATA2N (18)
V22 E24 A3 A4 GFX_TX1P_C C424 0.1u/10V_4 HDMI_DATA1P
V23 E25 B3 B4 GFX_TX1N_C C425 0.1u/10V_4 HDMI_DATA1N Green
(4) HT_CPU_NB_CAD_L1 HT_RXCAD1N HT_TXCAD1N HT_NB_CPU_CAD_L1 (4) GFX_RX1N GFX_TX1N HDMI_DATA1N (18)
V25 F24 C2 C3 GFX_TX2P_C C420 0.1u/10V_4 HDMI_DATA0P
V24 F25 C1 B2 GFX_TX2N_C C418 0.1u/10V_4 HDMI_DATA0N Blue
(4) HT_CPU_NB_CAD_L2 HT_RXCAD2N HT_TXCAD2N HT_NB_CPU_CAD_L2 (4) GFX_RX2N GFX_TX2N GFX_TX3P_C HDMI_CLKP HDMI_DATA0N (18)
U24 F23 E5 D1 C417 0.1u/10V_4
(4) HT_CPU_NB_CAD_H3 HT_RXCAD3P HT_TXCAD3P HT_NB_CPU_CAD_H3 (4) GFX_RX3P GFX_TX3P HDMI_CLKP (18)
U25 F22 F5 D2 GFX_TX3N_C C416 0.1u/10V_4 HDMI_CLKN
(4) HT_CPU_NB_CAD_L3 HT_RXCAD3N HT_TXCAD3N HT_NB_CPU_CAD_L3 (4) GFX_RX3N GFX_TX3N HDMI_CLKN (18)
(4) HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 (4) G5 GFX_RX4P GFX_TX4P E2 T88
(4) HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 (4) G6 GFX_RX4N GFX_TX4N E1 T89
HYPER TRANSPORT CPU I/F

P22 J25 H5 F4
(4)
(4)
HT_CPU_NB_CAD_H5
HT_CPU_NB_CAD_L5 P23
HT_RXCAD5P
HT_RXCAD5N
HT_TXCAD5P
HT_TXCAD5N J24
HT_NB_CPU_CAD_H5
HT_NB_CPU_CAD_L5
(4)
(4) H6
GFX_RX5P
GFX_RX5N
GFX_TX5P
GFX_TX5N F3 To HDMI CONN
(4) HT_CPU_NB_CAD_H6 P25 HT_RXCAD6P HT_TXCAD6P K24 HT_NB_CPU_CAD_H6 (4) J6 GFX_RX6P GFX_TX6P F1
(4) HT_CPU_NB_CAD_L6 P24 HT_RXCAD6N HT_TXCAD6N K25 HT_NB_CPU_CAD_L6 (4) J5 GFX_RX6N GFX_TX6N F2
(4) HT_CPU_NB_CAD_H7 N24 HT_RXCAD7P HT_TXCAD7P K23 HT_NB_CPU_CAD_H7 (4) J7 GFX_RX7P GFX_TX7P H4
N25 K22 J8 H3
PCIE I/F GFX

(4) HT_CPU_NB_CAD_L7 HT_RXCAD7N HT_TXCAD7N HT_NB_CPU_CAD_L7 (4) GFX_RX7N GFX_TX7N
L5 H1 HDMI_CLKP R539 80.6/F_4 HDMI_CLKN
GFX_RX8P GFX_TX8P HDMI_DATA0P R536 80.6/F_4 HDMI_DATA0N
(4) HT_CPU_NB_CAD_H8 AC24 HT_RXCAD8P HT_TXCAD8P F21 HT_NB_CPU_CAD_H8 (4) L6 GFX_RX8N GFX_TX8N H2
AC25 G21 M8 J2 HDMI_DATA1P R537 80.6/F_4 HDMI_DATA1N
(4) HT_CPU_NB_CAD_L8 HT_RXCAD8N HT_TXCAD8N HT_NB_CPU_CAD_L8 (4) GFX_RX9P GFX_TX9P
AB25 G20 L8 J1 HDMI_DATA2P R538 80.6/F_4 HDMI_DATA2N
(4) HT_CPU_NB_CAD_H9 HT_RXCAD9P HT_TXCAD9P HT_NB_CPU_CAD_H9 (4) GFX_RX9N GFX_TX9N
(4) HT_CPU_NB_CAD_L9 AB24 HT_RXCAD9N HT_TXCAD9N H21 HT_NB_CPU_CAD_L9 (4) P7 GFX_RX10P GFX_TX10P K4
(4) HT_CPU_NB_CAD_H10 AA24 HT_RXCAD10P HT_TXCAD10P J20 HT_NB_CPU_CAD_H10 (4) M7 GFX_RX10N GFX_TX10N K3
(4) HT_CPU_NB_CAD_L10 AA25 HT_RXCAD10N HT_TXCAD10N J21 HT_NB_CPU_CAD_L10 (4) P5 GFX_RX11P GFX_TX11P K1
C C
(4) HT_CPU_NB_CAD_H11 Y22 HT_RXCAD11P HT_TXCAD11P J18 HT_NB_CPU_CAD_H11 (4) M5 GFX_RX11N GFX_TX11N K2 Rev:3A 02/05 Added the EMI Solution.
(4) HT_CPU_NB_CAD_L11 Y23 HT_RXCAD11N HT_TXCAD11N K17 HT_NB_CPU_CAD_L11 (4) R8 GFX_RX12P GFX_TX12P M4
(4) HT_CPU_NB_CAD_H12 W 21 HT_RXCAD12P HT_TXCAD12P L19 HT_NB_CPU_CAD_H12 (4) P8 GFX_RX12N GFX_TX12N M3
(4) HT_CPU_NB_CAD_L12 W 20 HT_RXCAD12N HT_TXCAD12N J19 HT_NB_CPU_CAD_L12 (4) R6 GFX_RX13P GFX_TX13P M1
(4) HT_CPU_NB_CAD_H13 V21 HT_RXCAD13P HT_TXCAD13P M19 HT_NB_CPU_CAD_H13 (4) R5 GFX_RX13N GFX_TX13N M2
(4) HT_CPU_NB_CAD_L13 V20 HT_RXCAD13N HT_TXCAD13N L18 HT_NB_CPU_CAD_L13 (4) P4 GFX_RX14P GFX_TX14P N2
(4) HT_CPU_NB_CAD_H14 U20 HT_RXCAD14P HT_TXCAD14P M21 HT_NB_CPU_CAD_H14 (4) P3 GFX_RX14N GFX_TX14N N1
(4) HT_CPU_NB_CAD_L14 U21 HT_RXCAD14N HT_TXCAD14N P21 HT_NB_CPU_CAD_L14 (4) T4 GFX_RX15P GFX_TX15P P1
(4) HT_CPU_NB_CAD_H15 U19 HT_RXCAD15P HT_TXCAD15P P18 HT_NB_CPU_CAD_H15 (4) T3 GFX_RX15N GFX_TX15N P2
(4) HT_CPU_NB_CAD_L15 U18 HT_RXCAD15N HT_TXCAD15N M18 HT_NB_CPU_CAD_L15 (4)
AE3 AC1 PCIE_TXP0_C
T80 GPP_RX0P GPP_TX0P T12
T22 H24 AD4 AC2 PCIE_TXN0_C
(4) HT_CPU_NB_CLK_H0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_H0 (4) T9 GPP_RX0N GPP_TX0N T8
T23 H25 AE2 AB4 PCIE_TXP1_C C401 0.1u/10V_4
(4) HT_CPU_NB_CLK_L0 HT_RXCLK0N HT_TXCLK0N HT_NB_CPU_CLK_L0 (4) (24) PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 (24)
AB23 L21 AD3 AB3 PCIE_TXN1_C C402 0.1u/10V_4
(4) HT_CPU_NB_CLK_H1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_H1 (4) (24) PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 (24)
AA22 L20 AD1 AA2 PCIE_TXP2_C C403 0.1u/10V_4
(4) HT_CPU_NB_CLK_L1 HT_RXCLK1N HT_TXCLK1N HT_NB_CPU_CLK_L1 (4) (23) PCIE_RXP2 GPP_RX2P GPP_TX2P PCIE_TXP2 (23)
AD2 PCIE I/F GPP AA1 PCIE_TXN2_C C405 0.1u/10V_4
(23) PCIE_RXN2 GPP_RX2N GPP_TX2N PCIE_TXN2 (23)
M22 M24 V5 Y1 PCIE_TXP3_C C407 0.1u/10V_4
(4) HT_CPU_NB_CTL_H0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_H0 (4) (24) PCIE_RXP3 GPP_RX3P GPP_TX3P PCIE_TXP3 (24)
M23 M25 W6 Y2 PCIE_TXN3_C C406 0.1u/10V_4
(4) HT_CPU_NB_CTL_L0 HT_RXCTL0N HT_TXCTL0N HT_NB_CPU_CTL_L0 (4) (24) PCIE_RXN3 GPP_RX3N GPP_TX3N PCIE_TXN3 (24)
R21 P19 U5 Y4 PCIE_TXP4_C
(4) HT_CPU_NB_CTL_H1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_H1 (4) T21 GPP_RX4P GPP_TX4P T16
R20 R18 U6 Y3 PCIE_TXN4_C
(4) HT_CPU_NB_CTL_L1 HT_RXCTL1N HT_TXCTL1N HT_NB_CPU_CTL_L1 (4) T20 GPP_RX4N GPP_TX4N PCIE_TXP5_C T13
U8 V1 C409 0.1u/10V_4
(23) PCIE_RXP5 GPP_RX5P GPP_TX5P PCIE_TXP5 (23)
R134 300/F_4 HT_RXCALP C23 B24 HT_TXCALP R131 300/F_4 U7 V2 PCIE_TXN5_C C408 0.1u/10V_4
HT_RXCALP HT_TXCALP (23) PCIE_RXN5 GPP_RX5N GPP_TX5N PCIE_TXN5 (23)
HT_RXCALN A24 B25 HT_TXCALN
HT_RXCALN HT_TXCALN SB_TX0P_C C78 0.1u/10V_4
(12) PCIE_SB_NB_RX0P AA8 SB_RX0P SB_TX0P AD7 PCIE_NB_SB_TX0P (12)
Close to NB within 1" RS780M Close to NB within 1" Y8 AE7 SB_TX0N_C C77 0.1u/10V_4
(12) PCIE_SB_NB_RX0N SB_RX0N SB_TX0N PCIE_NB_SB_TX0N (12)
AA7 AE6 SB_TX1P_C C76 0.1u/10V_4
(12) PCIE_SB_NB_RX1P SB_RX1P SB_TX1P PCIE_NB_SB_TX1P (12)
Y7 AD6 SB_TX1N_C C75 0.1u/10V_4
AA5 PCIE I/F SB AB6 SB_TX2P_C C73 0.1u/10V_4
AA6 AC6 SB_TX2N_C C74 0.1u/10V_4
W5 AD5 SB_TX3P_C C83 0.1u/10V_4
Y5 AE5 SB_TX3N_C C84 0.1u/10V_4
B B
AC8 NB_PCIECALRP R93 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R98 2K/F_4
PCE_CALRN(PCE_BCALRN) AB8 +1.1V_VDD_PCIE
U25D
PAR 4 OF 6 RS780M
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19 GPP0 X
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17 GPP1 PCIE LAN(Marvell)
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15 GPP2 Wireless Lan
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
AD15 AD19 GPP3 EXPRESS CARD (NEW CARD)
SBD_MEM/DVO_I/F
MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22 40mils wdith or more
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
+1.8V
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20 GPP4 X Don't support in RS740M
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
AC22 +1.8_IOPLLVDD18_NB R328 0_6 GPP5 Robson/HD Decoder
MEM_DQ14/DVO_D10(NC)
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W 18
W 12 AD20 +1.1V
MEM_RASb(NC) MEM_DQS1P(NC)
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 +1.1V_IOPLLVDD R329 0_6
MEM_W Eb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W 17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23
A V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 A
W 14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC)
AD12 AE18 SPM_VREF1
MEM_COMPN(NC) MEM_VREF(NC) +1.8V
RS780M
R91 *1K/F_4 R87 *1K/F_4
PROJECT : BU2
Custom RS740/RS780-HT LINK/PCIE I/F 1/4 1A
NB4
5 4 3 2 1
5 4 3 2 1
+3V
RS780
L19
BLM18PG221SN1D_6
0.135A +3V_AVDD_NB
C215
2.2u/6.3V_6
C578
0.1u/10V_4
10
+1.8V
+1.8V_AVDDDI_NB
Rev:2A 12/06 Add 0.1u For CRT Screen Flicker.
R343 0_6
C210
2.2U/6.3V_6
D D
L40 U25C
+1.8V_AVDDQ_NB F12 A22
AVDD1(NC) TXOUT_L0P(NC) INT_TXLOUT0+ (17)
BLM18PG221SN1D_6 E12 PART 3 OF 6 B22
AVDD2(NC) TXOUT_L0N(NC) INT_TXLOUT0- (17)
C211 F14 A21
AVDDDI(NC) TXOUT_L1P(NC) INT_TXLOUT1+ (17)
G15 B21 INT_TXLOUT1- (17)
2.2U/6.3V_6 AVSSDI(NC) TXOUT_L1N(NC)
Rev:3A 02/13 Follow A13 silicon Change R120 From 150 To 140ohm For Unbalanced power bus IR drop. . H15
AVDDQ(NC) TXOUT_L2P(NC)
B20 INT_TXLOUT2+ (17)
H14 A20 INT_TXLOUT2- (17)
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0) TXLOUT3+
A19 T33
TV_C/R_SYS TXOUT_L3P(NC) TXLOUT3-
150R Termination < 1000 mils trace E17
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
B19 T30
CRT/TVOUT
F17
Y(DFT_GPIO2)
CLOSE TO NB Without TV-Out feature F15
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
B18
A18
TXOUT_U0N(NC)
(19) CRT_R G18 A17
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
(19) CRT_G E18 D20
GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21
GREENb(NC) TXOUT_U2N(NC)
(19) CRT_B E19 D18
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 D19
BLUEb(NC) TXOUT_U3N(NC)
R120 R125 R126 HSYNC A11 B16
+1.1V (19) HSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1) INT_TXLCLKOUT+ (17)
VSYNC B11 A16
(19) VSYNC DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) INT_TXLCLKOUT- (17) +1.8V
140/F_4 150/F_4 150/F_4 L39 R132 0_4 DDCCLK_INT F8 D16
(19) DDCCLK DAC_SCL(PCE_RCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
R130 0_4 DDCDAT_INT E8 D17 L15
(19) DDCDAT DAC_SDA(PCE_TCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
BLM18PG221SN1D_6
C428 R123 715/F_6 DAC_RSET_NB G14 BLM18PG221SN1D_6
DAC_RSET(PWM_GPIO1)
A13 +1.8V_VDDLTP18_NB C197
2.2u/6.3V_6 +1.1V_PLLVDD VDDLTP18(NC)
A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC) 2.2u/6.3V_6
D14
PLLVDD18(NC) +1.8V
A15 +1.8V_VDDLT_18_NB
LVTM
B12
+1.8V PLLVSS(NC) VDDLT18_1(NC) L16
PLL PWR
B15
+1.8V_VDDA18HTPLL VDDLT18_2(NC)
L41 H17 A14 +3V_VDLT33_NB
VDDA18HTPLL VDDLT33_1(NC) BLM21PG221SN1D_8
B14
BLM18PG221SN1D_6 +1.8V_VDDA18PCIEPLL VDDLT33_2(NC) C187 C199
D7
C209 VDDA18PCIEPLL1
E7 C14
+1.8V VDDA18PCIEPLL2 VSSLT1(VSS) 0.1u/10V_4 4.7u/6.3V_6
20mils width NB_RST#_IN VSSLT2(VSS)
D15
+3V
L18 2.2u/6.3V_6 D8 C16
+1.8V_VDDA18HTPLL NB_PWRGD_IN SYSRESETb VSSLT3(VSS) L42
(16) NB_PWRGD_IN A10 C18
BLM18PG221SN1D_6 NB_LDT_STOP# POWERGOOD VSSLT4(VSS)
C C10 C20 C
NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
PM
C429 C12 E20 *BLM21PG221SN1D_8
ALLOW_LDTSTOP VSSLT6(VSS) C427
C22
2.2u/6.3V_6 HT_REFCLKP VSSLT7(VSS)
HT_REFCLKN
C25
HT_REFCLKP RS740M Only
C24 I *2.2u/6.3V/06
HT_REFCLKN
20mils width NB_REFCLK_P
L14 R139 EXT@0_4 E11
(3) EXT_NB_OSC REFCLK_P/OSCIN(OSCIN)
+1.8V_VDDA18PCIEPLL R142 EXT@0_4 NB_REFCLK_N
CLOCKs
F11
REFCLK_N(PWM_GPIO3)
I
BLM18PG221SN1D_6 E9 INT_LVDS_ON R341 0_4
LVDS_DIGON(PCE_TCALRP) INT_LVDS_DIGON (17)
C149 C131 T2 F7 LVDS_ENA_BL
(3) NBGFX_CLKP GFX_REFCLKP LVDS_BLON(PCE_RCALRP)
+1.1V R141 EXT@4.7K_4 R140 EXT@4.7K_4 T1 I/O G12 LVDS_BKL_EN
(3) NBGFX_CLKN GFX_REFCLKN LVDS_ENA_BL(PWM_GPIO2)
10u/6.3V_8 2.2u/6.3V_6
External CLK GPP_REFCLKP U1
T86 GPP_REFCLKP
GPP_REFCLKN U2 I/O
T84 GPP_REFCLKN
SB_REFCLKP V4
SB_REFCLKN GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
(17) INT_LVDS_EDIDCLK B9
I2C_CLK TMDS_HPD0 R129 0_4
A9 D9
(17) INT_LVDS_EDIDDATA
HDMI_DDC_DATA B8
I2C_DATA MIS. TMDS_HPD(NC)
D10 TMDS_HPD1
TMDS_HPD (18)
(18) HDMI_DDC_DATA DDC_DATA0/AUX0N HPD(NC) T27
HDMI_DDC_CLK A8
(18) HDMI_DDC_CLK DDC_CLK0/AUX0P
RS740_DFT_GPIO1 B7 D12 SUS_STAT#_NB R121 0_4
T92 AUX1P(NC) TVCLKIN(PWM_GPIO5) SUS_STAT# (13)
T93 A7
AUX1N(NC) R_NB_THRMDA
AE8 T81
+NB_CORE_ON THERMALDIODE_P R_NB_THRMDC
(33) +NB_CORE_ON B10 AD8 T82
STRP_DATA THERMALDIODE_N
G11 D13 TEST_EN R128 1.8K_4
RSVD TESTMODE
RS780_AUX_CAL C8
T94 AUX_CAL(NC)
RS780M
B
FOR SB INTERNAL CLOCK North Bridge RESET +VDDG_NB LVDS BLON +3V +15V STRAP DEBUG BUS GPIO B
1
R136
R351 R345 DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEB
*4.7K_4
10K_4 10K_4
2 1 RP35 NB_REFCLK_P +3V R145 3K_4 HSYNC
(12) SB_DISP_CLKP
2
(12) SB_DISP_CLKN 4 3 *INT@0_4P2R_4 NB_REFCLK_N
(12,14) A_RST#
R135 0_4 NB_RST#_IN NB_LCD_CONTROL
R144 *3K_4
3
R137 *0_4 For Side Port Enables/Disable
(6,12) CPU_LDT_RST#
0 : Enable(Default) 1 : Disable
2 Q55
2N7002E-G
3
HT_REFCLKP +VDDG_NB
(3) HT_REFCLKP +1.8V
HT_REFCLKN
(3) HT_REFCLKN
+3V R146 3K_4 VSYNC
1
(12) SB_NBHT_REFCLKP 4 3 RP44 HT NB R115 NB_PWRGD_IN 2
(12) SB_NBHT_REFCLKN 2 1 *INT@0_4P2R_4 Q54 R147 *3K_4
2
Q24 *4.7K_4
BSS138_NL/SOT23 Enables the Test Debug Bus using GPIO.(RS780 -->VSYNC#)
1 3 NB_LDT_STOP#
(6,12) CPU_LDT_STOP# 1 : Enable(Defult) 0 : Disable
1
*BSS138/SOT23
SB_REFCLKP R542 0_4 AUX CAL Value need update

(3) SB_REFCLKP
SB_REFCLKN INT_LVDS_ON R340 2.7K_4
(3) SB_REFCLKN
+3V R338 *10K_4 +NB_CORE_ON
(12) SB_PCIE_NB_CLKP 4 3 RP41 North Bridge A-Link
2 1 *INT@0_4P2R_4 +VDDG_NB R339 2.2K_4
(12) SB_PCIE_NB_CLKN +1.8V
NB_LCD_CONTROL
R116 VGS-TH<1.7V Rev:3A 02/13 Support a Two-Step Voltage Control of North Bridge Core voltage.
2
2
*4.7K_4 R150 *1K_4 TV_C/R_SYS

Q25 LVDS_BKL_EN 3 1 INT_LVDS_BLON (17)
R119 0_4 1 3 NB_ALLOW_LDTSTOP
(6) CPU_LDT_REQ#
A Q56 A
Reserve Pin *BSS138/SOT23 FDV301N R350 2.7K_4 R127 *1K_4 RS740_DFT_GPIO1
R543 0_4
(12) ALLOW_LDTSTOP
Rev:2A 12/07 Change Q56 P/N For VGS 0.65V<Vt<1.5V
R342 150/F_4 RS780_AUX_CAL
Rev:3A 01/29 Modified the Level Shift Circuit For System leakage issue. NB_LCD_CONTROL
2
+3V
R337 *4.7K_4 HDMI_DDC_DATA LVDS_ENA_BL 3 1 INT_LVDS_PWM (17) PROJECT : BU2

R336 *4.7K_4 HDMI_DDC_CLK RS780;RS740 +3V R151 *0_6 +VDDG_NB
*FDV301N
Q26
R149 *2.7K_4
Custom 1A
RS740/RS780-SYSTEM I/F 3/5
NB4
5 4 3 2 1
5 4 3 2 1
RS740/RX780/RS780 POWER DIFFERENCE TABLE 11
AE14
PIN NAME RS740 RX780 RS780 PIN NAME RS740 RX780 RS780
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
VDDHT NC +1.1V +1.1V IOPLLVDD +1.2V NC +1.1V
VSSAPCIE1 U25F
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VDDHTRX NC +1.1V +1.1V AVDD +3.3V NC +3.3V
D D
VDDHTTX +1.2V +1.2V +1.2V AVDDDI +1.8V NC +1.8V
VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

PART 6/6
GROUND VDDG18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V
VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V
VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDDC +1.2V +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDD_MEM +1.8V/1.5V NC +1.8V/1.5V VDDLTP18 +1.8V NC +1.8V
RS780M VDDG33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
IOPLLVDD18 +1.8V NC +1.8V VDDLT33 +3.3V NC NC
C C
+1.1V
1.1(2A) +1.1V_VDD_PCIE +1.1V
L10 U25E
+1.1V_VDDHT
0.6A 0.7A R117 0_8
J17 VDDHT_1 VDDPCIE_1 A6
BLM21PG221SN1D_8 K16 PART 5/6 B6
C156 C147 C123 C137 VDDHT_2 VDDPCIE_2 C160 C164 C109 C167 C182
L16 VDDHT_3 VDDPCIE_3 C6
M16 VDDHT_4 VDDPCIE_4 D6
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 P16 E6 0.1u/10V_4 0.1u/10V_4 1u/10V_4 1u/10V_4 4.7u/6.3V_6
VDDHT_5 VDDPCIE_5
R16 VDDHT_6 VDDPCIE_6 F6
T16 VDDHT_7 VDDPCIE_7 G7
L17 0.45A H8
+1.1V_VDDHTRX VDDPCIE_8
H18 VDDHTRX_1 VDDPCIE_9 J9
BLM21PG221SN1D_8 G19 K9
C188 C168 C181 C161 VDDHTRX_2 VDDPCIE_10
F20 VDDHTRX_3 VDDPCIE_11 M9
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

E21 VDDHTRX_4 VDDPCIE_12 L9 Rev:2A 12/09 Change and Fix the NB Core Voltage to 1.1V For A12 Chip.
D22 VDDHTRX_5 VDDPCIE_13 P9
B23 VDDHTRX_6 VDDPCIE_14 R9
+1.2V A23 T9
L12 VDDHTRX_7 VDDPCIE_15
1.2V(0.5A) VDDPCIE_16 V9
+NB_CORE
+1.2V_VDDHTTX AE25 U9
BLM21PG221SN1D_8 VDDHTTX_1 VDDPCIE_17
AD24 VDDHTTX_2 1.1V(7A)
C81 C91 C134 C102 C98 AC23 K12 +NB_CORE
VDDHTTX_3 VDDC_1
A11 Chip Bug Errata 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4
AB22 VDDHTTX_4 VDDC_2 J14
C135 C159 C150 C103 C67
AA21 VDDHTTX_5 VDDC_3 U16
use A12 Chip Can Remove Y20 J11
VDDHTTX_6 VDDC_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/6.3V_8
W19 K15
POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
B B
Rev:2A 12/09 Change VDDHTTX Voltage From 1.35V to 1.2 Rails For A12 Chip. T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 VDDHTTX_12 VDDC_10 M15
+1.8V M17 N12
L13 VDDHTTX_13 VDDC_11 C104 C121 C120 C65 C90
1.8V(0.6A) VDDC_12 N14
+1.8V_VDDA18PCIE J10 P11
BLM21PG221SN1D_8 VDDA18PCIE_1 VDDC_13 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/6.3V_8 *10u/6.3V_8
P10 VDDA18PCIE_2 VDDC_14 P13
C127 C140 C153 C118 C93 C88 K10 P14
VDDA18PCIE_3 VDDC_15
M10 VDDA18PCIE_4 VDDC_16 R12
4.7u/6.3V_6 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 L10 R15
VDDA18PCIE_5 VDDC_17
W9 VDDA18PCIE_6 VDDC_18 T11
H9 VDDA18PCIE_7 VDDC_19 T15
T10 VDDA18PCIE_8 VDDC_20 U12
+1.8V
R10 VDDA18PCIE_9 VDDC_21 T14 1.8V(0.3A) +1.8V
Y9 VDDA18PCIE_10 VDDC_22 J16
1.8V(0.005A) AA9 VDDA18PCIE_11
R112 0_6 AB9 AE10 +1.8V_VDD_MEM R85 *0_6
VDDA18PCIE_12 VDD_MEM1(NC)
AD9 AA11
C113 AE9
VDDA18PCIE_13 VDD_MEM2(NC)
Y11 Rev:2A Change Footprint to 0603 size
VDDA18PCIE_14 VDD_MEM3(NC) R90 0_6
U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
1u/10V_4 AB10
+1.8V_VDDG18_NB VDD_MEM5(NC)
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
+1.8V G9 +3V
VDDG18_2(VDD18_2)
1.8V(0.005A) AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 3.3V(0.03A)
R83 0_6 +1.8V_VDD18_MEM AD11 H12 +3V_VDDG33V R148 0_6
VDD18_MEM2(NC) VDDG33_2(NC)
RS780M C205 C204
A
0.1u/10_4 0.1u/10_4 A
PROJECT : BU2
RS780 NB4
Size
Custom
Document Number
RS740/RS780-POWER5/5
Rev
1A
Date: Thursday, April 10, 2008 Sheet 11 of 35

5 4 3 2 1
5 4 3 2 1
SB700 (18,23,24,28) PLTRST#

AC COUPLING CAPS CLOSE TO SB700
R490
R491
33_4
33_4 A_RST#_SB
U34A
SB700 PCI_CLK0_R R510 22_4
12
(10,14) A_RST# N2 A_RST# PCICLK0 P4 PCLK_OZ129 (22)
Part 1 of 5 P3 PCI_CLK1_R R509 CB@22_4 PCLK_PCM (21)
A_RX0P_C PCICLK1 PCI_CLK2_R
PCI CLKS
(9) PCIE_SB_NB_RX0P C470 0.1u/10V_4 V23 P1 R493 22_4 PCI_CLK2 (16)
C471 0.1u/10V_4 A_RX0N_C PCIE_TX0P PCICLK2 PCI_CLK3_R R514 22_4
(9) PCIE_SB_NB_RX0N V22 PCIE_TX0N PCICLK3 P2 PCI_CLK3 (16)
(9) PCIE_SB_NB_RX1P C469 0.1u/10V_4 A_RX1P_C V24 T4 PCI_CLK4_R R498 22_4 PCI_CLK4 (16)
C468 0.1u/10V_4 A_RX1N_C PCIE_TX1P PCICLK4 PCI_CLK5_R R496 22_4
(9) PCIE_SB_NB_RX1N V25 PCIE_TX1N PCICLK5/GPIO41 T3 PCI_CLK5 (16)
(9) PCIE_SB_NB_RX2P C466 0.1u/10V_4 A_RX2P_C U25
D PCIE_TX2P D
(9) PCIE_SB_NB_RX2N C467 0.1u/10V_4 A_RX2N_C U24
FOR INTERNAL CLOCK (9)
(9)
PCIE_SB_NB_RX3P
PCIE_SB_NB_RX3N
C464
C465
0.1u/10V_4
0.1u/10V_4
A_RX3P_C
A_RX3N_C
T23
T22
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N PCIRST# N1 PCIRST#_SB700 R492 33_4
PCIRST# (21,22)
AD[0..31]
PCI EXPRESS INTERFACE

(9) PCIE_NB_SB_TX0P U22 PCIE_RX0P AD[0..31] (16,21,22)
2 1 RP42 SB_CPU_CLKIN_P U21 U2 AD0
(3,6) CPU_CLKP (9) PCIE_NB_SB_TX0N PCIE_RX0N AD0
4 3 *INT@0_4P2R_4 SB_CPU_CLKIN_N U19 P7 AD1
(3,6) CPU_CLKN (9) PCIE_NB_SB_TX1P PCIE_RX1P AD1
V19 V4 AD2
(9) PCIE_NB_SB_TX1N PCIE_RX1N AD2
R20 T1 AD3
(9) PCIE_NB_SB_TX2P PCIE_RX2P AD3
R21 V3 AD4 +3V
(9) PCIE_NB_SB_TX2N PCIE_RX2N AD4
4 3 RP69 SB_GPP_CLK1P R18 U1 AD5
(3,24) CLK_PCIE_NEW (9) PCIE_NB_SB_TX3P PCIE_RX3P AD5
2 1 *INT@0_4P2R_4 SB_GPP_CLK1N R17 V1 AD6
(3,24) CLK_PCIE_NEW # (9) PCIE_NB_SB_TX3N PCIE_RX3N AD6
V2 AD7
R383 562/F_4 SB_PCIE_CALRP AD7 AD8 REQ0# R424 *8.2K_4
T25 PCIE_CALRP AD8 T2
+1.2V_PCIE_VDDR R382 2.05K/F_4 SB_PCIE_CALRN T24 W1 AD9
SB_GPP_CLK3P PCIE_CALRN AD9 AD10 REQ1#
(3,23) CLK_PCIE_MINI2 4 3 RP77 AD10 T9 R422 *8.2K_4
2 1 *INT@0_4P2R_4 SB_GPP_CLK3N +1.2V L24 BLM18PG221SN1D_6 +1.2V_PCIE_PVDD P24 R6 AD11
(3,23) CLK_PCIE_MINI2# PCIE_PVDD AD11
40mA R7 AD12
C245 C247 AD12 AD13 GNT3# R474 8.2K_4
P25 PCIE_PVSS AD13 R5
1.PCIE Reference Clk(Ext Clk Gen) U8 AD14
Place close to CLK GEN 2. A-Link Clk to North Bridge(Int Clk Gen)
10u/6.3V_8 1u/10V_4 AD14
AD15 U5
Y7
AD15
AD16
AD16 AD17
AD17 W8
V9 AD18
AD18 AD19 GNT3# R473 *8.2K_4
Ext: Clk Gen AD19 Y8
Int: A-Link Clock to NB AA8 AD20
AD20 AD21 SB_GPIO65 R464 100K_4
AD21 Y4
RP48 2 1 EXT@0_4P2R_4 Y3 AD22
(3) SBSRC_CLKP AD22
From Clk Gen Input 4 3 EXT Y2 AD23
(3) SBSRC_CLKN AD23
AA2 AD24
AD24 AD25
AD25 AB4
C RP76 PCIE_RCLKP AD26 C
(10) SB_PCIE_NB_CLKP 4 3 *INT@0_4P2R_4 N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1
To NB A-Link CLK (10) SB_PCIE_NB_CLKN 2 1 INT PCIE_RCLKN N24 AB3 AD27
PCIE_RCLKN/NB_LNK_CLKN AD27 AD28
AD28 AB2
RP47 2 1 *INT@0_4P2R_4 NB_DISP_CLKP K23 AC1 AD29
(10) SB_DISP_CLKP NB_DISP_CLKP AD29
PCI INTERFACE
For North Bridge 4 3 NB_DISP_CLKN K22 AC2 AD30
(10) SB_DISP_CLKN NB_DISP_CLKN AD30
AD1 AD31
RP75 NB_HT_CLKP AD31
(10) SB_NBHT_REFCLKP 2 1 *INT@0_4P2R_4 M24 NB_HT_CLKP CBE0# W2 CBE0# (21,22)
For North Bridge 4 3 NB_HT_CLKN M25 100MHZ U7
(10) SB_NBHT_REFCLKN NB_HT_CLKN CBE1# CBE1# (21,22)
CBE2# AA7 CBE2# (21,22)
SB_CPU_CLKIN_P RP50 3 4 *INT@0_4P2R_4 CPU_HT_CLKP P17 Y1
CPU_HT_CLKP CBE3# CBE3# (21,22)
For CPU Host Clk SB_CPU_CLKIN_N 1 2 CPU_HT_CLKN M18 AA6
CPU_HT_CLKN FRAME# FRAME# (21,22)
R196 DEVSEL# W5 DEVSEL# (21,22)
Close to SB SLT_GFX_CLKP M23 AA5
T47 SLT_GFX_CLKP IRDY# IRDY# (21,22)
*261/F_4 SLT_GFX_CLKN M22 Y5
T46 SLT_GFX_CLKN TRDY# TRDY# (21,22)
PAR U6 PAR (21,22)
RP46 3 4 *INT@0_4P2R_4 GPP_CLK0P J19 W6
(3,24) PCIE_CLK_LAN GPP_CLK0P STOP# STOP# (21,22)
To Marvell Lan 1 2 GPP_CLK0N J18 W4
(3,24) PCIE_CLK_LAN# GPP_CLK0N PERR# PERR# (21)
SERR# V7 SERR# (21)
SB_GPP_CLK1P RP51 3 4 *INT@0_4P2R_4 GPP_CLK1P L20 AC3 REQ0#
GPP_CLK1P REQ0# REQ0# (22)
To New Card SB_GPP_CLK1N 1 2 GPP_CLK1N L19 AD4 REQ1#
GPP_CLK1N REQ1# REQ1# (21)
AB7 REQ2#
REQ2# T115
GPP_CLK2P
CLOCK GENERATOR
RP49 3 4 *INT@0_4P2R_4 M19 AE6
(3,23) PCIE_CLK_MINI GPP_CLK2P REQ3#/GPIO70 PORT_C# (26)
1 2 GPP_CLK2N M20 AB6 REQ4#
(3,23) PCIE_CLK_MINI# GPP_CLK2N REQ4#/GPIO71 T124
GNT0# AD2 GNT0# (22)
To Mini Card 1,2 SB_GPP_CLK3P RP74 3 4 *INT@0_4P2R_4 GPP_CLK3P N22 AE4
GPP_CLK3P GNT1# GNT1# (21)
SB_GPP_CLK3N 1 2 GPP_CLK3N P22 AD5 GNT2#
GPP_CLK3N GNT2# T118
AC6 GNT3# Rev:2A 12/06 DEL G-Sensor SCI Event(GPIO).
GNT3#/GPIO72 GNT4#
T48 L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5 T117
AD6 CLKRUN#_R R470 0_4
CLKRUN# CLKRUN# (22,28)
LOCK# V5
C266 *22P_4 SB700_25M_X1 J21 25M_X1
Rev:3C 05/09 Remove Test Ports For Space Limiting.
B AD3 INTE# B
INTE#/GPIO33 INTE# (22)
2
R207 AC4 INTF#
INTF#/GPIO34 INTF# (21)
Rev:3B 04/02 As the same location Name(G1) For Toshiba Service Team Request. Y4 AE2 INTG# R241 FM@0_4
INTG#/GPIO35 FM_INT (24)
Install for Int Clk Gen *25MHZ *10M_6 J20 AE3 INTH# R124 *GS@0_4
25M_X2 INTH#/GPIO36 HDPINT (19)
1
C270 *22P_4 SB700_25M_X2
G22 LPCCLK0_R R412 22_4
LPCCLK0 PCLK_591 (16,28)
E22 LPCCLK1_R R411 22_4
LPCCLK1 PCLK_DEBUG (16,23)
+3VPCU 2 1 RTC_X1 A3 H24
X1 LAD0 LAD0 (23,28)
RTC XTAL
D31 RB500 VCCRTC H23
LAD1 LAD1 (23,28)
LAD2 J25 LAD2 (23,28)
+1.8VSUS +1.8V J24
LAD3 LAD3 (23,28)
LPC
TERM13 2 1 +3VRTC R364 510/F_6 RTC_X2 B3 H25
X2 LFRAME# LFRAME# (23,28)
D33 RB500 H22
LDRQ0# LDRQ#0 (23)
R194 R193 AB8 LDRQ1#_SB
LDRQ1#/GNT5#/GPIO68 T51
1
C443 G1 AD7 SB_GPIO65

BMREQ#/REQ5#/GPIO65 T113
*10K_4 *10K_4 V15 SERIRQ
SERIRQ SERIRQ (21,23,28)
1U/10V_4
R366 *SHORT_ PAD1 F23
2
(10) ALLOW _LDTSTOP ALLOW_LDTSTP

1K_4 (6) CPU_PROCHOT# F24 PROCHOT# RTCCLK C3 RTC_CLK (16)
(6) CPU_PW RGD F22 C2 INTRUDER_ALERT#
LDT_PG INTRUDER_ALERT# T119
RTC
CPU
(6,10) CPU_LDT_STOP# G25 LDT_STP# VBAT B2 VCCRTC
Rev:3A 02/13 RTC Circuit R363/R360/R359/R361 Follow Standar Circuit Value. (6,10) CPU_LDT_RST# G24 LDT_RST#
20MIL C537 C541
+5VPCU
Rev:3A 02/05 No-Stuff R194 For Leakage when system into G3 mode. SB700 1u/10V_4 0.1u/10V_4
R363 R360 RTC_X1
TERM12 1 3 TERM11 TERM15
Y8
Q57 2K/F_4 2K/F_4 3 2
MMBT3904 R359
2
A
20MIL 6.8K/F_4
A
4 1 RTC_X2
CN27
TERM14 R454
*20M_6 32.768KHZ
1 Rev:2A 12/07 Change Part Number.
R361 R465 20M_6
2
15K/F_6 C527 C535 PROJECT : BU2
ACS_85204-0200L
RTC 18P_4 18P_4
NB4
Size
Custom
Document Number
SB700-PCIE/PCI/CPU/LPC 1/4
Rev
1A
5 4 3 2 1
5 4 3 2 1
SB700 U34D
CLK_48M_USB R446
EMI
*10_4 C514 *10P_4
13
SB700 Part 4 of 5 48MHz
(21,22) PCI_PME# E1
RI# PCI_PME#/GEVENT4# CLK_48M_USB
T122 E2 C8 CLK_48M_USB (3)
SLP_S2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC
T67 H7
+1.8VSUS SLP_S2/GPM9# USB_RCOMP_SB R238 11.8K/F_6
(16,28) SUSB# F5 G8 Input
USB MISC
SLP_S3# USB_RCOMP
D
(28) SUSC# G1 D
SLP_S5#
ACPI / WAKE UP EVENTS

(28) DNBSWON# H2
PWR_BTN#
(16) SB_PWRGD_IN H1
R66 2.2K_4 SB_SCLK3 SUS_STAT# PWR_GOOD
(10) SUS_STAT#
R482 *2.2K_4 SB_TEST2
K3
SUS_STAT# Rev:3C 04/08 Reserve the 0hm to USB7 Controller.
H5 E6
R67 2.2K_4 SB_SDATA3 R483 *2.2K_4 SB_TEST1 TEST2 USB_FSD13P
+3V_S5
R484 *2.2K_4 SB_TEST0
H4
TEST1 USB_FSD13N
E7 Rev:3A 03/03 Swap USB CONN From USB11 to USB7 For Controller ESATA Certification.
H3
TEST0
USB 1.1
(28) GATEA20 Y15
GA20IN/GEVENT0# USB_FSD12P
F7 Rev:2A 12/11 Swap the New Card From USB7 to USB3 For OHCI Controllers.
(28) RCIN# W15 E8
KBRST#/GEVENT1# USB_FSD12N
(28) SCI# K4
LPC_PME#/GEVENT3# USB_FSD11P R477 0_4 USBP7+
T103 K24 H11
+3V_S5 LPC_SMI#/EXTEVNT1# USB_HSD11P USB_FSD11N R572 0_4 USBP7-
Rev:2A 12/06 Support the New Card Hot Plug Function. T126
SYS_RST#
F1
S3_STATE/GEVENT5# USB_HSD11N
J10
J2
SYS_RESET#/GPM7#
(23,24) PCIE_WAKE# H6 E11 USBP10+ (20)
GPM6# WAKE#/GEVENT8# USB_HSD10P
R414 2.2K_4 SB_SCLK2
T121 F2
BLINK/GPM6# USB_HSD10N
F11 USBP10- (20) E-SATA and USB Connector
(6) CPU_THERMTRIP# J6
SMBALERT#/THRMTRIP#/GEVENT2# USB_FSD9P
(16) WD_PWRGD W14 A11 T104
R418 2.2K_4 SB_SDATA2 NB_PWRGD USB_HSD9P USB_FSD9N
B11 T105
R54 0_4 SB_RSMRST# USB_HSD9N
(28) RSMRST# D3
R487 2.2K_4 SB_SMBCLK1 RSMRST#
C10 USBP8+ (23)
USB_HSD8P
R486 2.2K_4 SB_SMBDATA1 USB_HSD8N
D10 USBP8- (23) TV/HD DECODER Min-Card
BOARD_ID2 AE18 G11 USB_FSD7P R573 *0_4 USBP7+
SATA_IS0#/GPIO10 USB_HSD7P USBP7+ (20)
R568 10K_4 USBOC5_GPM5 BOARD_ID1 AD18 H12 USB_FSD7N R574 *0_4 USBP7- USB Connector
CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N USBP7- (20)
BOARD_ID0 AA19
R201 FM@0_4 FM_CLK_REQ0# SMARTVOLT/SATA_IS2#/GPIO4
(24) FM_CLK W17 E12 USBP6+ (25)
CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P
Rev:3B 04/07 USB Overcurrent 5 Pull-up 10K For Open Drain. (3,24) NEW_CLKREQ#
R437 *0_4 SB_CLK_REQ1# V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
E14 USBP6- (25) BLUETOOTH
R200 FM@0_4 FM_DATA_REQ2# W20
+3V (24) FM_DATA CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21 C12
USB 2.0
(24) SPKR SPKR/GPIO2 USB_HSD5P USBP5+ (25)
PCLK_SMB AA18 D12 FINGERPRINT
(3,8) PCLK_SMB SCL0/GPOC0# USB_HSD5N USBP5- (25)
R485 4.7K_4 SUS_STAT# PDAT_SMB W18
(3,8) PDAT_SMB SDA0/GPOC1#
SB_SMBCLK1 K1 B12
(23,24) SB_SMBCLK1 SCL1/GPOC2# USB_HSD4P USBP4+ (23)
R434 *10K_4 SB_CLK_REQ1# SB_SMBDATA1 K2 A12 Min-Card
GPIO
C (23,24) SB_SMBDATA1 SDA1/GPOC3# USB_HSD4N USBP4- (23) C
FM_DETECT AA20
(24) FM_DETECT DDC1_SCL/GPIO9
R227 2.2K_4 PCLK_SMB Y18 G12
(23) PDMA66 DDC1_SDA/GPIO8 USB_HSD3P USBP3+ (24)
LLB#/GPIO66 C1 G14 NEW CARD
T127 LLB#/GPIO66 USB_HSD3N USBP3- (24)
R224 2.2K_4 PDAT_SMB LOW_DET Y19
(25) LOW_DET SHUTDOWN#/GPIO5
R240 *GS@0_4 GEVENT7# G5 H14
(19) HDPACT DDR3_RST#/GEVENT7# USB_HSD2P USBP2+ (17)
Rev:2A 12/06 DEL G-Sensor SCI Event(GPIO). USB_HSD2N
H15 USBP2- (17) CAMERA USB
Rev:3A 02/05 Move Board ID4 Pin Name From GPIO66 to GPIO3. D39 USB_HSD1P
A13 USBP1+ (25)
USB_HSD1N
B13 USBP1- (25) Felica
(6,8) CPU_MEMHOT# 1 2
B14 USBP0+ (24)
G3 CPU_MEMHOT#_IN USB_HSD0P
SYS_RST#
CH501H-40PT
R445 0_4 USBOC5_GPM5
B9
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N
A14 USBP0- (24) USB Connector(RJ45/USB BOARD)
2 1 (20,28) USBOC#5 B8
USBOC4_GPM4 USB_OC5#/IR_TX0/GPM5#
A8 A18
USB OC
T128 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
*SHORT_ PAD1 R569 0_4 USBOC3_GPM3 A9 B18
SB_JTAG_TCK USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
T63 E5 F21
R544 NEW@0_4 USBOC1_GPM1 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 SB_SCLK2
(24) NEW_DET# F8 D21 SB_SCLK2 (18)
USB_OC1#/GPM1# SCL2/IMC_GPIO11 SB_SDATA2
(24,28) USBOC#0 E4 F19 SB_SDATA2 (18)
USB_OC0#/GPM0# SDA2/IMC_GPIO12 SB_SCLK3
Rev:3B 04/07 Added the USB Overcurrent 3 to Support USB 2.0 Ports. ACZ_BCLK SCL3_LV/IMC_GPIO13
E20
SB_SDATA3
SB_SCLK3 (6)
M1 E21 SB_SDATA3 (6)
ACZ_SDOUT AZ_BITCLK SDA3_LV/IMC_GPIO14
Rev:3A 02/05 Move Hot Plug Pin Name From GEVENT5# to GPM1. M2
AZ_SDOUT IMC_PWM1/IMC_GPIO15
E19
(26) ACZ_SDIN0 J7 D19 SB_GPIO16 (16)
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
J8 E18 SPI/LPC define
HD AUDIO
T58 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 SB_GPIO17 (16)
T71 L8
AZ_SDIN2/GPIO44
T116 M3 G20
ACZ_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18
L6 G21
ACZ_RST# AZ_SYNC IMC_GPIO19
(16) ACZ_RST# M4 D25
AZ_RST# IMC_GPIO20
INTEGRATED uC
L5 D24
AZ_DOCK_RST#/GPM8# IMC_GPIO21
C25
IMC_GPIO22
C24
IMC_GPIO23
B25
IMC_GPIO24
C23
B
IMC_GPIO25 B
B24
IMC_GPIO26
B23
+1.8V IMC_GPIO27
A23
IMC_GPIO28
C22
IMC_GPIO29
HD Audio Interface R167

IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
A22
B22
B21
A21
20K_4 IMC_GPIO33
H19 D20
IMC_GPIO0 IMC_GPIO34
INTEGRATED uC
H20 C20
To Azalia H21
SPI_CS2#/IMC_GPIO2 IMC_GPIO36
A20
(23) HDD_AUX_RST# F25 B20
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
B19
R489 33_4 ACZ_BCLK IMC_GPIO38
(26) BIT_CLK_AUDIO D22 A19
E24 D18
C554 *10P_4 IMC_GPIO5 IMC_GPIO40
E25 C18
D23
IMC_GPIO7
To Azalia SB700 Rev:3B 04/18 There is internal 8.2K of I/O Balls So Change Pull-Down Resistors From 10K to 1K.
R488 33_4 ACZ_SDOUT

(26) ACZ_SDOUT_AUDIO
C553 *10P_4
MB ID Selection Table MB ID +3V
BOARD_ID BOARD_ID0 BOARD_ID1 BOARD_ID2 FM_DETECT BOARD_ID4 LOW_DET R206 *CB@1K_4 BOARD_ID0 R205 NEW@10K_4
W/ New Crad H
W/ Crad Bus L
To Azalia R215 *LED@1K_4 BOARD_ID1 R214 LCD@10K_4
A W/ CCFL Panel H A
W/ LED Panel L
R259 33_4 ACZ_SYNC R219 *W/O@1K_4 BOARD_ID2 R218 *GS@10K_4
(26) ACZ_SYNC_AUDIO
W/ G-Sensor H
C336 *10P_4
W/O G-Sensor L R210 *FM@1K_4 FM_DETECT R209 W/O@10K_4
W/O FM H
W/FM L
To Azalia
W/ HDMI H
R245 *W/O@1K_4 BOARD_ID4 R250 HDM@10K_4
PROJECT : BU2
R504 33_4 ACZ_RST#
W/O HDMI L
R203 *LOW@1K_4 LOW_DET R202 MAIN@10K_4
(26) ACZ_RST#_AUDIO
Main Strem H
Low Cost Size Document Number Rev
L Custom
BOARD_ID4 BOARD_ID4 (14) SB700-ACPI/GPIO/USB 2/4 1A
NB4
5 4 3 2 1
5 4 3 2 1
SB700 PLACE SATA AC COUPLING CAPS CLOSE TO SB700

U34B
14
C497 0.01u/16V_4 SATA_TXP0_R R426 4.99/F_4 SATA_TXP0_C AD9
SB700 AA24
(20) SATA_TXP0 SATA_TX0P IDE_IORDY PDIORDY (23)
C498 0.01u/16V_4 SATA_TXN0_R R430 4.99/F_4 SATA_TXN0_C Part 2 of 5
D SATA HDD (20) SATA_TXN0 AE9 SATA_TX0N IDE_IRQ AA25
Y22
IRQ14 (23) D
IDE_A0 PDA0 (23)
C502 0.01u/16V_4 SATA_RXN0_C AB10 AB23
(20) SATA_RXN0 SATA_RX0N IDE_A1 PDA1 (23)
C504 0.01u/16V_4 SATA_RXP0_C AC10 Y23
(20) SATA_RXP0 SATA_RX0P IDE_A2 PDA2 (23)
IDE_DACK# AB24 PDDACK# (23)
C517 0.01u/16V_4 SATA_TXP1_R R449 4.99/F_4 SATA_TXP1_C AE10 AD25
(20) SATA_TXP1 SATA_TX1P IDE_DRQ PDDREQ (23)
C521 0.01u/16V_4 SATA_TXN1_R R452 4.99/F_4 SATA_TXN1_C
E-SATA (20) SATA_TXN1 AD10 SATA_TX1N IDE_IOR# AC25
AC24
PDIOR# (23)
IDE_IOW# PDIOW# (23)
C507 0.01u/16V_4 SATA_RXN1_C AD11 Y25
(20) SATA_RXN1 SATA_RX1N IDE_CS1# PDCS1# (23)
C505 0.01u/16V_4 SATA_RXP1_C AE11 Y24
(20) SATA_RXP1 SATA_RX1P IDE_CS3# PDCS3# (23)
AB12 AD24 PDD0
T129 SATA_TX2P IDE_D0/GPIO15
AC12 AD23 PDD1
T130 SATA_TX2N IDE_D1/GPIO16
AE22 PDD2
IDE_D2/GPIO17
ATA 66/100/133
AE12 AC22 PDD3
T131 SATA_RX2N IDE_D3/GPIO18
AD12 AD21 PDD4
T132 SATA_RX2P IDE_D4/GPIO19
AE20 PDD5
IDE_D5/GPIO20 PDD6
Rev:3B 04/18 Change HDD Control From Channel/2 to Channel/0 For Spin Down Issue. AD13 SATA_TX3P IDE_D6/GPIO21 AB20
SERIAL ATA
AE13 AD19 PDD7
SATA_TX3N IDE_D7/GPIO22 PDD8
IDE_D8/GPIO23 AE19
AB14 AC20 PDD9
SATA_RX3N IDE_D9/GPIO24 PDD10
AC14 SATA_RX3P IDE_D10/GPIO25 AD20
AE21 PDD11
C532 0.01u/16V_4 SATA_TXP4_R R461 4.99/F_4 SATA_TXP4_C IDE_D11/GPIO26 PDD12
(20) SATA_TXP4 AE14 SATA_TX4P IDE_D12/GPIO27 AB22
C524 0.01u/16V_4 SATA_TXN4_R R455 4.99/F_4 SATA_TXN4_C AD14 AD22 PDD13
SATA ODD (20) SATA_TXN4 SATA_TX4N IDE_D13/GPIO28
AE23 PDD14
C516 0.01u/16V_4 SATA_RXN4_C IDE_D14/GPIO29 PDD15
(20) SATA_RXN4 AD15 SATA_RX4N IDE_D15/GPIO30 AC23 PDD[0..15] (23)
C512 0.01u/16V_4 SATA_RXP4_C AE15
(20) SATA_RXP4 SATA_RX4P
C C
AB16 SATA_TX5P
AC16 SATA_TX5N
Rev:3A 02/22 Change Setting the SATA ODD to be IDE Legacy class Mode.. SPI_DI/GPIO12 G6
AE16 SATA_RX5N SPI_DO/GPIO11 D2
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 Rev:3C 04/08 Reserve the Board ID For USB Controller.
SPI_HOLD#/GPIO31 F4
SPI ROM
R234 1K/F_4 SATA_RBIAS_PN V12 F3 Rev:3A 02/05 Added the Board ID4 to GPIO3..
SATA_CAL SPI_CS#/GPIO32
SATA_X1 Y12 U15 LAN_RST# R507 *0_4
SATA_X1 LAN_RST#/GPIO13 A_RST# (10,12)
J1 ROM_RST# T120
SATA_X2 ROM_RST#/GPIO14
AA12
NOTE: SATA_X2
M8
FANOUT0/GPIO3 BOARD_ID4 (13)
R635 IS 1K 1% FOR 25MHz (25) SATA_LED# W11 M5 SB_FANOUT1 R575 *USB7@1K_4
SATA_ACT#/GPIO67 FANOUT1/GPIO48 SB_FANOUT2 R576 USB7@1K_4
FANOUT2/GPIO49 M7
XTAL, 4.99K 1% FOR 100MHz
INTERNAL CLOCK FANIN0/GPIO50 P5
AA11 P8
SATA PWR
+1.2V_PLLVDD_SATA PLLVDD_SATA FANIN1/GPIO51
FANIN2/GPIO52 R8 Rev:3C 05/09 Remove Test Ports For Space Limiting.
+3V_XTLVDD_SATA W12 XTLVDD_SATA
TEMP_COMM C6
TEMPIN0/GPIO61 B6 T60
TEMPIN1/GPIO62 A6 T54
A5
HW MONITOR
TEMPIN2/GPIO63 T109
C260 27P_4 SATA_X1 B5
TEMPIN3/TALERT#/GPIO64 PM_THERM# (6)
VIN0/GPIO53 A4
2
Y3 B4
B
R198 VIN1/GPIO54 B
VIN2/GPIO55 C4
VIN3/GPIO56 D4
25MHZ 10M_6 D5 Rev:3C 05/09 Remove Test Ports For Space Limiting.
1
VIN4/GPIO57
VIN5/GPIO58 D6
SATA_X2 A7
C259 27P_4 VIN6/GPIO59
VIN7/GPIO60 B7
Rev:2A 12/07 Cahnge C259/C260 Load Capacitance For Matching Crystal. +3V
5mA
F6 AVDD_HWM R243 0_6
AVDD
77mA G7 C329 C330
AVSS
AVDD--H/W Monitor Analog power
+1.2V ( 1.2V @ 60mA) +1.2V_PLLVDD_SATA *0.1u/10V_4 *2.2u/6.3V_6
SB700
L30
BLM18PG221SN1D_6
C310 C311
Rev:2A 12/07 Change +3V Domain For System Leakage When System into S5 Mode.
1u/10V_4 1u/10V_4
1mA
+3V ( 3.3V @ 1.2mA) +3V_XTLVDD_SATA
A A
L28
BLM18PG221SN1D_6
C299
1u/10V_4
PROJECT : BU2
Place near ball
Custom 1A
SB700-ACPI/GPIO/USB 2/4
NB4
5 4 3 2 1
5 4 3 2 1
SB700 PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.
Rev:2A 12/10 The VDD Power Pin to be connected to S0_1.2V Power For A12 Chip.
A11 Chip Bug

15
use A12 Chip Can Remove
R481 *0_8 +1.2V_S5
+3V +3.3V_SB_R U34C +1.2V_VCC_SB_R
D R500 0_8
0.8A SB700 604mA R516 0_8 U34E D
L9 VDDQ_1 VDD_1 L15 +1.2V
M9 VDDQ_2 Part 3 of 5 VDD_2 M12
1
C557 C550 C325 C323 C288 C315 C305 C291

T15
U9
VDDQ_3 VDD_3 M14
N13 C308 C318 C300 C301 C306 C549 SB700 A2
CORE S0
VDDQ_4 VDD_4 VSS_1
U16 P12 A25
PCI/GPIO I/O
100u/6.3V_3528 10u/6.3V_8 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 VDDQ_5 VDD_5 0.1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 22u/6.3V_8 VSS_2
U17 P14 B1
2
VDDQ_6 VDD_6 VSS_3

V8 VDDQ_7 VDD_7 R11 VSS_4 D7
W7 VDDQ_8 VDD_8 R15 T10 AVSS_SATA_1 VSS_5 F20
Y6 T16 U10 G19
VDDQ_9 VDD_9 AVSS_SATA_2 VSS_6
AA4 VDDQ_10 U11 AVSS_SATA_3 VSS_7 H8
AB5 VDDQ_11 U12 AVSS_SATA_4 VSS_8 K9
AB21 +1.2V_CKVDD +1.2V V11 K11
VDDQ_12 L51 AVSS_SATA_5 VSS_9
286mA V14
AVSS_SATA_6 VSS_10
K16
VDD33_18--3.3V IDE I/O power W9
AVSS_SATA_7 VSS_11
L4
+VDD33_18 BLM18PG221SN1D_6 Y9 L7
1.8V flash memory I/O power AVSS_SATA_8 VSS_12
R192 0_8
0.45A C254 C480 C478 C479
Y11 AVSS_SATA_9 VSS_13 L10
+1.8V Y20 L21 Y14 L11
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_10 VSS_14
AA21 L22 Y17 L12
IDE/FLSH I/O
CLKGEN I/O
VDD33_18_2 CKVDD_1.2V_2 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 AVSS_SATA_11 VSS_15
AA22 L24 AA9 L14
C246 C275 C273 C267 C263 VDD33_18_3 CKVDD_1.2V_3 AVSS_SATA_12 VSS_16
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB9 AVSS_SATA_13 VSS_17 L16
AB11 M6
22u/6.3V_8 1u/10V_4 1u/10V_4 1u/10V_4 1u/10V_4 AVSS_SATA_14 VSS_18
AB13 AVSS_SATA_15 VSS_19 M10
AB15 M11
AVSS_SATA_16 VSS_20
AB17 AVSS_SATA_17 VSS_21 M13
+3.3VALW _R +3V_S5 AC8 M15
AVSS_SATA_18 VSS_22
0.01A R256 0_6
AD8
AVSS_SATA_19 VSS_23
N4
AE8 N12
+1.2V +1.2V_PCIE_VDDR
POWER AVSS_SATA_20 VSS_24
VSS_25
N14
P6
L25 C331 C327 C333 VSS_26
C
844mA VSS_27
P9
C
P18 PCIE_VDDR_1 VSS_28 P10
BLM18PG221SN1D_6 P19 1u/10V_4 1u/10V_4 22u/6.3V_8 A15 P11
PCIE_VDDR_2 AVSS_USB_1 VSS_29
P20 B15 P13
A-LINK I/O
C261 C280 C281 C258 C268 C264 PCIE_VDDR_3 AVSS_USB_2 VSS_30
P21 PCIE_VDDR_4 S5_3.3V_1 A17 C14 AVSS_USB_3 VSS_31 P15
R22 PCIE_VDDR_5 S5_3.3V_2 A24 D8 AVSS_USB_4 VSS_32 R1
22u/6.3V_8 1u/10V_4 1u/10V_4 1u/10V_4 0.1u/10V_4 0.1u/10V_4 R24 B17 D9 R2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_5 VSS_33
3.3V_S5 I/O
R25 J4 D11 R4
PCIE_VDDR_7 S5_3.3V_4 +1.2VALW _R +1.2V_S5 AVSS_USB_6 VSS_34
S5_3.3V_5 J5 D13 AVSS_USB_7 VSS_35 R9
GROUND
S5_3.3V_6 L1 D14 AVSS_USB_8 VSS_36 R10
L2 R249 0_6 D15 R12
+1.2V +1.2V_AVDD_SATA S5_3.3V_7 AVSS_USB_9 VSS_37
E15 AVSS_USB_10 VSS_38 R14
L53 0.2A C328 C332 F12 T11
AVSS_USB_11 VSS_39
AA14 AVDD_SATA_1 F14 AVSS_USB_12 VSS_40 T12
BLM18PG221SN1D_6 AB18 1u/10V_4 1u/10V_4 G9 T14
AVDD_SATA_4 AVSS_USB_13 VSS_41
AA15 0.22A H9 U4
SATA I/O
C492 C495 C290 C303 C289 AVDD_SATA_2 AVSS_USB_14 VSS_42
AA17 G2 H17 U14
CORE S5
AVDD_SATA_3 S5_1.2V_1 AVSS_USB_15 VSS_43
AC18 G4 J9 V6
22u/6.3V_8 1u/10V_4 1u/10V_4 0.1u/10V_4 0.1u/10V_4 AVDD_SATA_5 S5_1.2V_2 AVSS_USB_16 VSS_44
AD17 J11 Y21
AVDD_SATA_6 +1.2V_USB_PHY_R +1.2V_S5 AVSS_USB_17 VSS_45
AE17 J12 AB1
AVDD_SATA_7 AVSS_USB_18 VSS_46
0.2A R440 0_6
J14 AVSS_USB_19 VSS_47 AB19
USB_PHY_1.2V_1 A10 J15 AVSS_USB_20 VSS_48 AB25
USB_PHY_1.2V_2 B10 K10 AVSS_USB_21 VSS_49 AE1
C508 C509 C506 K12 AE24
AVSS_USB_22 VSS_50
K14
1u/10V_4 1u/10V_4 10u/6.3V_8 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
+3V_S5 +3V_AVDD_USB
L27
0.2A PCIE_CK_VSS_10 R16
4mA +5V_VREF R444 1K/F_4 PCIE_CK_VSS_11
R19
A16 AE7 +5V T17
BLM18PG221SN1D_6 AVDDTX_0 V5_VREF PCIE_CK_VSS_12
B16 U18
B AVDDTX_1 PCIE_CK_VSS_13 B
C284 C503 C277 C279 C499
C16
AVDDTX_2 AVDDCK_3.3V
J16 +3V_AVDDCK 7mA C511
H18
PCIE_CK_VSS_1 PCIE_CK_VSS_14
U20
D16 1 2 +3V J17 V18
AVDDTX_3 D13 PCIE_CK_VSS_2 PCIE_CK_VSS_15
For support USB wakeup-->3V_S5 D17 K17 44mA J22 V20
PLL
AVDDTX_4 AVDDCK_1.2V +1.2V_AVDDCK PCIE_CK_VSS_3 PCIE_CK_VSS_16
22u/6.3V_8 22u/6.3V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 E17 1u/10V_4 CH501H-40PT K25 V21
AVDDTX_5 PCIE_CK_VSS_4 PCIE_CK_VSS_17
USB I/O
F15 AVDDRX_0 AVDDC E9 +3V_AVDDC 16mA M16 PCIE_CK_VSS_5 PCIE_CK_VSS_18 W19

F17 AVDDRX_1 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
F18 M21 W24
AVDDRX_2 PCIE_CK_VSS_7 PCIE_CK_VSS_20
G15 AVDDRX_3 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
G17 AVDDRX_4
G18 AVDDRX_5 F9 AVSSC AVSSCK L17
Part 5 of 5
C292 C297 C276 C298 C278 SB700 SB700
1u/10V_4 1u/10V_4 1u/10V_4 0.1u/10V_4 0.1u/10V_4
+3V +3V_AVDDCK +1.2V +1.2V_AVDDCK +3V_S5 L31 +3V_AVDDC

L29 L26
BLM18PG221SN1D_6 BLM18PG221SN1D_6 BLM18PG221SN1D_6
C296 C255 C319 C321

A A
2.2u/6.3V_6 2.2u/6.3V_6 10u/6.3V_8 0.1u/10V_4
PROJECT : BU2
Custom 1A
SB700-PWR/DECOUPLING 4/4
NB4
Date: Friday, May 09, 2008 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1
SB700 +3V +3V +3V +3V +3V_S5

It must ready refore RSMRST#
+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 16
R495 R515 R502 R511 R415 R409 R475 R505 R423 R421
*10K_4 *10K_4 10K_4 10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *2.2K_4 2.2K_4
D (12) PCI_CLK2 (12,23) PCLK_DEBUG

GPIO16 D
(12) PCI_CLK3 (12) RTC_CLK
(12) PCI_CLK4 (13) ACZ_RST#
(12) PCI_CLK5 (13) SB_GPIO17
(12,28) PCLK_591 (13) SB_GPIO16
R494 R508 R503 R497 R413 R410 R499 R506 R427 R420
10K_4 10K_4 *10K_4 *10K_4 10K_4 10K_4 *10K_4 10K_4 2.2K_4 *2.2K_4
GPIO17
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
PCI_CLK2 PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK ACZ_RST# GP17 GP16
PULL
BOOTFAIL USE PULL CLKGEN INTERNAL EC ROM TYPE:
HIGH RESERVED RESERVED ENABLE PCI
TIMER DEBUG ENABLED RTC ENABLED
C
REQUIRED ENABLED STRAPS MEM BOOT
HIGH H, H = Reserved C
DEFAULT
STRAPS H, L = SPI ROM
PULL BOOTFAIL IGNORE DISABLE PCI PULL CLKGEN EXT. RTC EC
L, H = LPC ROM DEFAULT
LOW TIMER DEBUG MEM BOOT LOW DISABLED DISABLED
(PD on X1,
DISABLED STRAPS
apply 32KHz
DEFAULT DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT to RTC_CLK)
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23] +3V_S5 +3V
NB/SB POWER GOOD CIRCUIT
(12,21,22) AD28
(12,21,22) AD27 R184 R186
(12,21,22) AD26 Rev:3B 04/12 Change the +3V_S5 to +3V Domain to Meet SB PWRGOOD Timing.
(12,21,22) AD25
(12,21,22) AD24 *10K_4 10K_4 Rev:3A 01/29 Move C243 Capacitor to Meet SB PWRGOOD timing.
B B
(12,21,22) AD23
R182 0_4
SB_PWRGD_IN (13)
C243
R428 R431 R432 R435 R439 R442
*2.2u/6.3V_6 +1.8V +1.8V
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4
R189
Use 2.2K PD. U16
1 5 C244 0.1u/10V_4
D12 CH501H-40PT NC VCC 300_4
(6,28,32) VRM_PWRGD 1 2 2 A
3 4 R187 *33_4
GND Y NB_PWRGD_IN (10)
*NL17SZ17DFT2G +3V
D11 CH501H-40PT
PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 1 2 AL17SZ17000
(28) ECPWROK
IC(5P) NL17SZ17DFT2G(SOT-353)
R191
USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL *10K_4
LONG PLL BCLK PLL PCIE STRAPS
REQUIRED HIGH RESET
(13,28) SUSB#
D10
1
CH501H-40PT
2 R185 *0_4 R190 0_4
WD_PWRGD (13)
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
STRAPS NB_PWRGD_IN: C580
PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM RS780/RX780 = 1.8V; RS740 = 3.3V 1000P_4
LOW SHORT PCI PLL ACPI PLL PCIE STRAPS Do NOT share it with SB_PWRGD when use Internal Clk Gen
A
RESET BCLK (Need SB PLL initialize firstly) A
Rev:2A 12/07 Add 1N Capacitor to Smoothing NB_PWRGD_IN.
PROJECT : BU2
Custom SB700-STRAPS & PWRGD 1A
NB4
5 4 3 2 1
5 4 3 2 1
Panel Source (10) INT_TXLCLKOUT-

(10) INT_TXLCLKOUT+
INT_TXLCLKOUT-
INT_TXLCLKOUT+
RP7
RP2
3
1
3
1
4
2
4
2
LCD@0_4P2R_4
*LED@0_4P2R_4
LCD_TXLCLKOUT-
LCD_TXLCLKOUT+
LED_TXLCLKOUT+
LED_TXLCLKOUT-
HALL Sensor
+3V
+3VPCU R279 100K_4
17
1 2 LID591#
INT_TXLOUT2- RP10 3 4 LCD@0_4P2R_4 LCD_TXLOUT2-
(10) INT_TXLOUT2-
INT_TXLOUT2+ 1 2 LCD_TXLOUT2+ Rev:3A 02/13 Reserve DISPON Pin By EC Control. MR1
(10) INT_TXLOUT2+
R174 C345
EC2648-B3-F_ECS
3
RP4 3 4 *LED@0_4P2R_4 LED_TXLOUT2+ 1K_4 0.1u/10V_4
1 2 LED_TXLOUT2-
D67 BAS316
(28) EC_DISPON
D D
(10) INT_TXLOUT1-
INT_TXLOUT1+ 1 2 LCD_TXLOUT1+ R567 *0_4 DISPON D9 BAS316
(10) INT_TXLOUT1+ LID591# (28)
RP3 3 4 *LED@0_4P2R_4 LED_TXLOUT1+

1 2 LED_TXLOUT1- +3V

(10) INT_TXLOUT0-
INT_TXLOUT0+ 1 2 LCD_TXLOUT0+ R172
(10) INT_TXLOUT0+
3
10K_4
RP5 3 4 *LED@0_4P2R_4 LED_TXLOUT0+
1 2 LED_TXLOUT0- 2 BLON
Rev:2A 12/07 Modified Display ON Circuit to Avoid Flash When into S3/S4/S5
Q60
3
2N7002
3
INT_LVDS_EDIDCLK RP6 3 4 LCD@0_4P2R_4 LCD_EDIDCLK
1
(10) INT_LVDS_EDIDCLK
INT_LVDS_EDIDDATA 1 2 LCD_EDIDDATA Q32
(10) INT_LVDS_EDIDDATA
2 2 R171 0_4
(28) EC_FPBACK# INT_LVDS_BLON (10)
DTC144EU
RP1 3 4 *LED@0_4P2R_4 LED_EDIDDATA Q59
1 2 LED_EDIDCLK 2N7002 R170 *100K_4
1
+3V R15 4.7K_4 INT_LVDS_EDIDCLK
R16 4.7K_4 INT_LVDS_EDIDDATA
Panel Power +15V

+3V CAMERA Module
C C
R303 65mil
3
R302 0_8
330K_6 Q3 USBP2-_LCD L6 4 3 *DLW21HN900SQ2L_C USBP2- +5V
USBP2+_LCD 4 3 USBP2+
1 2
+3VPCU LCDONG 1 2
2
AO3404 LCDVCC 1 3 CCD_POWER
+5V
C374
USBP2-_LED
+
L5 1 2 *DLW21HN900SQ2L_C C373 10u/10V_8 R301
R14 0.01u/25V_4 L4 USBP2+_LED 1 2 Q49
65mil 4 3
1
2
4 3
3
LCDVCC1 C369 *1000p/50V_4 *4.7K_4

100K_4 0_6 *AO3413
Q2 65mil C12 C10 C15 C370 *0.1u/10V_4
2 R6
0.1u/16V_4 0.01u/16V_4 10u/6.3V_6
2N7002 22_8
3
LCDDISCHG T1 USBP2-_LCD RP12 2 1 LCD@0_4P2R_4

USBP2- (13)
1
3
2 Q4 USBP2+_LCD 4 3
(10) INT_LVDS_DIGON USBP2+ (13)
3
PDTC143TT 2 CCD_POWERON (28)

R13 Q1
1
LCDON# 2 USBP2-_LED RP11 4 3 *LED@0_4P2R_4

*100K_4 USBP2+_LED 2 1 Q48
1
2N7002 *DTC144EU
1
LED Panel Drive IC +3V TOSHIBA LED Panel Module LCD Panel Module
B B
U40
5
DISPON 1 *LED@NC7SZ08P5X_NL
VIN 4
2 CCD_POWER INVCC0 : 0.67A
46
45
44 40
+3V
3
2
43 39 R20 LCD@0_8 INVCC0

42 38 LCDVCC VIN
F2
41 37 C27 C25
36
LED_VDD(From LCD_VCC) :
*LED@LITTLE-0603-2A-32V LCD_VADJ R8 **LED@0_4 LCD_VADJ_O2 USBP2-_LED + C24
35 4A(Rush current) 0.31A(Typ)
USBP2+_LED LCD@1000p_4 LCD@0.1u/50V_6
1
C16 **LED@1n_4 34 LCD@10u/25V_1210

LED_VIN L34 *LED@10UH-88mR 33 LED_TXLOUT2+
32 LED_TXLOUT2-
31
Rev:2A 12/07 The Reserve AND Gate For LED Power-up sequence. 30 LED_TXLOUT1+
R12
C19 *LED@33n_4 29 LED_TXLOUT1-
28
C375 *LED@499/F_4 27 LED_TXLOUT0+ CN5
LED PWR : 0.015A 26 Rev:3B 04/02 Del the CN7(Reserve) CONN For Space Limiting.
LED_TXLOUT0- 1 2 LCDVCC
LEDAGND D22 25 1 2
3 4
LED_SW LED_PWR 24 LED_TXLCLKOUT+ 3 4
*LED@10U/25V_1206 5 6
23 LED_TXLCLKOUT- 5 6
+3V 7 8
C372 C371 22 CCD_POWER 7 8 LCD_TXLCLKOUT+
9 10
C17 C18 *LED@B140 21 LED_EDIDDATA ADOGND 9 10 LCD_TXLCLKOUT-
ADOGND 11 12
R11 *LED@10u/35V_1210 *LED@10u/35V_1210 20 LED_EDIDCLK R19 0_4 MIC_DATA 11 12
(26) INT_MIC 13 14
*LED@1u/16V_6 *LED@0.1u/50V_6 19 DISPON 13 14 LCD_TXLOUT0+
24
23
22
21
20
19
*LED@1M_6 15 16
18 LED_GND1 R17 *0_4 LCD_VADJ 15 16 LCD_TXLOUT0-
U1 (10) INT_LVDS_PWM 17 18
17 LED_GND2 C14 C13 R18 0_4 LCD_EDIDCLK 17 18
19 20
VDC
VIN
FAULT
COMP
LX
LX
16 (28) CONTRAST 19 20
18 LED_GND3 LCD_EDIDDATA 21 22 LCD_TXLOUT1+
PGND 15 LED_GND4 **LED@1000p_6 **LED@1000p_6 21 22 LCD_TXLOUT1-
17 23 24
PGND LED_OVP 14 LED_GND5 USBP2+_LCD 23 24
1 16 25 26
C587 **LED@47p/50V_4 GND OVP 13 LED_GND6 USBP2-_LCD 25 26 LCD_TXLOUT2+
2 15 27 28
R10 *LED@200K_4 GND IIN0 12 27 28 LCD_TXLOUT2-
3 14 29 30
FPWM IIN1 R7 11 LED_PWR 29 30
4 13 31 32
Vlevel IIN2 10 31 32
5
GND *LED@37K/F_4 9 LCD@LCD_PANEL
6 25
PWMI/EN PAD 8
RSET
7
IIN5
IIN4
IIN3
LEDAGND
NC
NC
A A
6
LEDAGND LED_GND6 5
7
8
9
10
11
12
LCD_VADJ_O2 LED_GND5 4
LED_GND4 3 ADOGND C22 C21
LED_GND3 2 MIC_DATA
*LED@ISL97636 1 LCD@1000p_6 LCD@1000p_6
R5 Rev:3A 02/05 Modified the PCB Footprint. CN1
*LED@LED_PANEL
*LED@35.7K_4 Rev:3A 02/05 Modified Circuit For LED Panel Black-Screen issue. C11
SW1 2 1 **JUMPER PAD
**LED@100p_6
PROJECT : BU2
LEDAGND LED_GND2
Rev:3B 04/12 Stuff C21/C22 For EMI Suggest. Quanta Computer Inc.
LEDAGND LED_GND1
Custom 1A
LCD/LED PANEL/LID/CAMERA
NB4
5 4 3 2 1
5 4 3 2 1
+3V
(9) HDMI_DATA2P
(9) HDMI_DATA2N
RN4 2
4
1 HDM@0_4P2R_4
3
HDMI R344
Q53 18
1
ESD3 HDM@4.7K_4 HDM@2SK3541
HDMITX2P 1 10 HDMITX2P RN5
L38 *HDM@WCM2012-90_C HDMITX2N 1 10 HDMITX2N HM_DDCCLK CEC_DDCCLK
4 3 2 9 (10) HDMI_DDC_CLK 2 1 2 3
2 9 HM_DDCDATA
1 2 3 VCC GND 8 (10) HDMI_DDC_DATA 4 3
HDMITX1P 4 7 HDMITX1P
HDMITX1N 4 7 HDMITX1N HDM@0_4P2R_4 C431 *HDM@.1U_4
5 6
5 6
RN3 +3V
(9) HDMI_DATA1P 2 1 HDM@0_4P2R_4 *HDM@RCIamp0514M
(9) HDMI_DATA1N 4 3
D D
L37 4 3 *HDM@WCM2012-90_C R346
1 2 Q52
1
HDM@4.7K_4 HDM@2SK3541
2 3 CEC_DDCDATA
RN2 2 1 HDM@0_4P2R_4
(9) HDMI_DATA0P
(9) HDMI_DATA0N 4 3
ESD2 C432 *HDM@.1U_4
HDMITX0P 1 10 HDMITX0P
L36 *HDM@WCM2012-90_C HDMITX0N 1 10 HDMITX0N
4 3 2 9
2 9
1 2 3 VCC GND 8
HDMICLKP 4 7 HDMICLKP Place to HDMI Signal Pairs/ESD Side.
HDMICLKN 4 7 HDMICLKN CN23
5 6
5 6
20
RN1 SHELL1
(9) HDMI_CLKP 2 1 HDM@0_4P2R_4 *HDM@RCIamp0514M Rev:2A 12/07 Change HDMI CONN Footprint. HDMITX2P 1
+5V D2+
(9) HDMI_CLKN 4 3 2
R114 HDM@750_4 HDMITX2P Rev:3A 02/05 Change HDMI CONN Footprint. HDMITX2N 3
D2 Shield
HDMITX1P D2-
4 D1+
L35 4 3 *HDM@WCM2012-90_C R113 HDM@750_4 HDMITX2N 5
HDMITX1N D1 Shield
1 2 6 D1-
3
HDMITX0P 7
Q20 R111 HDM@750_4 HDMITX1P D0+
8
HDMITX0N D0 Shield
9 D0- GND 23
2 R107 HDM@750_4 HDMITX1N +5VPCU HDMICLKP 10
CK+
11 22
ESD1 HDMICLKN CK Shield GND
12 CK-
HDMI_DDCCLK 1 10 HDMI_DDCCLK HDM@FDV301N R104 HDM@750_4 HDMITX0P R331 HDM@6.8K_4 CEC 13
HDMI_DDCDATA 1 10 HDMI_DDCDATA CE Remote
2 9 14
1
2 9 R282 R101 HDM@750_4 HDMITX0N HDMI_DDCCLK NC
F3 3 8 15
D3 VCC GND DDC CLK
+5VPCU 2 1 HDM@RSX101M DDC5V 4 7 DDC5V 1 2 R330 HDM@6.8K_4 HDMI_DDCDATA 16
HDMI_HP 4 7 HDMI_HP DDC DATA
5 5 6 6 17 GND
HDM@POLY SWITCH 1.1A/6V_1206 HDM@100K_4 R99 HDM@750_4 HDMICLKP DDC5V 18
C87 C404 *HDM@RCIamp0514M HDMI_HP +5V
C 19 HP DET C
R96 HDM@750_4 HDMICLKN 21
*HDM@10u/10V_8 HDM@0.1u/10V_4 SHELL2
HDMI@CON
Rev:3A 02/05 Change PIN20/21/22/23 To Ground For ESD. EMI GROUND
CEC_POWER
Clock/Test Pad
CEC_POWER CEC_POWER
HDMI-CEC C36 *CEC@22p_6 XIN_CEC
2
4
C47 C58
1
R39 R41 RP17 Y1
CEC@1u/10V_6 CEC@0.1u/10V_4
CEC@2.2K_4 CEC@2.2K_4 CEC@4.7K_4P2R_4 *CEC@8MHz
U7 Q10
2
2
CEC@FDV301N C35 *CEC@22p_6 XOUT_CEC
1
3
7 1 CEC_SCLK
CEC_POWER VCC SCL CEC_SDATA CEC_DDCDATA HDMI_DDCDATA
16 20 1 3
VCC SDA CEC_DDCDATA
18
R31 CEC@47K_4 XOUT_CEC DDCSDA CEC_DDCCLK
4 XOUT DDCSCL 17
R32 CEC@47K_4 XIN_CEC 6 XIN RP18 4 CEC_POWER
13 3 CEC@4.7K_4P2R_4
RP14 1 TEST1 CEC_POWER
2 CEC@4.7K_4P2R_4 CEC-RESET# 3 RESET TEST0 12 2 1 CEC_POWER
3 4 CEC-MODE 8 TO HDMI CONN
MODE CEC_OUT C42 *CEC@0.1u/10V_4
T4 10
CEC OUT CEC_IN
5 9
VSS CEC IN Q9 U4
15
NC
2
B 14 19 HPDET CEC@FDV301N 3 B
NC HPDET Vcc CEC-RESET#
11 2 1 T5
NC NC CEC_DDCCLK HDMI_DDCCLK Reset#
1 3 GND 2
CEC@R5F211A4SP *CEC@G691L308T73UF
Rev:3A 03/03 Change the CECC V1.10 (P/NR5F211A4C22SP)
Rev:2A 12/07 Level Shift Circuit Wrong Change to Pull-up CEE_POWER Domain.
CEC_POWER
+5VPCU R49 *CEC@0_6 CEC_POWER

U6
CEC_POWER C43 CEC@0.1u/10V_4 5 1
+3V_S5 +3VPCU R29 CEC@0_6
2 +3VPCU
4 3
U9
C59 CEC@0.1u/10V_4 5 1 *CEC@TC7SET14FU R42 R40
2
HPDET 4 3 *CEC@0_4 CEC@0_4
CEC_POWER +3VPCU
CEC@NL17SZ17
R37 D2
CEC_POWER
CEC@10K_4 CEC@CH500H-40 Q7
2
CEC@2N7002
U10 CEC_IN
C53 CEC@0.1u/10V_4 5 1 R28 CEC_SCLK 3 1 CEC_SCL_R RP16 4 3 *CEC@0_4P2R_4 SB_SCLK2 (13)
3
2 R51 CEC@1.2K/F_4 HDMI_HP 2 1 SB_SDATA2 (13)

4 3 CEC@27K_4
(28) CEC_EC_HP
R50
2
CEC@NL17SZ17 1 CEC
+3V CEC@470K_4 RP15 4 3 CEC@0_4P2R_4 3ND_MBCLK (25,28)
A
TO HDMI CONN CEC_SDATA 3 1 CEC_SDA_R 2 1 3ND_MBDATA (25,28)
A
Q6
C54 CEC@0.1u/10V_4 CEC@2SK3541 Q8
2
CEC@2N7002
5
1
R48 CEC@1K_4 4
(10) TMDS_HPD
2 CEC_OUT R34 CEC@27K_4 1 Q5
PLTRST# (12,23,24,28)
3
U8
R30
CEC@2SK3541
PROJECT : BU2
CEC@TC7SH08FU Quanta Computer Inc.
2
CEC@100K_4

Custom 1A
HDMI/HDMI-CEC(R5F211A)
NB4
5 4 3 2 1
5 4 3 2 1
CRT Rev:3A 03/03 Change the LC Value For Reduce EMI Noise..
D21 SSM14 F1
FUSE1A6V_POLY-1A-6V
+5V_CRT2
C1 0.1u/10V_4
+5V_CRT2 CN17
19
16
+5V 2 1 2 1
CRT_CONN
6
L3 BLM18BA470SN1_6 CRT_R1 1 11 D1 MTW355 CRT_SENSE# (28)
(10) CRT_R
7
L2 BLM18BA470SN1_6 CRT_G1 2 12
(10) CRT_G
8
D L1 BLM18BA470SN1_6 CRT_B1 3 13 D
(10) CRT_B
9
R2 C9 R4 C8 R3 C7 C2 C3 C4 4 14
10
140/F_4 6.8p_4 150/F_4 6.8p_4 150/F_4 6.8p_4 6.8p_4 6.8p_4 6.8p_4 5 15
17
Rev:3A 02/13 Follow A13 silicon Change R2 From 150 To 140ohm For Unbalanced power bus IR drop. .
U24
+5V_CRT2 1 16 VSYNC1 R297 39_4 VSYNC1_CRT L32 BLM18BA220SN1_6 CRTVSYNC
VCC_SYNC SYNC_OUT2 HSYNC1 R298 39_4 HSYNC1_CRT L33 BLM18BA220SN1_6 CRTHSYNC
+5V 14
SYNC_OUT1
7
C368 0.22u/10V_6 VCC_DDC C365 C366
8
BYP VSYNC
15 VSYNC (10) +5V_CRT2
SYNC_IN2 HSYNC 10p_4 10p_4
+3V 2 13 HSYNC (10)
VCC_VIDEO SYNC_IN1
R296 R1
CRT_R1 3 10 DDCCLK
VIDEO_1 DDC_IN1 DDCCLK (10)
CRT_G1 4 11 DDCDAT 6.8K_4 6.8K_4
VIDEO_2 DDC_IN2 DDCDAT (10)
CRT_B1 5
VIDEO_3 CRTDCLK
9
DDC_OUT1 CRTDDAT
6 12
GND DDC_OUT2
CM2009
C364 C5
+5V +3V
10p_4 10p_4
DDCCLK R299 4.7K_4
+3V
C367 C6
C C
0.1u/10V_4 0.1u/10V_4 DDCDAT R300 4.7K_4
G-SENSOR +3V_HDP
U27
+3V_HDP
2
4
Vcc G-RESET#
1
+3V_HDP RP54 Reset#
2
U28 Q51 GND
1 4 *GS@4.7K_4P2R_4 *GS@G691L308T73UF-SOT23
(28,34,35) MAINON
2
SHDN VO C433 *GS@2N7002
+5VPCU 2
1
3
GND *GS@10u/10V_8 KXP84_SDA
(6,28) 2ND_MBDATA 3 1
3 5
VIN SET
C434 *GS@G913-C
+3V_HDP XIN_G C411 **GS@22p_6
*GS@0.1u/10V_4
ADDRESS: 32H
1
Q50
Y5
2
*GS@2N7002 **GS@8 MHz
2
B 3 1 KXP84_SCL XOUT_G C413 **GS@22p_6 B
(6,28) 2ND_MBCLK
U14
34
35
36
37
38
39
40
41
42
43
44
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
33 1
NC NC +3V_HDP
32 2 U13
NC NC C129 *GS@33n/16V_4
31 3 16 1 KXP84_SCL +3V_HDP
NC NC VCC HDPSCL KXP84_SDA
7 20
C130 *GS@33n/16V_4 VCC HDPSDA
30 4
NC GND ACCELX G-RESET# R335 *GS@10K_4
18 3
ACCELY ACCELX RESET R334 *GS@10K_4
29 5 +3V_HDP 17 8
NC VDD C154 *GS@33n/16V_4 ACCELZ ACCELY MODE
15
ACCELY AXSTST ACCELZ XIN_G R332 *GS@10K_4
28
Reserved *GS@LIS3L02AQ3 Vouty
6
C185
2
AXSTST Reserved
4
XOUT_G R333 *GS@10K_4
6
AXSTST Reserved
+3V_HDP 27 7 (13) HDPACT 11 12
Reserved ST *GS@0.1u/10V_4 GND HDPACT Reserved
10 13
ACCELX R118 *GS@1K_4 HD_PINT HDPPD Reserved
26 8 (12) HDPINT 9 14
Reserved Voutx HDPINT Reserved
19
Reserved
25 9 5
NC NC R122 VSS
24 10 *GS@R5F21174 HDPPD selection
NC NC *GS@47K/F_6
23 11 0 1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved NC
HDPPD
Voutz
Normal Mode Power-down mode

NC
NC
NC
PD
FS
+3V_HDP FS (Full Scale) selection

22
21
20
19
18
17
16
15
14
13
12
A +3V_HDP +3V_HDP A
0 1
FS
R143 2g Full-Scale 6g Full-Scale
C155 C146
**GS@10K_4
FS ACCELZ PD (Power Down) selection *GS@0.1u/10V_4 *GS@0.1u/10V_4
R138 0 1
PROJECT : BU2
*GS@10K_4
PD
Normal Mode Power-down mode
Close to Pin 7 and Pin 16 Size Document Number Rev
Custom 1A
CRT & G-SENSOR(LIS3L02A)
NB4
5 4 3 2 1
5 4 3 2 1
SATA HDD USB & ESATA

C456 1u/16V_8
U29
20
RT9711BPF
CN19
+5VPCU F4 POLY SWITCH 1.5A USBPWRIN 2 8 USBPWR
IN1 OUT3
23 3 7
GND23 IN2 OUT2
6
OUT1 +3V_S5
1 (28) USB_EN#1 4
GND1 SATA_TXP0 EN#
2 SATA_TXP0 (14) 1
RXP SATA_TXN0 GND R362 *10K_4
D 3 SATA_TXN0 (14) 9 5 D
RXN GND-C OC#
4
GND2 SATA_RXN0
5 SATA_RXN0 (14)
TXN SATA_RXP0
6 SATA_RXP0 (14) (13,28) USBOC#5
TXP
GND3
7 Rev:2A 12/07 Change USB Over Current to +3V_S5 Domain.
8 +3.3VSATA R23 *0_8 +3V

3.3V
9
3.3V
10
3.3V
GND
GND
GND
11
12
13
C37
*4.7u/10V_8
C40
*0.1u/10V_4
ESATA Re-Driver IC ESATA_TXP1
ESATA_TXN1
14 R552 R553 R554 R555
5V
15
5V +5VSATA R26 0_8 1K_4 1K_4 1K_4 1K_4 D61 D62
16 +5V
5V
17
1
GND C44
18
RSVD C31 C28 C33 + R549 *0_4
19
GND
2
20 R550 *0_4 R564 10K_4 +1.8V
12V 0.1u/10V_4 0.1u/10V_4 10u/10V_8 *100u/6.3V_3528 R565 10K_4 Clamp-EGA_4 Clamp-EGA_4
21
12V
22
12V
Close IC, no stub at
24 High-speed trace on PCB
GND24 R551
37
36
35
34
33
32
31
30
29
Serial_ATA +1.8V U42 +1.8V layout.
100_4
NC2
NC1
SEL0_A
SEL1_A
SEL2_A
SEL3_A
EN_A
EN_B
GND
Rev:3B 04/18 Change HDD Control From Channel/2 to Channel/0 For Spin Down Issue. SATA_TXP1
1
VDD VDD
28
ESATA_TX1P_R C591 4700P_4 ESATA_TXP1
(14) SATA_TXP1 2 27
SATA_TXN1 A+ AO+ ESATA_TX1N_R C596 4700P_4 ESATA_TXN1 ESATA_RXP1
(14) SATA_TXN1 3 26
A- AO-
4 25
GND GND ESATA_RXN1
5 24
C AVDD AGND C
6 23
+5VSATA SATA_RXP1 VDD VDD ESATA_RXP1_R C597 4700P_4 ESATA_RXP1
(14) SATA_RXP1 7 22
U44 SATA_RXN1 BO+ BI+ ESATA_RXN1_R C598 4700P_4 ESATA_RXN1 D60 D59
(14) SATA_RXN1 8 21
*CM1213-04SO BO- BI-
9 20
1
+3V GND GND
SEL0_B
SEL1_B
SEL2_B
SEL3_B
SATA_TXP0 SATA_RXN0 D44
CLKIN+
1 6 10 19
CLKIN-
CH1 CH4 VDD IREF
OUT+
R548
OUT-
*470_4
1
2
2 5
VN VP 2 Clamp-EGA_4 Clamp-EGA_4
SATA_TXN0 3 4 SATA_RXP0 PI2EQX3201
11
12
13
14
15
16
17
18
CH2 CH3 Clamp-VPORT_6
Rev:3A 01/29 Added Varistor ESD Solution.
Rev:3B 04/18 Remove D51/D52/D53/D54 Varistor And Change to U44 CM1213-04SO ESD Protection Arrays. R557 R558 R559 R560 R533 R547
1K_4 1K_4 1K_4 1K_4 *0_4 *0_4

Rev:3A 02/13 Added the Re-Driver IC For ESATA.
USBPWR
BUSBP10- BUSBP7-
SATA ODD SEL0_X SEL1_X

0
0
0
1
Eq
0dB
2.5dB
SEL2_X
0
1
Swing
1.0X
1.2X
SEL3_X
0
1
De-Emphasis
0dB
-3.5dB D4 D5
BUSBP10+
D32 D34
BUSBP7+
D35
1
1 0 4.5dB
2
B 1 1 6.5dB Clamp-EGA_4 Clamp-EGA_4 Clamp-VPORT_6 Clamp-EGA_4 Clamp-EGA_4
B
CN35
Rev:3A 02/22 Change the SATA ODD to be Channel 4 For IDE Legacy class Mode..
14
GND14 SATA_RXP1 R556 *0_4 ESATA_RXP1
1
GND1 SATA_TXP4 SATA_RXN1 R561 *0_4 ESATA_RXN1
2 SATA_TXP4 (14)
RXP SATA_TXN4
RXN
3 SATA_TXN4 (14)
SATA_TXN1 R562 *0_4 ESATA_TXN1
Rev:3A 03/03 Stuff the D4/D5/D32/D34/35 Varistor For ESD Solution.
4
GND2 SATA_RXN4 CN28
5 SATA_RXN4 (14)
TXN
6
6 SATA_RXP4 SATA_RXP4 (14) SATA_TXP1 R563 *0_4 ESATA_TXP1
TXP
7
GND3 USBPWR
BUSBP7- 4
R231 1K_4 + C445 BUSBP7+ 3
DP
8 Device Present 2
+5V
9
+5VSATA_ODD R230 0_8
Rev:3A 02/05 Added PIN12/14 To Ground For ESD. USBPWR 100u/6.3V_3528 1
10 +5V
+5V
11
RSVD
5
12
GND C269 C282 C274 C293 + C421
13
GND
0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8 100u/6.3V_3528
14
12
15
GND15 CN26 USB2_CONN
SATA ODD
USB_SYSTEM2(ALW) 0.75A
Shield
Shield
R348 0_6 R378 0_6

11 1
ESATA_RXP1 GND VCC
10
ESATA_RXN1 B+ BUSBP10- L43
9 2
B- D- L47
8 2 1 USBP10- (13)
ESATA_TXN1 GND BUSBP10+ 2 1 BUSBP7-
7 3 3 4 USBP10+ (13) (13) USBP7- 3 4
SATA_TXP4 SATA_RXN4 ESATA_TXP1 A- D+ 3 4 3 4 BUSBP7+
6 (13) USBP7+ 2 1
A+ *RFCM1632100M3_C 2 1
5 4
A
SATA_TXN4 SATA_RXP4 GND GND *RFCM1632100M3_C
A
Shield
Shield
R349 0_6
D58 D55 D56 D57 R379 0_6

USB/ESATA USB_SYSTEM1(ALW) 0.75A
1
15
13
2
*AVLC 18S_4 *AVLC 18S_4 *AVLC 18S_4 *AVLC 18S_4

GROUND PROJECT : BU2
Rev:3A 01/29 Delete R133 For ESD Solution. Size Document Number Rev
Custom 1A
Rev:3A 01/29 Added Varistor ESD Solution. SATA HDD/ODD & ESATA/USB
NB4
Date: Tuesday, August 19, 2008 Sheet 20 of 35
5 4 3 2 1
5 4 3 2 1
+3V
C285 C335 C286 C313 C334

+3V
C488 C326 C317 C304 C309

PCLK_PCM
CB_RSMRST#
R232 **CB@22_4 PCLK_PCM_M
R457
C302
**CB@0_6
**CB@10p_4
PCIRST#
21
*CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4
C536 R463 *CB@100K_6
+3V
delay 10ms at least *CB@0.22u/10V_6
A_CCD1#
D A_CCD2# D
INTF# VCCD1# C287 C523

(12) INTF#
SERIRQ VCCD0#
(12,23,28) SERIRQ
PCI_PME# R229 *CB@0_4 PCM_PME# *CB@10p/50V_4 *CB@10p/50V_4
(13,22) PCI_PME#
PCMSPK VPPD1
(24) PCMSPK
CB_RSMRST# VPPD0
REQ1# +3V
(12) REQ1#
GNT1# A_CRSVD/D2
(12) GNT1#
R239
AD18 R233 *CB@47_4 PCM_IDSEL A_CRSVD/D14
PCIRST# A_CRSVD/A18
(12,22) PCIRST#
PCLK_PCM
(12) PCLK_PCM
FRAME#
A_CCD1#
A_CCD2#
CN15 PCMCIA SOCKET
(12,22) FRAME#
IRDY#
*CB@43K_4
(12,22) IRDY# 1
TRDY# A_CVS1# AVCC A_CAD0 GND
(12,22) TRDY# 2
DEVSEL# A_CVS2# A_CAD1 D3 - CAD0
(12,22) DEVSEL# 3
STOP# A_CAD3 D4 - CAD1
(12,22) STOP# 4
PERR# R179 A_CAD5 D5 - CAD3
(12) PERR# 5
SERR# A_CAD7 D6 - CAD5
(12) SERR# 6 D7 - CAD7
*CB@43K_6 A_CC/BE0#
T110
T111
T114
T50
T112
7
PCM_SUS#
A_CAD9 CE1- CCBE0
8 A10- CAD9
A_CAD11 9
A_CAD12 OE - CAD11
10
A_CAD14 A11- CAD12
11 A9 - CAD14
A_CC/BE1# 12
A_CPAR A8 - CCBE1
13
A_CPERR# A13- CPAR
14
M10
M11
M13
M12
N11
N10
N13
N12
E10
A14- CPERR
L11
L10
L12
J13
M1
M9
G4
A_CGNT#
H1
N9
C6
D9
K3
K1
B1
A1
K9
K8
A2
A4
F4
L3
L2
L1
L8
15
J4
U35 A_CINT# WE/PGM - CGNT
16 RDY/BSY,IRQ*INT
AD[31..0] 17
SPKROUT
PCICLK
SERR#
PERR#
STOP#
DEVSEL#
TRDY#
IRDY#
FRAME#
PCIRST#
IDSEL
PCIGNT#
PCIREQ#
G_RST#
SUSPEND#
RI_OUT#/PME#
MFUNC6
MFUNC5
MFUNC4
MFUNC3
MFUNC2
MFUNC1
MFUNC0
VCCD1#
VCCD0#
VPPD1
VPPD0
RSVD/D2
RSVD/D14
RSVD/A18
CCD1#/CD1#
CCD2#/CD2#
CVS1/VS1
CVS2/VS2
(12,16,22) AD[31..0] AVCC VCC
AD0 N8 B2 A_CAD31 18
C AD0 CAD31/D10 AVPP VPP1 C
AD1 K7 C3 A_CAD30 A_CCLK 19
AD2 AD1 CAD30/D9 A_CAD29 A_CIRDY# A16- CCLK
L7 AD2 CAD29/D1 B3 20 A15- CIRDY
AD3 N7 A3 A_CAD28 A_CC/BE2# 21
AD4 AD3 CAD28/D8 A_CAD27 A_CAD18 A12- CCBE2
M7 C4 22
AD5 AD4 CAD27/D0 A_CAD26 A_CAD20 A7 - CAD18
N6 A6 23
AD6 AD5 CAD26/A0 A_CAD25 A_CAD21 A6 - CAD20
ENE1410 AJ014100T41 AD7
M6
K6
AD6 CAD25/A1
D7
C7 A_CAD24 A_CAD22
24
25
A5 - CAD21
M5 A8 26
L5 D8 27
K5 A9 28
M4 C9 29
ID Select : AD18 AD13
K4
AD12 CAD19/A25
A10
A_CAD18 A_CAD29
30
D0 - CAD27
N3 AD13 CAD18/A7 B10 31 D1 - CAD29
Interrupt Pin : INTF# AD14 M3 D10 A_CAD17 A_CRSVD/D2 32
AD15 AD14 CAD17/A24 A_CAD16 A_CCLKRUN# D2 - RFU
N2 E12 33
AD16 AD15 CAD16/A17 A_CAD15 WP,IOIS16-CKRUN
Request Indicate : REQ1# J2
AD16 CAD15/IOWR#
F10 34
GND
AD17 J1 E13 A_CAD14
AD18 AD17 CAD14/A9 A_CAD13
Grant Indicate : GNT1# H4
AD18 CAD13/IORD#
F13 35
GND
AD19 H3 F11 A_CAD12 A_CCD1# 36
AD20 AD19 CAD12/A11 A_CAD11 A_CAD2 CD1- CCD1
G3 G10 37
AD21 AD20 CAD11/OE# A_CAD10 A_CAD4 D11- CAD2
G2 AD21 CAD10/CE2# G11 38 D12- CAD4
AD22 F1 G12 A_CAD9 A_CAD6 39
AD23 AD22 CAD9/A10 A_CAD8 A_CRSVD/D14 D13- CAD6
F2 H12 40
AD24 AD23 CAD8/D15 A_CAD7 A_CAD8 D14- RFU
E2 AD24 CAD7/D7 H10 41 D15- CAD8
AD25 E3 J11 A_CAD6 A_CAD10 42
AD26 AD25 CAD6/D13 A_CAD5 A_CVS1# CE2- CAD10
E4 J12 43
AD27 AD26 CAD5/D6 A_CAD4 A_CAD13 RFSH,VS*1-CVS1
D1 K13 44
AD28 AD27 CAD4/D12 A_CAD3 A_CAD15 IORD-CAD13
D2 AD28 CAD3/D5 J10 45 IOWR-CAD15
AD29 D4 K10 A_CAD2 A_CAD16 46
AD30 AD29 CAD2/D11 A_CAD1 A_CRSVD/A18 A17- CAD16
C1 K12 47
AD31 AD30 CAD1/D4 A_CAD0 A_CBLOCK# A18- RFU
C2 AD31 CAD0/D3 L13 48 A19- CBLOCK
A_CSTOP# 49
A_CDEVSEL# A20- CSTOP
CSTSCHG/BVD1/STSCHG#
B 50 B
A21- CDEVSEL
51
CCLKRUN#/WP/IOIS16#
AVCC VCC
CBE0# N5
CAUDIO/BVD2/SPKR#
(12,22) CBE0#
CINT#/READY/IREQ#
CBE1# CBE0#
(12,22) CBE1# N1 AVPP 52
CBE2# CBE1# A_CC/BE0# A_CTRDY# VPP2
J3 H13 53
CREQ#/INPACK#
(12,22) CBE2# CBE2# CCBE0#/CE1# A22- CTRDY
CSERR#/WAIT#
CDEVSEL#/A21
CBE3# E1 E11 A_CC/BE1# A_CFRAME# 54
CRST#/RESET
CFRAME#/A23
CBLOCK#/A19
(12,22) CBE3# CBE3# CCBE1#/A8 A23- CFRAME
CPERR#/A14
CSTOP#/A20
CTRDY#/A22
PAR M2 A11 A_CC/BE2# A_CAD17 55
CGNT#/WE#
CIRDY#/A15
(12,22) PAR PAR CCBE2#/A12 A24- CAD17
A_CC/BE3# A_CAD19
CCLK/A16
B7 56
CCBE3#/REG# A_CPAR A_CVS2# A25- CAD19
D13 57
VCCA1
VCCA2
VCC10
CPAR/A13 NC - CVS2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
A_CRST# 58
A_CSERR# RESET-CRST
59 WAIT-CSERR
A_CREQ# 60
+3V *CB@CB1410 A_CC/BE3# INPACK-CREQ
U17 61
D3
H2
L4
M8
K11
F12
C10
B6
F3
G1
K2
N4
L6
L9
H11
G13
A7
D12
C8
B4
B5
C5
D6
D11
C11
B8
A5
C13
C12
B13
A13
A12
B11
D5
B9
B12
A_CAUDIO REG- CCBE3
62 BVD2,SP-CAUDIO
VCCD0# 1 16 A_CSTSCHG 63
VCCD1# VCCD0# SHDN# VPPD0 A_CAD28 BVD1,STSCHG-C*
2 15 64
VCCD1# VPPD0 VPPD1 A_CAD30 D8 - CAD28
+3V 3 3.3V VPPD1 14 65 D9 - CAD30
4 13 A_CAD31 66
3.3V AVCC A_CCD2# D10- CAD31
+5V 5 12 AVCC 67
5V AVCC CD2- CCD2
6 11 68
GND
GND
GND
GND
GND
GND
5V AVCC GND
7 GND AVPP 10 AVPP
8 OC# 12V 9
+3V AVCC +3V *CB@CARDBUS
69
70
71
72
73
74
*CB@ENE CP-2211
+5V AVPP
R_A_CCLK R197 *CB@10_4 A_CCLK
A_CRST#
A_CCLKRUN#
C239 C240 C250 C484
*CB@4.7u/10V_6 *CB@0.1u/10V_4 *CB@4.7u/10V_6 *CB@0.1u/10V_4 A_CFRAME#

A A
CARDBUS
A_CIRDY#
A_CTRDY#
A_CDEVSEL#
A_CSTOP#
+3V AVCC A_CPERR#
A_CSERR#
A_CREQ#
C236 C242 C257 C307 C491 C256

A_CGNT#
A_CBLOCK# PROJECT : BU2
*CB@4.7u/10V_6 *CB@0.1u/10V_4 *CB@4.7u/10V_6 *CB@0.1u/10V_4 *CB@0.1u/10V_4 *CB@0.1u/10V_4
A_CINT#
A_CSTSCHG
A_CAUDIO
Custom 1A
PCMCIA(CB1410) -OPTION
NB4
5 4 3 2 1
A B C D E
OZ129 CardReader/1394 5 IN 1 Card Reader 22

ID Select : AD17
Interrupt Pin : INTE# +3V U32 30mil VCC_XD VCC_XD
RT9711BPF
Request Indicate : REQ0# 2 8 VCC_XD
+3VARUN IN1 OUT3
3 7
IN2 OUT2 C459 C483 C481 C482
4 Grant Indicate : GNT0# OUT1
6
+3V 4
C476 MC_PWR_3V# 4 EN# 4.7u/6.3V_6 0.01u/16V_4 0.01u/16V_4 0.01u/16V_4
1 GND
C520 C518 C519 1u/16V_8 9 5 R381 *10K_4
GND-C OC#
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4
+3V L57 BK1608HS220_6 +1.8V
C475 C477 C500 C248 C493 C487
4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4

VCC_XD VCC_XD
CN36
21 SD-VCC
SD_D0 R404 33_4 SD_D0_C 31
SD-DAT0
102
103
122
120
125
U33 SD_D1 R397 33_4 SD_D1_C
26
56
67
73
79
81
14
15
91
92
34 SD-DAT1
7
AD[31..0] SD_D2 R390 33_4 SD_D2_C 9 38
(12,16,21) AD[31..0] SD-DAT2 XD-VCC
SD_D3 R391 33_4 SD_D3_C 11
3.3VCCA
3.3VCCA
3.3VCCA
3.3VCCA
PCI_VCC
PCI_VCC
3.3VCCD
3.3VCCD
3.3VCCD
3.3VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
1.8VCCD
AD31 SD/MS_CLK R402 33_4 SD/MS_CLK_C SD-DAT3 XD_CD#_C R407 0_4 XD_CD#
19 AD31 25 SD-CLK XD-CD 2
AD30 20 C494 15p_4 SD_CMD R393 33_4 SD_CMD_C 15 3 XD_R/B#_C R384 0_4 XD_R/B#
AD29 AD30 R453 5.9K/F_4 SD_CD# R405 33_4 SD_CD#_C SD-CMD XD-R/B XD_RE#_C R408 0_4 XD_RE#
21 78 39 4
AD29 REF SD-C/D XD-RE
2
AD28 22 Y7 SM_WPI#/SD_WP R479 33_4 SM_WPI#/SD_WP_C 41 5 XD_CE#_C R386 0_4 XD_CE#
AD27 AD28 1394_XIN SD-WP XD-CE XD_CLE_C R387 0_4 XD_CLE
23 83 6
AD26 AD27 XI 1394_XOUT 24.576MHz XD-CLE XD_ALE_C R388 0_4 XD_ALE
24 AD26 XO 84 19 SD-VSS1 XD-ALE 7
AD25 25 29 8 XD_WE#_C R389 0_4 XD_WE#
1
AD24 AD25 TPBIAS0 C489 15p_4 SD-VSS2 XD-WE XD_WPO#_C R392 0_4 XD_WPO#
27 76 40 13
AD23 AD24 TPBIAS TPA0P SD-GND XD-WP
29 AD23 TPA+ 75
AD22 30 74 TPA0N Better than 50ppm 12 23 MS_D3/XD_D0_C
AD21 AD22 TPA- TPB0P MS_D0/XD_D2 R401 0_4 MS_D0/XD_D2_C MS-VCC XD-D0 MS_D2/XD_D1_C
3 31 AD21 TPB+ 72 22 MS-DATA0 XD-D1 27 3
AD20 32 71 TPB0N MS_D1/XD_D7 R395 0_4 MS_D1/XD_D7_C 24 30 MS_D0/XD_D2_C
AD19 AD20 TPB- MS_D2/XD_D1 R400 0_4 MS_D2/XD_D1_C MS-DATA1 XD-D2 MS_BS/XD_D3_C
34 20 32
AD17 R416 100/F_4 OZ129_IDSEL AD18 AD19 MS_D3/XD_D0 R394 0_4 MS_D3/XD_D0_C MS-DATA2 XD-D3 XD_D4_C R396 0_4 XD_D4
35 16 33
AD17 AD18 MC_PWR_3V# SD/MS_CLK_C MS-DATA3 XD-D4 XD_D5_C R398 0_4 XD_D5
36 4 14 35
AD16 AD17 MC_3V# SD/MS_CLK MS_CD# R406 0_4 MS_CD#_C MS-SCLK XD-D5 XD_D6_C R399 0_4 XD_D6
37 113 18 36
AD15 AD16 SD/MS_CLK SD_D3 MS_BS/XD_D3 R403 0_4 MS_BS/XD_D3_C MS-INS XD-D6 MS_D1/XD_D7_C
47 111 26 37
AD14 AD15 SD_D3 SD_D2 MS-BS XD-D7
48 112
AD13 AD14 SD_D2 SD_D1
49 107 10 1
AD12 AD13 SD_D1 SD_D0 MS-VSS1 XD-GND1
50 108 28 17
AD11 AD12 SD_D0 SD_CMD MS-VSS2 XD-GND2
51 110 42 43
AD10 AD11 SD_CMD SM_WPI#/SD_WP GND1 GND2
52 AD10 SM_WPI#/SD_WP 117
AD9 53 114 SD_CD#
AD8 AD9 SD_CD# CARD_READER
54
AD7 AD8 MS_D1/XD_D7
57 95
AD6 AD7 MS_D1/XD_D7 XD_D6
58 93
AD5 AD6 XD_D6 XD_D5
59 89
AD4 AD5 XD_D5 XD_D4
60 87
AD3 AD4 XD_D4 MS_BS/XD_D3
61
AD3 MS_BS/XD_D3
88 Rev:2A 12/07 Modified the CN36 Footprint For Open Issue.
AD2 62 90 MS_D0/XD_D2
AD1 AD2 MS_D0/XD_D2 MS_D2/XD_D1
63 94
AD0 AD1 MS_D2/XD_D1 MS_D3/XD_D0
64 96
AD0 MS_D3/XD_D0 XD_CE#
XD_CE# 119
28 100 XD_R/B#
(12,21) CBE3# C/BE3# XD_R/B#
(12,21)
(12,21)
(12,21)
CBE2#
CBE1#
CBE0#
38
46
55
C/BE2#
C/BE1#
C/BE0#
XD_CLE
XD_ALE
XD_WE#
118
109
105
101
XD_CLE
XD_ALE
XD_WE#
XD_RE#
1394
OZ129_IDSEL XD_RE# XD_WPO#
5 98
PCLK_OZ129 IDSEL XD_WPO# MS_CD#
(12) PCLK_OZ129 45 PCI_CLK MS_CD# 99
42 97 XD_CD#
(12,21) DEVSEL# DEVSEL# XD_CD#
(12,21) FRAME# 39
FRAME#
(12,21) IRDY# 40
IRDY# TPBIAS0 C501 1u/10V_4
(12,21) TRDY# 41 2
TRDY# NC1
2 (12,21) STOP# 43 8 2
STOP# NC2
(12,21) PAR 44 9
PAR NC6
(12) REQ0# 17 REQ# NC7 10
(12) GNT0# 18 13
GNT# NC5 R433 R436 L48
(12,21) PCIRST# 1 126
PCI_RST# NC3
(12) INTE# 11 INTA# NC4 127 2 2 1 1
(13,21) PCI_PME# 3 128 3 4
PME# NC8 56.2/F_4 56.2/F_4 3 4
(12,28) CLKRUN# 6 CLKRUN# *CL-2M2012-121JT
(25) TP_XD_LED 106 85
MEDIA_ACTV TEST0
TEST1 86
TPA0P RN6 4 3 0_4P2R_4 L1394_TPA0+ CN31
AGND
AGND
AGND
AGND
AGND
AGND
TPA0N 2 1 L1394_TPA0- 5
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
L1394_TPB0- 1
L1394_TPA0- 3 6
L1394_TPA0+ 4
12
16
33
66
68
104
115
116
121
123
124
65
69
70
77
80
82
OZ129T L1394_TPB0+ 2 7
TPB0N RN7 1 2 0_4P2R_4 L1394_TPB0-
TPB0P 3 4 L1394_TPB0+ 8
L56 BK1608HS220_6
1394_CONN
R443 R441 L50

4 3
56.2/F_4 56.2/F_4 4 3
1 2
1 2
1394_COM *CL-2M2012-121JT Rev:2A 12/07 Change New Part Number.
C515
R448
PCLK_OZ129 270p_4
5.1K/F_4
1 R450 1
*22_4
C522
*22p/50V_4
PROJECT : BU2
Custom 1A
OZ129T(5IN1/1394)
NB4
A B C D E
5 4 3 2 1
23
+3V
MINI CARD 1 5.6H_WLAN R566
R478
*0_4
*0_4
+3V_S5
+3V
+1.5V +3V +3V_S5
1.5V_VCC(RUN) 0.5A
+3V
4
2
CN34 3.3V_VCC(RUN) 1A R247 RP52
R253 *0_4 SERIRQ_DEBUG 51 52 3.3V_AUX(S5) 0.005A
(12,21,28) SERIRQ NC +3.3V
R251 *0_4 LDRQ#0_DEBUG 49 50 *10K_4 *4.7K_4R2R_4
(12) LDRQ#0 C-Link_RST GND
Reserve For Debug Card R248 *0_4 PLTRST#_DEBUG 47 48 Q37
(12,18,24,28) PLTRST# C-Link_DAT +1.5V
2
R246 *0_4 PCLK_C_DEBUG 45 46 *2N7002E
(12,16) PCLK_DEBUG
3
1
C-Link_CLK LED_WPAN#
43 GND LED_WLAN# 44
41 42 WiMAX_LED#_B R244 *0_4 3 1 WL_SMDATA
+3.3Vaux NC WiMAX_LED# (29) (13,24) SB_SMBDATA1
Rev:3A 03/03 Reserve the 39/41Pin to +3.3Vaux For Support WiMax. 39 40 WL_NC40 R242 *0_4
R462 0_4 +3.3Vaux NC USBP4+_C R235 0_4
37 GND USB_D+ 38 USBP4+ (13)
D 35 36 USBP4-_C R236 0_4 D
GND USB_D- USBP4- (13)
33 34 R222 0_4
(9) PCIE_TXP5 PETp0 GND
31 32 WL_SMDATA
(9) PCIE_TXN5 PETn0 SMB_DATA
29 30 WL_SMCLK
GND SMB_CLK +3V
27 GND +1.5V 28
(9) PCIE_RXP5 25 PERp0 GND 26
(9) PCIE_RXN5 23 PERn0 +3.3Vaux 24
21 22 PLTRST# Q36
GND PERST# PLTRST# (12,18,24,28)
2
19 20 RF_EN_WLAN1 R228 0_4 RF_EN *2N7002E
NC W_DISABLE# RF_EN (28)
17 NC GND 18
3 1 WL_SMCLK
(13,24) SB_SMBCLK1
15 16 LFRAME#_PCIE R220 *0_4
GND NC LFRAME# (12,28)
13 14 LAD3_PCIE R216 *0_4
(3,12) PCIE_CLK_MINI REFCLK+ NC LAD3 (12,28)
11 12 LAD2_PCIE R211 *0_4
(3,12) PCIE_CLK_MINI# REFCLK- NC LAD2 (12,28)
9 10 LAD1_PCIE R212 *0_4 R225 0_4
GND NC LAD1 (12,28)
7 8 LAD0_PCIE R208 *0_4
CLKREQ# NC LAD0 (12,28)
(25) WCS_CLK R204 0_4 WCS_CLKR 5 6
R199 0_4 WCS_DATR BT_CHCLK +1.5V
To BT (25) WCS_DAT 3 BT_DATA GND 4
1 WAKE# +3.3V 2
Reserve For Debug Card +3V +1.5V +3V_S5
WLAN_MINIPCI
Q35
3 1 WLAN_WAKE# C251 C252 C343 C265 C322 C312 C314
(13,24) PCIE_WAKE#
2N7002E-LF 10u/10V_8 0.1u/10V_4 10u/10V_8 0.1u/10V_4 0.01u/25V_4 1u/16V_6 0.1u/10V_4
2
+3V_S5 R195 10K_4
+3V
C
MINI Card 2 5.6H_TV/HD DVD DECODER +1.5V +3V
C
4
2
RP53
CN33 1.5V_VCC(RUN) 0.5A 4.7K_4R2R_4

51 52 Q39
NC +3.3V 3.3V_VCC(RUN) 1A
2
49 50 2N7002E
3
1
C-Link_RST GND
47 C-Link_DAT +1.5V 48
45 46 3 1 WL_HD_SMDATA
C-Link_CLK LED_WPAN# (13,24) SB_SMBDATA1
43 GND LED_WLAN# 44
41 NC NC 42
39 NC NC 40
37 38 USBP8+_C R425 0_4
GND USB_D+ USBP8+ (13)
35 36 USBP8-_C R429 0_4 +3V
GND USB_D- USBP8- (13)
(9) PCIE_TXP2 33 PETp0 GND 34
31 32 WL_HD_SMDATA
(9) PCIE_TXN2 PETn0 SMB_DATA
29 30 WL_HD_SMCLK Q40
GND SMB_CLK
2
27 28 2N7002E
GND +1.5V
(9) PCIE_RXP2 25 PERp0 GND 26
23 24 3 1 WL_HD_SMCLK
(9) PCIE_RXN2 PERn0 +3.3Vaux (13,24) SB_SMBCLK1
21 22 PLTRST#
GND PERST# RF_EN_WLAN2 R451 *0_4 RF_EN
19 NC W_DISABLE# 20
17 NC GND 18
15 GND NC 16
(3,12) CLK_PCIE_MINI2 13 REFCLK+ NC 14
11 12
(3,12) CLK_PCIE_MINI2#
9
7
REFCLK-
GND
CLKREQ#
NC
NC
NC
10
8
+3V +1.5V 13"
5 BT_CHCLK +1.5V 6
3
1
BT_DATA
WAKE#
GND
+3.3V
4
2 C542 C486 C534 C510 C485 1 WLAN
B B
MINIPCI_2 10u/10V_8 0.1u/10V_4 10u/10V_8 0.1u/10V_4 0.001u_4
2 TV/HD DVD DECODER
NAND FLASH MEMORY CARD

+1.8V +1.8V_FLASH Flash moduel operate at 1.8V
Pin2, 20 is NC for Flash module
CN29
R367
42 NC NC 41
0_6
+3V +1.8V
40 20 PDMA66_R R370 *0_4
+1.8V NC PDMA66 (13)
IDE_RST#_B 39 19 PDD8
C446 C447 C450 C451 PDD7 PERST# PDD8 PDD9
38 PDD7 PDD9 18
1
37 17 C457 R372 D6 *CH501H-40PT Q29 R166

GND GND
2
*1u/10V_4 *1u/10V_4 *1u/10V_4 22u/10V_8 PDD6 36 16 PDD10 1 2 *DTC144EU
PDD5 PDD6 PDD10 PDD11 *47n/25V_6 *100K_4 (13) HDD_AUX_RST# *10K_4
35 15
2
PDD5 PDD11
34 +1.8V GND 14
PDD4 33 13 PDD12 D7 *CH501H-40PT
PDD3 PDD4 PDD12 PDD13 IDE_RST#_B
32 PDD3 PDD13 12 (12,18,24,28) PLTRST# 1 2 1 3
31 GND GND 11
PDD[0..15] PDD2 30 10 PDD14
(14) PDD[0..15] PDD2 PDD14
A
PDD1 29 9 PDD15 R165 *0_4 A
PDDREQ PDD0 PDD1 PDD15 PDDREQ
(14) PDDREQ 28 PDD0 PDREQ 8
PDIOW# PDIOW# 27 7
(14) PDIOW# PDIOW# GND
PDIOR# 26 6 PDIOR#
(14) PDIOR# +1.8V PDIOR#
PDIORDY
(14) PDIORDY
PDDACK#
(14) PDDACK#
IRQ14 PDIORDY 25 5
(14) IRQ14 PDIORDY# GND
PDA1 PDA1 24 4 PDDACK#
(14) PDA1 PDA1 PDACK#
PDA0 23 3 IRQ14
(14) PDA0 +1.8V PIDE_INTR
(14)
(14)
PDCS1#
PDA2
PDCS1#
PDA2
PDA0
PDCS1#
22
21
PDA0 PDA2 2
1
PDA2_R
PDCS3#
R365 *0_4 PDA2
PROJECT : BU2
PDCS1# PDCS3#
(14) PDCS3#
PDCS3# Quanta Computer Inc.
*MEMORY_CARD
Custom 1A
MINI CARD & NAND FLASH CARD
NB4
5 4 3 2 1
5 4 3 2 1
CN14
NEW CARD(BTO) (9) PCIE_TXP3

(9) PCIE_TXN3
26
25
24
GND1 GND27
PETp0 GND28
PETn0 GND29
27
28
29
23 GND2 GND30 30
U18 22
(9) PCIE_RXP3 PERp0
+NEW_3V
24
+3V 2 3.3VIN 3.3VOUT 3 (9) PCIE_RXN3 21 PERn0
4 3.3VIN 3.3VOUT 5 VDD_3.3V(S5) 0.275A 20 GND3
(3,12) CLK_PCIE_NEW 19
+3V_S5 17 15 +NEW_3VAUX VDD_3.3V(RUN) 1.3A +3V_S5 18
REFCLK+
AUXIN AUXOUT (3,12) CLK_PCIE_NEW# REFCLK-
VDD_1.5V(RUN) 0.65A CPPE# 17
+NEW_1.5V NEW_CLKREQ# R183 NEW@0_4 NEW_CLKREQ#_RR CPPE#
D
+1.5V 12 1.5VIN 1.5VOUT 11 16 CLKREQ# D
2
14 13 Q33 +NEW_3V 15
1.5VIN 1.5VOUT +3.3V1
Rev:2A 12/07 Support the New Card's Hot Plug Function. 14 +3.3V2
6 1 *NEW@DTC144EU PERST# 13
(12,18,23,28) PLTRST# SYSRST# STBY# PERST#
20 10 CPPE# R529 NEW@0_4 +NEW_3VAUX 12
SHDN# CPPE# NEW_DET# (13) +3.3VAUX
9 CPUSB# R530 NEW@0_4 3 1 11
RCLKEN CPUSB# (13,23) PCIE_WAKE# +NEW_1.5V W AKE#
18 RCLKEN 10 +1.5V1
16 8 PERST#_R R213 NEW@0_4 PERST# 9
NC PERST# NEW_SMDATA +1.5V2
7 GND OC# 19 8 SMB_DATA
C272 R177 NEW@0_4 NEW_SMCLK 7
NEW@OZ27C10LN-C1 R237 NEW@47K_4 SMB_CLK
+3V_S5 6 RESERVED1
*NEW@3300P_4 5
CPUSB# RESERVED2
4 CPUSB#
R169 NEW@0_4 USBP3+_R 3
(13) USBP3+ USB_D+
R168 NEW@0_4 USBP3-_R 2
(13) USBP3- USB_D-
1
NEW CARD'S POWER SWITCH Rev:2A 12/11 Swap the New Card From USB7 to USB3 For OHCI Controllers.
GND4
NEW@NEWCARD
Rev:3A 03/03 As check with AE regarding to PERST# do not add any delay into PERST# +3V
+NEW_3V
5
1 NEW_CLKREQ#_RR R180 *NEW@10K_4 +3V_S5
NEW_CLKREQ# 4
(3,13) NEW_CLKREQ#
4
2
2 R188 *NEW@10K_4 +3V_S5
RP43
3
Q31 U15
3
NEW@4.7K_4P2R_4 *NEW@NC7SZ32P5X
2
NEW@2N7002E
3
(13,23) SB_SMBDATA1 3 1 1 NEW_SMDATA 2 RCLKEN
C C
Q34
*NEW@2N7002E
R223 *NEW@0_4
1
+NEW_3V
Q30
+3V +3V_S5 +1.5V
2
NEW@2N7002E +NEW_3VAUX +NEW_3V +NEW_1.5V
3 1 NEW_SMCLK C320 C324

(13,23) SB_SMBCLK1
C295 C294 C316 C262 C253 C249 C271 C283
NEW@0.1u/10V_4 NEW@0.1u/10V_4
NEW@0.1u/10V_4 NEW@0.1u/10V_4 NEW@0.1u/10V_4 NEW@4.7u/10V_8 NEW@0.1u/10V_4 NEW@0.1u/10V_4 NEW@4.7u/10V_8 NEW@0.1u/10V_4
R226 *NEW@0_4
B
PC-BEEP RJ45/USB BOARD CN6
+5VPCU 1
USB & LAN BOARD(ALW) +5VPCU 1.5A 2
3
4
(28) USB_EN#0 5
+3V
(13,28) USBOC#0 6
+3V_S5 7
R261 8
(21) PCMSPK (26) FM_RIGHT 9
+3V (26) FM_LEFT
*CB@0_4 10
(13) FM_CLK 11
(12) FM_INT 12
+3V C338 *CB@0.1u/10V_4 (13) FM_DATA
C337 *CB@0.1u/10V_4 13
(28) LOM_DISABLE# 14
2 U19 15
(13) USBP0- 16
5
C341 PCM-2 C340 *CB@0.1u/50V_6 1 (13) USBP0+

3 17
5
4 PCMSPK_DELAY 1 *CB@SN74LVC1G86DCKR
*CB@0.1u/10V_4 D14 18
1 2 4 PCBEEP (26) (3,12) PCIE_CLK_LAN 19
U20 2 (3,12) PCIE_CLK_LAN#
3
*CB@CHN217 C342 R270 20

3
*CB@TC7SH08FU 21
(9) PCIE_TXN1 22
PCM-1 *CB@0.1u/10V_4 *CB@10K_4
2 (9) PCIE_TXP1 23
PCM-3 C354 *CB@0.1u/50V_6 24
3 (9) PCIE_RXP1 25
C352
(9) PCIE_RXN1 26
D15
*CB@0.1u/50V_6 1 27
(12,18,23,28) PLTRST# 28
*CB@CHN217
(13,23) PCIE_WAKE# 29
+3V 30
R265 NEW@0_4
(13) SPKR (13) FM_DETECT 31
A
PCM-4 R287 *CB@200K/F_4 PCM-5 A
32
Foe New Card Stuff Only.
Rev:2A 12/07 Change Connector From 30 to 32 pin For Added FM Detect.
C359 R292
Rev:3A 02/05 Change Connector PCB Footprint. LAN_CONN
*CB@0.1u/50V_6 *CB@86.6K/F_4
PROJECT : BU2
Custom NEW CARD & RJ45 BOARD/BEEP 1A
NB4
5 4 3 2 1
5 4 3 2 1
LED BOARD Rev:3A 02/05 NC PIN3 To Follow LED

Board
CN12
Felica
+5V_FELICA
CN13
1
TP BOARD 25
(13) USBP1- 2 Rev:3C 12/07 Change R476 Resistor PCB Footprint From 0605 to 0805.
1 1 (13) USBP1+ 3
2 +5V
2 4
3
3 5 C66 4.7u/10V_8 R476 27_8
+5VPCU 4 T34
4 6
+5V 5
D 5 FA@FELICA_CONN C69 0.1u/10V_4 D
(28) BATLED1# 6
6
(28) BATLED0# 7
7
(28) PWRLED# 8 8
9 CN10
(28) SUSLED_EC 9
IDE_LED# 10 +5V_TP
10 TPDATA 1
(22) TP_XD_LED 11 11 (28) TPDATA 2
12 TPCLK
(28,30) ACIN 12 (28) TPCLK 3
TP_LED_ON_C
LED_CONN 4
5
TP_LED_ON A-test no use for 6
Rev:2A 12/07 Change CONN Footprint. C70 C79 TP Module shorterm solution.
TP_CONN
R152 *FA@0_8 *10P_4 *10P_4 Vendor sample A-test this pin is
+5V 4-way button not LED.
+5V 1 3 +5V_FELICA
Rev:2A 12/07 Apply isolate TP_LED_ON From EC to Mainstream TP
C217 FA@10u/10V_8 R162
+
Q27 +3VPCU
2
C203 FA@1000p/50V_4 FA@4.7K_4
FA@AO3413
C206 FA@0.1u/10V_4
R288 R272
IDE_LED# 1 3
Q38 10K_4 330_4
3
MMBT3906
2
Q78
2
2 MMBT3904
C FELICA_PWRON (28) C
1 3 TP_LED_ON_C
(28) TP_LED_ON
+3V R221 10K_4 IDE_LED#_B R217 0_4
SATA_LED# (14)
Q28
1
FA@DTC144EU R295 *0_4
Bluetooth Module
Rev:3D 07/23 Remove R59 and Added control BT Reset by EC GPIO77
FINGER-PRINT MMB CN9
12
1
(13) USBP6+ 2
Rev:2A 12/07 Change Low cost pin1 From MX1 to MX5 CN2 (13) USBP6- 3
(23) WCS_CLK 4
5
+3VPCU 1 (28) BT_RESET 6
(28,29) MX5 2 (23) WCS_DAT 7
(28,29) MX2 3 +3V 8
CN11 R64 0_4 USB_DETACH
(28,29) MY1 4 (28) BT_EN 9
+3V_FINGERPRINT
6
11
B 1 5 C599 10 B
(13) USBP5- 2 Low cost (28,29) MX3 6
(13) USBP5+ 3 (13) LOW_DET 7 *100p_4
4 (28,29) MX4 8
5
USB_DETACH: Low USB Connect BT_CONN

(28) FN0# 9
FP_CONN
(28) FN1# 10 High USB Disconnect
LOW@MMB_LOWCOST
Rev:3A 03/03 Reserve C599 Capacitors to Bluetooth Enable For EMI..
Rev:2A 12/07 Change CONN Footprint.

R102 0_8
+3V
+3V 1 3 +3V_FINGERPRINT CN3

POWER BOARD
C122 10u/10V_8 R94 7
+
(18,28) 3ND_MBCLK 1
Q23
(18,28) 3ND_MBDATA
2
C108 *1000p/50V_4 *4.7K_4 2

*AO3413 3
(28) KEY_INT 4
C107 *0.1u/10V_4 +5VPCU 5 CN4
Main strem +3VPCU 6
8 1
(28) PWRLED# 2
MAIN@MMB_BL123-06R-6P-L
(28) NBSWON# 3
3
+5VPCU 4
2 PB_CONN
A FP_PWRON (28) A
Q19
1
*DTC144EU
PROJECT : BU2
Custom 1A
TP/FP/BT/PB/FELICA/MMB CONN
NB4
Date: Tuesday, August 19, 2008 Sheet 25 of 35
5 4 3 2 1
5 4 3 2 1
26
R541 0_4
CODEC(CX20561) Rev:3A 02/05 Added the EMI Solution. ADOGND
R540 0_4
INT SPK AMP
+5V
ADOGND U37 *G961-18ADJTEU(SOT89-5)
R501 *0_6 4 3
R419 0_4 VEN VOUT
5
GND
ADJ
VIN
D +3V_S5 L58 PBY160808T-301Y-N_6 ADOGND R285 D
+3AVDD
1
R480 0_4 C562 *36K/F_4
+3VSUS L59 *PBY160808T-301Y-N_6 +AZA_VDD L60 PBY160808T-301Y-N_6 +3V
*1u/16V_6
C526 C540 C531 C548 C567 C533 ADOGND
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 10u/10V_8 R447 0_4

R271
ADOGND *12K/F_4
ADOGND
R438 0_4
+3AVDD
Rev:3B 04/12 Stuff R438/R447 0ohm For EMI Suggest.
C525 C530 ADOGND +5V R518 0_6 +5V_VDD C558 *0.1u/10V_4 ADOGND
C565 C570
10u/10V_8 0.1u/10V_4 R264 0_4 C574 C575
0.1u/10V_4 10u/10V_8
SECNTL (27)
10u/10V_8 0.1u/10V_4
ADOGND
+3V_S5 R459 0_4 R258 *0_4 Rev:3A 02/05 Page29 : Modify the Speaker Gain To 9.7dB.
+3VSUS R458 *0_4 +AZA_VDD_IO ADOGND ADOGND
U38
15
14
23
4
6
8
Determining HDA use +1.5V/+3V ADOGND
HPL (27)
SPKR-L C563 2.2u/6.3V_6 SPKR-L-1 R519 10.5K/F_6 SPKR-L-2 1 20
CT
LVDD
RVDD
NC
VDD3
SECNTL
HPR (27) LIN1 VOL
C529
44
26
40
36
9
4
3
U36 SPKR-R C576 2.2u/6.3V_6 SPKR-R-1 R527 10.5K/F_6 SPKR-R-2 18
0.1u/10V_4 R260 0_4 MIC1-VREFO RIN1
AVEE
VDD_IO
DVDD_1-8
DVDD_3-3
DVDD_44
AVDD_26
AVDD_40
MIC1-VREFO (27)
INSPKL+ R520 16K/F_6 2 13
LIN2 IN1/IN2 ADOGND
C538 2.2u/6.3V_6 MIC1-L C564 330p_4 17
C MIC1-L (27) RIN2 C
34 INSPKR+ R525 16K/F_6 19 INSPKR+
PORTA_L C543 2.2u/6.3V_6 MIC1-R C572 330p_4 ROUT+ INSPKR-
(13) ACZ_RST#_AUDIO 11 RESET# PORTA_R 35 MIC1-R (27) ROUT- 12
24 INSPKL+
MIC1_BIASB R252 *0_4 MIC1-VREFO C362 4.7u/6.3V_6 G1441_RBY LOUT+ INSPKL-
(13) BIT_CLK_AUDIO 6 BIT_CLK MICBIASB 19 ADOGND 16 RBYPASS LOUT- 7
10 14 MIC1-LL C344 4.7u/6.3V_6 G1441_PBY 3
(13) ACZ_SYNC_AUDIO SYNC PORTB_L LBYPASS
R460 33_4 ACZ_SDIN20561 8 15 MIC1-RR R254 *0_4 MIC1-R
(13) ACZ_SDIN0 SDATA_IN PORTB_R
THRMPAD
(13) ACZ_SDOUT_AUDIO 5 R255 *0_4 MIC1-L
SDATA_OUT
GND/HS
GND/HS
GND/HS
GND/HS
18 MIC1_BIASC G1441_SHDN 5
MICBIASC FM_LINEIN_L C555 2.2u/6.3V_6 FM_LINEIN_LL R512 *10K_4 FM_LINEIN_LLL SHDN
PORTC_L 16
43 17 FM_LINEIN_R C560 2.2u/6.3V_6 FM_LINEIN_RR R517 *10K_4 FM_LINEIN_RRR R526 0_4 G1441_SE/BTL 11
(27) DIB_P DIB_P PORTC_R ADOGND SE/BTL
(27) DIB_N 42 DIB_N R266 10K_4 G1441
FM_LEFT (24)
25
22
21
10
9
27 R267 10K_4
PORTD_L FM_RIGHT (24)
C528 0.1u/10V_4 PCBEEP_C 12 28
(24) PCBEEP PC_BEEP PORTD_R C339 10u/10V_8 ADOGND
(27) SPDIF_OUT R456 0_4 SPDIF_OUT_C 48 20 MIC2_INT_L C552 2.2u/6.3V_6 INT_MIC_R R262 4.7K_4 R263 1K_4 +3AVDD
S/PDIF MIC_L MIC2_INT_R C559 2.2u/6.3V_6 R257 0_4
MIC_R 21 INT_MIC (17)
29 R466 5.1K/F_4 +3AVDD INT SPEAKER ADOGND
R472 *10K_4 GPIO2 MONO SPKR-L
45 GPIO2 STEREO_L 30
R467 *10K_4 GPIO1 46 31 SPKR-R R468 5.11K/F_4
GPIO1 STEREO_R PORT_A# (27)
EAPD# 47 If Int Mic change to CN30
EAPD#/GPIO0 R469 10K/F_4 INSPKR- L23 BK1608LL121_6 INSPKR-N
PORT_B# (27) Port C, and Remove INSPKR+ INSPKR+N 1
Rev:3B 04/18 Del the R476/R477 By EMI Suggest . L22 BK1608LL121_6
13 SENSEA R471 20K/F_4 FM.Than NC R469 INSPKL- L21 BK1608LL121_6 INSPKL-N 25
SENSEA PORT_C# (12) 36
INSPKL+ L20 BK1608LL121_6 INSPKL+N
CX20561_VILT 4
1 DMIC_CLOCK VREF 24
2 D36 D37 D38 D40 INT_SPK
DMIC_1/2 CX20561_FLY_P
39
1
FLY_P CX20561_FLY_N C556 1u/10V_4 C571 C566
FLY_N 37
B B
2
22 CX20561_RVD22 10u/10V_8 0.1u/10V_4
DVSS_41
AVSS_25
AVSS_38
VREF_LO
DVSS_7
CX20561-12Z Not support digital MIC 23 CX20561_RVD23 Clamp-VPORT_6 Clamp-VPORT_6 Clamp-VPORT_6 Clamp-VPORT_6
VREF_HI
CX20561-13Z support digital MIC RESERVED_32 32
33 C346 C347
RESERVED_33
PC Beep GAIN CONTROL CX20561-12Z 1u/10V_4 1u/10V_4 ESD Protect
7
41
25
38
GAIN GPIO1 GPIO2 ADOGND
+5V_VDD
0dB 10K 10K
ADOGND
-6dB omit omit R268
ADOGND +3AVDD 100K_4

-12dB 10K omit G1441_SHDN
R283
3
-18dB omit 10K D17 1 2 MTW355
(28) AMP_MUTE#
10K_4
EAPD# D16 1 2 *MTW355 MUTE# 2 Q42
Rev:3A 02/05 Stuff C539/C544 For INT MIC Recording Noise. H : AMP turn on 2N7002E
L : AMP power down
1
A
Reserve INTMIC Reserve FM MIC1-LL
MIC1-RR
FM_LINEIN_L
FM_LINEIN_R
MIC2_INT_L
MIC2_INT_R
ADOGND
A
Rev:2A 12/07 NC D16 For there has "Bo-Bo" Sound while plug-in/out Headphone.
MUTE# (27)
C544 C539 C547 C545 C561 C551
CN38
CN16 ADOGND 0.1u/10V_4 0.1u/10V_4 *100p_4 *100p_4 *100p_4 *100p_4
INT_MIC_R 1 FM_LINEIN_LLL
2 52
1 63
FM_LINEIN_RRR
ADOGND
PROJECT : BU2
4
ADOGND
*INT_MIC
*FM_LINEIN
ADOGND ADOGND ADOGND ADOGND ADOGND ADOGND Quanta Computer Inc.
Custom 1A
CONEXANT(CX205601)/SPK/AMP
NB4
5 4 3 2 1
5 4 3 2 1
VR
(28) DIGVOL_UP
+3V
DIGVOL_UP
R274
R276
R275
10K_4
10K_4
0_4 VR_UP
Rev:2A 12/07 Change New Part Number.
2
A
VR1
COM
1
FM TUNER & MDC
R571 *0_6 CN20
27
4 4 1 SB_GPIO7 +3V 2 +3V
3 4
DIGVOL_DN R289 0_4 VR_DN L62 SB_GPIO27 GND
(28) DIGVOL_DN 3 5 5 6
B 5 FM_INT NC
7
3 4 DIB_P_R 7 8 C50
(26) DIB_P 3 4 DIB_P FM_L
2 1 DIB_N_R 9 10
D
(26) DIB_N 2 1 DIB_N FM_R D
C350 C349 11 12 0.1u/10V_4
RFCM1632100M3_C FM_SUSCLK NC
0.1u/10V_4 0.1u/10V_4 MDC/FM
VR_XRE094_NOBLE R570 *0_6
Rev:3B 04/18 Added the common mode choke on DIB_P/N For EMI Solution.
+3V +3V
SYSTEM MIC
C581
C360 U23
*0.1u/10V_4 R417 4.7K_4 CN32
(26) MIC1-VREFO
*0.1u/10V_4 5 2 U41 1 7
Vcc CLK MIC1-L L52 BK1608LL121_6 MIC1-L1
5 1 (26) MIC1-L 2
1 VR_UP 2 VR_DN 6
D MIC1-R L54 BK1608LL121_6 MIC1-R1
4 3 (26) MIC1-R 3
DIGVOL_UP 4 3 PORT_B# 4
Q GND (26) PORT_B#
*NL17SZ17 8
C358 5
*SN74LVC1G79DBVR C496 C490 MIC_JACK
*0.1u/10V_4
0.1u/10V_4 0.1u/10V_4 Normal OPEN Jack
+3AVDD
C C
DIGVOL_DN D41
Rev:2A 12/07 Reserve U41 to Solve VR Not Smooth. 1
CNXT suggestion can not over 100P
C348
PORT_B# ADOGND
*0.1u/10V_4 3
Rev:3A 02/05 Change L52/L54 And Stuff C496/C490 For INT MIC Recording Noise.
2
*DA204U
ADOGND
HP JACK HP Amplifier +3AVDD
R277 *G1412@10K_6
+3V_SPD
Rev:2A 12/11 3G/GPRS ExpressCard noise in HP. C357 *G1412@47P_4
Rev:3A 02/05 Change R545/R546 Meet HP Jack Signal Measure. C353 C351
G1412_HPL R273 *G1412@0_4
*G1412@4.7u/6.3V_6 *G1412@.1u/10V_4
G1412_HPR R290 *G1412@0_4 CN37 U21
HP_JD 5 9
B 4 B
R545 0_6 HPL_1 L61 BK1608LL121_6 HPL_SYS 10 HPL_2 R278 *G1412@10K_6 4 5 G1412_HPL ADOGND ADOGND
(26) HPL INL - OUTL
3
R546 0_6 HPR_1 L55 BK1608LL121_6 HPR_SYS 2 + 9
(26) HPR NC1
1 +3AVDD 3 11
C588 C589 C513 C546 C582 C583 SVDD NC2 +NVDD
15 12
R291 *G1412@100K_4 PVDD NC3
7 LED +3AVDD 14
C568 *G1412@10u/10V_6 HPL_2 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 *100p_4 *100p_4 Drive NC4
8 6 SVSS SGND 2 C363
6 IC 10 13
+NVDD NVDD PGND
C569 *G1412@10u/10V_6 HPR_2 D18 1 2 *G1412@MTW355 17
(26) MUTE# TPAD
HP_JACK *G1412@4.7u/6.3V_6
D19 1 2 **G1412@MTW355 G1412MUTE# 1
(26) SECNTL SHDNR#
Rev:2A 12/07 Change HPL/HPR Series Resistor From 0ohm to 10u(C582/C583) And Stuff R445/R478. 16 ADOGND
SHDNL#
+ 7
HPR_2 R269 *G1412@10K_6 OUTR ADOGND
8 -
ADOGND ADOGND ADOGND ADOGND INR
*G1412@G1412
SPDIF_OUT (26)
Rev:2A 12/13 CN37 9/10# Shield Pin to ADGND For ESD issue.
Rev:3A 02/05 Change C588/C589 To 0.1u For Enhance Avoid 3G Noise And Meet HP Jack Signal Measure
+5V C355 *G1412@47P_4
PORT_A#
(26) PORT_A#
R280 *G1412@10K_6 G1412_HPR
+5V
Q46 R294
3
2N7002
10K_4 HP_JD C361 *G1412@4.7U/6.3V_6
R293
A 2 D64 D63 A
22K_4 1 3 C590 +3AVDD +NVDD U22
1
+3V +3V_SPD
3
Q45
2N7002 0.1u/10V_4 1 6
VOUT C+
2
Q58
1
2 HP_JD BSS84 Clamp-VPORT_6 Clamp-VPORT_6 2 5 G1412MUTE#

VIN /SHDN
3 4
PROJECT : BU2
ADOGND
C- GND
1
*G1412@G5930
Rev:3A 02/05 Added the ESD Protect. ADOGND Size Document Number Rev
Custom 1A
JACK/VR/FM/MIC/MDC/AMPLIFIER
NB4
5 4 3 2 1
5 4 3 2 1
SM BUS PU
28
+3VPCU
EC(KBC) +3VPCU EC_VDD R24 *0_6

Rev:3D 07/23 Add D68 to Avoid +3V Voltage Leakage.
+3V
MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA
R53
R45
R44
R52
4.7K_4
4.7K_4
4.7K_4
4.7K_4
FN0# R321 4.7K_4
FN1# R314 4.7K_4
L8 +A3VPCU D68 BD520WS DNBSWON#_uR 3ND_MBCLK R35 4.7K_4
BLM18AG601SN1_6 DIGVOL_UP 3ND_MBDATA R33 4.7K_4
C49 C51 DIGVOL_DN
+3V
0.1u/10V_4 10u/10V_8 C39 C34 C383 C48 C384
0.1u/10V_4 10u/10V_8 *0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4 CRT_SENSE# R311 4.7K_4
D 8769AGND D
115
102
C56 C381 C38 C57 C55 C45
19
46
76
88
4
10u/10V_8 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4 U5
I/O Base Address
VCC1
VCC2
VCC3
VCC4
VCC5
AVCC
VDD
Rev:2A 12/07 Add D57,D58 to Avoid Voltage Leakage.
H=1.6mm
I/O Address
(12,23) LFRAME# 3 LFRAME AD0/GPI90 97 TEMP_MBAT (30)
126 98 USBOC#0_uR D46 BAS316 BADDR1-0 Index Data
(12,23) LAD0 LAD0 AD1/GPI91 USBOC#0 (13,24)
127 99 FN0#
(12,23) LAD1 LAD1 AD2/GPI92 FN0# (25)
128 A/D 100 FN1# 00 XOR TREE TEST MODE
(12,23) LAD2 LAD2 AD3/GPI93 DIGVOL_UP FN1# (25)
(12,23) LAD3 1 LAD3 AD4/GPIO05 108 DIGVOL_UP (27)
R535 0_4 PCLK_591 2 96 DIGVOL_DN 01 CORE DEFINED
(12,16) PCLK_591 LCLK AD5/GPIO04 NBSWON# DIGVOL_DN (27)
AD6/GPIO03 95 NBSWON# (25)
D49 8 94 10 2Eh 2Fh
(12,22) CLKRUN# CLKRUN/GPIO11 AD7/GPIO07 SUSB# (13,16)
*BAS316 121 11 164Eh 164Fh
(13) GATEA20 GA20
101 ICM_EC R309 *0_4
DA0/GPI94 ICM (30)
(13) RCIN# 122
KBRST DA1/GPI95
105 VFAN (6) SHBM=0: Enable shared memory with host BIOS
Rev:2A 12/13 Add D49,D50 to Avoid Voltage Leakage. D/A DA2/GPI96
106
D23 SCI#_uR 29 LPC 107 Rev:2A 12/07 Stuff R38 And NC R36 For Boardcom BT issue.
(13) SCI# ECSCI/GPIO54 DA3/GPI97 SUSLED_EC (25)
BAS316 6 Rev:3A 02/13 Reserve the DISPON Pin By EC Control. BADDR0 BADDR0 R36 *10K_4
(17) EC_FPBACK# LDRQ/GPIO24
80 EC_VBAT
R534 0_4 GPIO41(VBAT) BT_EN R38 10K_4
(18) CEC_EC_HP 124 LPCPD/GPIO10 BADDR1
GPIO GPIO42/TCK 17 RF_LED (29) RF_EN
D50 7 20 SHBM R316 10K_4
(12,18,23,24) PLTRST# LRESET GPIO43/TMS AMP_MUTE# (26)
wake-up GPIO44/TDI 21 ID (30)
*BAS316 123 capability 25
(24) USB_EN#0 PWUREQ/GPIO67 GPIO50/TDO D/C# (30)
CIRTX2/GPIO52/RDY
27 EC_DISPON (17) Disabled ('1') if using FWH device on LPC.
(12,21,23) SERIRQ 125 SERIRQ Enabled ('0') if using SPI flash for both system BIOS and EC firmware
no wake-up GPO82/TRIS
110 LED_LOGO (29)
9 capability GPO84/BADDR0 112 BADDR0
(20) USB_EN#1 SMI/GPIO65
111 BT_EN
C
PCLK_591
(29)
(29)
MX0
MX1
54
55
KBSIN0
SOUT_CR/GPO83/BADDR1
SER
SIN_CR/CIRRX/GPIO87
113
93
CRT_SENSE#
BT_EN (25)
CRT_SENSE# (19)
LID591# (17)
ID U11
+3VPCU
C
KBSIN1 GPIO06 2ND_MBCLK
(25,29) MX2 56 6 1
KBSIN2 2ND_MBDATA SCL A0
(25,29) MX3 57 32 CONTRAST (17) 5 2
R310 KBSIN3 A_PWM/GPIO15 SDA A1
(25,29) MX4 58 KBSIN4 B_PWM/GPIO21 118 KILL_SW (29) A2 3
59 62 BATLED0#
(25,29) MX5 KBSIN5 C_PWM/GPIO13 BATLED1# BATLED0# (25)
*22_4 60 65 7 8
(29) MX6 KBSIN6 D_PWM/GPIO32 BATLED1# (25) WP VCC
(29) MX7 61 KBSIN7 PWM E_PWM/GPIO45 22 SUSON (34,35) GND 4
16 C61
F_PWM/GPIO40/CLKIN48 MAINON (19,34,35)
C379 MY0 53 81 24LC08BT-I
(29) MY0 KBSOUT0/JENK G_PWM/GPIO66 TP_LED_ON (25)
52 66 PWRLED# 0.1u/10V_4
(25,29) MY1 KBSOUT1/TCK H_PWM/GPIO33 PWRLED# (25)
*10p_4 51
(29) MY2 KBSOUT2/TMS
(29) MY3 50 KBSOUT3/TDI ADDRESS: A0H
(29) MY4 49
KBSOUT4/JEN0 KB TA1/GPIO56
31 +1.2V_ON (33,35)
(29) MY5 48 KBSOUT5/TDO TB1/GPIO14 63 FANSIG (6)
(29) MY6 47 KBSOUT6/RDY TA2/GPIO20 117 LOM_DISABLE# (24)
(29) MY7 43
KBSOUT7 TIMER TB2/GPIO01
64 ACIN (25,30)
42 26
(29) MY8
(29) MY9
(29) MY10
41
40
KBSOUT8
KBSOUT9
TA3/GPIO51
TB3/GPIO36
15
S5_ON (31,35)
VRON (32) SPI FLASH +3VPCU
KBSOUT10 Rev:3D 07/23 Bluetooth can't work issue. U2

39
SMBUS Table (29) MY11
(29) MY12 38
KBSOUT11
KBSOUT12/GPIO64 SPI_DI/GPIO77
84 BT_RESET (25)
SPI_SDI_uR R306 33_4 SPI_SDI 2
SO VDD
8
37 SPI 83 RF_EN RF_EN (23)
(29) MY13 KBSOUT13/GPIO63 SPI_DO/GPO76/SHBM
36 82 SPI_SDO_uR R304 33_4 SPI_SDO 5 7 C23
SMBUS Devices (29) MY14 KBSOUT14/GPIO62 SPI_SCK/GPIO75 DNBSWON#_uR SI HOLD
35 91 D30 BAS316
(29) MY15 KBSOUT15/GPIO61/XOR_OUT GPIO81 DNBSWON# (13)
34 SPI_SCK_uR R305 33_4 SPI_SCK 6 3 0.1u/10V_4
1 Battery (29) MY16 KBSOUT16/GPIO60 RSMRST#_uR R47 0_4 SCK WP
(29) MY17 33 75 RSMRST# (13)
KBSOUT17/GPIO57 IRRX1/GPIO72/SIN2 SPI_CS0#_uR
CPU Thermal Sensor FIR IRRX2_IRSL0/GPIO70 73 SUSC# (13) 1 CE VSS 4
2 3D Sensor 74 PWROK_EC R46 0_4
IRTX/GPIO71/SOUT2 ECPWROK (16)
MBCLK 70 23 R22 10K_4 W25X80VSSIG
EC EEPROM (30) MBCLK
MBDATA SCL1/GPIO17 CIRRXM/GPIO46/TRST CIRRX2
KEY_INT (25) +3VPCU
(30) MBDATA 69 SDA1/GPIO22 GPIO34/CIRRXL 14
HDMI CEC 2ND_MBCLK 67 SMB CIR 114
(6,19) 2ND_MBCLK SCL2/GPIO73 CIRTX1/GPIO16 NUMLED (29)
3 2ND_MBDATA 68 109
Touch Sensor (6,19) 2ND_MBDATA
(18,25) 3ND_MBCLK
3ND_MBCLK 119 SDA2/GPIO74
SCL3/GPIO23
CIRTX2/GPIO30 CAPSLED (29) 2nd sorce
3ND_MBDATA 120
(18,25) 3ND_MBDATA SDA3/GPIO31
24 86 SPI_SDI_uR MXIC MX25L8005M2C-15G AKE5GFK0Z09
(6) AMD_PROCHOT# SCL4/GPO47 F_SDI/F_SDIO1
D65 *BAS316 HWPG 28 87 SPI_SDO_uR
SDA4/GPIO53 F_SDO/SDIO0 SPI_CS0#_uR
B Rev:3A 02/05 System will Leakage when system into G3 mode. FIU F_CS0
90
SPI_SCK_uR
B
F_SCK
92 Winbond W25X80VSSIG AKE3GFP0N08
+5V TPCLK 72 Rev:2A 12/07 Add D57,D58 to Avoid Voltage Leakage.
(25) TPCLK PSCLK1/GPIO37
TPDATA 71
(25) TPDATA PSDAT1/GPIO35
R319 10K_4 TPCLK 10 EON EN25F80-75HCP AKE3GZP0Q00
T3 PSCLK2/GPIO26
R320 10K_4 TPDATA 11 PS/2 30 USBOC#5_uR D47 BAS316
(25) FP_PWRON PSDAT2/GPIO27 CLKOUT/GPIO55 USBOC#5 (13,20)
(29) FN_F10 12
PSCLK3/GPIO25 VCC_POR# R315 4.7K_4
(25) FELICA_PWRON 13 PSDAT3/GPIO12 VCC_POR 85 +3VPCU
8768_32KX1 77 104 VREF_uR R313 0_4 +A3VPCU
VCORF
32KX1/32KCLKIN VREF
INTERNAL KEYBOARD STRIP SET
AGND
GND1
GND2
GND3
GND4
GND5
GND6
R43 20M_6 8768_32KX2 79

32KX2 +3VPCU
EC
5
18
45
78
89
116
103
44
R322 MY0 R312 10K_4

Y2
VCORF_uR
33K/F_4
1 4 WPC8763LDG: AL008763B00 (w/o CIR)
L7 0_6 WPC8769LDG: AJ087690F08 (w/CIR)
C386
2 3
C385
C380
CIR +3VPCU +5VPCU
6.8p_4 6.8p_4
1u/16V_6 WPCE775L: AJ007750F00 (w/o CIR) R521 CIR@0_4 C573 CIR@0.1u/16V_4
32.768KHZ
8769AGND WPCE775C: AJ007750F01 (w/CIR) R522 *CIR@0_4
8769AGND For WPC8763 +A3VPCU +5VPCU
+3V C382
EC_VBAT R317 *0_4 *0.1u/10V_4 R523 U39

Rev:2A 12/13 Reserve the ESD Protect. CIR_VCC 2
R308 *CIR@10K_4 VCC
10K_4 R318 0_4 CIRRX2 1

A CCD_POWERON (17) OUT A
D28 BAS316 HWPG D48 20 mlis 3
(31) SYS_HWPG GND
For WPCE775 4
1
D25 BAS316 GND
(33) HWPG_1.2V_NB
CIR@FM-2138SC-5CN
2
D27 BAS316 Rev:2A 12/07 Apply R528/R531/R532 Pull-up For Battery LED issue.
(34) HWPG_1.8V
*CIR@Clamp-VPORT_6
D26 BAS316
(35) HWPG_CPUIO
(35) HWPG_1.1V_NB
D29 BAS316 +3VPCU NBSWON# G4 1 2 *SHORT_ PAD1 PROJECT : BU2
(35) HWPG_1.2V_S5
D24 BAS316 BATLED0#
BATLED1#
R528
R531
10K_4
10K_4
C579 Quanta Computer Inc.
D66 *BAS316 PWRLED# R532 10K_4 0.1u/10V_4
(6,16,32) VRM_PWRGD
Rev:2A 12/07 Short Pad to Replaced Power S/W. Custom 1A
EC(KBC)-WPCPC8763/WPC8769
Rev:3A 02/08 Reserve the CPU PWRGOOD Diode For Sequence Timing. NB4
Date: Friday, August 01, 2008 Sheet 28 of 35
5 4 3 2 1
5 4 3 2 1
W-LAN&BT LED
INT KEYBOARD
+3VPCU
Mainstream --> Orange
Low Cost --> Orange
Satellite LED
Rev:2A 12/07 Updated the LED1/LED2 Footprint And Part Number.
Rev:3A 02/05 Change R281/R286 and R375 To 150ohm For LED Light Not Enough
29
MY16/MY17 for 17"only RF_LED_R
RP13 CN8 LED4 1 2 LED_Y_LTST-C190KFKT R513 390_4 +5V +5V
RF_LED (28)
10 1 10Kx8 MX6
MX5 MX4 36
9 2
MX0 8 3 MX7 R286 R281
D MX1 7 4 MX3 K_LED_P D
MX2 6 5
1
2
3
MY16
MY16 (28) WiMAX LED MAIN@150_4 MAIN@150_4
2
MY17
4 MY17 (28)
5 LED3
K_LED_P MAIN@99-113UNC/V90/TR8 NAIN@99-113UNC/V90/TR8
6 MY2 R524 *100_4 WiMAX_R_LED WiMAX_R
7 MY2 (28) +5V 2 1 1 3
CP4 7 8 *100px4 MX7 MY1 LED2 LED1
8 MY1 (25,28)
5 6 MX2 MY0 *LED_B_LTST-C190TBKT
MY0 (28)
1
MX3 9 MY4 Q41
3 4 MY4 (28) Mainstream --> White
2
MX4 10 MY3 *BSS84
1 2 11 MY3 (28) Low Cost --> N/A
MY5
LOGO_1
LOGO_2
12 MY5 (28) (23) WiMAX_LED#
MY14
13 MY14 (28)
CP5 7 8 *100px4 MX0 MY6 D45
14 MY6 (28)
5 6 MX5 MY7
MX6 15 MY13 MY7 (28) RF_LED_R
3 4 16 MY13 (28) 1
1 2 MX1 MY8
17 MY8 (28)
3
MY9
18 MY9 (28) 3
MY10
19 MY10 (28)
CP3 7 8 *100px4 MY7 MY11 WiMAX_R_LED
MY13 20 MY12 MY11 (28) 2 LED_LOGO LED_LOGO
5 6 21 MY12 (28) 2 2
MY12 MY15 *BZ5V6 (28) LED_LOGO Q44 Q43
3 4 22 MY15 (28)
1 2 MY15 MX7
23 MX7 (28)
MX2 C356 MAIN@2N7002 MAIN@2N7002
24 MX2 (25,28)
MX3
MX3 (25,28)
1
CP2 MY3 25 MX4
7 8 *100px4 26 MX4 (25,28)
*MAIN@0.1u/10V_4
5 6 MY5 MX0
27 MX0 (28)
3 4 MY14 MX5
C
1 2 MY6 28
29
30
MX6
MX1
MX5 (25,28)
MX6 (28)
MX1 (28)
KILL SW +3VPCU
C
K_LED_P
CP1 MY2 31 CAPSLED
7 8 *100px4 32 CAPSLED (28)
5 6 MY1 FN_F10 R284
33 FN_F10 (28)
3 4 MY0 NUMLED LOGO_1 LOGO_2
34 NUMLED (28)
1 2 MY4 10K_4
SW2
35
2
C30 100p_4 MY17 KEYBOARD_CONN D42 D43
1
1
(28) KILL_SW
+3VPCU 1 3
2
C29 100p_4 MY16
K_LED_P R21 150_4 KILL_SW *MAIN@Clamp-VPORT_6 *MAIN@Clamp-VPORT_6
+3V 3
D20
2 DA204U
B
HOLE Rev:2A 12/09 Modified the Footprint.
Rev:3B 04/18 ESD Solution the Added the Ground Pad.
EMI B
HOLE5 HOLE19 HOLE8 HOLE23 PAD5 PAD6
HOLE21 HOLE7 HOLE2 HOLE14 HOLE20 H-C189D118P2-8 *H-C98D98N *H-C98D98N *O-BU2G-1 *EMI_PAD *EMI_PAD
7 6 7 6 7 6 7 6 7 6 +5V +5V +5V VIN VIN VIN PAD2 PAD1
8 5 8 5 8 5 8 5 8 5 *EMI_PAD *EMI_PAD
9 4 9 4 9 4 9 4 9 4
C20 C442 C26 C41 C46 C60
1
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
1
*H-C295D98P2-8 *H-C295D98P2-8 *H-C295D98P2-8 *H-C295D98P2-8 *H-C295D98P2-8
HOLE22 HOLE9 HOLE4 HOLE1 HOLE3 HOLE13 PAD3 PAD4 +3V_S5

7 6 7 6 7 6 7 6 7 6 7 6 *EMI_PAD *EMI_PAD
8 5 8 5 8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 9 4 9 4 C600 +1.8VSUS +1.8VSUS +1.8VSUS +1.8VSUS +NB_CORE +NB_CORE +NB_CORE +NB_CORE
1000P_4
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
2
3
1
C586 C585 C584 C52 C592 C593 C594 C595
*H-C295D98P2-8 *H-C295D98P2-8 *H-C295D98P2-8 *H-C295D98P2-8 *H-TC256BC217D98P2-8 *H-C256D98P2-8 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 330p_4 330p_4 330p_4 330p_4
A CPU NB MINI CARD Rev:2A 12/11 EMI Solution the add Ground Pad And 0.1u Cap on 1.8VSUS Plane.
Rev:3A 02/05 EMI Solution the add 0.1u Cap on +NB_CORE Plane.
A
HOLE15 HOLE16 HOLE18 HOLE17

HOLE6 HOLE10 HOLE11 HOLE12 H-C189D118P2-8 H-C189D118P2-8 H-C189D118P2-8 H-C189D118P2-8
7 6 7 6 7 6 7 6
8 5 8 5 8 5 8 5
9 4 9 4 9 4 9 4 PROJECT : BU2
1
2
3
1
2
3
1
2
3
1
2
3
H-TC157BC197D118P2-8 H-TC157BC197D118P2-8 H-TC157BC197D118P2-8 H-TC157BC197D118P2-8 Size Document Number Rev

Custom 1A
KEYBOARD/LED/KILL SW/HOLE
NB4
5 4 3 2 1
5 4 3 2 1
PF1
LITTLE-7A_1206
PL2
HI0805R800R-00_8
VA PD3
PDS1040S-13
0.02_7520
PR32
REV.B modify
PQ20
FDD6685
VIN
30
PJ1 1
1 1 2 3 1 2 VA2 3 4 3 4
2 2
3 PQ19
4 PC13 PC5 PR14 FDD6685
1
1
D PC1 PC2 PC26 PR51 PC4 D
33K_6
20277-04XX-4P-L 2200p/50V_6 PL1 0.1u/50V_6 0.1u/50V_6 PD4 0.1u/50V_6 220K/F_6 0.1u/50V_6 2200p/50V_6
HI0805R800R-00_8
P4SMAJ20A
PC8 PC11
2
0.1u/50V_6 0.1u/50V_6
1 6 PR15
PD1 PR60 0_6 10K_6
SW1010CPT PR52 2 5 D/C# (28)
220K/F_6
REV.B modify 3 4
3
PR191 PD13 PQ9
*10K/F_6
IMD2AT108
ACIN_1 2 1 CSIN_1 2
(25,28) ACIN +3VPCU
PQ4
*ZD12V CSIP_1 DMN601K-7
PR189 PR190 modify 1207
1
*6.8K/F_6 *10K/F_6 PL7 VIN
HI0805R800R-00_8
PR187 PC101 VA3
1u/16V_6
10K_4 PR135 PR134
10/F_6 10/F_6
REV.B modify PC107 PR133

C 0.1u/50V_6 4.7_6 PC92 C
1u/16V_6
ISL88731_VDDP
CSIN PC98 PC96
REV.C modify CSIP
0.1u/50V_6 10u/25V_1206
33
32
31
30
28
27
26
21
1
5
6
7
8
+3VPCU PD10 PC97
RB500V 2200p/50V_6
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
+3VPCU +3VPCU PC102 PR132 PC99 4
0.1u/50V_6 2.7_6 .1u/25V_8 PQ24 REV.B modify
11 VDDSMB BOOT 25 88731B_2 88731B_1 FDS8878
1
PD6 PD5 PR122

3 ID 3 TEMP_MBAT (28) MBDATA 9 SDA UGATE 24 ISL88731_UGATE PL6 0.03_3720
PCMC063T-6R8MN
3
2
1
88731LR 1 2 BAT-V
*DA204U *DA204U (28) MBCLK 10 23 ISL88731_PHASE
2
SCL PHASE
5
6
7
8
13 20 ISL88731_LGATE PR124
A:(9/7) Add ESD diode base on EC FAE suggestion ACOK LGATE PC89
4
PQ23 *2.2/F_6 .01u/50V_6
PR128 PC95 19 FDS6690AS
49.9/F_6 0.1u/50V_6 PGND
DCIN 22 DCIN PR127 PC83 PC88
PR137 10/F_6 *2200p/50V_6 2200p/50V_6
3
2
1
82.5K/F_6
CSOP 18 CSOP CSOP_1 CSOP_1 PC85 PC86
88731ACSET 10u/25V_1206 10u/25V_1206
B REV.B modify 2 ACIN B
+3VPCU
PC93
REV.C modify PR138 3 0.1u/50V_6
VREF
PR76 PR77
CSON 17 CSON CSON_1 CSON_1
*100K_4 10K_6 22K/F_6 PR130
4 0_4 PR129
PC34 ICOMP 10/F_6
NC 16
HI0805R800R-00_8 5 PR131
14 100p/50V_6 PL4 NC 100_4
13 MBAT+ BAT-V BAT-V
12 VBF 15
11 6 VCOMP
PL5 29
10 ID GND
GND
9 ID (28)
ICM
HI0805R800R-00_8
NC
NC
8 TEMP_MBAT PU6
7 PR136 ISL88731
7
14
12
6
1
PC36 2.21K/F_6
5 PC39
4 PC38 0.1u/50V_6
2
3 PR74 100K/F_6
2 47p/50V_6
+3VPCU
PC108
ISL88731 thermal pad
1
PR79
47p/50V_6 .01u/50V_6 tie to Pin12
CN21
PR78 100_4 ICM
ICM (28)
100_4 MBDATA (28)
TEMP_MBAT (28)
MBCLK MBCLK (28) PC110 PC112
A *1u/16V_6 PC111 *.01u/50V_6 PC105 A
1
.01u/50V_6
1
PD7 PD8 PR73 *3300p/50V_6

*100K/F_6 PC37
ZD3.6V ZD3.6V .01u/50V_6
2
PROJECT : BU2
2

Custom CHARGER (ISL88731) 1A
NB4
5 4 3 2 1
5 4 3 2 1
MAIND
MAIND (34,35)
SUSD
SUSD (35)
PR182
Rev:2A 12/12 Move the Short Pad. 31
Rev:2A 12/12 Move the Short Pad. (6) SYS_SHDN# 1 2
0_4 VIN
VL
D VIN D
2
PC154
+ VL
4.7u/10V_8
2
PR173 PR167 PC144 PR161
390K_4 PC150 0_4 0_4
1
1u/10V_6
PR183 0.1u/50V_6
1
39K/F_4 PC128 PC132
2
PC129 PC131 PC136 PC147 PC142 0.1u/50V_6 10u/25V_1206
0.1u/50V_6 2.2n/50V_6 10u/25V_1206 *0.01u/16V_4 PC130
5
6
7
8
PC133 PC134 0.1u/50V_6 2.2n/50V_4
1
100u/25V_6X7.7 *10u/25V_1206 9/07 Add PR154.
REF
1
3V5V_EN 4
3V_DH PQ33
8
7
6
5
09/07 Change PC123 placement PR159 *0_6 FDS8878
PR172 OCP : 8A
115K/F_4
8
7
6
5
4
3
2
1
4 5V_DH +3VPCU
PQ37 PL12
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
3
2
1
FDS8878 9/12 PR44 Change to 196K. 2.2uH
OCP: 10A +3VPCU
PR160 3V_LX
5
6
7
8
+5VPCU +5VPCU
9 32 REFIN2 196K/F_6
PL13 BYP REFIN2
10 31 1 2
1
2
3
2.2uH OUT1 ILIM2 PR104
11 30
C +5VPCU 5V_LX FB1 PU11 OUT2 SKIP 2.2/F_6 C
1 2 12 ILIM1 SKIP# 29 4
PR166 237K/F_6 DDPWRGD_R 13 ISL6237 28 DDPWRGD_R PQ35
PGOOD1 PGOOD2
2
8
7
6
5
3V5V_EN 14 27 3V5V_EN FDS6690AS PR155 PC159 + PC157
PR176 PR179 EN1 EN2 0_6
15 DH1 DH2 26
*0_4 16 25 0.1u/50V_6 330u/6.3V_6X5.7
+ 2.2/F_6 5V_DL LX1 LX2 PC65
4 37 PAD
36 2.2n/50V_6
1
3
2
1
PAD
PGND
PVCC
PC158 PC149 PC160
BST1
BST2
GND
PAD
PAD
PAD
DL1
DL2
PQ36 PC153 PC141
NC
2
FDS6690AS 0.1u/50V_6 0.1u/50V_6

PR181 PR163
35
34
33
17
18
19
20
21
22
23
24
0_4 PC151 PR180 1/F_6
1
2
3
2.2n/50V_6 1/F_6 1 2
1 2 3V_DL PR156
1
*0_6
10u/25V_1206 0.1u/50V_6
PR192 PR170 SKIP PR154 *0_6 REF
VL 0_6
330u/6.3V_6X5.7 PC148 *0_6 8/27 Add SYS_HWPG.
2 0.1u/50V_6 PC145
0_6 3V_DL 1u/16V_6 PR153 0_6
3
PD12 PR193
1 1PS302 OCP:8A +3VPCU
OCP:10A PC146
0.1u/50V_6 REV.B modify L(ripple current)
L(ripple current) PC155
0.1u/50V_6 2 =(19-3.3)*3.3/(2.2u*0.5M*19) PR178
=(19-5)*5/(2.2u*0.4M*19) ~2.48A 10K_6
3
~4.18A
PD11 Iocp=8-(2.48/2)=6.67A PR177
B 1 1PS302 DDPWRGD_R 0_6 B
Iocp=10-(4.18/2)=7.91A Vth=6.67A*15mOhm=100.05mV SYS_HWPG (28)
Vth=7.91A*15mOhm=131mV PR162
R(Ilim)=(100.05mV*10)/5uA
R(Ilim)=(105mV*10)/5uA +15V_ALWP 1 2 PR168 *0_6 REFIN2
+15V ~200.1K
1
~237K PR171 PR169
22_8 PC156 *200K_4 9/13 Stuff the PR178.
0.1u/50V_6 *39K/F_4 9/07 Add PR155.
08/29 Del PQ15.
2
VIN +3V_S5 +1.2V_S5 +15V +3VPCU +3VPCU
PR8 PR185 PR107 PR1

1M_6 22_8 22_8 1M_6
1
2
5
6
1
2
5
6
+5VPCU +3VPCU
S5D S5D 3 PQ39 SUSD 3 PQ38

FDC653N_NL FDC653N_NL
3
4
5
6
7
8
5
6
7
8
(28,35) S5_ON 2
2 2 2 +3V_S5 +3VSUS
PR7 PQ43 PQ17 PQ1 MAIND 4 MAIND 4
1
PQ3 1M_6 DMN601K-7 DMN601K-7 DMN601K-7 PQ40

A DTC144EU FDS8878 A
1
PQ41
FDS8884
3
2
1
3
2
1
PROJECT : BU2
09/12 Addition Quanta Computer Inc.
+5V +3V
Custom 1A
SYSTEM 5V/3V (ISL6237)
NB4
5 4 3 2 1
A B C D E
OFS/VFIXEN
Offset &
Droop SVI VFIX
CPU VDDNB_CORE
3A PL8
2.5uH_7.5A
LGATE_NB
VIN 32
1
GND O O X (6) CPU_VDDNB_RUN_FB_H
2
1
D1
D1
S2
G2
+3.3V X X O PR53
10/F_6 + PC44
+5V X O X 10u/25V_1206
2
PQ25 PC94 PC91 PC90
2
(6) CPU_VDDNB_RUN_FB_L FDS6900AS 10u/25V_1206 10u/25V_1206 0.1u/50V_6
S1/D2
PR57
G1
Metal VID Codes PR126 10/F_6 10/F_6
4 4
+5VPCU
8
SVC SVD Output PC119
330u_2V_7343
2
0 0 1.1 UGATE_NB
PC18 Rev:2A 12/12 Move the Short Pad.
1
0 1 1.0 1u/25V_8
1
PR46 PC19
1 0 0.9 PR49 0_8 22.1K/F_4 1000p/50V_6
2
1 1 0.8
PC20
33p/50V_4
PC21
PR125 10/F_6 1200p/50V_4
VFIXEN VID Codes VIN
1
SVC SVD Output
2
VIN
0 0 1.4 PC15
1
0.1u/50V_6 PR59 LGATE_NB
1
0 1 1.2 11.3K/F_6
2
1 0 1.0 PR48 PHASE_NB
44.2K/F_4 PR55 PR58
5
1 1 0.8 0_4 0_4
UGATE_NB PC28 PC106 PC100 PC109
0.1u/50V_6 10u/25V_1206 10u/25V_1206 0.1u/50V_6
1
PR37 0_4 UGATE_0 4
+3V
49
48
47
46
45
44
43
42
41
40
39
38
37
+5VPCU
20A
1
2
3
PR39 *0_4 PR64 PQ27
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
+3V 1/F_6 AOL1414
PR29 PL11 0.36uH
PR38 *10K/F_4 1 2 CPU_CORE0
10K/F_6 1 36
OFS/VFIXEN BOOT_NB
4
PR65 1/F_6
1
3 PR28 0_4 2 35 1 2 PR68 3
(6,16,28) VRM_PWRGD
5
PGOOD BOOT_0 + + +
PR19 0_4 PC31 2.2/F_6 PR25 PR31
+1.8VSUS +3V 3 34 UGATE_0 0.1u/50V_6
2
PWROK UGATE_0 0_6 0_6
Pin 49 is GND Pin 4
PR13 0_4
4 33 PHASE_0 PQ28 PC32 PC59 PC126 PC161
(6) CPU_SVD
1
2
3
SVD PHASE_0
2
PQ5 PR10 AOL1412 2200p/50V_6 ISP_0 330u_2V_7343 330u_2V_7343 *330u_2V_7343

DTC144EU 10K_6 PR12 0_4
5 32 ISN_0
(6) CPU_SVC SVC PGND_0
1 3 PR11 0_4
(6) CPU_PWRGD_SVID_REG
6 PU1 31 LGATE_0 +5VPCU
(28) VRON ENABLE LGATE_0
PR20 *0_4 ISL6265
R27 10K_4
VIN
7 30 1 2
1
RBIAS PVCC
2 1 PR18 PR24 PC30
107K/F_4 10K/F_4 8 29 LGATE_1 2.2u/10V_6
2
5
PR17 PC9 OCSET LGATE_1
255/F_4 4700p/25V_6
9 28
VDIFF_0 PGND_1 UGATE_1 PC103 PC104 PC118
4
PR23 10u/25V_1206 10u/25V_1206 0.1u/50V_6
1K/F_4 10 27 PHASE_1
1
2
3
FB_0 PHASE_1 PQ26
AOL1414
1 2 11
COMP_0 UGATE_1
26 UGATE_1 20A
PR16 PC10 PL10 0.36uH
54.9K/F_4 1 2 1200p/50V_4 12 25 1 2 1 2 CPU_CORE1
VW_0 BOOT_1
COMP_1
VDIFF_1
VSEN_0
VSEN_1
PC12 PR22 PR66 1/F_6 PC29

RTN_0
RTN_1
4
ISN_0
ISN_1
ISP_0
VW_1
ISP_1
180p/50V_4 6.81K/F_4 0.1u/50V_6 PR67
FB_1
1
2 1
2.2/F_6 + + +
PC14
13
14
15
16
17
18
19
20
21
22
23
24
1000p/50V_6 LGATE_1 4
2
2 2
PR69 PR63
PQ29 PC33
1
2
3
AOL1412 2200p/50V_6 0_6 0_6 PC58 PC120 PC162
ISP_0 PR30 PR35 PR43 PR44 330u_2V_7343 330u_2V_7343 *330u_2V_7343
0_4 0_4 0_4 0_4
Close to PR40
2
3.92K/F_4 PR34 ISN_1

CPU socket PC17
18.2K/F_4 0.1u/50V_6
CPU_CORE0
1
2
PC27 PR61
PR27 ISN_0
10/F_6 1 0.1u/50V_6 18.2K/F_4
2
PR56
(6) CPU_VDD0_RUN_FB_H 6.81K/F_4 ISP_1
1
(6) CPU_VDD0_RUN_FB_L PC25 PR62

1000p/50V_6 3.92K/F_4 ISN_1
Parallel
PR36
10/F_6
Close to
1
CPU socket
PC24
2
1200p/50V_4
2
PR42 PC22
10/F_6 4700p/25V_6
1
(6) CPU_VDD1_RUN_FB_L PR50 PC23

180p/50V_4
2
(6) CPU_VDD1_RUN_FB_H 1K/F_4
1 PR47 1
255/F_4
CPU_CORE1
PR45
10/F_6
PR54
54.9K/F_4
PROJECT : BU2
C 1A
AMD GRIFFIN CPU (ISL6265)
NB4
A B C D E
1 2 3 4 5
+5VPCU
VIN-1.2V
VIN
33
PR120
9/12 Add CPU_COREPG

10_6
REV. C mount PD9
A
RB500V A
5
6
7
8
REV:D No-Stuff the PR113 PC81
1
PR114 *0_6 PR115 PC82
(35) CPU_COREPG
1M_6 *0.1u/50V_6 Rev:2A 12/12 Move the Short Pad.
4.7u/10V_8 4
2
PR112 PQ18 PC3 PC80
PR113 0_6 FDS8878 0.1u/50V_6 10u/25V_1206
*10K/F_6 PC78
0.1u/50V_8
PR111 47K_6 15 13 OCP: 6A
(28,35) +1.2V_ON EN/DEM BOOT
3
2
1
+3V PC76 16 12 UGATE-1.2V PL3
TON UGATE 2.5uH
0.1u/50V_6 1 11 PHASE-1.2V
VOUT PHASE +NB_CORE
2 10 PR119 5.36K/F_6
VDD OC
5
6
7
8
PR121 PU5 9/07 Change net to +NB_CORE.
1
10K_6 3 RT8202 9 PR5
FB VDDP +
4 8 LGATE-1.2V 4 2.2/F_6 PR116 PC77
(28) HW PG_1.2V_NB PGOOD LGATE PQ21
2
6 7 FDS6690AS 3.65K/F_6 *33p/50V_6
GND PGND
5 17
Rds*OCP=RILIM*20uA PC7 9/07 Change PR101 to 3.65K.
NC TPAD
14 2.2n/50V_6
GND
GND
GND
GND
3
2
1
NC
1
PC79 PC74 PC75 PC84 PC6 PR118

560u/2.5V_6X5.7 10u/10V_8 10K/F_6
1u/16V_6
2
18
19
20
21
B B
9/07 Change PR102 to 10K.
*1n/50V_6 0.01u/50V_6 VOUT=(1+R2/R3)*0.75
1.2V_FB
REV. C PR119 change to 5.36Kohm

TON=3.85p*RTON*Vout/(Vin-0.5) 6A OCP --- OC=4.53K
FDS6690AS Rds=15mOhm
Frequency=Vout/(Vin*TON)
1/30 modify
+5VPCU
PR117
1.2V_FB
PR96
HI --- 1.0V
35.7K/F_6
LOW --- 1.1V
3
10K/F_6
PR123
10K/F_6
REV. B change to 35.7Kohm 2
1
PQ22
C DMN601K-7 C
PR194 PR188
2
*0_6
100/F_6
PC87 REV. C add 0ohm
3
0.022u/50V_6
9/07 Change net to +NB_CORE.
2 +NB_CORE_ON (10)
PQ49
+NB_CORE DMN601K-7
VIN +1.2V
1
PR9 PR41 PR102
1M_6 22_8 22_8 9/12 Addition PR156, PQ43.
3
3
3
PR6
2 1M_6 2 2
(28,35) +1.2V_ON
PQ7 PQ32
PQ2 DMN601K-7 DMN601K-7
1
DTC144EU
1
D D
PROJECT : BU2
Custom 1A
+NB_CORE (RT8202)
NB4
1 2 3 4 5
5 4 3 2 1
34
D D
9/10 Change PQ27 to AO1414.

+1.8VSUS
VIN
PC40
10u/10V_1206
5
Rev:2A 12/12 Move the Short Pad.
PQ31
PU7 4 AOL1414
PR82 *0_6 TPS51116 PC123 PC42 PC41
(5) CPU_VTT_SENSE 2.2n/50V_6 10u/25V_1206 10u/25V_1206
1 19
1
2
3
VLDOIN DRVH
9/07 Change PL12 to 2R2uH. OCP: 12.44A
2 20 PC115 0.1u/50V_6
+SMDDR_VTERM VTT VBST PL9
PC45 PC43 PR81 0_6 4 18 +1.8VSUS
VTTSNS LL
10u/10V_8 10u/10V_8 5 17 2.2uH
GND DRVL
5
3 16 +
VTTGND PGND PR142
DIS_MODE 6 11 S3_1.8V PR141 *0_6
MODE S3 MAINON (19,28,35) *2.2/F_6
C
4 C
PR147 0_6 7 12 S5_1.8V PR70 0_6
+SMDDR_VREF VTTREF S5 SUSON (28,35)
PQ30
1
2
3
5VIN 8 14 5VIN AOL1412
PC121 COMP V5IN PC114 PC124 PC122
PR71
9 13 +3VPCU 560u/2.5V_6X5.7 10u/10V_8
0.033u/50V_6 VDDSNS PGOOD *2.2n/50V_6
GND
GND
GND
GND
GND
GND
GND
5VIN 10 15 100K/F_6
VDDQSET CS
9/14 Modify
PR144 21
22
(10u*PR35)/Rdson+Delta_I/2=Iocp
23
24
25
26
27
0_6 PC116
PR140
PR148 *0_6 DIS_MODE *1n/50V_6 5.1K/D_6
PR84
FOR DDR II
0_6 5VIN PR143
+5VPCU HWPG_1.8V (28)
+1.8VSUS PR149 0_6 S3_1.8V S5_1.8V
1
PR139 PC113 9/14 Modify
0_6 0_6
4.7u/6.3V_6
(6) VDDIO_FB_H
PR83 *0_6 2
PR80 *0_6
(6) VDDIO_FB_L PR145
Allen 0929 R2 *110K/F_6
PR146
R1 *76.8K/F_6
B B
R1=(100*Vout-R2)K +1.8VSUS
S3_1.8V S5_1.8V
if tune Vout PR38 un-mount, PR156 PR165 mount
PC117 PC35
*0.1u/50V_6 *0.1u/50V_6
1
2
5
6
MAIND 3 PQ14
(31,35) MAIND FDC653N_NL
8/27 Add CAP for Delay time.

4
+1.8V
A A
PROJECT : BU2
Custom 1A
DDR 1.8V(TPS51116)
NB4
5 4 3 2 1
5 4 3 2 1
PQ12
AOL1414
9/12 Change net to +3VSUS

+1.8VSUS
PC47
0.1u/50V_6
PC48
10u/6.3V_6
5
3
2
1
+5VPCU
+3VSUS
PR110
35
100K_4
4
9338DRV
04/12 Rev:3B Change P/N. PC69 PU4
0.1u/25V_6 RT9025-25PSP
PR89 4 1
+1.2V VPP PGOOD HWPG_1.2V_S5 (28)
0_6 PR109 2 6 +1.2V_S5
(28,31) S5_ON 10K/F_6 VEN VO
D +3VSUS D
+1.2V (3,4,11,12,14,15,33)
PR87 100K_4 3 1A
+3VPCU
2
VIN
4.5A 8
ADJ
PC50 GND
(28) HWPG_CPUIO 3 6 9 5
PGD DRV 0.01u/16V_4 PR95 GND NC PR106
1
PR92 *10K_6 Rg 14.7K/F_6 17.4K/F_6 PC70
7
MAINON 9338EN 4 PD15 10u/10V_8
(19,28,34) MAINON EN +
5
1
ADJ
0.8V
GND
PR88 0_6 +5VPCU 1 Vout1 = (1+Rg/Rh)*0.5
VCC
2
PR94 PC73 PC71 PC72
(28,33) +1.2V_ON PC46 10K_6 *Clamp-VPORT_6 10u/4V_8 0.1u/25V_6 *0.1u/50V_6
2
PU2 Rh PR108
PR93 *0_6 0.1u/50V_6 G9338 34K/F_6
(33) CPU_COREPG
PC52 PC51 PC125
0.1u/50V_6 10u/6.3V_6 560u/2.5V_6X5.7
Vout =0.8(1+R1/R2)
PC49 =1.2V
*1u/16V_6 04/20 Rev:3B Added the Varistor in +1.2V Domain.
9/12 Add CPU_COREPG
+3VSUS
+3VSUS
REV.B Change P/N.
PR164
PR150 +5VPCU *100K_4
+5VPCU 100K_4
PC67 PU10
DEL HWPG_1.5V
PC127 PU8 0.1u/25V_8 RT9025-25PSP
C C
0.1u/25V_6 RT9025-25PSP 4 1
VPP PGOOD T99
4 1 HWPG_1.1V_NB (28)
VPP PGOOD MAINON PR151 2 6 +1.5V
PR98 10K/F_6 VEN VO
(19,28,34) MAINON 2 6 +1.1V
10K/F_6 VEN VO
+1.8VSUS 3
VIN 1.5A
+1.8VSUS 3 2A 8
ADJ
VIN GND
8 9 5
ADJ
GND GND NC PR174

9 5
GND NC PR101 PC152
30.1K/F_6
7
REV.C Change to +1.8VSUS. 13K/F_6 PC61 10u/10V_8
7
10u/10V_8
0.8V
0.8V
PC68 PC139 PC138
PC62 PC63 PC60 10u/4V_8 0.1u/25V_6 *0.1u/50V_6
10u/4V_8 0.1u/25V_6 100K_6 PR175
PR100 34K/F_6
34K/F_6 8/27 Add C for Delay time
Vout =0.8(1+R1/R2)
Vout =0.8(1+R1/R2)
=1.5V
=1.1V
9/12 Modify +3VSUS
VIN +1.8VSUS +3VSUS +SMDDR_VTERM +15V

B B
PR165
+5VPCU *100K_4
PR75 PR85 PR152 PR86 PR103
1M_6 22_8 22_8 22_8 1M_6 PC137 PU9
0.1u/25V_6 RT9025-25PSP
4 1 T100
SUS_ON_G SUSD VPP PGOOD
SUSD (31) MAINON PR105 2 6 +2.5V
3
10K/F_6 VEN VO
3
+3VSUS 3
VIN 0.75A
PR72 8
ADJ
1M_6 GND
2 2 2 2 2 9 5
(28,34) SUSON PC64 GND NC PR158
PQ11 PQ34 PQ13 PQ15 *2.2n/25V_4 73.2K/F_6 PC135
7
PQ10 DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 10u/10V_8
1
DTC144EU
1
0.8V
PC143 PC140 PC66
10u/4V_8 0.1u/25V_6 *0.1u/50V_6
PR157
9/12 Modify 34K/F_6
8/27 Add C for Delay time
VIN +3V +5V +1.8V +15V
Vout =0.8(1+R1/R2)
=2.5V
PR21 PR184 PR186 PR99 PR33
1M_6 22_8 22_8 22_8 1M_6
A A
MAINON_ON_G MAIND
MAIND (31,34)
3
3
3
PR26
2 1M_6 2 2 2 2
(19,28,34) MAINON PC16
PQ6
PQ42
DMN601K-7
PQ44
DMN601K-7
PQ16
DMN601K-7
PQ8
DMN601K-7
*2.2n/25V_4
PROJECT : BU2
1
DTC144EU Quanta Computer Inc.

1

Custom 1A
DISCHARGE (1.25V/1.5V/1.2V)
NB4
5 4 3 2 1

Bu2 System Diagram: AMD Griffin

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Bu2 System Diagram: AMD Griffin

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1 2 3 4 5 6 7 8

FAN FLASH Digital MIC AUDIO CONN SPEAKER

3 CLOCK GENERATOR_SLG8SP628 NBSWON#

14 SB700-ACPI/GPIO/USB 2/4 MAINON KBC(EC) SM BUS

23 MINI CARD & NAND FLASH CARD

30 CHARGER (ISL6251A) CPU POWER OK

31 SYSTEM 5V/3V (ISL6237)

ICS9LPRS480 P/N : Clock chip has internal serial terminations

RTM880N-796 P/N : AL000880000

33p/50V_4 GNDSRC1 SRC2C CLK_PCIE_MINI2_R RP71 0_4P2R_4

CG_XOUT GNDCPU SRC4C

2 54 NBHT_REFCLKP_R RP65 1 2 0_4P2R_4 REFCLK_P 14M SE (1.8V) 14M SE (1.1V)

CLK_PD# 51 64 CLK_48M_USB_R R385 33_4 To SB GFX_REFCLK 100M DIFF 100M DIFF(IN/OUT)*

R4004/R4005 (value may change)

RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11

+3V_CLK_VDD FOR EXTERMAL/INTERNAL CLOCK

D1 VLDT_A0 HT LINK VLDT_B0 AE2

(9) HT_NB_CPU_CAD_H0 E3 L0_CADIN_H0 L0_CADOUT_H0 AD1 HT_CPU_NB_CAD_H0 (9)

(9) HT_NB_CPU_CLK_H0 J3 L0_CLKIN_H0 L0_CLKOUT_H0 Y1 HT_CPU_NB_CLK_H0 (9)

(9) HT_NB_CPU_CTL_H0 N1 L0_CTLIN_H0 L0_CTLOUT_H0 R2 HT_CPU_NB_CTL_H0 (9)

A9 B9 C9 D9 E9 F9 G9 H9 J9 K9 L9 M9 N9 P9 R9 T9 U9 V9 W9 Y9 AA9 AB9 AC9 AD9 AE9 AF9

A8 B8 C8 D8 E8 F8 H8 J8 K8 L8 M8 N8 P8 R8 T8 U8 V8 W8 AA8 AB8 AC8 AD8 AE8 AF8

A7 B7 C7 D7 E7 F7 H7 J7 K7 L7 M7 N7 P7 R7 T7 U7 V7 W7 AA7 AB7 AC7 AD7 AE7 AF7

A4 B4 C4 D4 E4 F4 G4 H4 J4 K4 L4 M4 N4 P4 R4 T4 U4 V4 W4 Y4 AA4 AB4 AC4 AD4 AE4 AF4

Quanta Computer Inc.

C2 D2 E2 F2 G2 H2 J2 K2 L2 M2 N2 P2 R2 T2 U2 V2 W2 Y2 AA2 AB2 AC2 AD2 AE2

A1 C1 D1 E1 F1 G1 H1 J1 K1 L1 M1 N1 P1 R1 T1 U1 V1 W1 Y1 AA1 AB1 AC1 AD1

BGA638_50_26SQ_S1G2_OEM Size Document Number Rev

To SODIMM socket A (near)

To SODIMM socket B (Far)

C391 C395 C400 C393 C198 C94 C222 C223

1000P_4 1000P_4 1000P_4 1000P_4 180P_4 180P_4 180P_4 180P_4

(32) CPU_VDD0_RUN_FB_H F6 VDD0_FB_H VDDIO_FB_H W9 VDDIO_FB_H (34)

Rev:3A/3C 05/09 AMD CPU noise sensitivity be added termination resistor.

CPU H/W MONITOR

Q22 LM86_SMC 8 1 H_THRMDA +3V CPU_TDI 15 16

PROCESSOR POWER AND GROUND

MEM_MA0_CS#1 S0 DQ60 MEM_MA_DATA57 MEM_MB0_CS#1 S0 DQ60 MEM_MB_DATA61

(5) MEM_MA0_ODT0 (5) MEM_MB0_ODT0

VSS7 VSS47 VSS7 VSS47 A2 MEMHOT_DIMM# R375 *0_4

RS780 RS780 Display Port Support (muxed on GFX)

Close to North Bridge

HYPER TRANSPORT CPU I/F

PCIE I/F GFX

SB_REFCLKP R542 0_4 AUX CAL Value need update

*4.7K_4 R150 *1K_4 TV_C/R_SYS

Reserve Pin *BSS138/SOT23 FDV301N R350 2.7K_4 R127 *1K_4 RS740_DFT_GPIO1

R337 *4.7K_4 HDMI_DDC_DATA LVDS_ENA_BL 3 1 INT_LVDS_PWM (17) PROJECT : BU2

RS740/RX780/RS780 POWER DIFFERENCE TABLE 11

VDDA18PCIE NC +1.8V +1.8V AVDDQ +1.8V NC +1.8V

GROUND VDDG18 +1.8V +1.8V +1.8V PLLVDD +1.2V NC +1.1V

VDD18_MEM NC NC +1.8V PLLVDD18 +1.8V NC +1.8V

VDDPCIE +1.2V +1.1V +1.1V VDDA18PCIEPLL +1.2V +1.8V +1.8V

RS780M VDDG33 +3.3V NC +3.3V VDDLT18 +1.8V NC +1.8V

4.7u/6.3V_6 0.1u/10V_4 0.1u/10V_4 0.1u/10V_4

Date: Thursday, April 10, 2008 Sheet 11 of 35

SB700 (18,23,24,28) PLTRST#

PCI EXPRESS INTERFACE

C443 G1 AD7 SB_GPIO65

(10) ALLOW _LDTSTOP ALLOW_LDTSTP

RTC 18P_4 18P_4

ACPI / WAKE UP EVENTS

HD Audio Interface R167

4.7K_4 R150 1K_4 TV_C/R_SYS

Reserve Pin BSS138/SOT23 FDV301N R350 2.7K_4 R127 1K_4 RS740_DFT_GPIO1

LCDVCC1 C369 1000p/50V_4 4.7K_4

1K_4 1K_4 1K_4 1K_4 0_4 0_4

AVLC 18S_4 AVLC 18S_4 AVLC 18S_4 AVLC 18S_4

CB@4.7u/10V_6 CB@0.1u/10V_4 CB@4.7u/10V_6 CB@0.1u/10V_4 A_CFRAME#