Professional Documents
Culture Documents
Chapter 1
Chapter 1
2
The computer revolution
Gordon Moore
Intel co-founder
The number of transistors integrated in a chip has doubled every 18-24 months (1975)
Computer Architecture (c) Cuong Pham-Quoc@HCMUT 4
Intel processors
• As of Q1/2023
– Raptor Lake: 13th generation
– 10 nm technology
• Facts of ENIAC:
– 30+ tons
– 1,500+ square feet (140
square meter)
– 18,000+ vacuum tubes
– 140+ KW power
– 5,000+ additions per
second
ENIAC: Electronic Numerical Integrator and Computer
• High-level language
– Level of abstraction closer to
problem domain
– Provides for productivity and
portability
• Assembly language
– Textual representation of
instructions
• Hardware representation
– Binary digits (bits)
– Encoded instructions and
data
Computer Architecture (c) Cuong Pham-Quoc@HCMUT 13
Technology trends
15
Defining performance
BAC/Sud BAC/Sud
Concorde Concorde
Douglas DC- Douglas DC-
8-50 8-50
0 100 200 300 400 500 0 2000 4000 6000 8000 10000
BAC/Sud BAC/Sud
Concorde Concorde
Douglas DC- Douglas DC-
8-50 8-50
• Response time
– How long it takes to do a task
• Throughput
– Total work done per unit time
• e.g., tasks/transactions/… per hour
• How are response time and throughput affected by
– Replacing the processor with a faster version?
– Adding more processors?
• We’ll focus on response time for now…
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Relative performance
1
Performance =
Execu on me
• Elapsed time
– Total response time, including all aspects
• Processing, I/O, OS overhead, idle time
– Determines system performance
• CPU time
– Time spent processing a given job
• Discounts I/O time, other jobs’ shares
– Comprises user CPU time and system CPU time
– Different programs are affected differently by CPU and
system performance
Computer Architecture (c) Cuong Pham-Quoc@HCMUT 19
Measuring CPU time
• Performance improved by
– Reducing number of clock cycles
– Increasing clock rate
– Hardware designer must often trade off clock rate against
cycle count
∑
Clock cycles = (CPIi × Instruc on counti)
i=1
• Performance depends on
– Algorithm: IC, possibly CPI
– Programming language: IC, CPI
– Compiler: IC, CPI
– Instruction set architecture: IC, CPI, T
ti
Computer Architecture (c) Cuong Pham-Quoc@HCMUT 28
ti
ti
Power trends
• In CMOS technology
Power(P) = Capaci ve load × Voltage2 × Clock rate
10000 3600 120
3900
2000 2667 3300 3400
100
1000
frequency 103
95
Frequency (MHz)
200 87 80
Power (W)
66 75.3 77
100 65 60
25
16 power
12.5 40
29.1
10
10.1 20
3.3 4.1 4.9
1 0
Pentium Pro
Pentium 4
Willamette
Core i5 Ivy
Pentium 4
Prescott
Skylake
Core i5
Kentsfield
Pentium
Clarkdal
e (2010)
(2004)
(2015)
Core i5
Bridge
(1982)
(1985)
(1989)
(1993)
(1997)
(2001)
(2012)
80286
80386
80486
Core 2
(2007)
• Cost/performance is improving
– Due to underlying technology development
• Hierarchical layers of abstraction
– In both hardware and software
• Instruction set architecture
– The hardware/software interface
• Execution time: the best performance measure
• Power is a limiting factor
– Use parallelism to improve performance
Computer Architecture (c) Cuong Pham-Quoc@HCMUT 34