4/25/23, 12:31 PM Computer Architecture Interview Questions - Coding Ninjas

Easy Computer Architecture Interview Questions

1. Explain in brief the categories in which Computer Architecture is divided.

This is the most commonly asked computer architecture interview questions. Computer Architecture can be divided into three categories.

System Design
The System Design consists of all the hardware components of the system.

Instruction Set Architecture (ISA)

ISA is specific to the CPU’s functions and capabilities based on programs it can process.

Microarchitecture
The data path, storage element, and implementation of data processing are defined by the Microarchitecture.

2. What are the types of interrupts in a Microprocessor System?

The three types of interrupts in a Microprocessor System are listed below.

External Interrupts
These come from external devices, whether input or output.

Internal Interrupts
These are caused due to problems in the program.

Software Interrupts
These can occur only when instruction is being executed.

3. Give some examples of the latest processors.

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Some of the latest processors are Intel Pentium Quad-core processors of the i3, i5, and i7 generations.

These technologies keep on updating, and the knowledge regarding them needs to be studied from time to time.

4. Differentiate b/w Motherboard and Chipset.

The motherboard is a printed circuit board inside the system. To hold all the components along with the expansion cards and CPU plugged, we
use Motherboard. Also, connection to USB and all other ports is carried by it.

While Chipset is a part of a particular component integrated into the motherboard. It is further divided into two types, namely, the Southbridge
chipset and the Northbridge chipset. Core System interconnections are handled by the Northbridge chipset; on the other hand, the connection
between the components is handled by the Southbridge chipset.

5. Explain the primary components used by a Microprocessor.

Basically, there are three components used by a Microprocessor.

Address lines
The address lines are essential for getting the proper address of a single block.

Data lines
The elements that are vital for maintaining the main criteria for data transfer are known as data lines.

IC Chips
These are part of microchips essential for data processing.

6. Do you have any idea about Cache Coherence?

Cache Coherence is the consistency of the data kept in the fastest memory that is cache memory. It becomes crucial for Distributed Shared
Memory (DSM) or multiprocessor systems to maintain cache and memory consistency.

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7. Describe MESI.

MESI is one of the most used and efficient coherence protocols that support write-back caches. They manage the bandwidth properly and
maintain one known as the dirty stage, indicating that the data in this cache is not similar to the stored data in the main memory’s cache.

8. What is Cache Memory? Mention its advantages.

Cache memory is like a buffer memory present between the RAM and the CPU. It is extremely fast and makes the working of the system much
faster as it stores frequently requested instructions and data for easy and quick access.

Cache Memory comes in three different levels, that is, L1, L2, and L3.

9. Tell me about Pipelining. Explain it using an example.

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Pipelining is a specialized technique used by an advanced microprocessor to manage and accumulate multiple instructions that enter the system.
These multiple instructions overlap, making it difficult to process a request. Pipelines are used to accumulate instructions from the processor that
are used further for processing a request in an orderly manner.

For example, we consider a car manufacturing company; there is a series of events that take place to manufacture a car. After one task is
completed, the product moves ahead to the next stage. This smooth shift to the next stage is facilitated using pipelines.

10. Describe Real-Time Operating System.

An Operating System that deals with real-time limitations are a Real-Time Operating System. In such an environment where there is a large
number of events taking place at the same time, in such cases, RTOS plays an important role.

For Example, Airline Traffic Control Systems, Command Control systems, Network Multimedia Systems, etc.

11. Explain in brief about Cache Miss.

A Cache Miss is an exception that occurs due to a failed attempt to write or read a part of the data in the cache. This miss results in a delay in
scheduling a process to the main memory.

There are three types of Cache Miss; Cold, Conflict, and Capacity miss.

12. Differentiate between RAM and ROM.

This is basically the most asked computer architecture interview questions. To acknowledge the differences between RAM and ROM, refer to the
table below.

RAM ROM

RAM is short for Random Access ROM is short for Read-Only Memory.
Memory.

It is a volatile memory. it is a non-volatile memory.

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To keep the data, power supply is You can store data and information in ROM, even with
needed. no power supply..

It is high-speed memory. It is slower than RAM.

The stored data can be accessed It cannot be accessed by the CPU in this case.
by the CPU.

It is greater in size and capacity. It is lesser in size and capacity.

Medium Computer Architecture Interview Questions

13. Name the five stages involved in the DLX pipeline.

The five stages involved in the DLX pipeline are listed below.

CPU Operand Storage

Explicit Operands
Operation
Location
Type and size of operands

14. What are superscalar machines?

Superscalar processors are those that perform instruction-level parallelism within a single processor. Multiple instructions are dispatched
simultaneously to several execution units of the processor.

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15. Explain in brief the different types of hazards that can occur?

There are three classes of hazards that can occur while performing a request.

Structural Hazards
These hazards take place when the hardware does not support all possible instructions present.

Data Hazards
These arise when there is an overlap of instructions, and requests can be processed further due to it.

Control Hazards
The pipelining of branches or other instructions that cause some changes in the PC give rise to these hazards.

16. Describe Flip-flops.

Also known as bi-stable multi-vibrators, flip-flops can store one bit of information. There are only two stable states, namely one and zero. Either
they can be in their states or change their state after getting driven by a trigger. Flip-flops get turned on randomly or can be made to turn on in a
particular state. For that, you need to send the CLEAR signal first and then apply PRESET to get the desired state.

17. What are the features of Assembly Language?

Some of the prominent features of Assembly Language are listed below.

Assembly-level languages are easier to understand in comparison to Machine level languages.

The programs written using this language do not facilitate portability.
The application of debugging process is difficult.
The programs written in Assembly Language are widely dependent on the machine.

18. Briefly explain different types of micro-operations.

The different types of micro-operations are listed below.

Register transfer micro-operations

These are used when you want to transfer binary information from one register to another.

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Arithmetic micro-operations
When we want to perform operations on numeric data stored in a register, we use Arithmetic micro-operations.

Logic micro-operations
To perform bit style operations or manipulations on data other than numeric data, we use logical micro-operations.

Shift micro-operations
Shift operations in data stored are performed using shift micro-operations.

19. What are the ways to establish hardware priority?

Basically, there are two ways to establish hardware priority. These are, namely, Daisy chaining and Parallel priority.

Daisy Chaining: It is a form of hardware implementation that follows a polling procedure.

Parallel Priority: It is quicker as it uses a priority encoder to establish priorities. The bits are separated using interrupt signals to interrupt a register
and establish priority.

20. What are the common components that a microprocessor consists of?

The common components that a microprocessor consists of are listed below.

I/O Units
Control Unit
Arithmetic Logic Unit (ALU)
Registers
Cache

21. Do you have an idea about Snooping Protocol?

A Snooping Protocol, also known as the bus-snooping protocol, is used to maintain cache coherency in symmetric multiprocessing environments.
Due to this, numerous copies of a file can be accessed without any issue. All caches snoop or monitor the bus to determine if they have a copy of
the data. That is, each cache has a copy of the sharing status of every block of physical memory.

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Hard Computer Architecture Interview Questions

22. What are VLIW Machines?

VLIW stands for Very Long Instruction Word. It is a CPU architecture designed especially for Instruction Level Parallelism to work with minimum
hardware complexities. The idea is to execute the operations based on a fixed schedule in parallel. This ensures that waiting time is negotiable
and the CPU is used to its greatest capacity.

23. Describe the different types of fields that are part of an instruction.

There are three fields that are used as a part of instruction.

Operation Code Field

This field is also known as the opcode field. It is used to specify the operations to be performed for any instruction.

Address Field
Various addresses are designated using this field, such as register address and memory address.

Mode Field
The Mode Field determines the efficiency of the address and performance of the operand.

24. Name and explain the easiest way to determine the cache locations to store memory blocks.

The computer architecture interview questions can also be asked in this manner. To answer such questions, you should be familiar with mapping.

The easiest way to specify the cache locations for storing memory blocks is Direct Mapping. Each block of the main memory is mapped onto only
one possible cache line. The cache structure is organized into several sets in a manner of a single line per set. Hence, it can also be framed as a
column matrix.

25. Mention the steps involved in an instruction cycle?

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The steps involved in an instruction cycle are as follows.

Fetching
The instructions are fetched from the memory with the help of the CPU and get loaded into the computer along with their addresses.

Decoding
CPU specifies what instruction should be performed and how many operands are needed to be fetched to perform the instruction.

Execution
The instruction is performed at this step using the suitable units of the CPU. It is very useful from the perspective of the consumer.

26. Tell us something about DMA.

DMA stands for Direct Memory Access. It is such a feature of the system that facilitates input/output devices to send or receive data. The data
transmission is done from or to the main memory, bypassing the CPU. A chip known as a DMA controller is used to perform the process.

27. What are the major reasons for pipeline conflicts in the processor?

The major reasons that may cause conflicts in the processor are mentioned below.

The same resources being accessed at the same time by two separate segments results in resource conflicts.
If any instruction is dependent on another instruction’s results, it leads to data dependency conflicts.
A few instructions that are capable of changing the count of the PC lead to several other problems.

28. Describe Addressing Modes.

Addressing Modes determine the ways to compute the effective memory address of any operand. This is done using the information in registers
or/and constants kept within an instruction. You can refer to the flow chart below to have a look at its categorization.

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29. Name several different types of latches.

Several different types of latches are present below.

SR or set/reset latch
Gates SR latch
D latch
Gated D latch
JK latch
T latch

30. Differentiate between Write-back and Write-through cache.

To learn the differences between Write-back and Write-through cache, you can refer to the table below.

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Write-back Cache Write-through Cache

Write-back cache does not flush until that cache line has The Write-through cache
been used for reading. flushes for each write.

It does not protect the integrity of the processors, especially It is comparatively better in
when several processors are accessing the same data. terms of integrity.

It gives a good performance by saving multiple write or It does not have such a good
memory write cycles. performance.

You can also read about Input-Output Processor here.

Conclusion

We believe that you gained some insights on Computer Architecture Interview Questions through this article. These Computer
Architecture Interview Questions and answers are suitable for freshers and experienced candidates.

This set of Computer Architecture interview questions will not only help you in interviews but also would increase your understanding regarding
the same.

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