Professional Documents
Culture Documents
1
General Classification of IC ‘s
ICs
2
Standard IC’s
3
Application Specific Integrated Circuit
4
Application Specific Standard Product
5
When to go for an ASIC ?
6
ASIC Advantages
• Miniaturization
– ASIC can replace the functions realized by a number
of PCBs resulting in size reduction.
• Lesser Inventory
– The reduced number of components per system
reduces the inventory.
• System Reliability
– Lesser number of components are used. Hence lesser
failures.
7
ASIC Advantages
• Performance
– Usage of ASIC will improve system performance like
high speed, more functionality
8
Risk of using an ASIC
• Higher Cost
– The cost per gate of an ASIC is very high
– Turn around time for an ASIC based design is high
– ASIC design requires more time for design and
development.
• Time to market
– The product lead time will be more for an ASIC
based design
– The right product should be introduced into the
market at the right time.
9
ASIC Classification
Full Custom
Semi Custom
Programmable ASICs
10
ASIC Classification
11
Full-Custom ASIC
12
Full-Custom ASIC
13
14
Full Custom ASIC
15
ASIC Classification
16
Semi Custom ASICs
17
Standard Cell - Based ASICs
• Cell based ASIC (CBIC)
• It uses predesigned and pre-characterized logic cells known
as Standard cells.
18
Standard -cell- based ASIC
Advantages
Designers save time, money, and reduce risk by using a
predesigned, pretested, and precharacterized standard-cell
library.
Each standard cell can be optimized individually.
Disadvantages
The time or expense of designing or buying the standard-
cell library
The time needed to fabricate all layers of the ASIC for each
new design
19
Standard -cell- based ASIC
• To customize the chip,
the designer defines
the floor planning and
interconnects.
• Standard cells are
designed to fit like
bricks in a wall.
• Groups of standard
cells fit horizontally
together to form
rows.
• CBIC are built of rows
of standard cells.
20
Standard Cell - Based ASICs
21
Expanded view of Flexible block
Feed through
• If rows of standard cells are long, then vertical power rails can also be run in metal2 through the cell rows
using special power cells that just connect to VDD and GND.
• Designers manually control the number and width of vertical power rails connected to standard cell blocks
during physical design.
Full Custom Vs Semi Custom
26
ASIC Classification
27
Gate Array based ASICs (MGA)
Uses predefined and pre-characterized cells.
28
Gate Array based ASICs
29
Types of Gate-array-based ASICs
30
Channeled Gate Array
31
Channeled Gate Array
I / O Blocks
Array
element
33
Channeless Gate Array (Sea - of - Gates)
34
Channel less Gate Array (Sea - of - Gates)
The net result is that the SOG architecture allows a large number
of array elements to be utilized than a channeled structure for
the same size of die.
35
Structured gate Array
This type of gate array will have some sort of embedded mega functions
like memory in it.
It combines some features of CBICs and MGA(masked gate array).
37
CBIC Vs G A
38
ASIC Classification
39
Programmable Logic Devices (PLD)
40
Programmable Logic Devices (PLD)
macrocell
programmable
interconnect
41
Types of PLDs
42
Why programmable logic?
43
IP COREs
Advantages
No re-invention
Reduced design time
Fast time to market
Fully verified proven blocks
Lowest design risk.
44
IP COREs
Typically cores are available for
45
FPGAs
46
FPGAs
Widely used for low volume production and for design trials
before going for G A or Standard cell ASIC.
47
Characteristics of an FPGA
48
FPGA Structure
IO
CLB
49
Comparison
50