COURSE 111 Introduction to Digital Design

Assignment #: 3

Section #: 16

Submitted by:
1. Ahmed Hafez El-Sayed, V23010322
2. Ahmed Gaber Mohamed, V23010611
3. Ahmed Mohamed Qorany, V23010564
4. Mostafa Khaled Fouad, V23010279

Submitted to TA: Mohamed Elshafey

Date: 7/10/2023
Last experiment in lab4:
(Half adder + 7 segment decoder)

the code is as shown in lab 4 but I just modified the des�na�on of memory files to
fit my setup as shown in
the following screenshot:

the previous table shows us the input binary code and its related decoder output
and the number that will show on seven segment.
When I tested the code using ModelSim the output was correct :
Input 00 => output 0111111 => 0

Input 01 => output 0000110 => 1

But the output was totally wrong when input was 10 and 11
I have tried to modify the text file also but didn’t affect the result at all, and I s�ll
don’t know how to fix this problem.
Assignment:
4-bit Comparator using subtractor:

This code we worked on in

the last lab, figure1-2
show a part of main code
that shows the
parameters that we use.

Figure 1-1 Block diagram of 4-bit Comparator using subtractor

Our parameters

Figure 1-2 part of main code

Test Bench Code:

Here we define our parameters in bench test

Here we instan�ate the device under test

In this part we enter test values that has to enable

zero flag On to test if it works or not and this what we
print too

Here we test nega�ve flag in same way like zero flag

Here we test over flow flag in same way like zero flag
Simula�on Results:

Zero flag is working

nega�ve flag is working

over flow flag has no problem

here too
But a�er all of these tests one problem had appeared that the error massage that
we coded doesn’t work as we planned as shown in next picture.

I’ll be happy to know your advices to solve it and to improve code structure.