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    Warda farooq
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    This document describes a lab experiment to design and implement a 2-bit and 8-bit magnitude comparator. The 2-bit comparator is implemented using basic logic gates like AND, OR, and NOT. The 8-bit comparator uses the 7485 integrated circuit. The theory section explains how magnitude comparators work by comparing pairs of bits from the two input numbers starting from the most significant bit. Truth tables are provided for the 2-bit and 8-bit comparators to show the output signals for all possible input combinations. The procedure describes verifying the logic gates, making the proper connections, applying input test vectors, and observing the outputs.

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    CS302 - Lab Manual - Week No (13)

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    This document describes a lab experiment to design and implement a 2-bit and 8-bit magnitude comparator. The 2-bit comparator is implemented using basic logic gates like AND, OR, and NOT. The 8-bit comparator uses the 7485 integrated circuit. The theory section explains how magnitude comparators work by comparing pairs of bits from the two input numbers starting from the most significant bit. Truth tables are provided for the 2-bit and 8-bit comparators to show the output signals for all possible input combinations. The procedure describes verifying the logic gates, making the proper connections, applying input test vectors, and observing the outputs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    4 views8 pages

    CS302 - Lab Manual - Week No

    Uploaded by

    Warda farooq
    This document describes a lab experiment to design and implement a 2-bit and 8-bit magnitude comparator. The 2-bit comparator is implemented using basic logic gates like AND, OR, and NOT. The 8-bit comparator uses the 7485 integrated circuit. The theory section explains how magnitude comparators work by comparing pairs of bits from the two input numbers starting from the most significant bit. Truth tables are provided for the 2-bit and 8-bit comparators to show the output signals for all possible input combinations. The procedure describes verifying the logic gates, making the proper connections, applying input test vectors, and observing the outputs.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
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    of 8

    Lab Experiment # 13

    Design and Implementation of Magnitude Comparator


    Objective
    To design and implement
    (i) 2 – Bit magnitude comparator using basic gates.
    (ii) 8 – Bit magnitude comparator using IC 7485.

    Parts Required

    Sl.No. COMPONENT SPECIFICATION QTY.


    1. AND GATE IC 7408 2
    2. X-OR GATE IC 7486 1
    3. OR GATE IC 7432 1
    4. NOT GATE IC 7404 1
    5. 4-BIT MAGNITUDE IC 7485 2
    COMPARATOR
    Theory:
    The comparison of two numbers is an operator that determines one number is greater than, less than (or)
    equal to the other number. A magnitude comparator is combinational circuits that compares two

    numbers A and B and determine their relative magnitude. The outcome of the comparator is specified by
    three binary variables that indicate whether A>B, A=B or A<B.

    A = A3 A2 A1 A0 B = B3 B2 B1 B0

    The equality of the two numbers and B is displayed in a combinational circuit designated by the symbol
    (A=B).

    This indicates A greater than B, then inspect the relative magnitude of pairs of significant digits starting
    from most significant position. A is 0 and that of B is 0.

    We have A<B, the sequential comparison can be expanded as

    A>B = A3B31 + X3A2B2 + X3X2A1B1 + X3X2X1A0B0


    1
    A<B
    1
    = A31B3 + X3A21B2
    1
    + X3X2A11B1 +
    X3X2X1A01B0

    The same circuit can be used to compare the relative magnitude of two BCD digits.

    Where, A = B is expanded as,

    A = B = (A3 + B3) (A2 + B2) (A1 + B1) (A0 + B0)


    Logic Diagram:
    2 Bit Magnitude Comparator
    K MAP
    Truth Table
    A A B B A>B A=B A<B
    0 0 0 0 0 1 0
    0 0 0 1 0 0 1
    0 0 1 0 0 0 1
    0 0 1 1 0 0 1
    0 1 0 0 1 0 0
    0 1 0 1 0 1 0
    0 1 1 0 0 0 1
    0 1 1 1 0 0 1
    1 0 0 0 1 0 0
    1 0 0 1 1 0 0
    1 0 1 0 0 1 0
    1 0 1 1 0 0 1
    1 1 0 0 1 0 0
    1 1 0 1 1 0 0
    1 1 1 0 1 0 0
    1 1 1 1 0 1 0

    Pin Diagram For IC 7485


    Logic Diagram
    8 Bit Magnitude Comparator

    Truth Table

    A B A>B A=B A<B


    0000 0000 0000 0000 0 1 0

    0001 0001 0000 0000 1 0 0

    0000 0000 0001 0001 0 0 1


    Procedure

    (i) Verify the gates


    (ii) Connections are given as per circuit diagram.
    (iii) Logical inputs are given as per circuit diagram.
    (iv) Observe the output and verify the truth table.

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