[April-19]

[EEC-346]
B.Tech. Degree Examination
Electronics &Communication Engineering
VI SEMESTER
DIGITAL DESIGN WITH VERILOG
(Effective from the admitted batch 2015–16 onwards)
Time: 3 Hours Max.Marks: 60
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Instructions: Each module carries 12 marks.
Answer all modules choosing one question from each module
All parts of the module must be answered in one place only.
Figures in the right hand margin indicate marks allotted.
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MODULE-I
1. a) Explain different levels of design description in Verilog. 6
b) Define the terms relevant to Verilog HDL
i) Simulation ii) PLI iii) System tasks/ 6
OR
2. a) Explain the keyword ‘module’ used in verilog program in detail. 6
b) With suitable example, explain the synthesis of the following
language construct
i) Compiler directives ii) User defined tasks. 6
MODULE-II
3. a) What is Tri-State Gate? Explain each type of three state gates
with truth table. 6
b) Design a JK flip flop using NAND gate and write verilog code
for it. 6
OR
4. a) Explain about AND GATE PRIMITIVE with an example. 6
b) Describe the following relevant to gate level modeling with
necessary syntax and example.
i) Array of instances of primitives ii) Gate delays 6
 MODULE-III
5. a) Explain continuous assignment structures with example. 6
b) Draw the circuit diagram of switch level CMOS two-input
NAND gate and develop its source code using Verilog HDL. 6
OR
6. a) What is difference between an Intra statement delay and an Inter
statement delay? Explain using an example. 6
b) What are the rules to be followed to declare and use the
bidirectional lines? 6
MODULE-IV
7. a) Implement the behavioral model for Moore-type finite state
machine using Verilog HDL source code. 6
b) Explain about:
i) State machine charts ii) Linked state machines. 6
OR
8. a) Implement the dice game using Verilog HDL. 6
b) Discuss about SM charts using microprogramming. 6
MODULE-V
9. a) Discuss about Xilinx 3000 series FPGAs. 6
b) Explain about CPLDs. 6
OR
10. a) Explain about Altera complex programmable logic devices. 6
b) Design UART using verilog HDL. 6

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