TESTING RF POWER AMPLIFIER DESIGNS

Research and development – characterization – production

eGuide | Version 01.00

THE DEVELOPMENT OF RADIO FREQUENCY POWER A
­ MPLIFIERS ­TYPICALLY
FOLLOWS THREE PHASES: RESEARCH AND DEVELOPMENT (R&D), CHARAC-
TERIZATION AND PRODUCTION.

RESEARCH AND
DEVELOPMENT
 &D typically starts with
R Once actual hardware is
simulation and emulation of
the design. Optimizing the
design is often a combination of
simulation and a measurement-
assisted approach on the very
first devices. This generally
requires the most demanding RF
performance in the entire design
process.
CHARACTERIZATION PRODUCTION
In the production phase,
available from the first series the device needs to meet all
run, the design needs to be specifications so it can be
characterized. This requires a shipped to the customer.
highly accurate and flexible
test solution, which also has to
ensure fast measurements, as
small lots of devices need to be
verified across all operational
conditions.

This eGuide presents the typical measurements and how Rohde & Schwarz test tools support engineers in all three of these phases.
2
CONTENT
RESEARCH AND DEVELOPMENT Distortion CHARACTERIZATION
►page 4 ►page 17 ►page 30

Proven tools for simulation and optimization Optimization options PRODUCTION

►page 4 ►page 18 ►page 32

Key performance metrics Using different amplifier topologies Optimized modulation test for production
►page 5 ►page 19 ►page 32

Compression point and power added efficiency Envelope tracking SUMMARY

►page 6 ►page 20 ►page 34

Intermodulation Doherty amplifier ABBREVIATIONS

►page 7 ►page 21 ►page 35

Intercept point and harmonics Digital Doherty amplifier

►page 8 ►page 22

Noise figure/noise factor Conventional and digital Doherty operation

►page 9 ►page 23

Wafer verification and device modeling Load modulated balanced amplifiers (LMBA)
►page 11 ►page 24

Load pull measurements Linearization

►page 12 ►page 25

Device modeling Optimization through digital predistortion

►page 13 ►page 26

Why modulated measurements? Example of predistortion

►page 14 ►page 27

Deriving EVM
►page 15

Rohde & Schwarz Testing RF power amplifier designs 3

RESEARCH AND DEVELOPMENT
Design process using electronic design automation (EDA) tools

Proven tools for simulation and optimization Fig. 1: Design flow of the design and simulation environment using Cadence VSS software in comparison to
R&S®WinIQSIM2 simulation software can create hardware measurements on the first samples
­signals in line with a large number of digital stan-
Results and/or demodulated data for postprocessing
dards, from 5G to Wi-Fi®. These signals can be
transferred to the Cadence® AWR® Visual System
Simulator™ (VSS).

¸WinIQSIM2 DUT ¸VSE

The VSS offers preconfigured test benches that allow
designers to simulate and optimize the performance Encrypted Encrypted
of RF frontend components, such as power ampli- I/Q files I/Q files
fiers, based on peak-to-average power ratio (PAPR), Cadence® AWR® Visual System Simulator™ (VSS)
adjacent channel leakage ratio (ACLR) and many ¸VSE
Vector signal explorer software
other critical amplifier performance metrics. It also ¸WinIQSIM2
Simulation software
allows developers to identify the source of spurious
products and other system impairments. System-
level load-pull analysis allows designers to optimize
impedance-matching networks for linear power
amplifiers used in wireless communication systems.

After going through the simulated circuitry, the sig-

nals are then transferred to the R&S®VSE vector sig-
RF RF
nal explorer software, a PC based signal analysis soft-
ware tool that looks at the modulation performance
and error vector magnitude (EVM). This test layout is ¸SMW200A
shown schematically in Fig. 1. Vector signal generator ¸FSW
Signal and spectrum analyzer

Cadence, the Cadence logo and the other Cadence marks found at
www.cadence.com/go/trademarks are trademarks or registered trade-
marks of Cadence Design Systems, Inc. All other trademarks are the
property of their respective holders.

4
RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

KEY PERFORMANCE METRICS

Once the first hardware samples have been produced, there are many characteristics to be
measured. To simplify the testing process, it is desirable to use one tool to measure as many of
these characteristics as possible. One such tool is the R&S®ZNA vector network analyzer (VNA),
shown in Fig. 2, which is a single instrument that can verify everything from frequency coverage
to power consumption and from amplification characteristics to noise figure.

A VNA can verify an extensive range of characteristics:

Fig. 2: R&S®ZNA vector network analyzer
► Frequency coverage
► Gain, gain compression, amplitude distortion (AM/AM),
compression point, saturated power
► Phase distortion (AM/PM)
► Power consumption
► Efficiency, power added efficiency (PAE)
► Impedance matching
► Small signal and pulsed S-parameters
► Noise figure
► Harmonics, intermodulation, intercept point

Rohde & Schwarz Testing RF power amplifier designs 5

RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Compression point and power added efficiency
One of the major characteristics to assess is the compression point and power
added efficiency (PAE) across the covered frequency range. It is vital to under-
stand the maximum output power versus the useful power range, because the
maximum output power is already way into saturation and so there are already
very large nonlinear effects. Typically, the 1 dB or 3 dB compression point is
examined to determine how far the amplifier can be used in a linear way before
it goes into compression. Based on the application, either mode can be used.
A 1 dB compression is shown as a threshold in Fig. 3. A VNA can easily complete
that measurement by sweeping the input power and measuring the result on the
output side.
Evaluating the efficiency is achieved by measuring the power consumption at the
power supply towards the test device. The relationship between the output signal
b and the input signal a is assessed relative to the power supplied to the amplifier,
the so-called PAE. This relationship is shown in Fig. 4.

Fig. 3: Compression point and gain measurement Fig. 4: Analysis of power added efficiency

|𝑏𝑏𝑚𝑚 |2 − |𝑎𝑎𝑛𝑛 |2
𝑃𝑃𝑃𝑃𝑃𝑃 = 
Saturation 𝑃𝑃𝐷𝐷𝐷𝐷

PDC

|an|2 |bm|2
U

From VNA To VNA

1 dB receiver port m
source port n

6
RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Intermodulation
Another important point for amplifiers is intermodulation. An amplifier shows
­nonlinearity, which creates intermodulation. Typically for an intermodulation test,
a two-tone signal is used, swept over the frequency range shown in Fig. 5.
Another test is to keep one tone static and move the second tone to the right
and left, changing the offset or variable spacing, as shown in Fig. 6.
This can all be done very quickly with dedicated applications on the VNA in
order to understand the capabilities for handling modulation in a linear way.
The VNA needs to generate the two-tone signal and ideally has an internal com-
biner like the R&S®ZNA to provide the sum signal, avoiding the need for an
external combiner which would require additional calibration.

The third test is to keep the position in the frequency range constant, but also
have one tone fixed and the other changing power levels, going up and down
to determine the effect of the nonlinearity across the entire modulation, shown
in Fig. 7.

Fig. 5: Swept over frequency with constant spacing Fig. 6: Swept tone 2 for variable offsets Fig. 7: Intermodulation test with varying power ratios

Power
Power

Power

Power sweep

Tone 1, Tone 2, Tone 1, Tone 2, Frequency Tone 1, Tone 2, Tone 2, Frequency Tone 1, Tone 2, Frequency
swept swept swept swept fixed swept swept fixed fixed

Rohde & Schwarz Testing RF power amplifier designs 7

RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Intercept point and harmonics Fig. 8: Third order intercept point

Also vital in understanding the linearity of the amplifier is the intercept point mea-
surement. This is often called the third order intercept point (IP3). It is a math- Pout
ematical approximation of the comparison between the linear behavior and how
fast the third order harmonic is increasing. It is a theoretical point based on the
crossover of the wanted curve of the wanted gain translation shown in blue in IP3
Fig. 8, and the red curve which shows how the third order harmonic increases
with higher input power. The further out this intercept point is, the better the char-
acteristic of the amplifier.

Harmonics are measured by running a continuous wave signal into the power
amplifier and measuring its output. Pin

This can be easily completed using a VNA: frequency conversion measurements

of the VNA can be used since the harmonics are two times, three times, four
times etc. the frequency of the original input frequency f0 (see Fig. 9). The spec-
trum analyzer mode in the VNA provides a full spectrum view and allows the Fig. 9: Harmonic distortion is created by nonlinearity in the
detection of any other spurious signals. power amplifier

Power
Second, third and higher order
harmonic distortions

f0 2f0 3f0 4f0 5f0 Frequency

8
RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Noise figure/noise factor
For certain amplifier applications, a critical characteristic is the noise figure, also
called noise factor. The noise figure basically describes the noise added by the
amplifier itself. An example is shown in Fig. 10.
Fig. 10: Noise level introduced by the amplifier minimizes the signal-to-noise ratio
at the output of the amplifier
Power level
Unfortunately, the amplifier itself also adds some white noise. This results in a
reduced dynamic range and a reduced signal-to-noise ratio (SNR). The plot on
the right of Fig. 10 shows that the SNR is reduced compared to the input signal.
The dark blue arrow shows the original SNR while the red arrow indicates by how
much the SNR is reduced. The noise added by the amplifier should be as small as
possible, particularly for low noise amplifiers used in receivers.
To measure the noise figure, we consider the output noise (Nout) versus the input

Power level

noise (Nin) in conjunction with the gain of the device (GDUT) (see Fig. 11).
Sout

Sin
Nout Fig. 11: Output noise compared with input noise

Nin
Sin/Nin GDUT Sout/Nout
Frequency Frequency

On the left is an input signal (Sin) with a certain signal strength, together with
present background noise (Nin). When this signal goes through the amplifier,
everything is amplified with the gain of the amplifier, both the wanted signal
as well as the white band noise.

Rohde & Schwarz Testing RF power amplifier designs 9

RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

To measure the noise figure, there are two different approaches. One is the
Y-factor method, traditionally using a spectrum analyzer (see Fig. 12). The noise
coming through the device is measured when noise is fed in. Two measure-
ments are conducted: one with the noise source turned on and one with the noise
source turned off.
Plotting the two results, a line is taken through the measured points to derive the
noise NDUT added by the amplifier alone.
The second method is called the cold source method, shown in Fig. 13. This uses
a VNA as a source as well as a measurement receiver and measures noise while
the source is turned off and measures gain while the source is turned on.
The calculations are based on noise temperature representation. This looks not
at the noise each component adds to it, but the temperature, which is the corre-
sponding effect of the noise.

Fig. 12: Y-factor method for noise factor measurement Fig. 13: Cold source method of noise factor (F) measurement
GDUT Measurement
Gext Tsource FDUT receiver

DUT
T = TZNA
T = Tamb Calibration Calibration Trec
¸FSW plane plane

𝑁𝑁𝐷𝐷𝐷𝐷𝐷𝐷,𝑚𝑚𝑚𝑚𝑚𝑚𝑚𝑚
Linear noise
power in W

− 𝑇𝑇𝑟𝑟𝑟𝑟𝑟𝑟 𝑇𝑇𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠𝑠 − 𝑇𝑇0

𝐹𝐹𝐷𝐷𝑈𝑈𝑈𝑈 = 𝑘𝑘𝑘𝑘 − 
𝐺𝐺𝐷𝐷𝑈𝑈𝑈𝑈 𝑇𝑇0 𝑇𝑇0
= +

Legend:
Tamb Ambient temperature
Slope = kBGDUT
Tsource Noise temperature of source
TON
source
Noise temperature of source when it is on
Tsource
  
OFF
Noise temperature of source when it is off
= + Trec Noise temperature of receiver
T0 Standard reference temperature as defined by the IEEE: 290 K (16.85 °C)
=
B Bandwidth of the system
k Boltzmann constant (1.38  · 10-23 J/K)
GDUT Gain of the DUT
Noise temperature in K FDUT Noise factor (linear) of the DUT

10
RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Wafer verification and device modeling Fig. 14: Wafer verification using probing
In wafer testing and wafer verification, the first task
is to understand if the wafer run was successful. This
is typically done using the DC parametric test, as well
as some basic RF parameters.

When making RF measurements on an amplifier, the

power amplifier gets warm when in use. This makes it
necessary to focus not on standard S-parameters, but
on pulsed parameters in order to limit the self-heating
of the device. Also, when considering a device on a
wafer, typically there is no matching network around
it. This requires the use of load pull methods to apply
a certain impedance on the input and the output.

To connect to the wafer, Rohde & Schwarz joins

forces with the leading companies in wafer probing:
MPI Corporation and FormFactor (see Fig. 14).

Rohde & Schwarz Testing RF power amplifier designs 11

RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Load pull measurements The behavior changes, but a VNA can still be used to measure vector wave quan-
As mentioned previously, a matching network is required around the device under tities describing the performance and the characteristics of the device. Using load
test (DUT). Load pull techniques add the impedance transformation needed in pull techniques, optimal working points can be derived for the DUT across the
bare-bone test situations (see Fig. 15). impedances applied at its input and output. These are typically plotted on a Smith
chart (see Fig. 16)
Fig. 15: Load pull impedance control to characterize non-
linear behavior of the DUT over different matchings Fig. 16: The electrical parameters of the DUT are mapped on a Smith chart showing
load impedance
VNA
Stimulus and
measurement Equal performance contours

Tuner DUT Tuner

Optimal Zload for
maximum performance
Γsource Γload

ZGaindBDscr
Either passive or active load pull methods can be used. For complete device char- ZGaindB
acterization, load pull is required because the transistors, the core of the amplifier,
are highly dependent on its load impedance. On the input and the output, source
and load pulling allows different impedances to be applied at the DUT.

Power amplifiers are typically used in the nonlinear range where they start to
compress because here they offer maximum output power and best efficiency.
Unfortunately, in this area, small signal characterization of the power amplifier is
no longer valid due to nonlinear effects.
IndexGaindB
IndexGaindBDscr

12
RESEARCH AND DEVELOPMENT
Device verification using continuous wave signals

Device modeling Fig. 17: FET compact model representing the equivalent electrical circuit of
When taking the power amplifier into a larger environment and starting to simu- the transistor
late this, a good model for the amplifier is required. There are two methods:
Gate Rg Cgd /Cdg Drain
Method 1
This is a compact modeling approach, where small signal effects are measured Cjd
and the linear behavior is examined.
Cgs gm gds Cds
Rsubd
This method is described in terms of particular capacitance and resistance effects
which are used to create a model, for example, as shown in this field effect tran-
sistor (FET) compact model (see Fig. 17).

Method 2 Source = body

This method is called a behavioral model or a black box approach (see Fig. 18).
Here, only the transfer function from the input to the output is described, with no Fig. 18: The black box model takes account of
details of the different effects inside the transistor. the harmonics and different ­impedance effects
Black box model
This approach also considers harmonics and different impedance effects. These
are typically measured with a nonlinear VNA approach measuring wave quanti-
ties. They work not only for the linear but also for the nonlinear range of the DUT. Transfer Output
Input f0 + 2f0 + 3f0, …
f0 function
+ distortion

Rohde & Schwarz Testing RF power amplifier designs 13

RESEARCH AND DEVELOPMENT
Device verification using modulations

Why modulated measurements? Fig. 20: A test setup using the target signal waveform analyzes the behavior of
In the traditional approach where a VNA is used for continuous wave measure- the device
ments, a lot of information and characteristics can be gained from the device (see
Reverse Forward in Forward out
Fig. 19). However, with extremely wideband modulation schemes seen today with
5G or the latest Wi-Fi® additions, there can be a high bandwidth with a couple of
hundred megahertz. This means that the behavior of the amplifier c­ annot easily be
verified by means of CW testing alone.

Fig. 19: The traditional approach uses a VNA to make continuous wave measurements

¸SMW200A ¸FSW

This setup measures:

∆Frequency ► Channel power and gain plus input matching
∆Power

► Adjacent channel leakage ratio (ACLR)/adjacent channel power (ACP)

► Modulation performance: EVM
► Distortion: AM/AM and AM/PM

Adjacent channel leakage ratio (ACLR) measurements determine the chan-

nel power and adjacent channel power (ACP). Amplifiers can cause spectral re-
growth to occur in adjacent channels, so it is important to characterize how much
power an amplifier contributes to adjacent channels.

EVM describes how linearly the wideband modulation signal is being amplified,
ensuring low bit error rates and high data throughput in the target application.
Ideally, the target scenario with the target signal waveform would be used in
order to understand the behavior of the device. The test setup typically looks like
that shown in Fig. 20. This uses a vector signal generator, feeding the wideband
modulation signal into the device with the spectrum analyzer on the other side,
demodulating the signal to get the characteristics of the device under real target
conditions. Power sensors are often added to get highly accurate gain and match-
ing information.

14
RESEARCH AND DEVELOPMENT
Device verification using modulations

Deriving EVM Method 2

There are two different methods to derive EVM.
Method 1
RMS EVM, also called raw EVM, looks at the differences in output versus input
signal sample by sample (see Fig. 21).
The other approach is the demodulation EVM, which follows standard based
demodulation procedures like 5G or Wi-Fi® (see Fig. 22). With this, there is no
need to provide the baseline I/Q file as a reference because it knows what type
of modulation to expect. It compares the received sample point with the closest
constellation point.

Fig. 21: Deriving EVM with the RMS method Fig. 22: Demodulation EVM method

It is a very fast measurement and allows the worst case EVM numbers to be cal- The advantage of the demodulation method is that it is very well defined in the
culated in the most efficient and the most correct way, no matter how large the standards. These definitions include how to measure and what type of filtering is
error vector is. However, it does require access to the original input I/Q data. used, etc. This allows comparison between different scenarios and also between
different vendors.

Rohde & Schwarz Testing RF power amplifier designs 15

RESEARCH AND DEVELOPMENT
Device verification using modulations

However, to fully characterize the device, EVM is not the same at different input
and output levels. EVM is a function of input power and gain and thus also output
power. To mitigate this, it is often plotted in a so called “bathtub curve”, which is
created in R&D and characterization.
At the upper power level of the device, it is getting close to its saturation point
leading to compression, so the performance is no longer as good and there is an
increase of EVM. At the middle of the trace range is the ideal section with the
best performance EVM. This range should be as wide as possible.
At the lower end, the signal-to-noise ratio degrades based on lower input. Here,
EVM increases again. The shape of the curve gives it the name “bathtub” (see
Fig. 23).
This curve is often plotted for different temperatures and different working points
based on system optimization goals such as gain, maximum power, EVM and
lowest noise.

Fig. 23: Error vector magnitudes plotted on the “bathtub” curve

0
EVM in dB

–5
–10
–15
Low SNR
–20
–25
Compression
–30
Ideal EVM
–35
–40
–70 –60 –50 –40 –30 –20 –10 0 10
Generator level in dBm

16
RESEARCH AND DEVELOPMENT
Device verification using modulations

Distortion Fig. 24: AM/AM and AM/PM curves

When measuring amplitude or phase distortion in a modulated world, there is no
need to sweep the input power, but the signal fidelity is beneficial due to its mod-
ulation by simply capturing a certain time duration. Thus, there is usually a large
variance on the power levels as well as a good distribution, and the AM/AM and
AM/PM curves can be directly derived as shown in Fig. 24.

Rohde & Schwarz Testing RF power amplifier designs 17

RESEARCH AND DEVELOPMENT
Amplifier optimization

Optimization options Fig. 25: Crest factor curves showing the low probability of the highest peaks
There are many different options for optimizing an amplifier, but the method cho- in the signal
sen is always dependent on the target application. This means that if only CW
signals or pulsed signals without any modulation are the main interest, then the
focus can be on maximum output power and efficiency and there is no need to
be concerned with modulation linearity. This means the amplifier can be used very
close to saturation and can provide the highest possible output power.

This contrasts with the modulation world, where there is a need to back off in
order to allow signal fidelity and still have linear amplification. Ideally, optimiza-
tion methods and simulation can be considered in the very early design phase fol-
lowed by optimization on the hardware with a measurement added approach.

There are different options to do this. One is called waveform engineering, which
uses different amplifier classes known as class A, class B, etc.

Another method is a user-defined crest factor reduction where some of the peaks
are cut off to make it easier for the amplifier.

A further common scenario is to use different topologies. These include envelope

tracking, Doherty amplifiers or load modulated balanced amplifiers.

Linearization with digital predistortion is often used on top.
Crest factor reduction (CFR)
The crest factor describes the ratio between the peak and the average power in
the signal (see ­Fig. 25). These peaks are pretty rare, but in order to transmit the
whole signal very linearly, they need to be kept in the linear range of the amplifier.
When the signal into the amplifier is modified by cutting off some rare peaks,
the effect on the signal content is minimal. These compressions can create
intermodulation, meaning an expansion of the signal spectrum. Another issue
with these high peaks lies not only with the amplifier but with the digital side
where headroom must be provided to allow for the rare peaks. In order to run
CFR effectively and reduce side effects, filtering is also applied to counter the
spectral expansion.

18
RESEARCH AND DEVELOPMENT
Amplifier optimization

Using different amplifier topologies Fig. 26: Basic types of power amplifier topologies, including hybrids
The next major method makes use of different topologies – not seeking to modify
Carrier PA
the input signals but to change how the amplifier is structured (see Fig. 26). One
very common method is constructing a signal from two or more efficiently paired Baseband
amplifier blocks. There are three main types, as well as some hybrids. +
Doherty
DAC
combiner
+
The three main types with their functions: Modulator
► Envelope = multiplication
► Outphasing = summation Peaking PA

► Doherty = reference
Digital
Doherty
There is also a new type, the load modulated balanced amplifier (LMBA).
Classic Programmable
Doherty split Doherty

Bias modulated Doherty

Doherty outphasing
continuum
ET and
Doherty Doherty
Envelope outphasing
tracking (ET) continuum Outphasing
and ET

Load modulation Chireix

Multilevel
Envelope restoration (ER)/ outphasing Linear amplification
Envelope elimination and using nonlinear
restoration (EER) components (LINC)

Envelope PA Efficient RF PA

Baseband Baseband
+ +
Outphasing,
DAC DAC
Chireix, isolated
+ +
Modulator Modulator

RF PA Efficient RF PA

Rohde & Schwarz Testing RF power amplifier designs 19

RESEARCH AND DEVELOPMENT
Amplifier optimization

Envelope tracking
This method is very common in designs for battery powered devices like mobile
phones (see Fig. 27). The idea is not to provide constant power to the amplifier as
a power supply, but that the power supply follows the envelope of the RF signal.

To avoid a lot of energy being dissipated as heat as shown in Fig. 28, the power
provided to the amplifier follows the signal envelope, making it much more effi-
cient. The challenge is to achieve high speed tracking, which is typically in the
range of three times the signal bandwidth.

Fig. 28: The power provided to the ampli-

fier follows the signal envelope
Fig. 27: Test setup for envelope tracking
Constant supply voltage Energy
¸FSW
¸SMW200A dissipated
as heat
Pout

RF A RF signal PEPin
Vcc
Īout Iout
(rear panel) (rear panel) DC
RF signal
Vout V modulator
Vpp
Envelope signal (E)

Inverted envelope signal (Ē)

20
RESEARCH AND DEVELOPMENT
Amplifier optimization

Doherty amplifier Fig. 29: Two paths of the Doherty amplifier

A Doherty amplifier is very commonly used on infrastructure scenarios and is a
very well-known efficiency enhancement method.
Doherty
It combines two amplifiers – one arm is used for the RMS power and the other Main PA combiner
for the peaks in the signal (see Fig. 29). The main path serving the RMS portion
can be used close to saturation in order to achieve greater efficiency and leave the
auxiliary amplifier with a larger headroom for the peaks.

There are two extremes of a Doherty design: classic and digital. The classic has
one input as shown in Fig. 30. It then has a fixed splitter with fixed behavior
between the auxiliary and the main PA and afterwards the signal passes through
a Doherty combiner. Typically, these use different biased devices as power ampli- Auxiliary PA
fiers with different behaviors.

Fig. 30: Classic Doherty amplifier

Analog Doherty
DSP unit splitter Main PA combiner

DAC Upconverter

Auxiliary PA
Input side Output side

Rohde & Schwarz Testing RF power amplifier designs 21

RESEARCH AND DEVELOPMENT
Amplifier optimization

Digital Doherty amplifier Fig. 31: Digital, dual input Doherty amplifier
The other extreme is the digital Doherty amplifier (Fig. 31). There are two different
channels driving the amplifier, so the signal is split not with a fixed analog split- Analog Doherty
ter but in the digital domain. This is used to drive two separate signals to the main DSP unit DAC Upconverter splitter Main PA combiner
and to the auxiliary amplifier.

In this way, the signal behavior can be better optimized and the amplifiers can
be better positioned at the optimal working point. This creates greater efficiency
when developing such a Doherty amplifier. Rohde & Schwarz proposes a mea-
surement added design process to better understand how the two paths work
together to achieve the targeted design, regardless of whether the goal is a tradi-
tional splitter or a digital Doherty implementation. Auxiliary PA
Input side Output side

The proposal is to use two signal generation paths, which can be easily done
with a vector signal generator with two channels providing a signal for the main
and for the auxiliary power amplifier (see Fig. 32). This allows measurement of
the contour plots over amplitude and phase relation between the two signals, for Fig. 32: A dual path vector signal generator provides insight into a digital Doherty
example, for saturated output power, in order to find the best conditions between power amplifier
the two amplifiers. This can be applied not only to saturated power, but also to
Main PA
efficiency, ACLR and any other metric of interest.

Doherty
combiner

¸SMW200A ¸FSW

Auxiliary PA

22
RESEARCH AND DEVELOPMENT
Amplifier optimization

Conventional and digital Doherty operation Fig. 33: Doherty amplifier possible outcome
Unfortunately, the optimal working point for efficiency is not best for saturated
power or for ACLR. However, with the measurement added approach, the behav- Conventional operation
ior across all metrics is available, allowing an informed decision with regard to the
design.

A possible outcome of a Doherty design with a conventional mode of operation

is shown in Fig. 33. Underneath is the digital Doherty design in the best possible
way. Shown in the two plots is gain compression at the top and phase variance
at the bottom. Ideally, the phase variance should be as flat as possible, while the
gain compression should be pushed out as much as possible.

The amplifier needs to exhibit linear behavior as long as possible, and the d­ igital
Doherty operation shows a more than 1 dB extension of the maximum output
power. This allows better specification of the device or a different device with the
same setup or a lower power class device to save energy, resulting in reduced
cost.
Digital Doherty operation

Rohde & Schwarz Testing RF power amplifier designs 23

RESEARCH AND DEVELOPMENT
Amplifier optimization

Load modulated balanced amplifiers (LMBA) Fig. 34: Load modulated balanced amplifier
To extend the bandwidth over which a certain performance is possible, LMBA is
BPA CSP
increasingly being considered as a way to achieve this (see Fig. 34).
3 dB 3 dB Pin, C
Pin 90° 90°
There are two balanced amplifiers plus a control signal power driver which is
injected on one of the outputs to create the load modulation. This concept offers
very large bandwidth coverage, even up to 100 %.
Pout
To reduce the number of components, a new variant called an orthogonal LMBA
has been developed (see Fig. 35). This uses a different input for the control signal, BPA
not on the load side but on the input side, and adds a fixed or a tuned load on the
output. Fig. 35: Orthogonal LMBA
PA
Obviously, the tuned load on the output can also be used for large variance, also jX
for a measurement campaign in order to best understand what should be used for Pin
load modulation in the target application.

Pin, C Pout

PA

24
RESEARCH AND DEVELOPMENT
Amplifier optimization

Linearization Fig. 36: Targeted distortion plots

The aim of linearization is to keep the output linear for as long as possible – the
output should resemble a sled line until it hits something like a brick wall on the AM to AM distortion plot
AM to AM distortion plot, whereas the AM to PM distortion is ideally zero (see
1
Fig. 36).

AM/AM in dB
0
Different linearization methods are available, including Cartesian, polar feedback,
–1
analog and digital predistortion as well as feedforward.
–2

–3
–10 –8 –6 –4 –2 0
Output power in dB

AM to PM distortion plot

10

AM/PM in °
5

–5

–10
–10 –8 –6 –4 –2 0
Output power in dB

Rohde & Schwarz Testing RF power amplifier designs 25

RESEARCH AND DEVELOPMENT
Amplifier optimization

Optimization through digital predistortion Fig. 37: Predistorting the signal to compensate DUT characteristics
Digital predistortion (DPD) is particularly common nowadays, as it allows more
DUT
flexibility in topology. This is important because some topologies, including
LMBA, exhibit certain behavior where linearization is absolutely necessary (see Input Predistorted Linearized
DPD
Fig. 37). signal input signal output signal

The goal is to achieve optimal behavior between input and output signal as shown Feedback loop
by the orange line in Fig. 38. Thus, the input signal undergoes predistortion with
the inverse function (shown in grey) of the blue DUT curve. The result will be the
black dotted line with the ideal brick wall characteristic. Fig. 38: Overview plot showing measured AM/AM, ideal output
­signal, predistorted input signal and hard clipped output signal
1

Output amplitude in dB
Measured AM/AM
0 Ideal output signal
–1 Predistorted input signal (limited)
Output signal (hard clipped)
–2
–3
–4
–5
–6
–7
–8
–9
–10
–10 –8 –6 –4 –2 0
Input amplitude in dB

26
RESEARCH AND DEVELOPMENT
Amplifier optimization

Example of predistortion Fig. 39: Plot showing improvement in the ACLR characteristic of an amplifier without
If an amplifier is used close to compression where efficiency is highest, non- predistortion (black) and with predistortion (blue)
linearity is also highest. This means we need to compensate and use lineariza-
tion. Ideally when designing a power amplifier, we want to understand how well
we can linearize its behavior – how good can the amplifier behave with proper
predistortion using EVM and ACLR as figures of merit?

Rohde & Schwarz offers an easy way to understand how good an amplifier can
behave with an ideal predistortion. The input signal is manipulated in an iterative
process to achieve the best result for a given operating point.

What effect does this have? Fig. 39 shows an exemplary improvement in the
ACLR characteristic of an amplifier without predistortion (in black) and with
predistortion (in blue).

Rohde & Schwarz Testing RF power amplifier designs 27

RESEARCH AND DEVELOPMENT
Summary of the research and design phase
In the research and development phase, optimizing
the design is often a combination of simulation and
a measurement-aided approach on the very first
devices. This typically requires the most demanding
RF performance throughout the entire design process.
One of the major phases in R&D is device verification
and optimization. There are many characteristics to be
measured and so it is best to use one tool to measure as
many of these characteristics as possible. Such a tool is
the VNA.
28
Devices can be verified using continuous wave signals
or modulation techniques. Although continuous wave
techniques can provide a lot of information about the
device, modulation allows us to see how the device will
perform within 5G or Wi-Fi® applications.
Optimization is another major topic, involving the use
of techniques such as waveform engineering, CFR and
different amplifier topologies such as Doherty amplifiers.
Linearization and predistortion are also major techniques
used to optimize the design before the characterization
phase.
Rohde & Schwarz Testing RF power amplifier designs 28
CHARACTERIZATION

In characterization, the aim is to ensure that not only one device or a small sample Fig. 40: A complete power amplifier test stand
meets the design goals, but a larger sample size is checked before releasing the
¸ZNA
product for production.

Specifications and performance figures also need to be derived and verified at this
phase.
PA
Another important point in characterization is to better understand the character-
istics of the device over frequency, level and temperature.

In characterization, the RF metrics examined are the same as those in research ¸SMW200A ¸FSW
and development and so also need similar test setups. In Fig. 40, a vector net-
¸NRP ¸NRP ¸NRP
work analyzer (VNA) is used for CW measurements and also impedance match- Power sensor Power sensor Power sensor
ing measurements. On the other side there is a vector signal generator (VSG) and DC power Bias
vector signal analyzer (VSA) for the modulation measurements and also a power
supply, which is able to measure the power consumption of the test device for
Trigger for bursted power
efficiency measurements. Trigger for PAE synchronization
¸NGP800
Power supply series
Active devices require diversified characterization using CW and modulation tests,
and typically they are conducted as shown in Fig. 40 in one or two separate test
stations for CW and modulated tests.

However, having one connection to the DUT for all tests allows faster and
smoother testing without recabling.

Rohde & Schwarz Testing RF power amplifier designs 29

CHARACTERIZATION

To obtain vector corrected results for CW and modulation measurements such as

EVM, we suggest using a system as shown in Fig. 41 with a signal generator on
the left, signal analyzer on the right and the vector network analyzer at the bot-
tom. Couplers are used for interconnecting the devices. Once everything is cali-
brated, the different measurements can all be performed in an automated setup.

Typically, stress testing is also performed using defined highly accelerated lifecy-
cle test (HALT) techniques – stress testing with vibration, temperature, humidity,
but also with excessive input power.

Here, the stress is gradually increased, and the resulting performance is checked.
This helps determine the limits of the DUT. It also gives a better understanding of
the behavior of the device before it fails, giving an indication of the expected life-
time of the product.

Fig. 41: Test setup for vector corrected measurements of CW and EVM

DUT
1 2 3 4 5 6 7 8

¸SMW200A 9 11 ¸FSW
10 12

¸ZNA

30
PRODUCTION
Testing in production is concerned with measuring each component accurately,
ensuring proper functioning and meeting the target specifications. Another focus
is on the throughput and speed of measurements to reduce costs – because of
this, repeatability from one sample to the next is more important than absolute
measurement accuracy.
Production testing is typically done in two different phases. Testing is initially con-
ducted at wafer level in order to ensure that the wafer run is successful before
packaging for final testing. This is followed by full testing of the packaged device.
The test procedures are often based on the characterization test, looking at criti-
cal performance points. Parallel testing of devices helps increase throughput, for
example using instruments such as a multiport VNA.
Fig. 42: Test setup optimized for CW
VNA such as ¸ZNA
PA
DC power
Trigger for PAE synchronization
¸NGP800
Power supply series
Typically, the focus of a test station is on CW only or modulation only approaches
in order to simplify the test setup and also to reduce costs. The test setup in
Fig. 42 is optimized for CW.
In production, load boards offer connection to one or multiple test devices. This
addresses RF, DC and control signals to enable proper testing. The load boards
may also include additional circuitry to provide the required voltages or matching
needed for the different test devices.
This means that calibration down to the DUT port is important and makes de-
embedding of the components necessary. Absolute accuracy is purely based on
the calibration of the whole system. One downside, which typically comes with
longer cables and signal lines, is loss of power and thus sensitivity.
Therefore, high measurement repeatability as well as a signal-to-noise ratio suf-
ficient to meet required measurement accuracies are essential. However, another
aim is to minimize costs by using a more economical version of the R&D and
characterization test approaches.
Rohde & Schwarz Testing RF power amplifier designs 31
PRODUCTION

Optimized modulation test for production Fig. 43: Performance optimized modulation test setup
In the characterization and production phases, test operators will benefit from an
easy-to-use one-box transceiver solution that consolidates all the necessary func-
tionality including signal generation and analysis, while also fulfilling the RF per-
formance criteria for characterization (see Fig. 43 in comparison to Fig. 44).
¸SMW200A ¸FSW
Here the focus is on speed optimization for improved throughput, lower footprint
and minimized cost per test while maintaining the right level of RF performance ¸NRP ¸NRP ¸NRP
Power sensor Power sensor Power sensor
for production.
DC power Bias voltage
Important is the correlation between the setups used along the value chain. Using
the same algorithms for signal creation and analysis in the reference station from Trigger for bursted power Trigger for PAE synchronization
the R&D phase as in the production station helps maintain the correlation. Such ¸NGP800
a laboratory reference test station, consisting of an R&S®SMW200A vector signal Power supply series
generator and an R&S®FSW signal and spectrum analyzer, is shown in Fig. 45.
Fig. 44: Speed and size optimized modulation test setup
In this integrated transceiver approach, faster testing is enabled by means of
PVT360A
direct synchronization between the VSG and VSA function inside the transceiver. Transceiver
Ideally, test scripts can be executed directly on the transceiver to improve speed
and throughput.
PA
Rohde & Schwarz has created the PVT360A performance vector tester to meet
these requirements (see Fig. 46).

Optimized for RF component testing, it offers a compact rack-sized enclosure DC power Bias voltage
allowing easy use on any production line. A second optional transceiver can be
housed inside to allow full parallel tests on two different devices. Trigger for bursted power Trigger for PAE synchronization
¸NGP800
Power supply series

32
PRODUCTION
To streamline the characterization of complex RF components in a production
environment, the PVT360A combines features and performance such as EVM
measurement, frequency range and modulation bandwidth streamlined for pro-
duction applications. It is designed to minimize test cycle time, improving the
throughput in production. The vector signal generation and analysis capabilities of
the instrument allow a synchronized approach that both accelerates testing while
also ensuring maximum performance.
Fig. 45: A reference test station suited to laboratory testing based on
the R&S®SMW200A and R&S®FSW
The features that support automated testing procedures and ensure precise mea-
surements help streamline the production process and enforce consistent test-
ing protocols. By ensuring that components are evaluated according to predeter-
mined specifications, testing reduces variability and increases the reliability and
quality of the produced components.
Its integrated switch matrix on top of the two internal transceivers with up to
16 ports allows not only parallel testing of two devices but also fast switching
between different ports of the device as well as connecting to multiple DUTs on
one load board.
Fig. 46: PVT360A performance vector tester
Rohde & Schwarz Testing RF power amplifier designs 33
SUMMARY
►  combination of CW and modulation testing with different approaches
A
is needed for the most efficient and complete testing
► Specialized scenarios are required for specific topologies like Doherty
► L inearization is developing rapidly to improve performance and allow
more freedom in power amplifier design
►  eplicating a laboratory reference test station in a single, production-
R
optimized box makes testing of production units easier, faster and more
efficient with results you can trust

34
ABBREVIATIONS
ACLR Adjacent channel leakage ratio
ACP Adjacent channel power
BPA Balanced power amplifier
CFR Crest factor reduction
CSP Control signal power
CW Continuous wave
DAC D/A converter
DPD Digital predestortion
DUT Device under test
EDA Electronic design automation
ER Envelope restoration
EER Envelope elimination and restoration
ET Envelope tracking
EVM Error vector magnitude
FET Field effect transistor
HALT Highly accelerated lifecycle tests
LINC Linear amplification using nonlinear components
LMBA Load modulated balanced amplifier
PA Power amplifier
PAE Power added efficiency
PAPR Peak-to-average power ratio
SNR Signal-to-noise ratio
VNA Vector network analyzer
VSA Vector signal analyzer
VSG Vector signal generator
Rohde & Schwarz Testing RF power amplifier designs 35
About Rohde & Schwarz
The Rohde & Schwarz technology group is among the
trailblazers when it comes to paving the way for a
safer and connected world with its leading ­solutions
in test & measurement, technology systems and
­networks & cybersecurity. Founded more than 85 years
ago, the group is a reliable partner for industry and govern­
ment customers around the globe. The independent com-
pany is headquartered in Munich, Germany and has an
extensive sales and service network with locations in more
than 70 countries.

www.rohde-schwarz.com

Rohde & Schwarz customer support

www.rohde-schwarz.com/support

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3608.0391.92 01.00 PDP/PDW 1 en
R&S® is a registered trademark of Rohde & Schwarz GmbH & Co. KG
PD 3608.0391.92 | Version 01.00 | November 2023 (jr)
Trade names are trademarks of the owners
Testing RF power amplifier designs
Data without tolerance limits is not binding | Subject to change
© 2023 Rohde & Schwarz GmbH & Co. KG | 81671 Munich, Germany