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*******SION SEMICONDUCTORS*******
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Commands list:

1):-For sample code compilation, simulation commands

2):-Steps for code coverage compilation, simulation commands

3):-Steps for code coverage compilation, simulation commands

4):-Assertions code compilation/simulation commands

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vlib work // create work command

vlog filename.sv //compilation command

vsim top_module_name //simualtion

vsim module_name -l any_name_for_logfile.log // for saving transcript result in

log filename

do run.do // In do file, write all the commands(compile cmd, simulation cmd, addto
wave cmd, run-all cmd) in transcript type dis command

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For code coverage

compile all

vlog -coveropt 3 +cover +acc dut_filename.sv top_module_filename.sv

vsim -coverage -novopt top_modulename

check analysis window with selecting diff types of code coverage

check instance coverage window

generate code coverage text report (Tools->coverage report -> Text format->select
appendtofile)

0r

else generate html coverage report (Tools->coverage report - html format)

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For functional coverage

compile all

vlog -coveropt 3 +cover +acc dut_filename.sv top_module_filename.sv

vsim -coverage -novopt top_modulename

Analysis covergroup window check how many bits r hitted

Generate html coverage report (Tools->coverage report - html format)

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For assertion commands

compile all

vlog +acc filename.sv

vsim -assertdebug top_module_name

view -> coverage -> click on assertions -> open assertion window -> select
assertion labels -> add to -> objects in design

run -all

check assertion flags on waveforms

Green flag - assertion passed

Red flag -assertion failed

Blue flag - assertion inactive

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