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Power System Technology POWERCON 2004
Singapore, 21-24 November 2004
This work was supported in part by The Research Fund for the Doctoral
Program of Higher Education, the State Education Minishy of China (No.
2OO10079OO t ).
Yin Ming, Li Gengyin, Li Gumgkai, Liaug Haifeng, and Zhou Ming are
with the School of Electrical Engineering, No& China Electric Power
University, Baodiug 071003, Hebei, P.R.China (e-mail: routoute@sina.com,
ligy@cepu.edu.cn, Igk@ucepu.du.cn, hniang@ncepu.edu.cn) Fig. 1. Principle diagram of VSC-HVDC
m.MATHEhfATIC MODELOF V s c - m C
For the rectifier, there exist the following voltage equations
in the form of dq synchronous M e .
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At h t , V& the voltage across the DC terminals of VSC2 is of the AC current, relatively. OL is the reactance of the
measured and compared with Yd~rrf.the reference value to transformer.
produce an error. Then, the error, after passing an integrator In the predetermined synchronous reference h e , (2) and
paralleled with a first order block, is used to generate the (3) can be written as
phase shift signal for the PWM actuator. Ai the same
time, V, the AC voltage is also controlled through a PI
controller to produce the modulation index Mi.
The paper is to give a more detailed explanation of the
power control strategy in the following sections.
A. Cumen#References
In the following analysis, we align the dq-axis in such In order to decouple the d- and q-axis, we use feed forward
direction that the g-axisis in phase with the AC source voltage, technique to compensate the cross-coupling terms cui;: and
i.e. v,4 = vSl = 0 . So, (6) and (7) can be written as Wi;: iu (17) and (18). The d- and q-axis components of the
AC source voltage ( V," , :
V ) are regarded as two constant
perturbations and should be compensated by the integral part
of the PI controller. Here, defme two new inputs vd and vpas
vd = -vk, 119)
where ii, i: are active current component and reactive vq = -OIL, ii + vJ1- v k l (20)
current component,respectively.
Therefore, two independent Wt-order models in the d- and
In the proposed active power controller, the actual active
q-axis directions are obtained 161, as shown in (21) and (22)
power from the AC system to the DC link is calculated out by
the current and voltage of the AC source,as shown in (16) RI)$
vd = (SL, i- (21)
v4 +
= (sL, R,)ii (22)
For symmetric three-phase system, the result of (14) where s is the Laplace operator.
equals to what derived ftom (15). Assume pmf is the active Based on the models, two separate current loops are
power reference. The error of active power (prpf-pl) is passed obtained which have two similar PI controllers designated PI2
through the PI controller to generate the signal value of q-axis
and PI3. So, we can see that each loop comprises one branch
current component iArzr.The d-axis current refaence is given of the corresponding current component with a feedback
by reactive power reference qM control of the AC current controI, one branch with a feed
forward compensation for the crossing-term in the voltage
B. Conwol Shucfure balance equations. The PI controllers are not output limited
The active power control block diagram is illustrated in and generate control signals 4 and VP. The summation blocks
Fig.3. The reactive power is also controlled with a simple use the control signals and (19) and (20) to compute vLnl
open loop by adjusting the reactive current in the d-axis. The
AC currents and voltages bave been transformed fiom the and vLl, According to (4) and (5), M, and 6,can be worked
three-phase obc system into the two-phase synchronous dq out for the modulating signal.
reference plane through the Park's transform.
C. Phare Locked Loop (PLL)
The phase locked loop, in dependence on the sensed value
of the angular frequency w of the AC source and of the phase
position of the AC system voltage, generates a synchronizing
signa1 6. The synchronizing signal has the importance in
synchronizing the 4 reference plane with the AC source
voltage ubc system. Thus, when 5 is in synchronism with the
phase of the source voltage, the rotating dq reference plane is
locked and maintained in synchronism with the three-phase
nbc system. Under this condition, the d-component of the AC
system voltage becomes zero.
Fig. 3. Power control principle diagram
v. SIMULATION STUDK
According to (15), Kq-2/(3Y,,). The active power P is To validate the established continuous time space-state
determined by (1 6). id and P are the d- and q-axis components model and the control skategy, simulation has been performed
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with the PSCADRMTDC electromagnetic transient PREC QREC
E2
0
simulation software. The parameters of the simulation system
are as follows: J=SOHz, Y,l(peak value)=11.26kV, Y&eak 6o
value)=93,90kV, RI==0.15fl, R2=8.451CT, oL1=0.53R, w&= 30
31.36i-2, C1=C2=450@,&=5.36R. The rated capacities and a 0
voltage ratios of the transformers connected with VSCl and -30
VSC2 are lOOMVA, lOOMVA, 13.8/62,5kV, 62.5/115kV, V
voltage is 70kV. The Ikquency of the modulation signal is 0.70 0.75 0.80 0.85 0.90 0.95 1.00
2250Hz. Time (s)
Four cases of simulation are performed to validate the Fig. 6. AC power at Case 3
control strategy. The simulation includes active power step
changes from 50 to 70Mw (Case l), from 70 to 50MW (Case
2), power reversion from 50 to -3OMW (Case 3, with the
constant reactive power of OMVar) and reactive power step
change from 0 to -2OMvar (Case 4, With the constant active
power of 70MW). The simulation results me given in the
following figures. Fig.4 and Fig.5 *lay the AC power
changes corresponding to Case 1 and Case 2, respectively.
Fig.6 and Fig.7 present the AC power and the DC power
changes, respectively, at Case 3. Fig.8 shows the power
changes at Case 4. All the command signals are actuated at the 0.70 0.75 0.80 0.85 0.90 0.95 1.00
instant of 0.72s. The parameters of the PI controllers of VSCl Time (6)
are: for PII, k1=l.8, T~O.019;for PI2 and PI3, k2=k3=0.55,
Fig. 7. DC power at Case 3
T,=T,=19. The parameters of voltage regulator are k,=7,
T,-0.02; kdc=3, G41.6, TA4.018;T e 3 0 . 0 PRW: 0 QREC
Such simulation indexes as the rise time tl*,(second), peak
time b,,&econd), settling time &&econd), overshoot CT and
steady state error A (absolute value) for the four cases are
listed in Table I.
e
0.70 0.75 0.80 0.85 0.90 0.95 1.00
Time (s)
TABLE I
MAIN INDEXFS OP SIMULATION
0.70 0.75 0.80 0.85 0.90 0.95 1.00 Items Case1 Case2 Case3 Case4
Time (s) tm&) 0.01s 0.015 0.016 0.017
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VI. MODIFICATION OF POWER CONTROLLER VDI. REFERENCES
In order to shorten the response time of the controller, a Li Gengyin, Lv Pengfei, Li Guangltai, and Zhou Mug, "The new
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boost type PWM converter for HVDC application," IEEE Zkmucfium
sT on Power Electronics, vol. 5 , no. 2, pp.229-235, April, 1990.
D(s) = G- Zhang Guibin and Xu Zheng, "Steady-state model for VSC based
l+sT
The derivative term considers how fast the error signal is
-- - -
HVDC a d its controller desim" proceedinns ofthe CSEE. vol. 22. m.
I, pp. 17-22, Jan. 2002,
changing at an instant in time. The derivative yields a rate of I. L. Thomas, S. Poulain and A. Benchaib, "Analysis of a robust dc-bus
voltage conlml system for a VSC bxnsmission scheme," AC-DCPower
change or slope of the error m e . Therefore, it can introduce Trummisrian, IEE ConferencePublication N0.485,pp.28-23, November
an early correctional signal to the system and accelerate action 2001.
speed of the controller and shorten the adjusting time. During V. R. Dinavahi, M. Reze Irvan, and R Bonert, "Real-time digital
the simulation, we have G 0 . 8 5 , T=O.Ol,with no change to simulation of power electronic apparatus interfaced with digital
controllers," IEEE Trawaciions on Power Delivety, vol. 16, no. 4,
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