Stucor Ec8791-Ag Notes

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EC8791 EMBEDDED AND REAL TIME SYSTEMS (UNIT – 1) Dept of ECE
EC8791 EMBEDDED AND REAL TIME SYSTEMS

UNIT I INTRODUCTION TO EMBEDDEDSYSTEM DESIGN
Complex systems and microprocessors- Embedded system design process -Design example: Model train
controller- Design methodologies- Design flows - Requirement Analysis - Specifications-System
analysis and architecture design - Quality Assurance techniques - Designing with computing platforms
- consumer electronics architecture - platform-level performance analysis.
ROHINI College of Engineering and Technology

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SYSTEMS (UNIT – 2) Dept of ECE
EC8791-EMBEDDED AND REAL TIME SYSTEMS
UNIT II ARM PROCESSOR AND PERIPHERALS 9

ARM Architecture Versions - ARM Architecture - Instruction Set - Stacks and Subroutines - Features of the LPC 214X
Family - Peripherals - The Timer Unit - Pulse Width Modulation Unit - UART - Block Diagram of ARM9 and ARM
Cortex M3 MCU.

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UNIT III EMBEDDED PROGRAMMING 9
Components for embedded programs- Models of programs- Assembly, linking and loading -
compilation techniques- Program level performance analysis - Software performance optimization -
Program level energy and power analysis and optimization - Analysis and optimization of program size-
Program validation and testing.








































EC8791 EMBEDDED AND REAL TIME SYSTEMS (UNIT - 4) Dept of ECE
UNIT IV REAL TIME SYSTEMS

Structure of a Real Time System — Estimating program run times - Task Assignment and Scheduling
- Fault Tolerance Techniques - Reliability, Evaluation - Clock Synchronisation.









ESTIMATING PROGRAM RUN TIMES

Real-time systems should meet deadlines; it is important to be able to accurately estimate
program run times. Estimating the execution time of any given program is a very difficult task and is
the focus of current research. It depends on the following factors:
Source code: Source code that is carefully tuned and optimized takes less time to execute.
Compiler: The compiler maps the source-level code into a machine-level program. This mapping is not
unique; the actual mapping will depend on the actual implementation of the particular compiler that is
being used. The execution time will depend on the nature of the mapping.
Machine architecture: Many aspects of the machine architecture have an effect on the execution time
that is difficult to quantify exactly. Executing a program may require much interaction between the
processors and the memory and I/O devices. Such an interaction can take place over an interconnection
network (e.g., a bus) that can be shared by other processors. The time spent waiting to gain access to the
network affects the execution time. The number of registers per processor affects how many variables
can be held in the CPU. The greater the number of registers and the cleverer the compiler is in managing
these registers, the fewer the number of accesses that need to go out of the CPU. This results in reducing
the memory-access time, and hence the instruction-execution time. The size and organization of the
cache (if any) will also affect the memory-access time, as will the clock rate. Also, many machines use
dynamic RAM for their main memory. To keep the contents of these memories, we need to periodically
refresh them; this is done by periodically reading the contents of each memory location and writing them

back. The refresh task has priority over the CPU and thus affects the memory-access time.
Operating system: The operating system determines such issues as task scheduling and memory
management, both of which have a major impact on the execution time. Along with the machine
architecture, it determines the interrupt handling overhead.
Timing estimation system

TASK ASSIGNMENT AND SCHEDULING
All task timing parameters and functional parameters, the tasks are allocated or assigned to
the various processors and scheduled on them.
First assign tasks to processors, and then, do a uniprocessor scheduling for tasks assigned to
each processor. If one or more of the schedules are infeasible, then either redo the task allocation or
use a different algorithm to do the scheduling. It is possible that there is no feasible
assignment/schedule for a particular problem.
Each task executes within its own context. Only one task within the application can be
executing at any point in time on a processor. A schedule is an assignment of tasks to available
processors. The scheduler of an RTOS is a module that implements the assignment (scheduling)
algorithms.
A schedule is said to be valid if all precedence and resource usage constraints are met and no
task is under scheduled (the task is assigned insufficient time for execution) or overscheduled (the
task is assigned more time than needed for execution).
A schedule is said to be feasible if every task scheduled completes before its deadline. A

system (a set of tasks) is said to be schedulable if a feasible schedule exists for the system. The bulk
of real-time scheduling work deals with finding feasible schedules.
An algorithm is said to be optimal if it always produces a feasible schedule as long as a given
set of tasks has feasible schedules.
A schedule may be computed before the system is put in operation or obtained dynamically at
runtime.
FAULT TOLERANCE TECHNIQUES
Fault tolerance is imperative in a real-time system since a failure may result in catastrophic
events. All of the redundancy techniques described which are hardware. information, software, and time
redundancies described are applicable to such systems. In reality, hardware redundancy is frequently
employed in safety-critical systems such as an airplane. A fundamental requirement from a real-time
system is to have task meet their deadlines.
Static Scheduling: Static Scheduling algorithms which work offline.
Dynamic Scheduling: Dynamic Scheduling algorithms that decide the next task to schedule at runtime.
CLOCK SYNCHRONISATION.
1. The clock synchronization is to be capable of bounding, by a known constant, the maximum

difference of the time values between the observation of the same event from any two different
nodes of the system (measured according to the value of the local clock of each of these two
nodes);
2. The notion of global time constructed by the synchronisation algorithm is to be sufficiently
accurate to allow one to measure small time intervals at any point in time;
3. The clock synchronization algorithm is to be capable of tolerating the possible fault of a local
RT clock, or the loss of a clock synchronisation message;
4. The overall system performance is not to be degraded by the execution of the clock
synchronisation algorithm.

UNIT V PROCESSES AND OPERATING SYSTEMS 9

Introduction - Multiple tasks and multiple processes - Multirate systems- Preemptive realtime operating
systems- Priority based scheduling- Interprocess communication mechanisms Evaluating operating
system performance- power optimization strategies for processes - Example Real time operating
systems-POSIX-Windows CE. - Distributed embedded systems MPSoCs and shared memory
multiprocessors. - Design Example - Audio player, Engine control unit - Video accelerator.



















































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EC8791 EMBEDDED AND REAL TIME SYSTEMS (UNIT – 1) Dept of ECE

EC8791 EMBEDDED AND REAL TIME SYSTEMS

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

EC8791-EMBEDDED AND REAL TIME SYSTEMS

UNIT II ARM PROCESSOR AND PERIPHERALS 9

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

ROHINI College of Engineering and Technology

EC8791 EMBEDDED AND REAL TIME SYSTEMS

ROHINI College of Engineering and Technology