5 4 3 2 1

EEROM
+3VS +3VS_PS
SWR_VDD
30mil 30mil
TL@
R1160 0_0603_5%
TL@U2
TL@ U2
+3VS_PS 8 1
TL@ U46 VCC A0
Close to Pin3 7 WP A1 2
19 APU_TXOUT_CLK+ MIIC_SCL 6 3
TXEC+ APU_TXOUT_CLK+ <22> SCL A2
DP_V33 TL@L76
TL@ L76 2 1 DP_V33 40mil 3 20 APU_TXOUT_CLK- MIIC_SDA 5 4
DP_V33 TXEC- APU_TXOUT_CLK- <22> SDA GND
FBMA-L11-201209-221LMA30T_0805
10U_0603_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z 60mil 13 21 APU_TXOUT2+ CAT24C64WI-GT3_SO8

SWR_VDD TXE2+ APU_TXOUT2+ <22>
TL@C20
TL@

TL@C1482
TL@

TL@C1483
TL@

Power
D D
1 1 1 TL@L78
TL@ L78 2 1 SWR_VDD 18 22 APU_TXOUT2-

LVDS
PVCC TXE2- APU_TXOUT2- <22>
FBMA-L11-201209-221LMA30T_0805
C20

C1482

C1483
SWR_V12 TL@L77
TL@ L77 1 2 SWR_LX 60mil 12 23 APU_TXOUT1+
SWR_LX TXE1+ APU_TXOUT1+ <22>
4.7UH_PG031B-4R7MS_1.1A_20% 60mil 11 24 APU_TXOUT1- APU_TXOUT1- <22>
2 2 2 SWR_VCCK TXE1-
27
VCCK APU_TXOUT0+
7 25 APU_TXOUT0+ <22>
DP_V12 TXE0+ APU_TXOUT0-
26 APU_TXOUT0- <22>
TXE0- +3VS_PS

APU_LVDS_DAT 1 TL@
RTD2132S R1163
2
4.7K_0402_5%
DP0_AUXP_C 2 APU_LVDS_CLK 1 TL@ 2
<8> DP0_AUXP_C AUX_P

DP-IN
DP0_AUXN_C 1 14 1 2 R1164 4.7K_0402_5%

GPIO
<8> DP0_AUXN_C AUX_N GPIO(PWM OUT) TL_INVT_PWM <22>
Close to L2 Close to P18 15 @ R1161 0_0402_5% MIIC_SCL 1 TL@ 2
DP0_TXP0_C GPIO(Panel_VCC) TL_ENVDD <22>
5 16 1 TL@ 2 R1165 4.7K_0402_5%
SWR_VDD <8> DP0_TXP0_C DP0_TXN0_C LANE0P GPIO(PWM IN) APU_INVT_PWM <10,22> MIIC_SDA
6 17 R1162 0_0402_5% 1 TL@ 2
<8> DP0_TXN0_C LANE0N GPIO(BL_EN) TL_BKOFF# <22>
R1166 4.7K_0402_5%
10U_0603_6.3V6M

0.1U_0402_16V4Z

22U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CSCL 1 TL@ 2
TL@ C21
TL@C21

TL@C1485
TL@

TL@C1486
TL@

TL@C1487
TL@

TL@C1488
TL@

1 1 1 1 1 Reserved for EC programming ROM CSCL 9 LVDS 29 APU_LVDS_CLK APU_LVDS_CLK <22> R1167 4.7K_0402_5%
CSDA CIICSCL1 MIICSCL1 APU_LVDS_DAT CSDA
10 EDID 28 APU_LVDS_DAT <22> 1 TL@ 2
Need EC confirm CIICSDA1 MIICDA1
C1485

C1486

C1487

C1488

Other
R1170 4.7K_0402_5%
2 2 2 2 2 32 ROM 31 MIIC_SCL
<10,22> LVDS_HPD HPD MIICSCL0
30 MIIC_SDA
MIICSDA0
8 DP_REXT

1
4 DP_GND GND 33

2
TL@ +3VS_PS Add for EC
Close to Pin13 R1168 TL@ 20101230
100K_0402_5% R30 RTD2132S-GR_QFN32_5X5
12K_0402_1%

2
TL@

2
Close to L3 +1.2VS Q90A
C @ L87 C
SWR_V12 2 1 CSDA 1 6 EC_SMB_DA2
EC_SMB_DA2 <6,14,36>
FBMA-L11-201209-221LMA30T_0805 Change to 12Kohm 1% (DG ref.)
22U_0805_6.3V6M

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

20101114 DMN66D0LDW-7_SOT363-6 TL@

5
TL@C1489
TL@

TL@C1490
TL@

TL@C1491
TL@

TL@C1492
TL@

1 1 1 1 20110124 Modify Q90B

C1489

C1490

C1491

C1492

CSCL 4 3 EC_SMB_CK2
EC_SMB_CK2 <6,14,36>
2 2 2 2 DMN66D0LDW-7_SOT363-6

APU Co-lay eDP function Use common via

Close to
Pin27 DP0_TXP0_C APU_TXOUT2+
Close to Pin7 R1171 1 2 APUEDP@ 0_0402_5%
DP0_TXN0_C R1172 1 2 APUEDP@ 0_0402_5% APU_TXOUT2-
DP0_TXP1_C R1173 1 2 APUEDP@ 0_0402_5% APU_TXOUT1+
<8> DP0_TXP1_C DP0_TXN1_C APU_TXOUT1-
R1174 1 2 APUEDP@ 0_0402_5%
<8> DP0_TXN1_C
DP0_AUXP_C R1175 1 2 APUEDP@ 0_0402_5% APU_LVDS_CLK
DP0_AUXN_C R1176 1 2 APUEDP@ 0_0402_5% APU_LVDS_DAT

B B

A A

Security Classification Compal Secret Data

Issued Date 2010/08/04 Deciphered Date 2010/08/04 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Translator - RTD2132S
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
P5WS5 LA-6973P
Date: Wednesday, April 20, 2011 Sheet 21 of 50
5 4 3 2 1