VLSI B.

TECH TITLES

1. High-speed area-efficient vlsi architecture of three-operand binary adder.

2. An analysis of dcm-based true random number generator.
3. Identification of stuck-at-faults of full adder using fpga as a testing device.
4. Low power 4×4 bit multiplier design using dadda algorithm and optimized full adder.
5. A low-power high-speed accuracy-controllable approximate multiplier design.
6. Performance analysis of parallel prefix adder for datapath vlsi design.
7. Design of efficient bcd adders in quantum-dot cellular automata.
8. Low power implementation of fsm based vending machine on fpga.
9. Design of high secure house hold alarm.
10. Elegant home with power saving, security, safety, remote controlling and auto control of
water tank motor
11. An Advanced automatic toll-gate controller system based on Card by access using
Verilog HDL.
12. Design of an advanced intelligent automatic railway gate controller system for avoiding
accidents at crossing points using Verilog HDL.
13. Implementation of Internet Voting Machine for avoiding Rigging using Verilog HDL
14. Implementation of Electricity bill using VERILOG.
15. Implementation of real time Candy mechanic using VERILOG .
16. Implementation of First in First out (FIFO) design for avoiding data losses in
transmission.
17. Design and implementation of House hold alarm system using VERILOG.
18. Implementations of Innovative automated teller machine (ATM) controller for financial
transactions of having both deposit and withdraw using Verilog HDL.
19. VLSI architecture for high performance wallace tree encoder.