5 4 3 2 1

01_CONTENTS

B2264C SCHEMATICS
D D

4K OPEN

C C

WWW.4KOPEN.COM

Version History PCB Impedance Control and stacking

B PCB SCH seperation
Width
B
PCB Thickness
A Release on Jun 28th,2017 .
Top L1 0.5 oz
Based on B2199 and B2252
1080 0.076mm
B FAN connector and control added GND L2 0.5oz
CVBS output connection corrected Core
ESD device for USB Power L3 0.5oz

1080 0.076mm
Bottom L4 0.5 oz
C page 9 Increase power decoupling of the audio buffer: CA7 1uF (0402) changed to 47uF/16V (1210)
Prepreg Top/Layer2
page 6 Add ESD protection on eSATA connector: U28 HSP051-4N10 added & bottom/Layer3 Material:= 1080 --> Er 3.8 FR4 1.6 mm

page 14 HW version change from 0 to 1 on UART11_TXD: : R114 DNF -> 10K and R116 10K -> DNF. Width internal space external space Z0 Z diff Comments
4 Mils 8 Mils 55R DDR_ADD/CMD/DATA
page 15 Add provision for 3V3_A0 supply (instead of 3V3_SW) on 40 pins GPIO connector: Add FP10 not fit 5 Mils 8 Mils 49R Normal DDR_ADD/CMD/DATA

page 17 Add SD card switch for 1V8 signal: U29 STG4160 switch, R157, R158, C253 added 4 Mils 6 Mils >8 Mils 55R 98R USB2.0
5 Mils 8 Mils >12 Mils 49 R 90.3R PCI-E
USB3.0

Note:This impedance control status base on PCB stack

A
material:FR4 A

DNF: Do No Fit (component not assembled)

Title
B2264 4Kopen

Size Document Number Rev

A3 01_CONTENTS C

Date: Friday, August 31, 2018 Sheet 1 of 18

5 4 3 2 1
 5 4 3 2 1

02_BLOCK_DIAGRAM

E E

B2264 BLOCK DIAGRAM B2264 Power Tree

5V_AO HDMI

SY8104
DC/DC MOSFET 5V_SW USB/ SATA/ 40 pins GPIO connector
DDR3 16Bitsx4 SPI SD CARD
3V3_AO HDMI

D
3V3_SW MINIPCIE/ RST/ LCD/ 40 pins GPIO connector D

HDMI RX HDMI TX 1V5_PCIE/SATA

LD1117
3V3_SW

MOSFET FB
3V3_CPU
RTL8211EG <->GBE

LD1117 1V8_CPU
12V SY8104 3V3_AO
2X USB2.0 DC IN DC/DC 3V3_AO 1V5_AO
STiH418
ST1S50
USB3.0 CPU_1V0
DC/DC SY8089A STiH418
C C

SY8368A ETH_PENn
PIO1_AO_2
AV output CORE_1V0
DC/DC
SBC_PWR_nDISABLE SBC_PWR_CTRL
PIO3_AO_2
VTT_ENABLE LMI_notRET_PIO
PIO5_AO_2

POWER MINI PCIe

NCT3101S LMI0_notRETENTION

LDO
LMI_VTT(0.75V)
SY8089A DDR3
DVO/LCD Touch Panel 40PIN IO eSATA LMI_1V5
expansion
DC/DC
B B
DDR3
LMI1_notRETENTION

LMI_1V5

Ethernet
MOSFET RTL8211
ETH_PENn

AO(Always On) Power supply

SW(Switch) Power supply
A Control Net A

Title
B2264 4Kopen

Size Document Number Rev

A3 02_BLOCK_DIAGRAM C

Date: Friday, August 31, 2018 Sheet 2 of 18

5 4 3 2 1
 5 4 3 2 1

U1-3
03_LMI0 LMI0_D0 L33 P29 LMI0_A0
UL1
MT41K256M16TW-093:P LMI_1V5
UL2 18CAPS
MT41K256M16TW-093:P LMI_1V5
LMI0_D1
LMI0_D2
LMI0_D3
D31
L32
LMI_0_DQ_0
LMI_0_DQ_1
LMI_0_DQ_2
LMI0 LMI_0_A_0
LMI_0_A_1
LMI_0_A_2
K30
N29
LMI0_A1
LMI0_A2
LMI0_A3
C33 T29
LMI0_D0 E3 D9 LMI0_D16 E3 D9 LMI0_D4 L31 LMI_0_DQ_3 LMI_0_A_3 G28 LMI0_A4
LMI0_D1 F7 DQL0 VDD B2 LMI0_D17 F7 DQL0 VDD B2 LMI0_D5 C32 LMI_0_DQ_4 LMI_0_A_4 U28 LMI0_A5
LMI0_D2 F2 DQL1 VDD G7 LMI0_D18 F2 DQL1 VDD G7 LMI0_D6 M31 LMI_0_DQ_5 LMI_0_A_5 H30 LMI0_A6
LMI0_D3 F8 DQL2 VDD K2 LMI0_D19 F8 DQL2 VDD K2 LMI0_D7 B33 LMI_0_DQ_6 LMI_0_A_6 R29 LMI0_A7
LMI0_D4 H3 DQL3 VDD K8 LMI0_D20 H3 DQL3 VDD K8 LMI0_notDQS0 H31 LMI_0_DQ_7 LMI_0_A_7 G29 LMI0_A8
LMI0_D5 H8 DQL4 VDD N1 LMI0_D21 H8 DQL4 VDD N1 LMI0_DQS0 J31 LMI_0_DQSN_0 LMI_0_A_8 P28 LMI0_A9
LMI0_D6 G2 DQL5 VDD N9 LMI0_D22 G2 DQL5 VDD N9 LMI0_DM0 D33 LMI_0_DQS_0 LMI_0_A_9 J29 LMI0_A10
LMI0_D7 H7 DQL6 VDD R1 LMI0_D23 H7 DQL6 VDD R1 LMI_0_DM_0 LMI_0_A_10 H28 LMI0_A11
LMI0_DQS0 F3 DQL7 VDD R9 LMI0_DQS2 F3 DQL7 VDD R9 LMI0_D8 K31 LMI_0_A_11 K29 LMI0_A12
D D
LMI0_notDQS0 G3 DQSL VDD LMI0_notDQS2 G3 DQSL VDD LMI0_D9 F32 LMI_0_DQ_8 LMI_0_A_12 R28 LMI0_A13
LMI0_DM0 E7 notDQSL H9 LMI0_DM2 E7 notDQSL H9 LMI0_D10 K32 LMI_0_DQ_9 LMI_0_A_13 J28 LMI0_A14
DML VDDQ H2 DML VDDQ H2 LMI0_D11 F31 LMI_0_DQ_10 LMI_0_A_14 K28 LMI0_A15
LMI0_D13 D7 VDDQ F1 LMI0_D29 D7 VDDQ F1 LMI0_D12 K33 LMI_0_DQ_11 LMI_0_A_15
LMI0_D8 C3 DQU0 VDDQ E9 LMI0_D24 C3 DQU0 VDDQ E9 LMI0_D13 F33 LMI_0_DQ_12
LMI0_D11 DQU1 VDDQ LMI0_D27 DQU1 VDDQ LMI0_D14 LMI_0_DQ_13 LMI0_BA0

swapped

swapped
C8 D2 C8 D2 L30 T28
LMI0_D14 C2 DQU2 VDDQ C9 LMI0_D28 C2 DQU2 VDDQ C9 LMI0_D15 G30 LMI_0_DQ_14 LMI_0_BA_0 F30 LMI0_BA1
LMI0_D15 A7 DQU3 VDDQ C1 LMI0_D31 A7 DQU3 VDDQ C1 LMI0_notDQS1 G33 LMI_0_DQ_15 LMI_0_BA_1 N28 LMI0_BA2
LMI0_D12 A2 DQU4 VDDQ A8 LMI0_D30 A2 DQU4 VDDQ A8 LMI0_DQS1 G32 LMI_0_DQSN_1 LMI_0_BA_2
LMI0_D9 B8 DQU5 VDDQ A1 LMI0_D25 B8 DQU5 VDDQ A1 LMI0_DM1 J32 LMI_0_DQS_1 L28 LMI0_notRAS
LMI0_D10 A3 DQU6 VDDQ LMI0_D26 A3 DQU6 VDDQ LMI_0_DM_1 LMI_0_NOTRAS M30 LMI0_notCAS
LMI0_DQS1 C7 DQU7 A9 LMI0_DQS3 C7 DQU7 A9 LMI0_D16 AA30 LMI_0_NOTCAS M28 LMI0_notWE
LMI0_notDQS1 B7 DQSU VSS B3 LMI0_notDQS3 B7 DQSU VSS B3 LMI0_D17 P33 LMI_0_DQ_16 LMI_0_NOTWE V30 LMI0_notCS
LMI0_DM1 D3 notDQSU VSS E1 LMI0_DM3 D3 notDQSU VSS E1 LMI0_D18 AA31 LMI_0_DQ_17 LMI_0_NOTCS
DMU VSS G8 DMU VSS G8 LMI0_D19 P32 LMI_0_DQ_18
LMI0_notCK K7 VSS J2 LMI0_notCK K7 VSS J2 LMI0_D20 AB32 LMI_0_DQ_19 D32 LMI0_notCK
RL1 120R LMI0_CK J7 notCK VSS J8 LMI0_CK J7 notCK VSS J8 LMI0_D21 P31 LMI_0_DQ_20 LMI_0_CKN E32 LMI0_CK
CK VSS M1 CK VSS M1 LMI0_D22 AA32 LMI_0_DQ_21 LMI_0_CKP
LMI0_A0 N3 VSS M9 LMI0_A0 N3 VSS M9 LMI0_D23 N32 LMI_0_DQ_22 CJ17
LMI0_A1 P7 A0 VSS P1 LMI0_A1 P7 A0 VSS P1 LMI0_notDQS2 V32 LMI_0_DQ_23 DNC_CJ17 CK17
LMI0_A2 P3 A1 VSS P9 LMI0_A2 P3 A1 VSS P9 LMI0_DQS2 V33 LMI_0_DQSN_2 DNC_CK17
LMI0_A3 N2 A2 VSS T1 LMI0_A3 N2 A2 VSS T1 LMI0_DM2 R30 LMI_0_DQS_2 F29 LMI0_CKE
LMI0_A4 P8 A3 VSS T9 LMI0_A4 P8 A3 VSS T9 LMI_0_DM_2 LMI_0_CKE
LMI0_A5 P2 A4 VSS LMI0_A5 P2 A4 VSS LMI0_D24 W33 V29 LMI0_ODT
LMI0_A6 R8 A5 G9 LMI0_A6 R8 A5 G9 LMI0_D25 R32 LMI_0_DQ_24 LMI_0_ODT
LMI0_A7 R2 A6 VSSQ G1 LMI0_A7 R2 A6 VSSQ G1 LMI0_D26 W32 LMI_0_DQ_25 T30 LMI0_notRESET
LMI0_A8 T8 A7 VSSQ F9 LMI0_A8 T8 A7 VSSQ F9 LMI0_D27 R33 LMI_0_DQ_26 LMI_0_NOTRESET
LMI0_A9 R3 A8 VSSQ E8 LMI0_A9 R3 A8 VSSQ E8 LMI0_D28 Y31 LMI_0_DQ_27 E30 LMI0_ZQ
C LMI0_A10 L7 A9 VSSQ E2 LMI0_A10 L7 A9 VSSQ E2 LMI0_D29 R31 LMI_0_DQ_28 LMI_0_ZQ M29 LMI0_PLL_TESTTP TP1 C
LMI0_A11 R7 A10_AP VSSQ D8 LMI0_A11 R7 A10_AP VSSQ D8 LMI0_D30 W31 LMI_0_DQ_29 LMI_0_PLL_TEST
LMI0_A12 N7 A11 VSSQ D1 LMI0_A12 N7 A11 VSSQ D1 LMI0_D31 T31 LMI_0_DQ_30 V28 LMI0_notRETENTION RL2
LMI0_A13 T3 A12_notBC VSSQ B9 LMI0_A13 T3 A12_notBC VSSQ B9 LMI0_notDQS3 U31 LMI_0_DQ_31 LMI_0_NOTRETENTION 240R
LMI0_A14 T7 A13_NC VSSQ B1 LMI0_A14 T7 A13_NC VSSQ B1 LMI0_DQS3 U32 LMI_0_DQSN_3
LMI0_A15 M7 A14_NC VSSQ LMI0_A15 M7 A14_NC VSSQ LMI0_DM3 W30 LMI_0_DQS_3
A15_NC A15_NC LMI_0_DM_3 N31 LMI0_VREF
LMI_0_VREF
STiH418
LMI0_BA0 M2 LMI0_BA0 M2
LMI0_BA1 N8 BA0 LMI0_BA1 N8 BA0 LMI_1V5
LMI0_BA2 M3 BA1 LMI0_BA2 M3 BA1 close to BGA ball
BA2 BA2
LMI0_notRAS J3 LMI0_notRAS J3
LMI0_notCAS K3 notRAS LMI0_notCAS K3 notRAS R1
LMI0_notCS L2 notCAS LMI0_notCS L2 notCAS 2K
LMI0_CKE K9 notCS LMI0_CKE K9 notCS
LMI0_VREF LMI0_notWE L3 CKE LMI0_VREF LMI0_notWE L3 CKE
LMI0_VREF notWE LMI0_VREF notWE LMI_notRET_PIO D1 LMI0_notRETENTION
[4,13,14] LMI_notRET_PIO
M8 M8
H1 VREFCA H1 VREFCA BAT54JFILM CL1
VREFDQ VREFDQ
LMI0_ODT K1 LMI0_ODT K1 LMI_VTT 100n
LMI0_notRESET T2 ODT LMI0_notRESET T2 ODT
RL3 240R L8 notRESET RL4 240R L8 notRESET LMI0_notCS RL22 4 5 56R
ZQ ZQ LMI0_ODT 3 6
LMI0_notRAS 2 7
1 8
LMI_VTT
B LMI_1V5 B
LMI0_VREF LMI_1V5
LMI0_CKE RL25 56R
LMI0_A15 RL5 56R
LMI0_A0
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

RL19 4 5 56R
CL4 C1 LMI0_A13 3 6
CL10 CL11 LMI0_A9 2 7
LMI0_A10
CL5

CL6

CL7

CL8

CL9

CL12

CL13

CL14

CL15

CL16

CL17

10uF 6.3V 10uF 6.3V 1 8

100n 100n LMI0_A2 56R 5 4 RL23
LMI0_BA2 6 3
LMI0_notWE 7 2
LMI0_notCAS 8 1
LMI0_A12 RL7 4 5 56R
LMI0_A1 3 6
LMI0_A14 2 7
LMI0_A11 1 8
LMI_1V5 LMI0_A8 RL10 4 5 56R
LMI0_A6 3 6 LMI_VTT
LMI0_A4 2 7
LMI0_BA1 1 8
RL44 LMI0_VREF

100n

100n

100n

100n

100n
1%
2K CP39 CP38 C2
LMI0_VREF LMI0_BA0 RL20 4 5 56R
LMI0_A3

C3

C4

C5

C6

C7
CL3 CL18 3 6 47u 6V3 47u 6V3 10uF 6.3V
LMI_1V5 LMI0_A5 2 7 DNF DNF
100n 100n LMI0_A7 1 8
RL47 CL2 LMI_1V5
A A
LMI_1V5
1u 6.3V

1u 6.3V

1u 6.3V

1u 6.3V

1% Place CAP close to the via on DQ and A/C

100n

100n

100n

100n

100n

100n

100n

100n

100n

2K 100n
LMI0_notRESET
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n
CL19 RL14 2K
CL20

CL21

CL22

CL23

CL24

CL25

CL26

CL27

CL28

10uF 6.3V
C8

C9

C10

C11

CL29

CL30

CL31

CL32

CL33

CL34

CL35

CL36

CL37

CL38

CL39

Title
B2264 4Kopen

Size Document Number Rev

A3 03_LMI0 C

Date: Monday, September 03, 2018 Sheet 3 of 18

5 4 3 2 1
 5 4 3 2 1

UL3 UL4 U1-16

04_LMI1 MT41K256M16TW-093:P LMI_1V5 MT41K256M16TW-093:P LMI_1V5 LMI1_D0 C20 F23 LMI1_A0

LMI1_D0
LMI1_D1
E3
DQL0 VDD
D9 LMI1_D16
LMI1_D17
E3
DQL0 VDD
D9
LMI1_D1
LMI1_D2
LMI1_D3
D13
D21
LMI_1_DQ_0
LMI_1_DQ_1
LMI_1_DQ_2
LMI1 LMI_1_A_0
LMI_1_A_1
LMI_1_A_2
F19
D24
LMI1_A1
LMI1_A2
LMI1_A3
F7 B2 F7 B2 C12 F26
LMI1_D2 F2 DQL1 VDD G7 LMI1_D18 F2 DQL1 VDD G7 LMI1_D4 C21 LMI_1_DQ_3 LMI_1_A_3 E16 LMI1_A4
LMI1_D3 F8 DQL2 VDD K2 LMI1_D19 F8 DQL2 VDD K2 LMI1_D5 C11 LMI_1_DQ_4 LMI_1_A_4 E25 LMI1_A5
LMI1_D4 H3 DQL3 VDD K8 LMI1_D20 H3 DQL3 VDD K8 LMI1_D6 B21 LMI_1_DQ_5 LMI_1_A_5 F16 LMI1_A6
LMI1_D5 H8 DQL4 VDD N1 LMI1_D21 H8 DQL4 VDD N1 LMI1_D7 B11 LMI_1_DQ_6 LMI_1_A_6 D26 LMI1_A7
LMI1_D6 G2 DQL5 VDD N9 LMI1_D22 G2 DQL5 VDD N9 LMI1_notDQS0 C17 LMI_1_DQ_7 LMI_1_A_7 D18 LMI1_A8
LMI1_D7 H7 DQL6 VDD R1 LMI1_D23 H7 DQL6 VDD R1 LMI1_DQS0 B17 LMI_1_DQSN_0 LMI_1_A_8 F24 LMI1_A9
LMI1_DQS0 F3 DQL7 VDD R9 LMI1_DQS2 F3 DQL7 VDD R9 LMI1_DM0 C13 LMI_1_DQS_0 LMI_1_A_9 D19 LMI1_A10
LMI1_notDQS0 G3 DQSL VDD LMI1_notDQS2 G3 DQSL VDD LMI_1_DM_0 LMI_1_A_10 E17 LMI1_A11
LMI1_DM0 E7 notDQSL H9 LMI1_DM2 E7 notDQSL H9 LMI1_D8 A18 LMI_1_A_11 D20 LMI1_A12
D D
DML VDDQ H2 DML VDDQ H2 LMI1_D9 D15 LMI_1_DQ_8 LMI_1_A_12 E24 LMI1_A13
LMI1_D13 D7 VDDQ F1 LMI1_D29 D7 VDDQ F1 LMI1_D10 E19 LMI_1_DQ_9 LMI_1_A_13 E18 LMI1_A14
LMI1_D8 C3 DQU0 VDDQ E9 LMI1_D24 C3 DQU0 VDDQ E9 LMI1_D11 A14 LMI_1_DQ_10 LMI_1_A_14 E20 LMI1_A15
LMI1_D11 DQU1 VDDQ LMI1_D27 DQU1 VDDQ LMI1_D12 LMI_1_DQ_11 LMI_1_A_15
swapped

swapped
C8 D2 C8 D2 A19
LMI1_D14 C2 DQU2 VDDQ C9 LMI1_D28 C2 DQU2 VDDQ C9 LMI1_D13 A15 LMI_1_DQ_12
LMI1_D15 A7 DQU3 VDDQ C1 LMI1_D31 A7 DQU3 VDDQ C1 LMI1_D14 B19 LMI_1_DQ_13 F27 LMI1_BA0
LMI1_D12 A2 DQU4 VDDQ A8 LMI1_D30 A2 DQU4 VDDQ A8 LMI1_D15 B15 LMI_1_DQ_14 LMI_1_BA_0 F17 LMI1_BA1
LMI1_D9 B8 DQU5 VDDQ A1 LMI1_D25 B8 DQU5 VDDQ A1 LMI1_notDQS1 C15 LMI_1_DQ_15 LMI_1_BA_1 F22 LMI1_BA2
LMI1_D10 A3 DQU6 VDDQ LMI1_D26 A3 DQU6 VDDQ LMI1_DQS1 C16 LMI_1_DQSN_1 LMI_1_BA_2
LMI1_DQS1 C7 DQU7 A9 LMI1_DQS3 C7 DQU7 A9 LMI1_DM1 B18 LMI_1_DQS_1 F21 LMI1_notRAS
LMI1_notDQS1 B7 DQSU VSS B3 LMI1_notDQS3 B7 DQSU VSS B3 LMI_1_DM_1 LMI_1_NOTRAS D22 LMI1_notCAS
LMI1_DM1 D3 notDQSU VSS E1 LMI1_DM3 D3 notDQSU VSS E1 LMI1_D16 A31 LMI_1_NOTCAS E22 LMI1_notWE
DMU VSS G8 DMU VSS G8 LMI1_D17 B23 LMI_1_DQ_16 LMI_1_NOTWE D28 LMI1_notCS
LMI1_notCK K7 VSS J2 LMI1_notCK K7 VSS J2 LMI1_D18 B31 LMI_1_DQ_17 LMI_1_NOTCS
LMI1_CK J7 notCK VSS J8 RL15 120R LMI1_CK J7 notCK VSS J8 LMI1_D19 A23 LMI_1_DQ_18
CK VSS M1 CK VSS M1 LMI1_D20 B32 LMI_1_DQ_19 B13 LMI1_notCK
LMI1_A0 N3 VSS M9 LMI1_A0 N3 VSS M9 LMI1_D21 D23 LMI_1_DQ_20 LMI_1_CKN B14 LMI1_CK
LMI1_A1 P7 A0 VSS P1 LMI1_A1 P7 A0 VSS P1 LMI1_D22 A32 LMI_1_DQ_21 LMI_1_CKP
LMI1_A2 P3 A1 VSS P9 LMI1_A2 P3 A1 VSS P9 LMI1_D23 A22 LMI_1_DQ_22
LMI1_A3 N2 A2 VSS T1 LMI1_A3 N2 A2 VSS T1 LMI1_notDQS2 A27 LMI_1_DQ_23
LMI1_A4 P8 A3 VSS T9 LMI1_A4 P8 A3 VSS T9 LMI1_DQS2 B27 LMI_1_DQSN_2
LMI1_A5 P2 A4 VSS LMI1_A5 P2 A4 VSS LMI1_DM2 C23 LMI_1_DQS_2 E15 LMI1_CKE
LMI1_A6 R8 A5 G9 LMI1_A6 R8 A5 G9 LMI_1_DM_2 LMI_1_CKE
LMI1_A7 R2 A6 VSSQ G1 LMI1_A7 R2 A6 VSSQ G1 LMI1_D24 C29 E27 LMI1_ODT
LMI1_A8 T8 A7 VSSQ F9 LMI1_A8 T8 A7 VSSQ F9 LMI1_D25 D25 LMI_1_DQ_24 LMI_1_ODT
LMI1_A9 R3 A8 VSSQ E8 LMI1_A9 R3 A8 VSSQ E8 LMI1_D26 B29 LMI_1_DQ_25 F25 LMI1_notRESET
LMI1_A10 L7 A9 VSSQ E2 LMI1_A10 L7 A9 VSSQ E2 LMI1_D27 C24 LMI_1_DQ_26 LMI_1_NOTRESET
LMI1_A11 R7 A10_AP VSSQ D8 LMI1_A11 R7 A10_AP VSSQ D8 LMI1_D28 B30 LMI_1_DQ_27 F15 LMI1_ZQ
C LMI1_A12 N7 A11 VSSQ D1 LMI1_A12 N7 A11 VSSQ D1 LMI1_D29 C25 LMI_1_DQ_28 LMI_1_ZQ E21 LMI1_PLL_TESTTP TP2 C
LMI1_A13 T3 A12_notBC VSSQ B9 LMI1_A13 T3 A12_notBC VSSQ B9 LMI1_D30 C30 LMI_1_DQ_29 LMI_1_PLL_TEST
LMI1_A14 T7 A13_NC VSSQ B1 LMI1_A14 T7 A13_NC VSSQ B1 LMI1_D31 B25 LMI_1_DQ_30 E28 LMI1_notRETENTION RL16
LMI1_A15 M7 A14_NC VSSQ LMI1_A15 M7 A14_NC VSSQ LMI1_notDQS3 B26 LMI_1_DQ_31 LMI_1_NOTRETENTION 240R
A15_NC A15_NC LMI1_DQS3 A26 LMI_1_DQSN_3
LMI1_DM3 D29 LMI_1_DQS_3
LMI_1_DM_3 B22 LMI1_VREF
LMI1_BA0 M2 LMI1_BA0 M2 LMI_1_VREF
LMI1_BA1 N8 BA0 LMI1_BA1 N8 BA0 STiH418
LMI1_BA2 M3 BA1 LMI1_BA2 M3 BA1 LMI_1V5
BA2 BA2
LMI1_notRAS J3 LMI1_notRAS J3 close to BGA ball
LMI1_notCAS K3 notRAS LMI1_notCAS K3 notRAS
LMI1_notCS L2 notCAS LMI1_notCS L2 notCAS R2
LMI1_CKE K9 notCS LMI1_CKE K9 notCS 2K
LMI1_VREF LMI1_notWE L3 CKE LMI1_VREF LMI1_VREF LMI1_notWE L3 CKE
notWE notWE
LMI1_VREF M8 M8 LMI_notRET_PIO D2 LMI1_notRETENTION
VREFCA VREFCA LMI_1V5 [3,13,14] LMI_notRET_PIO
H1 H1
VREFDQ VREFDQ BAT54JFILM CL40
LMI1_ODT K1 LMI1_ODT K1
LMI1_notRESET T2 ODT LMI1_notRESET T2 ODT 100n
RL17 240R L8 notRESET RL18 240R L8 notRESET RL49
ZQ ZQ 1% LMI_VTT
2K
LMI1_VREF LMI1_VREF LMI1_notCAS 56R RL6
LMI1_notRAS
RL42 4 5 56R
LMI1_A10

100n

100n
3 6
B
RL51 LMI1_A15 2 7 B
1% LMI1_CKE 1 8

CL41

CL42
2K
LMI1_notWE RL52 4 5 56R
LMI1_BA2 3 6
LMI1_ODT 2 7
LMI1_notCS 1 8
LMI_1V5
LMI1_BA0RL43 4 5 56R
LMI1_A3 3 6
LMI1_A5 2 7
LMI1_A7
100n

100n

100n

100n

100n

100n

100n

100n

100n

1 8
CL43
LMI1_A13RL35 4 5 56R
LMI1_A9
CL44

CL45

CL46

CL47

CL48

CL49

CL50

CL51

CL52

10u 6.3v 3 6
LMI1_VREF LMI1_A2 2 7
LMI1_A0 1 8
LMI1_A12RL36 4 5 56R
CL69, CL78, CL79 were changed to 100nF C0402 CL53 CL54 CL55 LMI1_A1 3 6
LMI_1V5 LMI1_A11 2 7
100n 100n 100n LMI1_A14 1 8
LMI1_A8 RL40 4 5 56R
LMI1_A6
100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

100n

3 6
CL56 LMI1_A4 2 7
LMI1_BA1 1 8
LMI_VTT LMI_1V5
CL57

CL58

CL59

CL60

CL61

CL62

CL63

CL64

CL65

CL66

CL67

10u 6.3v
A A
LMI1_notRESET RL28 2K
LMI_1V5

C17 1u 6.3V

C37 1u 6.3V

C38 1u 6.3V

C42 1u 6.3V

C43 1u 6.3V

C47 1u 6.3V

C61 1u 6.3V

C62 1u 6.3V
100n

100n

100n

100n
Place CAP close to the via on DQ and A/C
LMI_1V5 C12
100n

100n

100n

100n

100n

100n

100n

100n

100n

CP41 CP40 10uF 6.3V

C13

C14

C15

C16
47u 6V3 47u 6V3
100n

100n

100n

100n

100n

100n

100n

DNF DNF
Title
CL68

CL69

CL70

CL71

CL72

CL73

CL74

CL75

CL76

B2264 4BKopen
CL77

CL78

CL79

CL80

CL81

CL82

CL83

Size Document Number Rev

A3 04_LMI1 C

Date: Monday, September 03, 2018 Sheet 4 of 18

5 4 3 2 1
 5 4 3 2 1

05_CPU_SYSTEM JTAG connector

Debug Proposal
It's support accuracy frequency in LPM
C18 8p U1-1

2
DNF SYSCLKIN AD3 AB4 JTAG_TMS D3
X1 SYS_AO_OSC_CLKIN JTAG_TMS_IN AB6 JTAG_TCK ESDA6V1BC6
NX3215SA 32.768kHz SYSCLKOSC AE2 JTAG_TCK_IN AC5 JTAG_TDI DNF
DNF SYS_AO_OSC_CLKOSC JTAG_TDI_IN AB5 JTAG_TDO 3V3_JTAG JTAG_TMS 3 4 JTAG_TDO
JTAG_TDO_OUT AA6 JTAG_nTRST
R3 200R AD5 JTAG_NOT_TRST_IN J12 2 5
D D

1
C19 8p DNF REMOTE_FRC_0_CLKOUT
DNF AE5 1 2 JTAG_TCK 1 6 JTAG_nJRST
REMOTE_FRC_1_CLKOUT JTAG_TDI_IN to connect to JTAG_nTRST 3 4
AG6 REMOTE_JTAG_TDO_IN JTAG_TDI 5 6
REMOTE_JTAG_TMS_OUT AG4 JTAG_TMS 7 8
nRESET_AO AC4 REMOTE_JTAG_TCK_OUT AG5 JTAG_TCK 9 10
SYS_AO_NOTRESETIN REMOTE_JTAG_TDI_OUT AC6 JTAG_TDI 11 12 JTAG_TDI 3 4
REMOTE_JTAG_TDO_IN AF5 JTAG_TDO 13 14
REMOTE_JTAG_NOT_TRST_OUT JTAG_nJRST 15 16 2 5
C21 SYS_nRESET AC1
SYS_NOTRESETIN CA6 JTAG_nTRST 1 6
100p DNC_CA6 8*2/2.54A
AE3 D4
AD4 REMOTE_COLD_NOTRESETOUT AF6 ESDA6V1BC6
REMOTE_NOTRESETIN REMOTE_WARM_NOTRESETOUT DNF
JTAG_nTRST
F13 JTAG_TDI
GND AC2 SYS_nRESETOUT JTAG_TMS 3V3_JTAG
SYS_NOTRESETOUT JTAG_TCK

STiH418 SYS_nRESETOUT R5 R6 R7 R8
SYS_nRESETOUT [17]

C22 C20
10K 10K 10K 10K 100n 100n
3V3_SW
Reset 3V3_AO

C UD1 C
R4 3 RD1 47R JTAG_nJRST
VCC Note: R5, R6,R7, R8, must be keep it in mass production
10K
2 RD2 510R nRESET_AO
notRST J1 6*6*5T
JTAG_nJRST 1 CD1 CD2
D5 BAT54JFILM GND 100n 1n
STM809SWX6F
SYS_nRESET 2.9V min
THRESHOLD
C23
Place C8 close to PIN AC1
100n

U1-12
3V3_AO
Mode pins U5
4K7 R18 Mode PIN table DNC_U5
MODE0 [15]
Mode Function Pin
4K7 R19 Mode[0] Reference Clock Selection PIO15[0] R1
MODE1 [7,16] DNC_R1

3
Mode[1] Boot master selection PIO35[3] R2
Mode[2] Boot device selection PIO15[3] nRESET_AO 1 QP6 DNC_R2
Mode[3] Boot device selection PIO16[3] BC846 R3
Mode[4] Boot device selection PIO16[4] P3 DNC_R3

2
3V3_SW Mode[5] Boot device selection PIO17[3] DNC_P3
B T2 B
Mode[6] Boot device selection PIO20[5]
R11 4K7 Mode[7] Reserved PIO20[6] T1 DNC_T2
Mode[8] Boot Device Operating Voltage PIO20[7] DNC_T1
R12 Mode[9] Reserved PIO33[4]
MODE2 [15]
4K7 Mode[10] Reserved PIO35[1] AJ26
DNF Mode[11] Reserved PIO31[3] R109 AH26 DNC_AJ26
DNC_AH26
1K
3V3_SW
Power and not reset STiH418
R14 4K7 DNF LED indicator
Mode[6:2] Boot device D16
R13 4K7 00000 RESERVED KHS0805RC RED
00001 NAND 2K page, 4 address cycles, error free (BCH controller)
R99 4K7 DNF 00010 NAND 2K page, 4 address cycles, 18 bits error prone (BCH controller)
MODE3 [15] 00011 NAND 2K page, 4 address cycles, 30 bits error prone (BCH controller)
R150 4K7 00100 NAND 2K page, 5 address cycles, error free (BCH controller)
MODE4 [15] 00101 NAND 2K page, 5 address cycles, 18 bits error prone (BCH controller) U1-2
00110 NAND 2K page, 5 address cycles, 30 bits error prone (BCH controller)
00111 RESERVED
01000 NAND 4K page, 5 address cycles, error free (BCH controller) A1
GND A33
01001 NAND 4K page, 5 address cycles, 18 bits error prone (BCH controller) GND
01010 NAND 4K page, 5 address cycles, 30 bits error prone (BCH controller) AN1
3V3_SW GND AN33
01011 RESERVED
01100 NAND 8K page, 5 address cycles, error free (BCH controller) GND
4K7 R15 01101 NAND 8K page, 5 address cycles, 18 bits error prone (BCH controller)
MODE5 [15] 01110 NAND 8K page, 5 address cycles, 30 bits error prone (BCH controller) STiH418
4K7 R16 01111 RESERVED
MODE6 [15] 10000 RESERVED
10001 8-bit NAND, small page, 3 address cycles (Hamming controller)
10010 8-bit NAND, small page, 4 address cycles (Hamming controller)
A
4K7 R17 10011 8-bit NAND, large page, 4 address cycles (Hamming controller) A
MODE7 [15]
10100 8-bit NAND, large page, 5 address cycles (Hamming controller)
10101 RESERVED
4K7 R10 10110 RESERVED
MODE8 [15]
10111 RESERVED
4K7 R20 MODE9 11000 RESERVED
MODE9 [15,16] 11001 RESERVED
4K7 R21
MODE10 [7,16] 11010 SPI NOR (clock divider ratio = 4)
4K7 R22 MODE11 11011 SPI NOR (clock divider ratio = 2) <---------------- default value Title
MODE11 [16] 11100 RESERVED B2264 4Kopen
11101 MMC 8-bit (v4.4 or v4.5) -Freq at boot = 15MHz
11110 MMC 1-bit (v4.4 or v4.5) -Freq at boot = 15MHz Size Document Number Rev
11111 RESERVED A3 05_CPU_SYTEM C

Date: Friday, September 07, 2018 Sheet 5 of 18

5 4 3 2 1
 5 4 3 2 1

J2
06_SATA_PCIE eSATA ESATA_SMT
11
10 SH2
9 SH2
8 SH2
X2 SH1
U1-14 30MHz JF30000M-3225-SMD-20P 7
SATA0_RXP C29 10n SATA0_RX+ SATA0_RX+ 6 GND
AM21 ATA0CLKIN 27p C24 SATA0_RXN SATA0_RX- SATA0_RX- 5 RX+
ATAPCIE_0_CLKIN AL21 ATA0CLKOSC C27 10n 4 RX-
ATAPCIE_0_CLKOSC 1 4 SATA0_TXN C26 10n SATA0_TX- SATA0_TX- 3 GND
2 x1 nc 3 SATA0_TXP C25 10n SATA0_TX+ SATA0_TX+ 2 TX-
nc x2 1 TX+
D D
U28 GND
R25 200R 27p C28 1 10
2 IO1 NC4 9
3 IO2 NC3 8
4 GND GND 7
CORE_DVDD1V0 5 IO3 NC2 6
AK22 R26 487R 1% IO4 NC1
ATAPCIE_0_REXT AK17 R27 487R 1%
ATAPCIE_1_REXT HSP051-4N10

PCIE0_CLKP_OUT R23 51R

MiniPCIE PCIE0_CLKN_OUT R24 51R
AL26 PCIE0_CLKP_OUT
ATAPCIE_0_CLKOUT_P AL27 PCIE0_CLKN_OUT
ATAPCIE_0_CLKOUT_N 3V3_PCIE
AM23 SATA0_TXP 3V3_PCIE
ATAPCIE_0_TXP AN23 SATA0_TXN
ATAPCIE_0_TXN
AM25 SATA0_RXN
ATAPCIE_0_RXN AL25 SATA0_RXP R28 3V3_SW 3V3_PCIE
ATAPCIE_0_RXP F1
10K
PCI-E 0717A0BA40C/ MINI 3V3_PCIE
J3 BLM18KG260TN1
[14] PIO_PCIE_notINT 1 2 C30 C31
WAKEnot +3V3
3 4 GND 10uF 6.3V 100n
C 2N7002 COEX1 GND C
Q1 5 6 1V5_PCIE
COEX2 +1V5
7 8
CLKnotREQ UIM_PWR

GND 9 10
GND UIM_DATA
PCIE1_CLKN_OUT R29 0R PCIE1_CLKN 11 12
REFCLKN UIM_CLK
PCIE1_CLKP_OUT R30 0R PCIE1_CLKP 13 14
REFCLKP UIM_RESET
15 16
GND UIM_VPP
AN15 17 18 GND
ATAPCIE_1_CLKIN_P AN16 RSVD1 GND
ATAPCIE_1_CLKIN_N 19 20
AN19 PCIE1_CLKP_OUT Note: RX Cap must be put in receive side RSVD2 W_notDISABLE
ATAPCIE_1_CLKOUT_P AN20 PCIE1_CLKN_OUT 21 22
ATAPCIE_1_CLKOUT_N GND GND PERSTnot PCIE_PIO_RST [16]
AM17 PCIE1_TXP PCIE1_RXN 23 24
ATAPCIE_1_TXP PCIE1_TXN PERN0 +3V3 3V3_PCIE
AL17 C32
ATAPCIE_1_TXN PCIE1_RXP 25 26
PERP0 GND 100p
AL19 PCIE1_RXN
ATAPCIE_1_RXN AM19 PCIE1_RXP 27 28
ATAPCIE_1_RXP GND GND +1V5 1V5_PCIE
29 30 GND
GND SMB_CLK SSC5_SCL [16]
STiH418
PCIE1_TXNC33 100n PETn1 31 32
PETN0 SMB_DATA SSC5_SDA [16]
B PCIE1_TXP C34 100n PETp1 33 34 B
PETP0 GND

GND 35 36
GND USB_DM
37 38
GND USB_DP
LMI_1V5 1V5_PCIE 3V3_PCIE 39 40
+3V3 GND GND
F2 BLM18KG260TN1 41 42 D6 3V3_PCIE
+3V3 LED_notWWAN KHS0805EGC GREEN
C44 C35 C36 GND 43 44 R31 220R
100n 100n 100n GND LED_notWLAN
45 46 R32 220R
RSVD3 LED_notWPAN D7
47 48 1V5_PCIE KHS0805EGC GREEN
RSVD4 +1V5
49 50 GND
3V3_PCIE RSVD5 GND
51 52 3V3_PCIE
RSVD6 +3V3
55 ground pin 56
C39 C40 GND GND
100n 100n 53 Pin aligment 54
GND GND
Through hole
Module fixation
57
GND

A A

GND

Title
B2264 4Kopen

Size Document Number Rev

A3 06_SATA_PCIE C

Date: Sunday, September 16, 2018 Sheet 6 of 18

5 4 3 2 1
 5 4 3 2 1

07_USB
5V_SW 3V3_SW Dual USB2 connector
F3
J4
BLM18KG260TN1
R34 1
C41 10K 2
100n 47u 6V3 3
U3 47u 6V3 ganged topology ,USB0 and 1 share capacitor , total >133 uF 4
5 1 USB01_VBUS 5
D12 IN OUT USB0_DM
D 6 D
2 2 USB0_DP 7
[5,16] USB0_EN GND 8
3 4 3 CP29 CP30 9
EN notFAULT USB0_notOC [16]
10
1 STMPS2171STR 11
[5,16] USB1_EN
R117 12
10K USB1_notOC [16]
BAT54C
USB-2A-01
USB01_VBUS
U1-11

AM32 USB0_DM U6
USB2_0_DM AM33 USB0_DP 6 1
USB2_0_DP 5 IO1 IO_1 2
4 VBUS GND 3 USB1_DM
AK28 IO2 IO_2
DNC_AK28 USBLC6-4SC6 USB1_DP
CU17
DNC_CU17

CORE_DVDD1V0 AL32 USB1_DM

USB2_1_DM AL33 USB1_DP
1% USB2_1_DP
487R R35 AH27
C USB3_REXT C
1% 47u 6V3 47u 6V3
200R R37 AJ28 ganged topology ,USB0 and 1 share capacitor , total >133 uF
USB2_REXT

CP31 CP32
AN32 USB2_DM
USB2_2_DM AN31 USB2_DP
USB2_2_DP

AM30 USB3_RXN
USB3_RXN AM29 USB3_RXP
USB3_RXP

AN28 USB3_TXN
USB3_TXN AN27 USB3_TXP 3V3_SW
USB3_TXP

STiH418 3V3_SW U7
USB3RXM 1 10 USB3RXM
IO1 NC4

2
USB3RXP 2 9 USB3RXP
IO2 NC3

1
5V_SW 1 Q2 3V3_SW 3 8
R39 GND GND
F5 MMBT3906/SOT USB3TXM 4 7 USB3TXM
2 3 USB3TXP 5 IO3 NC2 6 USB3TXP

3
BLM18KG260TN1 R154 R38 MMBT3906/SOT C46 IO4 NC1
10K 10K Q3 R40 HSP051-4M10
B
C45 1K 100n B
USB2_notOC [16] 1K
100n
U8
5 1 USB3_VBUS
IN OUT
2 USB3_VBUS CN2
GND USB2_VBUS_VALID [16]
CP33 CP34 CP35 U9 1
4 3 47u 6V3 47u 6V3 47u 6V3 4 3 USB2DM 2 VBUS
[16] USB2_EN EN notFAULT IO2 IO_2 DM
R41 R42 5 2
R43 STMPS2171STR 10K 10K USB2DM 6 VBUS GND 1 USB2DP 3
10K IO1 IO_1 4 DP
CP36 USB2DP USBLC6-4SC6 GND
47u 6V3 USB3.0 trace length < 5 inch
DNF USB3RXM 5
SSRXM
USB3RXP 6
5V_SW 12V_AO SSRXP
CP1 100n Place series resistors close to connector 7
GND_DRAIN
100n C48 USB3TXM 8
connect different plane SSTXM
100n C49 USB3TXP 9
SSTXP
5V_SW 12V_AO Place capacitors close to connector
High speed DM/P - Zdiff 90 ohm
Super speed RXM/P and TXM/P - Zdiff 90 ohm F6 BLM18KG221SN1
10
C50 C51 11 FIX1
FIX2
A A
100n 100n USB3.0-DIP-W

change-layer capacitor for USB2DM&USB2DP

Title
B2264 4Kopen

Size Document Number Rev

A3 07_USB C

Date: Monday, September 10, 2018 Sheet 7 of 18

5 4 3 2 1
 5 4 3 2 1

08_HDMI
The PIO (PIO_HDMI_DP_RX_HOTPLUG) has 2 functionalities:
1-Detect the presence of the +5V_HDMI_RX from the HDMI input connector. This is done to put PIO in input
mode. CN3
2-Set to "0" HDMI_DP_RX_HPD signal to restart the DDC/HDCP init sequence, PIO in open drain output HDMI_RX_2P 1
mode. TX2+

HDMI -19PW
2
HDMI_RX_2N 3 SHD2
1V8_CPU HDMI_RX_1P 4 TX2-
D D
5 TX1+
HDMI_RX_1N 6 SHD1
HDMI_RX_0P TX1-

R44

R45
7
1%

1%
8 TX0+
HDMI_RX_0N 9 SHD0
HDMI_RX_CLKP 10 TX0-
11 TXC+
HDMI_RX_CLKN SHD
249R

240R 12
HDMI_RX_CEC 13 TXC-
14 CEC 23
HDMI_RX_SCL 15 NC G1
3V3_SW U10 U11 HDMI_RX_SDA 16 SCL 22
1 10 1 10 5V_HDMI_RX 17 SDA G2
U1-10 5V_HDMI_RX 2 IO1 NC4 9 2 IO1 NC4 9 18 GND 21
3 IO2 NC3 8 3 IO2 NC3 8 HDMI_RX_HPD 19 +5V G3
AJ6 4 GND GND 7 4 GND GND 7 DET 20
HDMI_RX_REXT AK10 5 IO3 NC2 6 5 IO3 NC2 6 G4
HDMI_TX_REXT IO4 NC1 IO4 NC1

BLM18KG221SN1
R46 R47
10K 1K HSP051-4M10 HSP051-4M10
AN8
HDMI_RX_2P R48
AN7
HDMI_RX_2N AL7 PIO5[4]
HDMI_RX_1P [14] PIO_HDMI_RX_HPD
AL6 5V_SW 5V_RX

F8
HDMI_RX_1N AM5
HDMI_RX_0P AM4 2N7002 27R
HDMI_RX_0N R49
AN3 Q4
HDMI_RX_CKP AN2 5V_SW R50
HDMI_RX_CKN 10K
C 2N7002 C
C52 10K
100n 3V3_SW U12
AL15 1 8
HDMI_TX_2P E0 VCC PIO_EDID_notWP [14]
AL14 2 7
HDMI_TX_2N AM13 5V_RX 5V_AO 3 E1 WC 6 Q5
HDMI_TX_1P AM12 EEPROM Address: R119 4 E2 SCL 5 R118
HDMI_TX_1N AN12 =0xA0 in standby (5V_SW=0 ,,PIO_HDMI_RX_EDPD=x
10K) 2N7002 VSS SDA
HDMI_TX_0P 10K
AN11 or Normal(5V_SW=1,PIO_HDMI_RX_EDPD=1) M24C02
HDMI_TX_0N AL10 =0xAE in Normal(5V_SW=1,PIO_HDMI_RX_EDPD=0)
HDMI_TX_CKP AL9 R51 R52 R53 R54
HDMI_TX_CKN [14] PIO_HDMI_RX_EDPD
47K 47K 1K8 1K8 5V_RX
Q9
CU2
DNC_CU2 CU3 TP5 R55 27R HDMI_RX_SCL C53
DNC_CU3 [14] PIO_HDMI_RX_SCL HDMI_RX_SDA
TP6 R56 27R 100n
[14] PIO_HDMI_RX_SDA PIO_HDMI_RX_SCL
STiH418 R57 27R HDMI_TX_SCL
[14] PIO_HDMI_TX_SCL HDMI_TX_SDA PIO_HDMI_RX_SDA
R58 27R
[14] PIO_HDMI_TX_SDA
CN4
HDMI_TX_2P 1
TX2+

HDMI -19PW
8R2 R62 2
8R2 R59 HDMI_TX_2N 3 SHD2
8R2 R60 HDMI_TX_1P 4 TX2-
8R2 R61 5 TX1+
HDMI_TX_1N 6 SHD1
HDMI_TX_0P 7 TX1-
8R2 R63 8 TX0+
B
8R2 R64 HDMI_TX_0N 9 SHD0 B
8R2 R65 HDMI_TX_CLKP 10 TX0-
8R2 R66 11 TXC+
HDMI_TX_CLKN 12 SHD
HDMI_TX_CEC 13 TXC-
14 CEC 23
5V_HDMI_RX HDMI_TX_SCL 15 NC G1
U13 U14 HDMI_TX_SDA 16 SCL 22
5V_SW 5V_RX 1 10 1 10 5V_HDMI_TX 17 SDA G2
2 IO1 NC4 9 2 IO1 NC4 9 18 GND 21
3 IO2 NC3 8 3 IO2 NC3 8 HDMI_TX_HPD 19 +5V G3
3V3_AO 5V_HDMI_TX 5V_HDMI_RX 4 GND GND 7 4 GND GND 7 DET 20
IO3 NC2 IO3 NC2 G4
1

5 6 5 6 C54
IO4 NC1 IO4 NC1

BLM18KG221SN1
D8
HSP051-4M10 HSP051-4M10 100n
DZ2 DZ1
ESDALC6V1-1M2 ESDALC6V1-1M2
D9 D10
BAT54C HDMI_RX_SCL 1 5 HDMI_RX_CEC R67 27R
BAT54JFILM

F9
[14] PIO_HDMI_TX_HPD
3

PIO2[5] R105 was updated from 33R to 27R

2
R68
HDMI_RX_SDA 3 4 HDMI_RX_HPD 10K
5V_AO 5V_HDMI_TX
ESDALC6V1W5
R69 HDMI_RX_CEC F10 PTC0A35
27K

A
R70 D11 C55 A
0R HDMI_TX_SCL 1 5 HDMI_TX_CEC
100n
2
HDMI_CEC R71 27R
[14] PIO_HDMI_CEC HDMI_TX_SDA HDMI_TX_HPD
3 4
PIO2[4]
R72 ESDALC6V1W5
0R Title
B2264 4Kopen

HDMI_TX_CEC Size Document Number Rev

A3 08_HDMI C

Date: Monday, September 10, 2018 Sheet 8 of 18

5 4 3 2 1
 5 4 3 2 1

09_AUDIO_VIDEO 5V_SW

U1-13
CV1
AJ20 R80 R81
AH20 VDAC_GOUT
VDAC_REXTP 47K 4K7
RA1
7K87 AH19 22u 6V3
1% VDAC_REXTN AH21
VDAC_ROUT CV2
D D

2
1 Q6
AK20 CVBS_O
VDAC_CVOUT MMBT3906/SOT 22u 6V3

3
R82 CV3
75R
AJ21 CVBS_OUTPUT
VDAC_BOUT
CA10

3
AJ19
ADAC_VCM_CEXT CVBS_O 1 QP1 R83 22u 6V3
AJ22 BC846 470R
ADAC_VHI_CEXT

2
10uF 6.3V CA2 CA3 CA4 10uF 6.3V

CA1 10n 10n 1u 6.3V

R84
10K

1V8_CPU 140R R87 R88

R73 4K7 R155 24K 330R
DNF AD2 AJ23 RA2 510R AUD_RIGHT RESISTOR/0402/1
ADC_AIN0 ADAC_RIGHT
R74 4K7 AD1
ADC_AIN1 AH22 RA3 510R AUD_LEFT
ADAC_LEFT

STiH418 CA5 CA6

RT1 RT2 1n 1n
C DT502-3950A/CMFB472*3500DT502-3950A/CMFB472*3500 C

t t
DNF

P_AUDIOB 12V_AO
R75

56R
CA7
47uF J5
R76 PJ-313
10K 1,GND
2,CVBS /Y
3,Audio L/Pb
4,Audio R/Pr

4
8
CA14

4
ABIAS 3 +
CA8 R77 LEFT_OUT
1
B AUD_LEFT 2 B
-
R78
4 U15A 560R 10u,16V
1uF 16V 11K LM358DT
R153 CA12 R121
CA9 1n CVBS_OUTPUT
10K 100K

100n
LEFT_OUT

R79
75K RIGHT_OUT

P_AUDIOB
8

CA15
ABIAS 5 +
CA11 R85 RIGHT_OUT
7
AUD_RIGHT 6 -
A
U15B R86 A
LM358DT 560R 10u,16V R122
4

1uF 16V 11K CA13 100K

1n

Title
R89 B2264 4Kopen
75K
Size Document Number Rev
A3 09_AUDIO_VIDEO C

Date: Sunday, September 16, 2018 Sheet 9 of 18

5 4 3 2 1
 5 4 3 2 1

10_CPU_DIG_POWER

AM11
AM15
AM16

AM20
AM24
AM27
AM28

AM31

CC11
CC13
CC15
CC17

CD10
CD12
CD14
CD16
AN24
AN30

CA11
CA13
CA15
CA17

CB10
CB12
CB14
CB16

CE11
CE13
AB31

AK11
AK13
AK14
AK15
AK16
AK18
AK19
AK21
AK23
AK25
AK26
AK27

AL11
AL12
AL13
AL16
AL18
AL20
AL22
AL23
AL24
AL28
AL29
AL30
AL31
AJ27

AM2

AM3

AM7
AM8
AM9

CC1

CC3
CC5
CC7
CC9

CD2
CD4
CD6
CD8
AD6

AN4

CA3
CA5
CA7
CA9

CB2
CB4
CB6
CB8
AE4
AE6

AK5
AK7
AK8

C14
C18
C19
C22
C26
C27
C28
C31
AF4
A11
A30

AL4
AL5
AL8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CPU_DVDD1V0 12CAPs
CORE_DVDD1V0
CPU_DVDD1V0
CA2
CA4 DVDD1V0 CJ12
DVDD1V0 26CAPs CB1 DVDD1V0 CPU_DVDD1V0 CK11
D D
CB3 DVDD1V0 CPU_DVDD1V0 CK13
CB5 DVDD1V0 CPU_DVDD1V0 CL12
CB7 DVDD1V0 CPU_DVDD1V0 CL14
CC2 DVDD1V0 CPU_DVDD1V0 CM11
CC4 DVDD1V0 CPU_DVDD1V0 CM13
CC6 DVDD1V0 CPU_DVDD1V0 CM15
CC8 DVDD1V0 CPU_DVDD1V0 CM17
CD3 DVDD1V0 CPU_DVDD1V0 CN14
CD5 DVDD1V0 CPU_DVDD1V0 CN16
CD7 DVDD1V0 CPU_DVDD1V0 CP13
CD9 DVDD1V0 CPU_DVDD1V0
CE10 DVDD1V0 LMI_1V5 19CAPs
CE4 DVDD1V0 LMI_1V5
CE8 DVDD1V0
CF11 DVDD1V0 CA10
CF3 DVDD1V0 LMI_DVDD1V5 CA12
CF5 DVDD1V0 LMI_DVDD1V5 CA14
CF7 DVDD1V0 LMI_DVDD1V5 CA16
CF9 DVDD1V0 LMI_DVDD1V5 CA8
CG10 DVDD1V0 LMI_DVDD1V5 CB11
CG12 DVDD1V0 LMI_DVDD1V5 CB13
CG4 DVDD1V0 LMI_DVDD1V5 CB15
CG6 DVDD1V0 LMI_DVDD1V5 CB17
DVDD1V0 LMI_DVDD1V5 CB9
3V3_SW 3V3_CPU_A LMI_DVDD1V5 CC12
LMI_DVDD1V5
F11 CJ1
BLM18KG260TN1 U6 AVDD3V3 LMI_1V5
C AVDD3V3 U1-15 C
STiH418 CC14
LMI_DVDD1V5 CC16
LMI_DVDD1V5 CD11
LMI_DVDD1V5 CD13
LMI_DVDD1V5 CD15
1V8_CPU 1V8_CPU_AVDD LMI_DVDD1V5 CD17
LMI_DVDD1V5 CE14
F12 CH1 LMI_DVDD1V5 CE16
BLM18KG260TN1 CJ2 AVDD1V8 LMI_DVDD1V5
T6 AVDD1V8
AVDD1V8
CPU_FLASH_A
F8
DVDD1V8_3V3_FLASH_A CPU_FLASH_B
E9
DVDD1V8_3V3_FLASH_B
CPU_FLASH_C
F10
DVDD1V8_3V3_FLASH_C

3V3_SW

CG1 CD1
C56 C57 CG2 AO_DVDD1V0_CEXT DVDD3V3 CE1
AO_DVDD1V0_CEXT DVDD3V3 M6
10uF 6.3V 1u 6.3V TP7 R6 DVDD3V3
B AO_DVDD1V8_BACKUP B

CPU_DVDD1V0_VSENSE
CC10

LMI_VSENSE_DVDD1V5
AO_DVDD1V35_1V8

VSENSE_DVDD1V0
CE2
LMI_1V5 CF1 AO_DVDD3V3
AO_DVDD3V3

DNC_CT1
C58
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1u 6.3V
CE15
CE17
CE3
CE5
CE7
CE9
CF10
CF14
CF16
CF2
CF4
CF8
CG11
CG13
CG15
CG17
CG3
CG5
CG7
CG9
CH10
CH12
CH14
CH16
CH2
CH4
CH6
CH8
CJ11
CJ13
CJ15
CJ3
CJ5
CJ7
CJ9
CK1
CK10
CK12
CK14
CK16
CK2
CK4
CK6
CK8
CL1
CL11
CL13
CL15
CL17
CL3
CL5
CL7
CL9
CM10
CM14
CM16
CM2
CM4
CM8
CN1
CN11
CN13
CN15
CN17
CN3
CN5
CN7
CN9
CP10
CP12
CP14
CP16
CP2
CP4

AH4

W28

F28

CT1
3V3_AO
TP8 TP

C59 C60 LMI_VSENSE_DVDD1V5 [12]

10uF 6.3V 1u 6.3V VSENSE_CPU_1V0 [12]

VSENSE_DVDD1V0 [12]

Place 4u7 and 1u caps close to SoC pin

A A

Title
B2264 4Kopen

Size Document Number Rev

A3 10_CPU_DIG_POWER C

Date: Friday, August 31, 2018 Sheet 10 of 18

5 4 3 2 1
 5 4 3 2 1

11_CPU_DIGITAL_DECOUPLING
CORE_DVDD1V0
DVDD1V0 26CAPs

D C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C74 C75 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 C90 C91 D

1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V1u 6.3V 1u 6.3V

C92 C93 C94 C95 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106
CORE_DVDD1V0 49CAPs DNF
CORE_DVDD1V0 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V

C107 C108 C109 C110 C111 C112 C113 C114 C115 C116 C117 C118 C119 C120 C121 C122 C123 C124 C125 C126 C127 C128 C129 C130 C131 C132 C133
DNF DNF DNF DNF
1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V

C C
CPU_DVDD1V0 CPU_DVDD1V0 12+11CAPs

C134 C135 C136 C137 C138 C139 C140 C141 C142 C143 C144 C145 C146 C147 C148 C149 C150 C151 C152 C153 C154 C155 C156

1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V

LMI_1V5 CPU_FLASH_A CPU_FLASH_B CPU_FLASH_C

LMI_1V5 19+12CAPs

C157 C158 C159 C160 C161 C162 C163 C164 C165 C166 C167 C168 C169 C170 C171 C172 C173 C174 C175 C176 C178

1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V

B B

LMI_1V5 1V8_CPU_AVDD 3V3_SW 3V3_CPU_A

C179 C180 C181 C182 C183 C184 C185 C186 C187 C188 C189 C190 C191 C192 C193 C194 C195 C196 C197 C198 C199 C200

1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V 1u 6.3V

A A

Title
B2264 4Kopen

Size Document Number Re v

A4 11_CPU_DIGITAL_DECOUPLING C

Date: Friday, August 31, 2018 Sheet 11 of 18

5 4 3 2 1
 5 4 3 2 1

3V3_AO
12_BOARD_POWER_SUPPLY 12V-->1V0 (CORE) CORE_DVDD1V0
12V_AO SBC_PWR_nDISABLE U26 Imax=4.99A
RP1 4 11
10K FP2 5 IN PG 7 CP5 100n SWPA6045S1R5NT
BLM18KG260TN1 6 IN BS
INPUT VOLTAGE 12V/2A FP1
12V_AO [14]
12
IN
LX
2 LP1
RP2
CP6 CP7 CP9
SBC_PWR_nDISABLE EN
Worst case : 10 9 CP8 220p 120R 47u 6V3 47u 6V3 47u 6V3
DVDD1V0: 4.99A(DCDC AVS),1.2*4.99W 8 ILMT FB 1%
CPU_DVDD1V0 : 1.18 A(DCDC AVS),1.2*1.18W VCC

470n

2u2
0R
JP1 FUSE 13.2V 2.6A RP3 1 3
LMI_DVDD1V5: 0.87A(DCDC),1.5*0.87W 47K GND GND
1 AVDD1V8: 0.16A(LDO),3.3*0.16 DNF CP11 1% 1%
D SY8368A D
DVDD3VD: 0.035A (DCDC)

CP12

CP13
10u,16V RP5 10K RP6 130R RP7 0R
IAO_DVDD1V35_1V8: 0.015A VSENSE_DVDD1V0 [10]

RP4
2 IAO_DVDD3V3: 0.02A 1%
CP10 5.0V USB2.0X2+USB3.0: 2A(DCDC) RP8 51K RP9 3K6 RP10 1% 10K
DVDD_1V0_AVS [14]
3 10u,16V ILMIT: Ground -->6A 1%
DC Jack DC-005Aø2.0 Floating-->9A
High(3V3) -->12A RP11 CP14 RP12 RP13
10K 10K
1% 100n 3K6 3V3_AO
12V_AO

FP3
12V-->5V_AO C201 100n AVS nominal voltage range is 0.78V-1.30V

BLM18KG260TN1

6
U16 SWPA6045S6R8MT 5V_AO Imax=1.18A
L1
12V-->1V0 (CPU) CPU_DVDD1V0

BS
LP2
4 5 SWPA4030S1R5NT
IN LX 5V_AO
SY8089
FP4 UP2

C204 22u 6V3

C205 22u 6V3

SY8104ADC C202 R91 CP17 3n3
R90
6n8 42K2 4 3 RP14 CP16 CP15 3V3_AO
2 1 1% IN LX 2 120R 22u 6V3 22u 6V3
EN GND FB BLM18KG221SN1 GND
C203 5 1
10u,16V R93 R92 1% 33K CP18 FB EN
100K 10K RP15
3

1% 10uF 6.3V 10K

C SBC_PWR_nDISABLE RP16 10KRP37 130R RP17 0R C
VSENSE_CPU_1V0 [10]
1%
VFB=0.6V RP18 51K RP36 3K6 RP19 10K
CPU_1V0_AVS [14]
1% 1%
RP20 CP21
12V_AO 10K 100n RP21
3K6
12V-->3V3_AO C206 100n
1%

FP5
BLM18KG260TN1
3V3_AO AVS nominal valtage range is 0.78V-1.30V
6

U17 L2 SWPA4030S4R7MT 3V3_JTAG

BS

4 5 RP23 0R
IN LX
5V_AO-->5V_SW

22u 6V3

22u 6V3
12V_AO
SY8104ADC C207 R95
R94
6n8 12K4
2 1 1% 5V_AO 5V_SW
GND

C208 EN FB

4
C209

C210
10u,16V R96 1% 33K UP3 RP27 0R
100K R97 LD1117AS18TR RP24 DNF

VOUT
3

1% 10K
100K RP28 2 3

Spacer

VOUT
1M CP23 QP3 SI2399DS

GND
VIN

1
B B
22n J13
RP29

1
3V3_SW 0.16+0.015A 1V8_CPU 220K 1
2
3V3_AO 1V8_CPU
SBC_PWR_nDISABLE RP34 100K 3V3_AO-->3V3_SW 2P2.54mm
CP24 CP25 CP26 3V3_AO 3V3_SW
F13 100n 22u 6V3 100n J14
BLM18KG221SN1 RP30 0R
Fan control 3.3V-->LMI_1V5
DNF 1
2
Imax=0.87+0.64A+0.015A=1.565A RP31 2 3
12V_AO SY8089 LMI_1V5
2P2.00mm UP4 L3 SWPA4030S1R5NT
1M CP27 QP4 SI2399DS 2P2.54mm
4 3

1
2 IN LX 2 100n
1 FANO 5 GND 1 RP32
FB EN 100K
R98 CP19 CP20
J15 R100 562R 22u 6V3 22u 6V3
C213 390p 1%

3
100K
2N7002K C214 R102 SBC_PWR_nDISABLE RP33 100K 1 QP5
[15] FAN Q10 BC846
VFB=0.6V R101 0R
10uF 6.3V CP28
LMI_VSENSE_DVDD1V5 [10]

2
R120 15K 1%
100K 220n
A R103 A
10K
1% H3 H4 H5 H1 H2
PCB hole M3PCB hole M3PCB hole M3 H10
PCB hole M3 PCB hole M3 PCB hole M3

Title
1

B2264 4Kopen
1

Size Document Number Rev

A3 12_BOARD_POWER_SUPPLY C

Date: Sunday, September 16, 2018 Sheet 12 of 18

5 4 3 2 1
 5 4 3 2 1

13_POWER_SUPPLIES_LMIVTT

3V3_AO
R104 10K VTT_ENABLE
D D

R105
4K7

3
R106 4K7 1 Q8
[3,4,14] LMI_notRET_PIO BC846

2
C
1.5V--->0.75V C
LMI_1V5

C218 U19
1 8
10uF 6.3V VIN NC8
2 7 3V3_AO
GND NC7
LMI_1V5 RO1 1% 1K 3 6
REFEN VCNTL

EPAD
LMI_VTT 4 5
VOUT NC5 C220
C219 RO2 NCT3101S 100n

9
100n 1K C221
1%
10uF 6.3V
VTT_ENABLE

Q7
B 2N7002 B

LMI_notRET_PIO VTT_ENABLE LMI_notRETENTION

3.3V 0V 1.5V

0V 3.3V 0V

A A

Title
B2264 4Kopen

Size Document Number Re v

A4 13_POWER_SUPPLIES_LMIVTT C

Date: Monday, September 10, 2018 Sheet 13 of 18

5 4 3 2 1
 5 4 3 2 1

14_PIO0_TO_PIO5_SBC
3V3_AO
R107 10K IR_IN

U1-4 PIOs SBC

AJ9 M_RGMII1_TXD0
PIO0_AO_0_MII1_TXD_0_LPM_TESTBUS_0_0 AH7 M_RGMII1_TXD1 M_RGMII1_TXD0 [18]
E PIO0_AO_1_MII1_TXD_1_LPM_TESTBUS_0_1 M_RGMII1_TXD1 [18] E
AJ7 M_RGMII1_TXD2
PIO0_AO_2_MII1_TXD_2_KEY_SCAN_IN_0_LPM_TESTBUS_0_2 AH6 M_RGMII1_TXD3 M_RGMII1_TXD2 [18] 3V3_AO
PIO0_AO_3_MII1_TXD_3_KEY_SCAN_IN_1_LPM_TESTBUS_0_3 AL3 RTL8211_notINT M_RGMII1_TXD3 [18]
PIO0_AO_4_MII1_TXER_KEY_SCAN_IN_2_EXT_IT_0_LPM_TESTBUS_0_4 M_RGMII1_TXEN RTL8211_notINT [18]
AJ8
PIO0_AO_5_MII1_TX_EN_LPM_TESTBUS_0_5 AJ5 M_RGMII1_TXEN [18]
PIO0_AO_6_MII1_TXCLK_KEY_SCAN_OUT_2_SBC_SYS_CLK_IN_ALT_ACG_CLK_OBS1_LPM_TESTBUS_0_6 M_RGMII1_notRESET PIO0_6 [15]
AJ12
PIO0_AO_7_MII1_COL_RMII1_COL_EXT_IT_1_LPM_TESTBUS_0_7 M_RGMII1_notRESET [18]

AH8 M_RGMII1_MDIO
PIO1_AO_0_MII1_MDIO_LPM_TESTBUS_0_8 M_RGMII1_MDC M_RGMII1_MDIO [18]
AH5
PIO1_AO_1_MII1_MDC_RMII1_MDC_LPM_TESTBUS_0_9 AL1 M_RGMII1_MDC [18] D15 Application LED
PIO1_AO_2_MII1_CRS_RMII1_CRS_LPM_TESTBUS_0_10 AJ2 POW_LED_nGREEN ETH_PENn [18]
PIO1_AO_3_MII1_MDINT_LPM_TESTBUS_0_11 KHS0805EGC GREEN
AH12 M_RGMII1_RXD0
PIO1_AO_4_MII1_RXD_0_LPM_TESTBUS_0_12 M_RGMII1_RXD1 M_RGMII1_RXD0 [18]
AH11
PIO1_AO_5_MII1_RXD_1_LPM_TESTBUS_0_13 M_RGMII1_RXD2 M_RGMII1_RXD1 [18]
AJ11
PIO1_AO_6_MII1_RXD_2_KEY_SCAN_OUT_0_LPM_TESTBUS_0_14 M_RGMII1_RXD3 M_RGMII1_RXD2 [18]
AH10
PIO1_AO_7_MII1_RXD_3_KEY_SCAN_OUT_1_LPM_TESTBUS_0_15 M_RGMII1_RXD3 [18]
Green :3V

AJ13 M_RGMII1_RXDV R110

PIO2_AO_0_MII1_RXDV_LPM_TESTBUS_1_0 M_MII1_RXER M_RGMII1_RXDV [18]
AH9 R108 100K 1K
PIO2_AO_1_MII1_RXER_LPM_TESTBUS_1_1 AJ10 M_RGMII1_RXCLK MII debug proposal
PIO2_AO_2_MII1_RXCLK_LPM_TESTBUS_1_2 AK9 M_RGMII1_PHYCLK M_RGMII1_RXCLK [18]
PIO2_AO_3_MII1_PHYCLK_MII1_PHYCLK_GMII1_GTXCLK_LPM_TESTBUS_1_3 AH17 PIO_HDMI_CEC M_RGMII1_PHYCLK [18]
D PIO2_AO_4_HDMI_CEC_LPM_TESTBUS_1_4 PIO_HDMI_CEC [8] D
AG1 PIO_EDID_notWP POW_LED_nGREEN
PIO2_AO_5_LPM_TESTBUS_1_5 UART11_TXD PIO_EDID_notWP [8]
AK3
PIO2_AO_6_KEY_SCAN_IN_3_UART11_TXD_MII1_TXD_4_LPM_TESTBUS_1_6 UART11_RXD PIO2_6 [15]
AK1
PIO2_AO_7_KEY_SCAN_OUT_3_UART11_RXD_MII1_TXD_5_LPM_TESTBUS_1_7 PIO2_7 [15]

AH2 DVDD_1V0_AVS
PIO3_AO_0_PWM10_OUT_SSC11_MRST_UART11_CTS_MII1_RXD_4_LPM_TESTBUS_1_8 AJ14 PIO_PCIE_notINT DVDD_1V0_AVS [12]
PIO3_AO_1_PWM10_COMPAREOUT_SSC11_MTSR_UART11_RTS_MII1_RXD_5_LPM_TESTBUS_1_9 SBC_PWR_CTRL PIO_PCIE_notINT [6]
AJ15
PIO3_AO_2_PWM10_CAPTUREIN_SSC11_SCL_UART11_NOT_OE_MII1_RXD_6_LPM_TESTBUS_1_10 AH13 STANBY_nKEY
PIO3_AO_3_FP_RESETN_EXT_IT_2_MII1_RXD_7_LPM_TESTBUS_1_11 UART10_TXD PIO3_3 [15]
AF3
PIO3_AO_4_UART10_TXD_SSC12_MRST_LPM_TESTBUS_1_12 UART10_RXD PIO3_4 [15]
AG2
PIO3_AO_5_UART10_RXD_ACG_CLK_OBS0_LPM_TESTBUS_1_13 PIO3_5 [15]
AG3
PIO3_AO_6_UART10_CTS_SSC12_MTSR_LPM_TESTBUS_1_14 M_RGMII1_CLK125 PME [18]
AJ4
PIO3_AO_7_UART10_RTS_SSC12_SCL_MII1_CLK_125_LPM_TESTBUS_1_15 M_RGMII1_CLK125 [18]

AH3 IR_IN
PIO4_AO_0_UART10_NOT_OE_IRB10_IR_IN_KEY_SCAN_IN_0 PIO4_0 [15]
AK2
PIO4_AO_1_IRB10_UHF_IN_MII1_TXD_6_KEY_SCAN_IN_1 PIO4_1 [15]
AK6
PIO4_AO_2_PWM11_COMPAREOUT_IRB10_IR_DATA_OUT_MII1_TXD_7_KEY_SCAN_OUT_0 PIO4_2 [15]
AK4
PIO4_AO_3_PWM11_CAPTUREIN_IRB10_DATA_OUT_OD_EXT_IT_3_MII1_PHY_REF_CLK_LPM_CLK_KEY_SCAN_OUT_1 PIO4_3 [15]
AJ3
PIO4_AO_4_PWM11_OUT_SBC_OBS_NOTRST_KEY_SCAN_IN_0 PIO4_4 [15]
AL2
PIO4_AO_5_SSC10_SCL_TRIGGER_IN_KEY_SCAN_IN_1 PIO4_5 [15]
AM1 J6 6*6*5T
PIO4_AO_6_SSC10_MTSR_TRIGGER_OUT_PWM12_OUT_KEY_SCAN_OUT_0 CPU_1V0_AVS PIO4_6 [15] 3V3_AO
C AK12 C
PIO4_AO_7_SSC10_MRST_RTC_EXT_CLK_PWM13_OUT_KEY_SCAN_OUT_1 CPU_1V0_AVS [12] Application button
R112 47K STANBY_nKEY
AJ18 PIO_HDMI_TX_SCL
PIO5_AO_0_SSC11_SCL AJ17 PIO_HDMI_TX_SDA PIO_HDMI_TX_SCL [8] C63
PIO5_AO_1_SSC11_MTSR LMI_notRET_PIO PIO_HDMI_TX_SDA [8]
AH1
PIO5_AO_2_KEY_SCAN_OUT_2 AH15 PIO_HDMI_TX_HPD LMI_notRET_PIO [3,4,13] 1n
PIO5_AO_3_HDMI_TX_HOT_PLUG PIO_HDMI_RX_HPD PIO_HDMI_TX_HPD [8]
5V Tolerance AH14
PIO5_AO_4_HDMI_RX_HPD PIO_HDMI_RX_EDPD PIO_HDMI_RX_HPD [8]
AH16
PIO5_AO_5_HDMI_RX_EDPD PIO_HDMI_RX_SDA PIO_HDMI_RX_EDPD [8]
AH18
PIO5_AO_6_HDMI_RX_DDC_SDA PIO_HDMI_RX_SCL PIO_HDMI_RX_SDA [8]
AJ16
PIO5_AO_7_HDMI_RX_DDC_SCL PIO_HDMI_RX_SCL [8]

STiH418
SBC
SBC_PWR_CTRL R111 0R
SBC_PWR_nDISABLE [12]

B B

HW version identification
3V3_AO

R113 R114

10K 10K
UART10_TXD
DNF UART11_TXD UART10_TXD UART11_TXD
A
Board Version PIO34 PIO26 A
R115 R116
Ver B2264 A01 and B01 0 0

Ver B2264C01 0 1
10K 10K Title
DNF 1 0 B2264 4Kopen

1 1 Size Document Number Rev

A3 14_PIO0_to_PIO5_SBC C

Date: Friday, September 07, 2018 Sheet 14 of 18

5 4 3 2 1
 5 4 3 2 1

15_PIO10_TO_PIO20
U1-6 PIO1X PIO2X
U1-5 PIO1X PIO2X
J4
B7 PIO16_0_UART1_TXD_SC1_C4_UART_DVBCI_ADDR_6_CLOCKGEN_A_10_OBS_0 K6
PIO10_0_TSIN0_ERROR_MTSIN0_ERROR_EMMC_DEBUG_0 AA3 PIO16_1_UART1_RXD_SC1_C7_UART_DVBCI_ADDR_5_CLOCKGEN_A_10_OBS_1 L3
PIO10_1_TSIN0_VALID_MTSIN0_VALID_EMMC_DEBUG_1 Y4 PIO16_2_UART1_CTS_SC1_NOT_SET_VCC_DVBCI_ADDR_4_CLOCKGEN_A_11_OBS_0 K4 MODE3
PIO10_2_TSIN0_PACKETCLK_MTSIN0_PACKETCLK_EMMC_DEBUG_2 PIO16_3_UART1_RTS_SC1_NOT_SET_VPP_DVBCI_ADDR_3_CLOCKGEN_B_10_OBS_0 MODE3 [5]
W3 N5 MODE4
PIO10_3_TSIN0_BYTECLK_MTSIN0_BYTECLK_EMMC_DEBUG_3 LCD_CS [16] PIO16_4_UART1_NOT_OE_SC1_RESET_DVBCI_ADDR_2_CLOCKGEN_B_10_OBS_1 MODE4 [5]
E L5 N2 E
PIO10_4_TSIN0_DATA_7_MTSIN0_DATA_7_EMMC_DEBUG_4 H3 PIO16_5_SC1_CLKGEN_DVBCI_ADDR_1_CLOCKGEN_A_11_OBS_1 N3
PIO10_5_TSIN0_DATA_6_SSC0_SCL_MTSIN0_DATA_6_EMMC_DEBUG_5 PIO16_6_SC1_C8_UART_CLOCKGEN_C_10_OBS_0_EMMC_DATA_4_SD_LED PIO16_6 [15]
G6 M4
PIO10_6_TSIN0_DATA_5_SSC0_MTSR_MTSIN0_DATA_5_EMMC_DEBUG_6 PIO16_7_SC1_DETECT_CLOCKGEN_C_10_OBS_1_EMMC_DATA_5_SD_PWREN PIO16_7 [15]
B3
PIO10_7_TSIN0_DATA_4_SSC0_MRST_MTSIN0_DATA_4_EMMC_DEBUG_7
V4
PIO17_0_UART0_TXD_SC0_C4_UART_CLOCKGEN_D_13_OBS_0 PIO17_0 [15]
F5 U3
PIO11_0_TSIN0_DATA_3_SSC1_SCL_MTSIN0_DATA_3 PIO17_1_UART0_RXD_SC0_C7_UART_CLOCKGEN_D_13_OBS_1 PIO17_1 [15]
AC3 M2 SC0CMDVCC
PIO11_1_TSIN0_DATA_2_SSC1_MTSR_MTSIN0_DATA_2 PIO17_2_UART0_CTS_SC0_NOT_SET_VCC_MCHI_SCLK_ALT_PHY_TCK PIO17_2 [15]
AB3 L1
PIO11_2_TSIN0_DATA_1_SSC1_MRST_MTSIN0_DATA_1_SBAG_SYNC PIO17_3_UART0_RTS_SC0_NOT_SET_VPP_MCHI_SCTL_ALT_PHY_TDO MODE5 [5]
AA2 Y3
PIO11_3_TSIN0_DATA_0_MTSIN0_DATA_0_SBAG_DATA_0_STM_DATA_0 PIO17_4_UART0_NOT_OE_SC0_RESET_MCHI_SDI_ALT_PHY_TDI PIO17_3 [5,15]
E8 U2
PIO11_4_TSIN1_ERROR_TSOUT0_ERROR_SBAG_DATA_1_STM_DATA_1 H5 PIO17_5_SSC3_MRST_SC0_CLKGEN_MCHI_SDO_ALT_PHY_TMS W5
PIO11_5_TSIN1_VALID_TSOUT0_VALID_SBAG_DATA_2_STM_DATA_2 PIO17_6_SSC3_SCL_SC0_C8_UART_ALT_PHY_TRST LCD_SCL [16]
L6 T4
PIO11_6_TSIN1_PACKETCLK_TSOUT0_PACKETCLK_SBAG_DATA_3_STM_DATA_3 PIO17_7_SSC3_MTSR_SC0_DETECT LCD_SDI [16]
H4
PIO11_7_TSIN1_BYTECLK_TSOUT0_BYTECLK_SBAG_CLK_STM_CLK
AA5
T5 PIO18_0_TSIN5_ERROR_DVBCI_DATA_0_RNG10_RAW_DATA Y5
PIO12_0_TSIN1_DATA_7_TSOUT0_DATA_7_EMMC_DEBUG_8 P5 PIO18_1_TSIN5_VALID_DVBCI_DATA_1_RNG11_RAW_DATA Y1
PIO12_1_TSIN1_DATA_6_TSOUT0_DATA_6_EMMC_DEBUG_9 V3 PIO18_2_TSIN5_PACKETCLK_DVBCI_DATA_2_RNG12_RAW_DATA A7
PIO12_2_TSIN1_DATA_5_TSOUT0_DATA_5_EMMC_DEBUG_10 PIO18_3_TSIN5_BYTECLK_DVBCI_DATA_3 FAN [12]
P4 E7
PIO12_3_TSIN1_DATA_4_TSOUT0_DATA_4_EMMC_DEBUG_11 M1 PIO18_4_TSIN5_DATA_7_DVBCI_DATA_4 F7
PIO12_4_TSIN1_DATA_3_TSOUT0_DATA_3_EMMC_DEBUG_12 L2 PIO18_5_SSC3_SCL_DVBCI_DATA_5 CA1
PIO12_5_TSIN1_DATA_2_SSC2_SCL_TSOUT0_DATA_2_EMMC_DEBUG_13 L4 PIO18_6_SSC3_MTSR_DVBCI_DATA_6 A6
PIO12_6_TSIN1_DATA_1_SSC2_MTSR_TSOUT0_DATA_1_EMMC_DEBUG_14 M3 PIO18_7_SSC3_MRST_DVBCI_DATA_7
D PIO12_7_TSIN1_DATA_0_SSC2_MRST_TSOUT0_DATA_0_EMMC_DEBUG_15 D

J5
E12 PIO19_0_TSOUT1_ERROR_TSIN5_ERROR_DVBCI_CDN_SSC1_SCL_EMMC_DATA_6_SD_CD J3
PIO13_0_TSIN2_ERROR_DENC_CFC PIO19_1_TSOUT1_VALID_TSIN5_VALID_DVBCI_VS1N_SSC1_MTSR_EMMC_DATA_7_SD_WP LCDTS_RESET [16]
D12 W2
PIO13_1_TSIN2_VALID PIO19_2_TSOUT1_PACKETCLK_TSIN5_PACKETCLK_DVBCI_RESET_SSC1_MRST_EMMC_SD_CMD LCD_DISP [16]
E14 A3
PIO13_2_TSIN2_PACKETCLK_TPIU_CTL PIO19_3_TSOUT1_BYTECLK_TSIN5_BYTECLK_DVBCI_PWR1_EMMC_SD_CLK SD_D0 LCDTS_INT [16]
E10 B5
PIO13_3_TSIN2_BYTECLK_JITTER_CLK_OBS_TPIU_CLK PIO19_4_TSOUT1_DATA_7_TSIN5_DATA_7_DVBCI_PWR2_EMMC_SD_DATA_0 LCD_BL [16]
C8 C3
PIO13_4_TSIN2_DATA_7_TPIU_DATA_0 D8 PIO19_5_SSC0_MRST_DVBCI_INT_EMMC_SD_DATA_1 W4
PIO13_5_TSIN3_ERROR_TSIN2_DATA_6_SSC3_SCL_TPIU_DATA_1 D7 PIO19_6_SSC0_SCL_EMMC_SD_DATA_2 M5
PIO13_6_TSIN3_VALID_TSIN2_DATA_5_SSC3_MTSR_EXT_DMA_REQ0 PIO13_6 [15] PIO19_7_SSC0_MTSR_EMMC_SD_DATA_3
B6
PIO13_7_TSIN3_PACKETCLK_TSIN2_DATA_4_SSC3_MRST_EXT_DMA_REQ1 PIO13_7 [15]
K3
B4 PIO20_0_TSIN4_ERROR_DVBCI_IOWR W1
PIO14_0_TSIN3_BYTECLK_TSIN2_DATA_3_TPIU_DATA_2 E13 PIO20_1_TSIN4_VALID_DVBCI_ADDR_0 H6
PIO14_1_TSIN3_DATA_7_TSIN2_DATA_2_TPIU_DATA_3 C9 PIO20_2_TSIN4_PACKETCLK_DVBCI_WEN H2
PIO14_2_SSC1_SCL_TSIN2_DATA_1_TSIN4_ERROR_TPIU_DATA_4 PIO14_2 [15] PIO20_3_TSIN4_BYTECLK_DVBCI_IORDN
E11 AA4
PIO14_3_SSC1_MTSR_TSIN2_DATA_0_TSIN4_VALID_TPIU_DATA_5 PIO14_3 [15] PIO20_4_TSIN4_DATA_7_DVBCI_WAIT
C7 U4 MODE6
PIO14_4_SSC1_MRST_TSIN4_PACKETCLK_TPIU_DATA_6_TRIGGER_IN PIO14_4 [15] PIO20_5_DVBCI_REG_MMC_BOOT_DATA_ERROR MODE6 [5]
F12 A4 MODE7
PIO14_5_SSC2_SCL_TSIN4_BYTECLK_TPIU_EXT_CLK_TRIGGER_OUT TSIN4_D7 PIO14_5 [15] PIO20_6_DVBCI_OEN MODE7 [5]
D14 C6 MODE8
PIO14_6_SSC2_MTSR_TSIN4_DATA_7_TPIU_DATA_7 PIO14_6 [15] PIO20_7_DVBCI_CS MODE8 [5]
Y2
PIO14_7_SSC2_MRST_EXT_IT_4
Ftont
STiH418
C G5 MODE0 C
PIO15_0_UART2_TXD_DVBCI_ADDR_14_TPIU_DATA_8 MODE0 [5]
F6
PIO15_1_UART2_RXD_DVBCI_ADDR_13_TPIU_DATA_9 J2
PIO15_2_UART2_CTS_DVBCI_ADDR_12_TPIU_DATA_10 C4 LCD_RSTn [16]
PIO15_3_UART2_RTS_DVBCI_ADDR_11_TPIU_DATA_11 MODE2 [5]
C5
PIO15_4_UART2_NOT_OE_NMI_DVBCI_ADDR_10_TPIU_DATA_12 PIO15_4 [15]
A2
PIO15_5_SSC2_SCL_DVBCI_ADDR_9_TPIU_DATA_13 E6
PIO15_6_SSC2_MTSR_DVBCI_ADDR_8_TPIU_DATA_14 J6
PIO15_7_SSC2_MRST_DVBCI_ADDR_7_TPIU_DATA_15
Front
STiH418
EXT_P3 1 8 3V3_SW
40 pins GPIO connector EXT_P5 2 7
PIO4_6 [14,15]
EXT_P7 PIO4_5 [14,15]
3V3_AO 3 6
EXT_P8 PIO4_4 [14]
FP10 4 5
RL29 56R PIO3_4 [14]
BLM18KG221SN1 RXC RXD
DNF 5V_SW 4K7 4K7
3V3_SW FP7 EXT_P10 1 8
EXT_P12 PIO3_5 [14]
FP6 2 7
EXT_P11 PIO34_7 [16]
BLM18KG221SN1 BLM18KG221SN1 3 6
EXT_P13 PIO2_7 [14]
C226 C227 4 5
RL30 56R PIO2_6 [14]
100n 100n
EXT_P15 PIO4_6 [14,15]
B 1 8 I2C SSC10 pull-up B
EXT_P16 PIO0_6 [14] PIO4_5 [14,15]
2 7
EXT_P18 PIO33_4 [5,16]
J8 3 6
EXT_P19 PIO33_5 [16]
4 5 3V3_SW
RL31 56R PIO34_1 [16]
1 2
EXT_P3 3 4 EXT_P21 1 8
EXT_P5 EXT_P22 PIO34_2 [16]
5 6 2 7
EXT_P7 EXT_P8 EXT_P24 PIO33_6 [16]
7 8 3 6
EXT_P10 EXT_P23 PIO34_6 [16]
9 10 4 5 RXE RXB
EXT_P11 EXT_P12 RL32 56R PIO34_0 [16]
11 12 4K7 4K7
EXT_P13 13 14
EXT_P15 EXT_P16 EXT_P26 PIO13_6 [15]
15 16 1 8
EXT_P18 EXT_P28 PIO3_3 [14]
17 18 2 7
EXT_P19 EXT_P27 PIO14_5 [15]
19 20 3 6
EXT_P21 EXT_P22 EXT_P29 PIO14_6 [15]
21 22 4 5
EXT_P23 EXT_P24 RL33 RX9 PIO4_0 [14] PIO14_5 [15]
23 24 56R 56R I2C SSC2 pull-up
EXT_P26 PIO4_2 [14] PIO14_6 [15]
25 26
EXT_P27 27 28 EXT_P28 RXA 56R
EXT_P29 EXT_P31 PIO4_3 [14]
29 30 1 8
EXT_P31 EXT_P32 EXT_P33 PIO4_1 [14]
31 32 2 7
EXT_P33 EXT_P35 PIO16_7 [15]
33 34 3 6
EXT_P35 EXT_P36 EXT_P37 PIO14_4 [15]
35 36 4 5
EXT_P37 EXT_P38 RL34 56R PIO33_7 [16]
37 38
EXT_P40 PIO13_7 [15]
A 39 40 A
EXT_P32 RX1 56R
EXT_P36 PIO17_3 [5,15]
RX2 56R
EXT_P38 PIO17_2 [15]
2*20/2.54mm RX3 56R
EXT_P40 PIO14_3 [15]
RX4 56R
PIO14_2 [15] Title
40 pins GPIO B2264 4Kopen
connector RX5 56R
PIO16_6 [15] Size Document Number Rev
RX6 56R
PIO15_4 [15] A3 15_PIO10_to_PIO20 C
RX7 56R
PIO17_0 [15]
RX8 56R
PIO17_1 [15] Date: Monday, September 03, 2018 Sheet 15 of 18
5 4 3 2 1
 5 4 3 2 1

16_PIO30_TO_PIO35_DVO
CORE_DVDD1V0 49CAPs
PIO3X

G31
H29

N30

U29
U30
E23
E26
E29
E31

P30

V31

Y29
F11
F14
F18
F20

L29
J30

W6
U1-7 CORE_DVDD1V0

D5
D6

N4

R4
R5
K5

P6

V5
V6

Y6
F4
F9

T3
U1-9
AG31 DVO_HS

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PIO30_0_SSC4_SCL_DVO0_HS_IPS_DBG_BUS_0 AH31 DVO_VS CPU_DVDD1V0 11CAPs
PIO30_1_SSC4_MTSR_DVO0_VS_IPS_DBG_BUS_1 AK31 DVO_DE Mini PCIe 1 CPU_DVDD1V0
PIO30_2_SSC4_MRST_DVO0_DE_IPS_DBG_BUS_2 AE30 DVO_CK CG8
PIO30_3_DVO0_CK_MIPHY_CLK_OSC_PX_CLK_TX_DVP_IN_CLK_PCS_DBG_CLOCK_IPS_DBG_BUS_3 AE31 DVO_D0 DVDD1V0 CH11
PIO30_4_DVO0_D_0_IPS_DBG_BUS_4 AD31 DVO_D1 CP15 DVDD1V0 CH3
PIO30_5_DVO0_D_1_IPS_DBG_BUS_5 AE32 DVO_D2 CP17 CPU_DVDD1V0 DVDD1V0 CH5
D D
PIO30_6_DVO0_D_2_IPS_DBG_BUS_6 AC32 DVO_D3 CR12 CPU_DVDD1V0 DVDD1V0 CH7
PIO30_7_DVO0_D_3_IPS_DBG_BUS_7 CR14 CPU_DVDD1V0 DVDD1V0 CH9
CR16 CPU_DVDD1V0 DVDD1V0 CJ10
AE28 DVO_D4 CT13 CPU_DVDD1V0 DVDD1V0 CJ4
PIO31_0_PWM0_CAPTUREIN_DVO0_D_4_EB_FILL_0_PX_CLK_RX_DVP_IN_HSYNC_PCS_DBG_DATA_0_HSL_DEBUG_BUS_0 AF29 DVO_D5 CT15 CPU_DVDD1V0 DVDD1V0 CJ6
PIO31_1_PWM0_OUT_DVO0_D_5_EB_FILL_1_PX_SIGDET_DVP_IN_VSYNC_PCS_DBG_DATA_1_HSL_DEBUG_BUS_1 AF30 DVO_D6 CT17 CPU_DVDD1V0 DVDD1V0 CJ8
PIO31_2_PWM0_COMPAREOUT_DVO0_D_6_EB_FILL_2_PX_SIGDET_RAW_DVP_IN_DATA_VALID_PCS_DBG_DATA_2_HSL_DEBUG_BUS_2 AE29 DVO_D7 CU12 CPU_DVDD1V0 DVDD1V0 CK3
PIO31_3_UART3_TXD_DVO0_D_7_EB_FILL_3_PX_HFC_READY_PCS_DBG_DATA_3_HSL_DEBUG_BUS_3 DVO_D8 MODE11 [5] CPU_DVDD1V0 DVDD1V0
AB28 CU14 CK5
PIO31_4_UART3_RXD_DVO0_D_8_EB_FILL_4_PX_PHY_READY_DVP_IN_DATA_4_PCS_DBG_DATA_4_HSL_DEBUG_BUS_4 W29 DVO_D9 CU16 CPU_DVDD1V0 DVDD1V0 CK7
PIO31_5_UART3_CTS_DVO0_D_9_PX_AT_OK_DVP_IN_DATA_5_PCS_DBG_DATA_5_HSL_DEBUG_BUS_5 AD30 DVO_D10 CPU_DVDD1V0 DVDD1V0 CK9
PIO31_6_UART3_RTS_DVO0_D_10_DVP_IN_DATA_6_PCS_DBG_DATA_6_HSL_DEBUG_BUS_6 AB30 DVO_D11 DVDD1V0 CL10
PIO31_7_UART3_NOT_OE_DVO0_D_11_DVP_IN_DATA_7_PCS_DBG_DATA_7_HSL_DEBUG_BUS_7 DVDD1V0 CL2
DVDD1V0 CL4
AC28 DVO_D12 AF28 DVDD1V0 CL6
PIO32_0_HSYNC_DVO0_D_12_DVP_IN_DATA_0_IPS_DBG_BUS_8 AD28 DVO_D13 AH23 DNC_AF28 DVDD1V0 CL8
PIO32_1_VSYNC_DVO0_D_13_DVP_IN_DATA_1_IPS_DBG_BUS_9 AC29 DVO_D14 AH24 DNC_AH23 DVDD1V0 CM1
PIO32_2_DVO0_D_14_DVP_IN_DATA_2_IPS_DBG_BUS_10 AD29 DVO_D15 AH25 DNC_AH24 DVDD1V0 CM3
PIO32_3_DVO0_D_15_DVP_IN_DATA_3_IPS_DBG_BUS_11 AB29 DVO_D16 AJ24 DNC_AH25 DVDD1V0 CM5
PIO32_4_AUDPCMIN0_DATA_0_DVO0_D_16_DVP_IN_DATA_8_IPS_DBG_BUS_12 Y30 DVO_D17 AJ25 DNC_AJ24 DVDD1V0 CM7
PIO32_5_AUDPCMIN0_MCLK_DVO0_D_17_DVP_IN_DATA_9_IPS_DBG_BUS_13 AA29 DVO_D18 AK24 DNC_AJ25 DVDD1V0 CM9
PIO32_6_AUDPCMIN0_SCLK_DVO0_D_18_DVP_IN_DATA_10_IPS_DBG_BUS_14 AA28 DVO_D19 CU1 DNC_AK24 DVDD1V0 CN10
PIO32_7_AUDPCMIN0_LRCLK_DVO0_D_19_DVP_IN_DATA_11_IPS_DBG_BUS_15 Y28 DNC_CU1 DVDD1V0 CN2
H1 DNC_Y28 DVDD1V0 CN4
AC30 DVO_D20 G4 DNC_H1 DVDD1V0 CN8
PIO33_0_AUDPCMIN0_DATA_1_DVO0_D_20_DVP_IN_DATA_16_IPS_DBG_BUS_16 AC33 DVO_D21 DNC_G4 DVDD1V0 CP1
PIO33_1_AUDPCMIN0_DATA_2_DVO0_D_21_DVP_IN_DATA_17_IPS_DBG_BUS_17 AB33 DVO_D22 DVDD1V0 CP11
PIO33_2_AUDPCMIN0_DATA_3_DVO0_D_22_DVP_IN_DATA_18_IPS_DBG_BUS_18 DVO_D23 PIO33_4 [5,15] DVDD1V0
AC31 CP3
PIO33_3_DVO0_D_23_DVP_IN_DATA_19_IPS_DBG_BUS_19 AH28 DVDD1V0 CP5
PIO33_4_AUDPCMOUT0_DATA_0_CLOCKGEN_D_10_OBS_0_IPS_DBG_BUS_20 MODE9 [5,15] LMI_1V5 DVDD1V0
C AF33 CP7 C
PIO33_5_AUDPCMOUT0_MCLK_IPS_DBG_BUS_21 PIO33_5 [15] DVDD1V0
AG28 CP9
PIO33_6_AUDPCMOUT0_SCLK_AUDPCMIN0_DATA_2_IPS_DBG_BUS_22 PIO33_6 [15] DVDD1V0
AH30 CR10
PIO33_7_AUDPCMOUT0_LRCLK_AUDPCMIN0_DATA_3_IPS_DBG_BUS_23 PIO33_7 [15] DVDD1V0
CF13 CR2
CF15 LMI_DVDD1V5 DVDD1V0 CR4
AG32 CF17 LMI_DVDD1V5 DVDD1V0 CR6
PIO34_0_AUDPCMOUT0_DATA_1_AUDPCMIN0_MCLK_SSC4_SCL_UART3_TXD_MLB_CLK_PCS_DBG_DATA_8_HSL_DEBUG_BUS_8 PIO34_0 [15] LMI_DVDD1V5 DVDD1V0
AG33 CG14 CR8
PIO34_1_AUDPCMOUT0_DATA_2_AUDPCMIN0_SCLK_SSC4_MTSR_UART3_RXD_MLB_DATA_PCS_DBG_DATA_9_HSL_DEBUG_BUS_9 PIO34_1 [15] LMI_DVDD1V5 DVDD1V0
AG30 CG16 CT11
PIO34_2_AUDPCMOUT0_DATA_3_AUDPCMIN0_LRCLK_SSC4_MRST_UART3_CTS_MLB_SIG_PCS_DBG_DATA_10_HSL_DEBUG_BUS_10 SSC5_SCL PIO34_2 [15] LMI_DVDD1V5 DVDD1V0
AJ32 CH13 CT3
PIO34_3_SSC5_SCL_BNOTT_PCS_DBG_DATA_11_HSL_DEBUG_BUS_11 AJ31 SSC5_SDA SSC5_SCL [6] CH15 LMI_DVDD1V5 DVDD1V0 CT5
PIO34_4_SSC5_MTSR_DVP_IN_DATA_20_PCS_DBG_DATA_12_HSL_DEBUG_BUS_12 SSC5_SDA [6] LMI_DVDD1V5 DVDD1V0
AF31 PCIE_PIO_RST [6] CH17 CT7
PIO34_5_DVP_IN_DATA_21_PCS_DBG_DATA_13_HSL_DEBUG_BUS_13 AF32 CJ14 LMI_DVDD1V5 DVDD1V0 CT9
PIO34_6_EXT_IT_5_AUDPCMIN0_DATA_0_CLOCKGEN_D_10_OBS_1_UART3_RTS_DVP_IN_DATA_22_PCS_DBG_DATA_14_HSL_DEBUG_BUS_14 PIO34_6 [15] LMI_DVDD1V5 DVDD1V0
AJ30 CJ16 CU10
PIO34_7_AUDSPDIF_OUT_AUDPCMIN0_DATA_1_CLOCKGEN_D_11_OBS_0_UART3_NOT_OE_DVP_IN_DATA_23_PCS_DBG_DATA_15_HSL_DEBUG_BUS_15 PIO34_7 [15] LMI_DVDD1V5 DVDD1V0
CK15 CU4
MODE10 CL16 LMI_DVDD1V5 DVDD1V0 CU6
MODE10 [5,7] LMI_DVDD1V5 DVDD1V0
AG29 CU8
PIO35_0_USB_A_PRT_OVRCUR_DVP_IN_DATA_12 USB0_notOC [7] DVDD1V0
AJ29
PIO35_1_USB_A_PRT_PWR_CLOCKGEN_D_11_OBS_1_DVP_IN_DATA_13 AK32 USB0_EN [5,7]

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
PIO35_2_USB_B_PRT_OVRCUR_DVP_IN_DATA_14 USB1_notOC [7]
AH29 STiH418
PIO35_3_USB_B_PRT_PWR_CLOCKGEN_D_12_OBS_0_DVP_IN_DATA_15 AK33 USB1_EN [5,7]
PIO35_4_USB_C_PRT_OVRCUR_SSC4_SCL_HREF USB2_notOC [7]
AK30

N6
CP6
CP8
CR1
CR11
CR13
CR15
CR17
CR3
CR5
CR7
CR9
CT10
CT12
CT14
CT16
CT2
CT4
CT6
CT8
CU11
CU13
CU15
CU5
CU7
CU9
D16
D17
D27
D30
D9
PIO35_5_USB_C_PRT_PWR_SSC4_MTSR_CLOCKGEN_D_12_OBS_1_VREF AK29 USB2_EN [7]
PIO35_6_USB_C_PRT_VBUS_VALID USB2_VBUS_VALID [7]

STiH418
REAR MODE1
MODE1 [5,7]

J9
LCD connector H2.0 0.5-40P
B LCD back light 41 1 BL_LED- B
1

GND LED- 2 BL_LED+

LED+ FP9 3V3_SW
3
GND 4
2V5/3V3 5 DVO_D16 Touch Screen connector
3V3_SW D13 R0 6 DVO_D17
1S30 SOD323 R1 7 DVO_D18 BLM18KG260TN1
L4 BL_LED+ R2 8 DVO_D19
R3 9 DVO_D20 CP37 3V3_SW
C222 SWPA4030S4R7MT R4 10 DVO_D21 100n FP8
R5 11 DVO_D22
10uF 6.3V U20 C223 R6 12 DVO_D23 3V3_SW
6 1 R7 13 DVO_D8 BLM18KG260TN1
VDD LX 2.2uF G0 14 DVO_D9
R126 G1 15 DVO_D10
1K N43793764 4 5 G2 16 DVO_D11
LCD_BL EN OVR G3 DVO_D12
17 R124 R125
[15] G4 DVO_D13
18 J10 3K3 3K3
R127 2 3 BL_LED- G5 19 DVO_D14 1 CP22
GND FB 300mV G6 20 DVO_D15 2 100n
10K G7 LCDTS_RESET [15]
SGM3747YTN6G/TR 21 DVO_D0 3
R128 B0 22 DVO_D1 4 SSC5_SCL LCDTS_INT [15]
B1 23 DVO_D2 5 SSC5_SDA
10R
BackLight RESISTOR/0402/1 B2 24 DVO_D3 6
B3 25 DVO_D4
B4 26 DVO_D5
B5 27 DVO_D6 0.5-6P
B6 28 DVO_D7 3V3_SW
B7 29
TFT

A GND A
30 R129 47R DVO_CK
DCLK 31
DISP DVO_HS LCD_DISP [15]
32
HSYNC 33 DVO_VS RD3
VSYNC 34 DVO_DE RD4 4K7
DEN 35 4K7
AVDD5V 36
GND 37 Title
40

X1_R LCD_RSTn [15] LCD_SCL [15,16] B2264 4Kopen

38
X1_B LCD_SDI [15,16]
39
X2_L LCD_SCL [15,16] LCD_SDI [15,16] Size Document Number Rev
41 40
GND Y2_U LCD_CS [15] A3 16_PIO30_to_PIO35_DVO C

Date: Sunday, September 16, 2018 Sheet 16 of 18

5 4 3 2 1
 5 4 3 2 1

17_PIO40_TO_PIO42_EMI SPI
For dual footprint purpose
U1-8 PIO4X DI and Do need double check it U27
MT25QL256ABA8E12-1SIT U21
B9 SPI_NOTCS F_NCB1 B1 A1 A1 F1
PIO40_FLASH_1V8_3V3_0_SPI_CSN_BOOT D10 SPI_CLOCK CPU_FLASH_A SPI_CLOCK B2 NC_B1 NC_A1 A2 F_NCA2 F_NCA2 A2 NC_A1 NC_F1 F2 CPU_FLASH_A
PIO40_FLASH_1V8_3V3_1_SPI_CLK C10 SPI_DO B3 C NC_A2 A3 F_NCA3 F_NCA3 A3 NC_A2 NC_F2 F3
PIO40_FLASH_1V8_3V3_2_SPI_DO B10 SPI_DI B4 VSS NC_A3 A4 SPI_nRESET SPI_nRESET A4 NC_A3 NC_F3 F4
PIO40_FLASH_1V8_3V3_3_SPI_DI D11 SPI_WR_PROTECT CPU_FLASH_A B5 VCC NC_A4 A5 NC_A4 NC_F4
PIO40_FLASH_1V8_3V3_4_SPI_WR_PROTECT_NANDA_CSN2_NANDS_CSN2 A10 SPI_HOLD CM1 NC_B5 NC_A5 R156
D D
PIO40_FLASH_1V8_3V3_5_SPI_HOLD_NANDA_CSN3_NANDS_CSN3 B1 EMMC_CLK F_NCC1 C1 E1 F_NCE1 F_NCB1 B1 E1 F_NCE1 4K7
PIO40_FLASH_1V8_3V3_6_EMMC_CLK_SD_CLK_NANDA_CSN1_NANDS_CSN1 C2 EMI_nCS0 EMMC_CMD 100n SPI_NOTCS C2 NC_C1 NC_E1 E2 F_NCE2 SPI_CLOCK B2 NC_B1 NC_E1 E2 F_NCE2
PIO40_FLASH_1V8_3V3_7_EMMC_CMD_SD_CMD_NANDA_CSN0_NANDS_CSN0 F_NCC3 C3 notCS NC_E2 E3 F_NCE3 B3 SCLK NC_E2 E3 F_NCE3
SPI_WR_PROTECTC4 NC_C3 NC_E3 E4 SPI_nRESET B4 GND NC_E3 E4 SPI_nRESET
EMI_D0 EMMC_D0 notW_VPP_DQ2 NC_E4 CPU_FLASH_A VCC notRESET
E2 C5 E5
PIO41_FLASH_1V8_3V3_0_EMMC_D0_SD_DAT0_NANDA_DQ0_NANDS_DQ0 E3 EMI_D1 EMMC_D1 NC_C5 NC_E5 C252
PIO41_FLASH_1V8_3V3_1_EMMC_D1_SD_DAT1_NANDA_DQ1_NANDS_DQ1 E4 EMI_D2 EMMC_D2 F_NCD1 D1 F_NCC1 C1 D1 F_NCD1 100n
PIO41_FLASH_1V8_3V3_2_EMMC_D2_SD_DAT2_NANDA_DQ2_NANDS_DQ2 D3 EMI_D3 EMMC_D3 CPU_FLASH_C SPI_DI D2 NC_D1 SPI_NOTCS C2 NC_C1 NC_D1 D2 SPI_DI DNF
PIO41_FLASH_1V8_3V3_3_EMMC_D3_SD_DAT3_NANDA_DQ3_NANDS_DQ3 D2 SPI_DO D3 DQ1 F_NCC3 C3 notCS SO_SIO1 D3 SPI_DO
PIO41_FLASH_1V8_3V3_4_EMMC_D4_NANDA_DQ4_NANDS_DQ4 D1 SPI_HOLD D4 DQ0 SPI_WR_PROTECT C4 NC_C3 SI_SIO0 D4 SPI_HOLD
PIO41_FLASH_1V8_3V3_5_EMMC_D5_NANDA_DQ5_NANDS_DQ5 D4 D5 notHOLD_DQ3 notWP_SIO2 HOLD_SIO3
PIO41_FLASH_1V8_3V3_6_EMMC_D6_NANDA_DQ6_NANDS_DQ6 C1 NC_D5 MX25L25655EXCI DNF
PIO41_FLASH_1V8_3V3_7_EMMC_D7_NANDA_DQ7_NANDS_DQ7
CPU_FLASH_B
G1
PIO42_FLASH_1V8_3V3_0_SD_LED_NANDA_WEN_NANDS_CLK E5
PIO42_FLASH_1V8_3V3_1_SPI_CSN_EXTRA_NANDS_DQS G3 SD_PWREN
PIO42_FLASH_1V8_3V3_2_SD_PWREN_NANDA_ALE_NANDS_ALE G2 SD_VSEL CPU_FLASH_A
PIO42_FLASH_1V8_3V3_3_SD_VSEL_NANDA_CLE_NANDS_CLE B2 EMMC_SD_CD
PIO42_FLASH_1V8_3V3_4_SD_CD_NANDA_RNB_NANDS_RNB F3 EMMC_WP
PIO42_FLASH_1V8_3V3_5_SD_WP_NANDA_REN_NANDS_RNW
SYS_nRESETOUT D14 SPI_nRESET
STiH418 1V8 and 3V3 IO Tolerance R131R134
10K 10K BAT54JFILM

SPI_HOLD SYS_nRESETOUT
SYS_nRESETOUT [5]
C SPI_WR_PROTECT C

SD card power switch

SD CARD
EMMC_WP SD_WP R147 10K 3V3_SW
3V3_MMC
U24
EMMC_SD_CD R137 33R SDCARD_DETECT R144 5 1
3V3_SW EMMC_CLK R138 33R SDCLK 10K IN OUT
F14 EMI_nCS0 EMMC_CMD R139 33R SDCMD DNF 2
SPI (3V3) EMI_D0 EMMC_D0 R140 33R SDD0 GND C225
CPU_FLASH_A EMI_D1 EMMC_D1 SD_PWREN
BLM18KG260TN1 R141 33R SDD1 4 3
3V3 EMI_D2 EMMC_D2 R142 33R SDD2 EN notFAULT 100n
CPU_FLASH_B EMI_D3 EMMC_D3 R143 33R SDD3 STMPS2151STR
R158 CPU_FLASH_C SD CARD 3V3 / 1V8 switchable
0R R145
DNF 10K
ESD Protection for MMC DNF

U22
SDD2 1 10 SDD2
SDD3 2 IO1 NC4 9 SDD3
3 IO2 NC3 8
SDCARD_DET 4 GND GND 7 SDCARD_DET
B
SDCMD 5 IO3 NC2 6 SDCMD B
IO4 NC1 SD card voltage interface switch
HSP051-4M10
3V3_SW
C253
U23

4
SDD1 1 10 SDD1 U29 100n
SDD0 2 IO1 NC4 9 SDD0

VCC

VL
3 IO2 NC3 8
SDCARD_DETECT 4 GND GND 7 SDCARD_DETECT 3
IO3 NC2 3V3_SW S2
SDCLK 5 6 SDCLK 7 CPU_FLASH_C
IO4 NC1 1 D
1V8_CPU S1
HSP051-4M10 SD_VSEL 6
SEL

GND

GND
R157
10K
STG4160

2
SD card connector SEL = 0 => S2 on D (default 3V3)
SEL = 1 => S1 on D (1V8)
3V3_MMC

M1
SDD2 1 15
SDD3 2 DATA2 15 14
SDCMD 3 CD/DATA3 14
A CMD A
4
SDCLK 5 VDD
6 CLK 13
SDD0 7 VSS SH 12
SDD1 8 DATA0 SH 11
SDCARD_DETECT 9 DATA1 SH 10
CARD DET GND
ECC13-S301AAA0 Title
B2264 4Kopen

Size Document Number Rev

A3 17_PIO40_to_PIO42_EMI C

Date: Tuesday, September 04, 2018 Sheet 17 of 18

5 4 3 2 1
 5 4 3 2 1

18_RTL8211 3V3_ETH
3V3_AO 3V3_ETH

RE19 0R
RGMII0_RXDV_PHY_AD2 DNF
[14] M_RGMII1_RXDV CE5 CE6
RGMII0_RXCLK 2 3
[14] M_RGMII1_RXCLK 10uF 6.3V 100n
RGMII0_RXD0_SELRGV CE19 QE2 SI2399DS
[14] M_RGMII1_RXD0 RGMII0_RXD1_TXDLY

1
[14] M_RGMII1_RXD1 RGMII0_RXD2_AN0 100n
[14] M_RGMII1_RXD2 RGMII0_RXD3_AN1 RE20 100K
[14] M_RGMII1_RXD3 1mm trace [14] ETH_PENn
D D
<5 mm from device

1V05_DVDD_RGMII 1V05_AVDD_RGMII
RGMII0_TXCLK 1V05_RGMII 1V05_DVDD_RGMII
[14] M_RGMII1_PHYCLK RGMII0_TXEN
[14] M_RGMII1_TXEN RGMII0_TXD0 3V3_ETH 3V3_AVDD_RGMII 1V05_RGMII
[14] M_RGMII1_TXD0
SWPA252010S2R2NT
RGMII0_TXD1 CE9
[14] M_RGMII1_TXD1 RGMII0_TXD2 LE1 CE10 CE11
[14] M_RGMII1_TXD2 RGMII0_TXD3 100n 100n
[14] M_RGMII1_TXD3
10uF 6.3V

15
21
37

28
36

41

40

44
45

48
6

3
9
U25
1.5 mm trace 1V05_AVDD_RGMII

REG_OUT
DVDD33
DVDD33
DVDD33

DVDD10
DVDD10

AVDD33
AVDD33

AVDD10
AVDD10
AVDD10

VDDREG
VDDREG
49 <5 mm from device R149
E-PAD The 3.3V rising time should be within 1ms~100ms.
3V3_ETH
0R CE12 CE13 CE14 CE15
CHANNEL_AP 1 22 RGMII0_TXCLKO 51R RE27 RGMII0_TXCLK
CHANNEL_AM 2 MDI0P TXC 23 RGMII0_TXD0 100n 100n 100n10uF 6.3V
XE1 CHANNEL_BP 4 MDI0M TXD0 24 RGMII0_TXD1 CE1 CE2 CE3 CE4
CE16 25MHz JF25000M-3225-SMD-20P CHANNEL_BM 5 MDI1P TXD1 25 RGMII0_TXD2
33p CHANNEL_CP 7 MDI1M TXD2 26 RGMII0_TXD3 100n 100n 100n 100n
CHANNEL_CM MDI2P TXD3 RGMII0_TXEN RE28
1 4 8 27 3V3_ETH
2 x1 nc 3 CHANNEL_DP 10 MDI2M TXCTL 19 RGMII0_RXCLKI RGMII0_RXCLK
nc x2 CHANNEL_DM 11 MDI3P RXC 14 RGMII0_RXD0_SELRGV
MDI3M RXD0_SELRGV 16 RGMII0_RXD1_TXDLY
RXD1_TXDLY RGMII0_RXD2_AN0 51R

1K5

1K5

4K7

4K7
CE17 17 3V3_AVDD_RGMII
C 33p 42 RXD2_AN0 18 RGMII0_RXD3_AN1 C
43 CKXTAL1 RXD3_AN1 13 RGMII0_RXDV_PHY_AD2 R148 0R
CKXTAL2 RXCTL_PHY_AD2 RGMII0_RXDLY_LED2

RE1

RE2

RE3

RE4
[14] M_RGMII1_CLK125 51R RE5 46 32
CLK125 RXDLY_LED2 CE7 CE8
LED0_PHY_AD0 34 100n 100n
LED1_PHY_AD1 35 LED0_PHY_AD0 30
3V3_ETH LED1_PHY_AD1 MDC 31 M_RGMII1_MDC [14]
MDIO M_RGMII1_MDIO [14]
33 PME [14]
RE6 4K7 38 PME 20
ENSWREG INT RTL8211_notINT [14]
RE7 2K49 39 47
RSET GND
RE8 0R 29 12
CPE PHY Address Select (AD0-3 = 001)
[14] M_RGMII1_notRESET PHYRSTB NC_12

CE21 RTL8211E-CG
10p
DNF

3V3_ETH

JE1 RE9
MDI_4+ 1
MDI_4- 2 DA+
MDI_3+ 3 DA-
B JE2 MDI_2+ DB+ Phy Address A2 (MSB) = 1 B
4 4K7
RE21 DC+ RGMII0_RXDV_PHY_AD2
1 24 75R
CHANNEL_DM 2 TCT1 MCT1 23 MDI_1-
CHANNEL_DP 3 TD1+ MX1+ 22 MDI_1+ MDI_2- 5
4 TD1- MX1- 21 75R RE22 MDI_3- 6 DC-
CHANNEL_CM TCT2 MCT2 MDI_2-
Phy Address A1 = 0 MDI_1+ DB-
5 20 7
CHANNEL_CP 6 TD2+ MX2+ 19 MDI_2+ MDI_1- 8 DD+
TD2- MX2- Phy Address A0 (LSB) = 0 DD-
7 18 75R RE23 3V3_ETH
CHANNEL_BM 8 TCT3 MCT3 17 MDI_3- LED1_PHY_AD1 9
CHANNEL_BP 9 TD3+ MX3+ 16 MDI_3+ 10 LEDY+
10 TD3- MX3- 15 75R RE24 LED0_PHY_AD0 11 LEDY-
CHANNEL_AM 11 TCT4 MCT4 14 MDI_4- 12 LEDG+ RE10 RE11 RE12 RE13 RE14
CHANNEL_AP 12 TD4+ MX4+ 13 MDI_4+ 15 LEDG-
TD4- MX4- GND seperation >250VAC 16 SHL
M3295NL SHL
RGMII IO setting: Hi = +3V3
CE18 CE20 4K7 4K7 4K7 4K7 4K7
RE15 RE16 RE25 RE26 RGMII0_RXD0_SELRGV
RJ45-16X16.4-W WC1-805 TxRX Delay: Lo = NO
100n 1nF 10KV
RGMII0_RXDLY_LED2
Auto_Negotiation: Hi= ALL capability RGMII0_RXD1_TXDLY
4K7 4K7 510R 510R RGMII0_RXD2_AN0
RGMII0_RXD3_AN1 RE17 RE18

4K7 4K7
DNF DNF

A A

Title
B2264 4Kopen

Size Document Number Rev

A3 18_RTL8211 C

Date: Sunday, September 16, 2018 Sheet 18 of 18

5 4 3 2 1