MB180E IDTV

SERVICE MANUAL
Table of Contents
1. INTRODUCTION ................................................................................................................................................... 3
A. General Block Diagram ........................................................................................................................................ 4
B. Placement of Blocks ............................................................................................................................................ 5
2. T/T2/C/A TUNER (U107)........................................................................................................................................ 6
3. S/S2 TUNER (U114) OPTIONAL ........................................................................................................................... 8
4. AUDIO AMPLIFIER STAGES ..............................................................................................................................10
A. Main Amplifier (U118) (6W/8W/10W options) ...................................................................................................10
B. Subwoofer Amplifier (U100) (12 W)....................................................................................................................13
C. Headphone Amplifier (U111) ..............................................................................................................................15
5. POWER STAGE .....................................................................................................................................................17
A. KI5P02DV (Q100,Q101,Q103) .............................................................................................................................18
B. DMG6402LDM (Q104) ........................................................................................................................................19
C. TPS54528 (U101) ................................................................................................................................................21
D. TPS562201 (U113) ..............................................................................................................................................23
E. TPS563200 (U102,U105, U106) ..........................................................................................................................25
F. TPS54628 (U104) ................................................................................................................................................27
G. AP2111H (U110).................................................................................................................................................30
H. LM1117 (U120) ..................................................................................................................................................31
6. MICROCONTROLLER..........................................................................................................................................33
MediaTek G32 (U108) ............................................................................................................................................ 33
7. 4 GB EMMC ..........................................................................................................................................................41
Samsung EMMC 4GB KLM4G1FETE-B041 (U103) .................................................................................................... 41
8. USB INTERFACE ..................................................................................................................................................42
A. Usb Power Switch TPS2553-1 (U115-U116-U119) ..............................................................................................43
B. HX2VL Very Low Power Usb 2.0 Tetrahub Controller (U117) ...............................................................................43
9. CI INTERFACE......................................................................................................................................................45
10. SOFTWARE UPDATE ...........................................................................................................................................46
Main Software Update ........................................................................................................................................... 46
11. TROUBLESHOOTING ..........................................................................................................................................46
A. No Backlight Problem .........................................................................................................................................46
B. CI Module Problem ............................................................................................................................................48
C. IR Problem .........................................................................................................................................................49
D. Keypad Touchpad Problems ...............................................................................................................................50
E. USB Problems.....................................................................................................................................................51

1
 F. No Sound Problem .............................................................................................................................................51
G. Standby On/Off Problem ....................................................................................................................................52
H. No Signal Problem ..............................................................................................................................................52
12. SERVICE MENU SETTINGS ................................................................................................................................54

IMPORTANT
Before removing the rear cover from the TV for servicing, make sure that no cables are fixated to the cover. Release
the cables from their clamps and disconnect (if any). Failure to do so may damage the wires and/or other
components of the TV.

2
 1. INTRODUCTION
17MB180E main board is driven by MTK SOC. This IC is a single chip iDTV solution that supports channel
decoding, MPEG decoding, and media-center functionality enabled by a high performance AV CODEC and
CPU.
This board can be driven just 50Hz UHD panels.
Key features include:
• Combo Front-End Demodulator
• A multi standart A/V format decoder
• The MACEpro video processor
• Home theatre sound processor
• Rich internet connectivity and completed digital home network solution
• Dual-stream decoder for 3D contents
• Mılti-purpose CPU for OS and multimedia
• Peripheral and power management
• Embedded DRAM (for connected option)
Supported peripherals are:
• 1 RF input VHF I, VHF III, UHF
• 1 Satellite input
• 1 PC input(Common)
• 2xSide HDMI 1x Back HDMI input (with ARC option from 2nd input)
• 1 Common interface(Common)
• 1 Optic/ Quax S/PDIF output
• 1 Headphone(Common)
• 2 USB(1X Side Common, 1X Side Optional) and 2x internal USB for Wifi/Bluetooth
• 1 Ethernet-RJ45
• External Touchpad/Tact Switch (Common)

3
A.GENERAL BLOCK DIAGRAM

12V/24V_VCC
PWM
BACKLIGHT_DIM

SYS_SCL

SW Connector
TOUCHPAD ESMT
SYS_SDA
PMIC BOE

51 pins LVDS/VbyONE SOCKET

UART
PANEL_VCC AMP_RST
AD82587D
SWOOFER
Richtek HP_DETECT
HP_AMP_MUTE 15W AMP
I2S
RT9955 PC_SCL/SDA
PCM_PWR_CTRL

RX/TX_HOTEL 12V/24V_VCC
AUX_RESET
TUN_RESET
PMIC LG FLASH_WPN1

Speak. Connector
HDMI DET SYS_SCL
Richtek PROTECT

SPEAKERs
USB-ENABLE
BACKLIGHT SYS_SDA ESMT
RT6919B AD82587D

LVDS SOCKET
PANEL_VCC

30 pins WXGA
RESET_HUB 2X6W/8W/
TUNER_RESET I2S 10W AMP
1V5_VCC

5V_VCC

PWR
VByOne INT RAM GPIOs HPHONE
3
TS_IN
HP_RIGHT AD22657B HP_OUT_R
CI_TS_IN
CI SOCKET

TS BLOCK
HP_LEFT HP AMP. HP_OUT_L

AUDIO I/Os
CI_TS_IN
TS_OUT
SPDIF_OUT

SPDIF OUT

12V_VCC

DIGITAL SAT
DVBS/S2

DEMOD
H/V
Selection LNBP SYS_SCL SAT TUNER SAT I/Q
DISEQC Richtek Montage
22kHz RT5047
SYS_SDA M88TS2011

MTK
PWR
1V1_VCC
RF

VIDEO I/Os
LNB_SUP 3V3_VCC
ETHERNET G31/32
ET_T

ET_R
19X19
3V3_VCC

XTAL
ANALOG
DIGITAL/
DEMOD

RF TUNER 24 MHz
DIGITAL/ANALOG_IF
Si2151

PWR
3V3_VCC

2
SYS_SCL

SYS_SDA

Keyboard

GPIOs
STBY
IR – Led1/2
Keyboard Socket

USB 3 USB 2 USB 1 PWR SPI

HDMI 1 HDMI 2 HDMI 3 NAND
2.0 2.0 2.0 1 FLASH
DAA Socket

Led/IR Socket
KEYBOARD
STBY_ON/OFF
STBY_ON/OFF
USB2_DN
USB2_DP

USB1_DN
USB1_DP

3V3_STBY
HDMI 5V

HDMI 5V
HDMI 5V

TMDS

TMDS

TMDS
ARC

CEC

I2C
I2C

I2C
USB_BT_DP
USB_BT_DN

USB HUB
CY7C65642

SIDE HDMI HDMI 2 HDMI 3 NAND FLASH

512MB

USB1
5V_VCC
USB2
5V_VCC

4
 B. PLACEMENT OF BLOCKS

5
 2. T/T2/C/A TUNER (U107)

Description
The Si2151 is Silicon Labs' sixth-generation hybrid TV tuner supporting all worldwide terrestrial and cable
TV standards. Requiring no external balun, SAW filters, wirewound inductors or LNAs, the Si2151 offers the
lowest-cost BOM for a hybrid TV tuner. Also included are an integrated power-on reset circuit and an option
for single power supply operation. As with prior-generation Silicon Labs TV tuners, the Si2151 maintains very
high linearity and low noise to deliver superior picture quality and a higher number of received stations when
compared to other silicon tuners. The Si2151 offers increased immunity to WiFi and LTE interference,
eliminating the need for external filtering. For the best performance with next-generation digital TV standards,
such as DVB-T2/C2, the Si2151 delivers industry-leading phase noise performance.

Features:

• Worldwide hybrid TV tuner

o Analog TV: NTSC, PAL/SECAM
o Digital TV: ATSC/QAM, DVBT2/T/C2/C, ISDB-T/C, DTMB
• 1.7 MHz, 6 MHz, 7 MHz, 8 MHz, and 10 MHz channel bandwidths
• 42-1002 MHz frequency range
• Industry-leading margin to A/74, NorDig, DTG, ARIB, EN55020, OpenCable™,DTMB
• Lowest BOM for a hybrid TV tuner
o No balun, SAW filters, or external inductors required
o Increased ESD protection on 4pins
• Best-in-class real-world reception
o Lowest phase noise
o High Wi-Fi and LTE immunity
• Low power consumption
o 3.3 V and 1.8 V power supplies
o Integrated 1.8 V LDO for 3.3 V singlesupply operation
• Integrated power-on reset circuit
• Standard CMOS process
• 3x3 mm, 24-pin QFN package
• RoHS compliant

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 Figure 1: Si2151 Pin description

7
 Table 1: Si2151 Pin function

3. S/S2 TUNER (U114) OPTIONAL

Description

M88TS6011 is a single chip, direct-conversion tuner for digital satellite receiver applications. Its offers the
industry’s most integrated solution to a satellite tuner function, simplifying the front-end design. This device
incorporates the following function blocks on a single chip: an LNA, quadrature down-converting mixers, a low
phase noise and fast locking frequency synthesizer with on-chip loop filters, a DC offset cancellation loop with
integrated loop filters, self-calibrated programmable baseband channel filters, an integrated RF AGC loop, and
crystal oscillators with and integrated auxiliary clock output.
As a result of integrating all these blocks, the M88TS6011 has the least number of pins compared with other
conventional solutions, and requires the least external compopnents. In typical applications, M88TS6011
requires only one crystal, one matching network, and a few external capacitors. The device also has the
industry’s smallest latency, as it uses a fast locking PLL and fast settling DC offset cancellation architecture.
The M88TS6011 can be configured via a 2-wire serial bus. The chip is available in a 16-pin QFN package.

Features
• Single-Chip tuner
• Compliant with DVB-S2 and ABS-S standards
• Support QPSK, 8PSK, 16APSK AND 32APSK
• Direct-conversion from L-band to baseband
• Symbol rate:1 to 45 Msybol/s
• Integrated VCOs and PLL, with on-chip inductors varactors and loop filter
• Integrated baseband filters: 6 MHz to 40 MHz bandwith
• Integrated RF AGC for optimal performance
• Integrated baseband DC offset cancellation removes external loop filters

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 • Excellent immunity to strong adjacent undersired channels
• Integrated clock driver provides auxiliary divided clock output for other devices
• Support sleep mode
• 2-wire serial bus with 3.3V compatible logic levels
• Power supply: +3.3V
• Package: 16-pin E-PAD QFN
• RoHS compliant

Figure 2: Pin description

Block Diagram

9
 4. AUDIO AMPLIFIER STAGES

Figure 3: The block diagram of the audio part

A. MAIN AMPLIFIER (U118) (6W/8W/10W OPTIONS)

Description
AD82587D is a digital audio amplifier capable of driving a pair of 8 ohm, 20W or a single 4 ohm, 40W
speaker, both which operate with play music at a 24V supply without external heat-sink or fan requirement.
Using I2C digital control interface, the user can control AD82587D’s input format selection, DRC (dynamic
range control), mute and volume control functions. AD82587D has many built-in protection circuits to
safeguard AD82587D from connection errors.

Features
• 16/18/20/24-bit input with I2S, Left-alignment and Right-alignment data format
• PSNR & DR(A-weighting) Loudspeaker: 97dB (PSNR), 105dB (DR) @ 24V
• Multiple sampling frequencies (Fs)
− 32kHz / 44.1kHz / 48kHz and
− 64kHz / 88.2kHz / 96kHz and
− 128kHz/176.4kHz/192kHz
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 • System clock = 64x, 128x, 256x, 384x, 512x, 768x,1024x Fs
− 256x~1024x Fs for 32kHz / 44.1kHz / 48kHz
− 128x~512x Fs for 64kHz / 88.2kHz / 96kHz
− 64x~256x Fs for 128kHz /176.4kHz/192kHz
• Supply voltage
− 3.3V for digital circuit
− 10V~26V for loudspeaker driver
• Loudspeaker output power for Stereo@ 24V
− 10W x 2ch into 8_ @ 0.16% THD+N
− 15W x 2ch into 8_ @ 0.18% THD+N
− 20W x 2ch into 8_ @ 0.24% THD+N
• Loudspeaker output power for Mono@ 24V
− 20W x 1ch into 4_ @ 0.17% THD+N
− 30W x 1ch into 4_ @ 0.2% THD+N
− 40W x 1ch into 4_ @ 0.24% THD+N
• Sounds processing including:
− Volume control (+24dB~-103dB, 0.125dB/step)
− Dynamic range control
− Power clipping
− Channel mixing
− User programmed noise gate with hysteresis window
− DC-blocking high-pass filter
• Anti-pop design
• Short circuit and over-temperature protection
• I2C control interface with selectable device address
• Internal PLL
• LV Under-voltage shutdown and HV Under-voltage
• detection
• Power saving mode
• Dynamic temperature control

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 Figure 2: Pin description

Figure 3: Functional Block Diagram

Table 2: Absolute Maximum Ratings

12
 Table 3: Recommended Operating Conditions

B. SUBWOOFER AMPLIFIER (U100) (12 W)

Description
AD82586C is a digital audio amplifier capable of driving a pair of 8 ohm, 20W operating at 24V supply
without external heat-sink or fan requirement with play music.
AD82586C has 20 bands EQ function and can operate 20W stereo or 40W mono optionally.
AD82586C can provide advanced audio processing capabilities, such as volume control, 20 bands speaker
EQ, audio mixing, 3D surround and DRC (dynamic range control). These functions are fully programmable via
a simple I2C control interface.
Robust protection circuits are provided to protect AD82586C from damage due to accidental erroneous
operating condition. AD82586C is more tolerant to noise and PVT (Process, Voltage, and Temperature)
variation than the analog Class-AB or Class-D audio amplifier counterpart implemented by analog circuit
design. AD82586C is pop free during instantaneous power switch because of its built-in, robust anti-pop circuit.

Features
• 16/18/20/24-bits input with I2S, Left-alignment and Right-alignment data format
• PSNR & DR (A-weighting) Loudspeaker: 99dB (PSNR), 104dB (DR) @24V
• Multiple sampling frequencies (Fs)
32kHz / 44.1kHz / 48kHz and
64kHz / 88.2kHz / 96kHz and
128kHz / 176.4kHz / 192kHz
• System clock = 64x, 128x, 192x, 256x, 384x, 512x, 576x, 768x, 1024x Fs
64x~1024x Fs for 32kHz / 44.1kHz / 48kHz
64x~512x Fs for 64kHz / 88.2kHz / 96kHz
64x~256x Fs for 128kHz / 176.4kHz / 192kHz
• Supply voltage
3.3V for digital circuit
10V~26V for loudspeaker driver
• Loudspeaker output power at 24V
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 10W x 2CH into 8 ohm @0.17% THD+N for stereo
20W x 2CH into 8 ohm @0.26% THD+N for stereo
• Sound processing including:
20 bands parametric speaker EQ
Volume control (+24dB~-103dB, 0.125dB/step)
Dynamic Range Control (DRC)
Dual band DRC
Power clipping
3D surround sound
Channel mixing
Noise gate with hysteresis window
Bass/Treble tone control
DC-blocking high-pass filter
• Anti-pop design
• Short circuit and over-temperature protection
• I2C control interface with selectable device address
• Support hardware and software reset
• Internal PLL
• LV Under-Voltage shutdown and HV Under-Voltage detection
• Power saving mode

Figure 6: Pin description

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 C. HEADPHONE AMPLIFIER (U111)

Description

The AD22657B is a 2-Vrms cap-less stereo line driver. The device is ideal for single supply electronics.
Cap-less design can eliminate output dc-blocking capacitors for better low frequency response and save cost.
The AD22657B is capable of delivering 2-Vrms output into a 10k ohm load with 3.3V supply. The gain
settings can be set by users from 1V/V to 10V/V externally. The AD22657B has under voltage protection to
prevent POP noise. Build-in shutdown control and de-pop control sequence also help AD22657B to be a pop-
less device.
The AD22657B is available in a 10-pin MSOP package.

Features

• Operation Voltage: 3V to 3.6V

• Cap-less Output
o Eliminates Output Capacitors
o Improves Low Frequency Response
o Reduces POP/Clicks

• Low Noise and THD

o Typical SNR 107dB
o Typical Vn 7uVrms
o Typical THD+N < 0.02%

• Maximum Output Voltage Swing into 2.5k Load

o 2Vrms at 3.3V Supply Voltage
• Single-ended Input
• External Gain Setting from 1V/V to 10V/V
• Fast Start-up Time: 0.5ms
• Integrated De-Pop Control
• External Under Voltage Protection
• Thermal Protection
• Less External Components Required
• +/-8kV IEC ESD Protection at line outputs

15
 Figure 7: Pin description

Table 4: Pin function

Table 5: Recommended operating conditions

16
 5. POWER STAGE

Figure 8: Power Block Diagram

Figure 9: Power Socket and Power Options

Power socket is used for taking voltages which are 24V_VCC, 12V_STBY . These voltages are
produced in power card. Also socket is used for giving dimming, backlight and standby signals with power
card. Power socket pinning is shown in above figure. S103 component is option for IPS55 and PW30 power
card.
24V_VCC goes directly to the audio part. 12V_STBY is converted several different voltages on the mainboard
which are shown in below figure.

17
 Figure 10: Power Block Diagram

List of the components:

• PMOS(Q100,Q101,Q103) → KI5P02DV
• NMOS(Q104) → DMG6402LDM
• DC-DC-1(U101) → TPS54528-5A
• DC-DC-2(U113) → TPS562201-2A
• DC-DC-3(U105) → TPS563200-3A
• DC-DC-4(U106) → TPS563200-3A
• DC-DC-5(U102) → TPS563200-3A
• DC-DC-6(U104) → TPS54628-6A
• LDO(U110) → AP2111H
• LDO(U120) →LM111

A. KI5P02DV (Q100,Q101,Q103)

Features

• VDS (V) =-20V

• ID =-4.6 A
• RDS(ON) ＜ 40mΩ (VGS =-4.5V)

• RDS(ON) ＜ 70mΩ (VGS =-2.5V)

• Low Input/Output Leakage

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 Figure 11: Pin description

Figure 12: Electrical Characteristic

B. DMG6402LDM (Q104)

Features
• Low RDS(ON)
• Low Input Capacitance
• Fast Switching Speed
• Low Input/Output Leakage

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 • Lead Free By Design/RoHS Compliant (Note 1)
• Qualified to AEC-Q101 Standards for High Reliability

Figure 13: Pin description

Table 6: Electrical Characteristics & Maximum ratings

20
 C. TPS54528 (U101)

General Description

The TPS54528 is an adaptive on-time D-CAP2™mode synchronous buck converter. The TPS54528 enables
system designers to complete the suite of various end-equipment power bus regulators with a cost effective, low
component count, low standby current solution. The main control loop for the TPS54528 uses the D-CAP2™
mode control that provides a fast transient response with no external compensation components. The adaptive
on-time control supports seamless transition between PWM mode at higher load conditions and Eco-mode™
operation at light loads. Eco-mode™ allows the TPS54528 to maintain high efficiency during lighter load
conditions. The TPS54528 also has a proprietary circuit that enables the device to adopt to both low equivalent
series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 6.0 V. The device also features an adjustable soft start time. The TPS54528 is available in the 8-pin DDA
package, and designed to operate from –40°C to 85°C.

Features

• D-CAP2™ Mode Enables Fast Transient Response

• Low Output Ripple and Allows Ceramic Output Capacitor
• Wide VIN Input Voltage Range: 4.5 V to 18 V
• Output Voltage Range: 0.76 V to 6.0 V
• Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications – 65 mΩ (High Side)
and 36 mΩ (Low Side)
• High Efficiency, less than 10 μA at shutdown
• High Initial Bandgap Reference Accuracy
• Adjustable Soft Start
• Pre-Biased Soft Start
• 650-kHz Switching Frequency (fsw)
• Cycle By Cycle Over Current Limit
• Auto-Skip Eco-mode™ for High Efficiency at Light Load

21
 Figure 14: Pin Assignment

22
 Table 7: Functional Pin Description & Electrical Characteristics

D. TPS562201 (U113)

General Description

The TPS562200 and TPS562209 are simple, easy-to- use, 2 A synchronous step-down (buck) converters in
SOT-23 package.
The devices are optimized to operate with minimum external component counts and also optimized to achieve
low standby current. These switch mode power supply (SMPS) devices employ D-CAP2 mode control
providing a fast transient response and supporting both low equivalent series resistance (ESR) output capacitors
such as specialty polymer and ultra-low ESR ceramic capacitors with no external compensation components.
TPS562200 operates in Advanced Eco-mode, which maintains high efficiency during light load operation.
TPS562209 always operates in continuous conduction mode, which doesn’t increase the output ripple voltage
in light load. The TPS562200 and TPS562209 are available in a 6-pin 1.6 x 2.9mm SOT (DDC) package, and
specified from –40°C to 85°C of ambient temperature.

23
 Figure 15: Pin Assignment

Features

• D-CAP2™ Mode Control with 650-kHz Switching Frequency

• Input Voltage Range: 4.5 V to 17 V
• Output Voltage Range: 0.76 V to 7 V
• Integrated 122-mΩ and 72-mΩ FETs
• Advanced Eco-mode™ Pulse-skip (TPS562200)
• Low Shutdown Current Less than 10 μA
• 2% Feedback Voltage Accuracy (25°C)
• Startup from Pre-Biased Output Voltage
• Cycle-By-Cycle Hiccup Over-current Limit
• Non-latch OVP, UVLO and TSD Protections
• Fixed Soft Start: 1 ms

24
 Table 8: Functional Pin Description & Electrical Characteristics

E. TPS563200 (U102,U105, U106)

General Description
The TPS562200 and TPS563200 are simple, easy-to- use, 2 A and 3 A synchronous step-down (buck)
converters in SOT-23 package.
The devices are optimized to operate with minimum external component counts and also optimized to
achieve low standby current.
These switch mode power supply (SMPS) devices employ D-CAP2 mode control providing a fast transient
response and supporting both low equivalent series resistance (ESR) output capacitors such as specialty
polymer and ultra-low ESR ceramic capacitors with no external compensation components.
TPS562200 and TPS563200 operate in Advanced Eco-mode, which maintains high efficiency during light
load operation. The devices are available in a 6- pin 1.6 x 2.9mm SOT (DDC) package, and specified from –
40°C to 85°C of ambient temperature.

Features
• D-CAP2™ Mode Control with 650-kHz Switching Frequency
25
 • Input Voltage Range: 4.5 V to 17 V
• Output Voltage Range: 0.76 V to 7 V
• Integrated 68-mΩ and 39-mΩ FETs
• Advanced Eco-mode Pulse-skip
• Low Shutdown Current Less than 10 μA
• 1% Feedback Voltage Accuracy (25°C)
• Startup from Pre-Biased Output Voltage
• Cycle-By-Cycle Hiccup Over-current Limit
• Non-latch OVP, UVLO and TSD Protections
• Fixed Soft Start: 1 ms

Applications
• Digital TV Power Supply
• High Definition Blu-ray Disc™ Players
• Networking Home Terminal
• Digital Set Top Box (STB)

Recommended Operating Conditions

Table 9: Recommended operating conditions

Figure 16: Pin Description

26
 Table 10: Pin functions

Electical Characteristics

Table 11: Pin functions and Electrical Characteristics

F. TPS54628 (U104)

General Description

The TPS54628 device is an adaptive on-time DCAP2 mode synchronous-buck converter. The TPS54628
enables system designers to complete the suite of various end-equipment power-bus regulators with a cost-
effective, low-component count, lowstandby current solution. The main control loop for the TPS54628 uses the
D-CAP2 mode control that provides a fast transient response with no external compensation components. The
adaptive on-time control supports seamless transition between PWM mode at higher load conditions and Eco-

27
Mode operation at light loads. Eco-Mode allows the TPS54628 to maintain high efficiency during lighter load
conditions. The TPS54628 also has a proprietary circuit that enables the device to adopt to both low equivalent-
seriesresistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors.
The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V
and 5.5 V. The device also features an adjustable soft-start time. The TPS54628 is available in the 8-pin SO
PowerPAD package, and designed to operate from –40°C to 85°C.

Features

• D-CAP2™ Mode Enables Fast Transient Response

• Low Output Ripple and Allows Ceramic Output Capacitor
• Wide VIN Input Voltage Range: 4.5 V to 18 V
• Output Voltage Range: 0.76 V to 5.5 V
• Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications – 36 mΩ (High Side)
and 28 mΩ (Low Side)
• High Efficiency, less than 10 μA at shutdown
• High Initial Bandgap Reference Accuracy
• Adjustable Soft Start
• Pre-Biased Soft Start
• 650-kHz Switching Frequency (fsw)
• Cycle By Cycle Over Current Limit
Auto-Skip Eco-mode™ for High Efficiency at Light Load

Figure 17 : Pin Description

28
 Table 12: Pin functions and Electrical Characteristics

29
 G. AP2111H (U110)

General Description

The AP2111 is CMOS process low dropout linear regulator with enable function, the regulator delivers a
guaranteed 600mA (Min) continuous load current.
The AP2111 provides 1.2V, 1.5V, 1.8V, 2.5V, 3.3V,4.8V regulated output and 0.8V to 5V adjustable output,
and provides excellent output accuracy 1.5%, it is also provides a excellent load regulation, line regulation and
excellent load transient performance due to very fast loop response. The AP2111 has built-in auto discharge
function. The AP2111 features low power consumption.
The AP2111 is available in SOIC-8, PSOP-8 SOT-223 and SOT-23-5 packages. It is a option for PW30 and
IPS55.
Features
• Output Voltage Accuracy: ±1.5%
• Output Current: 600mA (Min)
• Foldback Short Current Protection: 50mA
• Enable Function to Turn On/Off VOUT
• Low Dropout Voltage (3.3V):
o 250mV (Typ) @ IOUT=600mA
• Excellent Load Regulation: 0.2%/A (Typ)
• Excellent Line Regulation: 0.02%/V (Typ)
• Low Quiescent Current: 55μA (Typ)
• Low Standby Current: 0.01μA (Typ)
• Low Output Noise: 50μVRMS
• PSRR: 65dB @ f=1kHz, 65dB @ f=100Hz
• OTSD Protection
• Stable with 1.0μF Flexible Cap: Ceramic, Tantalum and Aluminum Electrolytic
• Operating Temperature Range: -40°C to 85°C
• ESD: MM 400V, HBM 4000V

Figure 18 : Pin Configuration of AP2111

30
 Table 13: Functional Pin Description

H. LM1117 (U120)

General Description

The LM1117 is a low dropout voltage regulator with a dropout of 1.2 V at 800 mA of load current The
LM1117 is available in an adjustable version which can set the output voltage from 1.25 to 13.8 V with only
two external resistors. In addition, it is available in five fixed voltages, 1.8 V, 2.5 V, 3.3 V, and 5 V. The
LM1117 offers current limiting and thermal shutdown. Its circuit includes a Zener trimmed bandgap reference
to assure output voltage accuracy to within ±1%. A minimum of 10-µF tantalum capacitor is required at the
output to improve the transient response and stability.

Features
• Available in 1.8 V, 2.5 V, 3.3 V, 5 V, and Adjustable Versions
31
 • Space-Saving SOT-223 and WSON Packages
• Current Limiting and Thermal Protection
• Output Current 800 mA
• Line Regulation 0.2% (Maximum)
• Load Regulation 0.4% (Maximum)
• Temperature Range
o LM1117: 0°C to 125°C
o LM1117I: −40°C to 125°C

Table 14: Functional Pin Description

32
 6. MICROCONTROLLER
MEDIATEK G32 (U108)

The MT9675xxxxxx is MediaTek’s latest SOC solution for UHD smart TV. Based on MediaTek’s advanced
technologies, the MT9675xxxxxx is integrated with the high-quality video processor which satisfies a variety of
customer’s requests for image quality to develop the state-of-the-art DTV system. The multi-core CPUs and
GPUs deliver high performance for modern Linux and Android TVs. The up-to-date ARM and Mali
architecture ensures the best software compatibility.
Applications, such as HTML5, Java, Flash, and so on, are implemented with less efforts.
The MediaTek Professional PQ Engine includes all of MediaTek’s most advanced color-tuning tools.
MediaTek unique color processor with specially-designed color remapping systems assist System-developers to
identify PQ characteristics of all the range of panel models quickly and easily.
The MT9675xxxxxx for DTV/MM/OTT applications into a single device, reducing the overall system BOM
cost. With versatile peripheral connectivity ports, like HDMI, USB, Ethernet, CVBS, etc., the MT9675xxxxxx
can serve as a high-quality media center in home entertainment field.
To meet the increasingly popular energy legislative requirements without the use of additional hardware, the
MT9675xxxxxx has an ultra-low power standby mode during which an embedded MCU can act upon standby
events and wake up the system as required.

33
 MT9675xxxxxx is a highly integrated smart TV solution, which supports LVDS/Vby1 output, DTV channel
decoding, MPEG decoding, AV1 decoding, and security OS. MT9675xxxxxx serves full functions of multi-
media centers with a high performance CPU, GPU, and AV CODEC/security engines.
1.Combo Front-End Demodulators
2. Advanced Multi-Core CPU and 3D GPU
3. 3D Formatter Engine
4. Multi-Standard A/V Format Decoder
5. MediaTek High Performance Video Processor
and
MediaTek Professional PQ Engine
6. Home Theater Sound Processor
7. Internet and Variety of Connectivity Support
8. Peripheral and Power Management
9. Robust and Efficient Security Engine
10. Full Multi-Media Decoders Including AV1/
HEVC
Decoder Supporting up to FHD/60fps Resolution
High Performance Micro-processor
• ARM Advanced Multi-Core Cortex CPU
• 32KB/32KB I/D cache
• 512KB L2 cache
• Supports Neon instruction sets
3D Graphic GPU
• ARM Advanced Multi-Core Mali GPU
• Vulkan 1.1
• Supports OpenGL ES 3.2/2.0/1.1
• Supports OpenCL 2.0
• Supports DirectX 11 FL9_3
• Supports rendering size up to UHD
Transport Stream De-multiplexer
Supports two parallel and one serial TS inputs
interfaces, with or without sync signal
• Supports one of TS PAD is programmable
TS input/output
• Supports external demodulators
• TS data rate is 140Mbit/s for serial and
56MByte/s for parallel
• 128 general purpose PID filters and 128
section filters for all transport stream
demultiplexer
• Supports additional audio/video/PCR
filters
• Supports time-shift
34
• Supports 3DES/DES and AES
encryption/decryption
MPEG-2 Video Decoder
• ISO/IEC 11172-2 MPEG-1 video format
decoding
• ISO/IEC 13818-2 MPEG-2 video MP@HL
and HD level
• Supports resolution up to HDTV
(1080p60,1080i, 720p) and SDTV
• Supports dual stream decoding for 3D
content
• Supports for FHDp60 2x fast forwarding
playback
MPEG-4 Video Decoder
• ISO/IEC 14496-2 MPEG-4 ASP video
decoding up to HD level
• Supports resolutions up to HDTV
(1080p@60fps)
• Supports Divx Home Theater & HD
profiles
• Supports FLV version1 video format
decoding
• Supports dual stream decoding for 3D
content
H.264 Decoder
• ITU-T H.264, ISO/IEC 14496-10(main and
high profile up to level 5.2) video decoding
• Supports resolutions up to 4096x2160@fps
• Supports bitrate up to 135Mbps
• Supports resolutions for all DVB, ATSC,
HDTV,DVD and VCD
• Supports SVAF 2ES (for Dual Decode)
• Supports MVC 3D decoding up to
1080p@60fps
VP8 Decoder
• Supports Google VP8 decoder
• Supports resolution up to 1920x1080@60fps
• Supports maximum bitrate up to 50Mbps
VP9 Decoder
• Supports Google VP9 decoder
 • Supports 4:2:0 subsampling and 8bit/10bit
color depth
• Supports max resolution and frame rate
4096x2160@60fps
• Supports max bitrate up to 100Mbps
AVS+ DecoderOptional
• Supports Broadcasting profile,level
6.0.1.08.60(AVS+)
• Supports Jizhun profile, level 6.0
• Supports bitrate up to 50Mbps
• Supports resolution up to 1920x1080@60fps
• Supports dual stream decoding
AVS2 DecoderOptional
• Supports AVS2 video decoding
• Supports Main-10bit profile, level 8.2.60
• Supports 8-bit/10-bit color depth
• Supports resolution up to 4096x2304@60fps
• Supports max bitrate up to 100Mbps
AV1 Video Decoder Optional
• Supports AV1 video decoding
• Supports Main profile, level 5.1
• Supports 8-bit/10-bit color depth
• Supports resolution up to 4096x2304@60fps
• Supports max bitrate up to 100Mbps
LZMA Compression
• Supports ACP interface
• Supports LZMA proprietary format
• Supports fixed 4KB
• Supports Input data rate 56MB/s
• Supports Output data rate 133MB/s
• Supports Command Queue
RealMedia DecoderOptional
• Supports RV8, RV9, RV10 decoders
• Supports file formats with RM and RMVB
• Supports maximum resolution up to
1080p@60fps
• Supports Picture Re-sampling
• Supports in-loop de-block for B-frame
• Supports dual stream decoding
HEVC (H.265) Decoder
• Supports HEVC/H.265 video decoding
• Supports Main/Main-10 profile, and
Scalable Main/Scalable Main-10 profile,
level 5.1, hightier
35
• Supports 8-bit/10-bit color depth
• Supports resolution up to
4096x2160@75fps,or
4096x2160@60fps+1920x1080@60fps for
Dolby Vision
• Supports max bitrate upto 100Mbps
H.264 EncoderOptional
• Supports H.264 encoding, Main Profile,
level 4.1
• Maximum output frame-
rate/resolution:1920x1080@30fps,
1280x720@60fps
• Supports MVs: 16x16, 16x8, 8x16, 8x4,
4x8,4x4
• Supports up to quarter-pel
• Supports up to two reference frames
Hardware JPEG Decoder
• Supports upto 1920x1080@30fps,
1280x720@60fps
• Supports formats: 422/411/420/444/422T
• Supports scaling down ratios: 1/2x1/2,
1/4x1/4, 1/8x1/8
• Supports both color and grayscale pictures
• Supports sequential mode, single scan
• Supports programmable Region of
Interest(ROI)
• Following the file header scan the hardware
decoder fully handles the decode process
VC-1 Video DecoderOptional
• Supports SMPTE-421M (VC1 video)
decoding up to AP@L3 (2048x1024p60)
• Supports dual stream decoding for 3D
content
NTSC/PAL/SECAM Video Decoder
• Supports NTSC-M, NTSC-J, NTSC-4.43,
PAL (B,D, G, H, M, N, I, Nc), and SECAM
standards
• Automatic standard detection
• Motion adaptive 3D comb filter
• Supports CVBS & Y/C S-video inputs
• Supports Teletext and V-chip
Multi-Standard TV Sound Processor
• Supports BTSC/A2 demodulation
• Supports NICAM/FM/AM demodulation
 Supports MTS Mode Mono/Stereo/SAP
• •
inBTSC mode
• Supports Mono/Stereo/Dual in A2/NICAM
mode
• Built-in audio sampling rate conversion
(SRC)
• Audio processing for loudspeaker
channel,including volume, balance, mute,
tone, EQ,virtual stereo/surround and
treble/bass controls
• Advanced sound processing options
available,for example: Dolby1, DTS2, DBX-
TV3
• Supports digital audio format : MPEG-1,
MPEG-2 (Layer I/II), MP3, AAC-LC,
HE-AAC, WMA, WMA9 Pro
• Supports Multi-stream programs :
Dolby MS12-B Optional, Dolby MS12-D
Optional, Dolby MS12-Y Optional, Dolby
MS12-Z Optional, and DTS M6 Optional,
DTS M6 multistream decoder/encoder
• Supports Audio Description
• Supports MPEG audio encoding
• Supports time-shifting PVR
o Trademark of Dolby Laboratories
o Trademark of DTS, Inc.Optional Please see
Ordering Guide for details
o Trademark of DBX-TV, Inc.
• Supports programmable delay for audio/video
synchronization
Audio Interface
• One L/R audio line-input
• One L/R output for main speaker or additional
line-output
• Supports stereo headphone driver
• I2S digital audio output and input
• S/PDIF digital audio output and input
optional
• Supports HDMI receiver ARC function
• Supports PDM input for 2/4 channels digital
microphone
Analog RGB Compliant Input Ports
• Two analog ports support up to 1080P
• Supports PC RGB input up to
SXGA@75Hz
• Supports HDTV RGB/YPbPr/YCbCr
• Supports Composite Sync and SOG Sync-
on-Green
36
Automatic color calibration
Analog RGB Auto-Configuration & Detection
• Auto input signal format and mode
detection
• Auto-tuning function including
phasing,positioning, offset and gain
configuration
• Sync Detection for H/V Sync
DVI/HDCP/HDMI Compliant Input Ports
• Four HDMI/DVI input ports
• HDMI 2.0b/1.4b Compliant
• HDMI 2.1
o Max bit rate upto 6Gbps in TMDS
o VRR and Dynamic HDR EM packet
• MediaTek iSwitch for fast HDMI switching
• HDCP 2.2/1.4 Compliant
• Supports HDMI CEC
• Supports HDMI ARC TX
• Robust receiver with excellent long-cable
support
MediaTek High Performance Video Processor
• Video Processing Engine
o Supports up to 4K UHD@60p
o 10/12-bit Internal Data Processing
o Arbitrary Frame Rate Conversion
• Video Care Technology
o Video Line Broken Artifact Detection and
Removal
o Video Detection & Repairing Technology
for Lousy Inputs such as Internet Streaming
• Fully Programmable Multi-Function Scaling
Engine
o High-Quality Filters with Programmable
Parameter
o An advanced Zoom Algorithm providing
Aliasing/Ringing Suppression
o Nonlinear Video Scaling supports various
modes including Panorama
o Supports Dynamic Scaling for RM, VC-1
o Fully Programmable Zoom Ratios for
Up/Down Scaling
o Independent Horizontal and Vertical Zoom
• Deinterlacer
o Motion Compensated Video Deinterlacing
with Motion Object Stabilizer
o Motion Adaptive Deinterlacer
o Edge-Oriented Deinterlacer with Edge
Smoothing and Artifact Removal
o Automatic 3:2/2:2/M:N Pull-Down
Detection and Recovery
• MediaTek Genuine 3D
o Supports Mandatory 3D Format
• Backlight Technology
o Supports Direct and Edge Types Local
• Dimming
o Programmable Light Spread Profile
o Content Adaptive LCD Backlight Control
• High Dynamic Range
o Supports SMPTE ST-2084/ST-2086
o Supports ARIB STD-B67(Hybrid Log
Gamma)/BT.2100
o Supports 2094-40 (HDR10 plus )
o Supports ITU-R BT.2100
o Ultra HD Premium Ready
o Dolby Vision
• Response Time Compensation
o Supports Overdrive Technology
MediaTek Professional PQ Engine
• UltraClear
− MPEG Artifact Removal
• Advanced Adaptive Block Noise Reduction
• Advanced Mosquito Noise Cancellation
− UltraClear Noise Reduction
• 3D Motion-Estimation Temporal Filtering
− 3D Noise Reduction
• 3D Temporal Noise Reduction for Lousy
Air/Cable Input
• S-Powers
− Video Enhancement Processor
• Advanced 3D Independent Multi-Band
Control Sharpness Technology
• Advanced Video Enhancement Algorithm
providesAliasing/Ringing Suppression
• Advanced Chroma Transient
Improvement
• Supports Luma Transient
Improvement
o Super Resolution
• Local Detail Enhancement
• SuperiorClear Multi-Directional Anti-
Aliasing and Jagged Compensation
Technology
• SuperiorClear Enhance Management
• MACE
o MediaTek Advanced Color Engine
• MediaTek Graffito Color Manager
• Color Stain Removal Technology
o Standard Color Format and Processing
• Fully Programmable Input/Output CSC
37
• BT601, BT709, BT2020 (CL/NCL)
• xvYCC601, xvYCC709
• AdobeRGB, AdobeYCC601
• sRGB, sYCC601
• Fully Programmable 12-bit RGB Gamma
o Gamut Mapping
• Nonlinear/Linear RGB Domain Gamut
Mapping
• Supports 2D Gamut Mapping
• Supports 3D Gamut Mapping
• Luce
o Contrast Enhancement
• Real-Time Content Adaptive Contrast
Enhancement with Chroma Compensated
• Ultra Contrast Dimming
o SDR to HDR
Output Interface
• Single/Dual link 8/10-bit LVDS output
• Supports panel resolution up to Full HD
1920x1080@60Hz (LVDS 2ch)
• 8 lane 8/10-bit Vby1 output (configurable
width: 2/4/8 lane)
• Supports panel resolution up to Ultra
HD@60Hz (Vby1 8 lane)
• Supports OSD bypass to MTK FRC
120Hz/240Hz chip Optional
• Supports TCON:miniLVDS 4ch interface,
panel resolution up to Ultra HD@60Hz
• Supports TCON:EPI interface, panel
resolution up to Ultra HD@60Hz
• Supports TCON:CMPI interface, panel
resolution up to Ultra HD@60Hz
• Supports TCON:ISP interface, panel
resolution up to Ultra HD@60Hz
• Supports TCON:CHPI interface, panel
resolution up to Ultra HD@60Hz
• Supports TCON:CEDS interface, panel
resolution up to Ultra HD@60Hz
• Supports TCON:CSPI interface, panel
resolution up to Ultra HD@60Hz
• Supports TTL output, update to
1920x1080@60Hz
• Supports programmable timing controller
• Supports dithering options
• Spread spectrum output frequency for EMI
suppression
• Supports 60Hz 3D polarizd panel (line
interleave)
• Supports Cinema output mode

CVBS Video Encoder
• Supports all NTSC/PAL TV Standard
• Stand-alone scaling engine (no vertical
scaling up)
• Programmable Hue, Contract, Brightness
• Supports TTX/WSS output
CVBS Video Output
• Allows CVBS output of digital content to
SCART
2D Graphics Engine
• Hardware Graphics Engine for responsive
interactive applications
• Supports line draw, rectangle draw/fill and
text draw Supports BitBlt, Stretch BitBlt,
Italic Bitblt,Mirror BitBlt and Rotate BitBlt
• Supports alpha-blending operation
• Supports source/destination color key and
alpha key
• Supports dither
• Supports color format conversion and format
transformation
• Raster Operation (ROP)
• Supports DFB and Porter-Duff operation
VIF Demodulator
• Compliant with NTSC M/N, PAL B, G/H, I,
D/K, SECAM L/L' standards
• Supports low IF architecture
• Audio/Video internal dual-path processor
• Locking range improvement
ATSC/QAM Demodulator
• ATSC A/53 compliant 8VSB
• ITU-T J.83 Annex B, SCTE DVS-031
compliant 64/256QAM receiver
• 2010 - A74 compliant
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset
• Automatic co-channel and adjacent channel
interference suppression
• Impulse-Noise suppression
• Integrated deinterleaver RAM for Level 1 J
=1 and Level 2 J= 1,2,3.4
• Supports LIF interfaces
38
ISDB-T DemodulatorOptional
• Compliant with ISDB-T ARIB STD-B31
• Compliant with ISDB-Tsb ARIB STD-B29
• Supports all modes defined in ISDB-T specs
• Supports all guard ratios: 1/4, 1/8, 1/16, 1/32
• Support LIF interfaces
• Impulse-noise suppression
• Phase noise compensation
• Outside-GI performance improvement
• CNR performance improvement
DVB-C Demodulator
• Compliant with ITU J.83 Annex A/C DVB-C
(EN300 429)
• Supports 1-7.2 M Baud symbol rate
• Automatic blind channel scan ( constellation
and symbol rate)
• Supports LIF interfaces
• IIS performance improvement
DVB-T Demodulator
• Compliant with DVB-T (ETSI EN 300 744)
• Nordig 2.2.2, D-book 7.0 compliant
• Accept low IF inputs in 6, 7, 8MHz channel
bandwidths
• Supports all guard intervals (1/32 to 1/4)
• Supports all constellations (QPSK, 16-
QAM,64-QAM)
• Ultra fast automatic blind UHF/VHF channel
scan
• Optimized for SFN channels with
pre/postcursive echoes inside/outside the
guard
• Phase-Noise suppression
• Impulse-Noise suppression
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset
• Automatic co-channel and adjacent channel
interference suppression
• CNR performance improvement
• Outside-GI performance improvement
DVB-T2 DemodulatorOptional
• Compliant with DVB-T2 (ETSI EN 302 755)
v1.3.1, T2-base & T2-Lite profile
• Nordig Unified 2.2.2, D-Book 7.0 compliant
• Supports all guard intervals (1/128 to 1/4)
• Supports all FFT modes from 1K to 32K
• Supports all long and short block code
rates(1/2, 3/5, 2/3, 3/4, 4/5, 5/6, 2/5, 1/3)
 • Supports all constellations (QPSK, 16-
QAM,64-QAM, 256-QAM)
• Transmit diversity (MISO) support
• Supports all scattered pilot patterns (PP1
toPP8)
• Supports rotated and non-rotated
constellations
• Supports single and multiple PLPs
• Accept low IF inputs in 1.7, 5, 6, 7, 8MHz
channel bandwidths
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset.
• Automatic co-channel and adjacent channel
interference suppression
• Impulse-Noise suppression
• Outside GI improvement
• Locking the improvement
DVB-S DemodulatorOptional
• Compliant with DVB-S (ETSI EN 300 421)
• Data Rate: 1-70 Msps
• Code Rates: 1/2, 2/3, 3/4, 5/6, 7/8
• Carrier frequency acquisition range: 5MHz
• Fast automatic blind scan of symbol rates and
carrier frequencies
• Equalizer compensates for channel
impairment
• DiSEqCTM 2.0 compatible with LNB
controller
• Automatic co-channel and adjacent channel
interference suppression
• Impulse-Noise suppression
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset
• Novel carrier recovery algorithms for tracking
and compensating large phase noises
• Supports Automatic FEC and Modulation
• Integrated FEC decoders for near Shannon
limit performances
• Integrated signal quality and BER monitors
• Improved CNR performance
DVB-S2 DemodulatorOptional
• Compliant with DVB-S2 (ETSI EN 302 307)
• Data Rate: 1-70 Msps for QPSK , 8PSK,
16APSK,1-57 Msps for 32APSK
• Constellations: QPSK , 8PSK , 16APSK and
32APSK
o QPSK Code Rates: 1/2, 3/5, 2/3, 3/4,
4/5,5/6, 8/9, 9/10
39
o 8PSK Code Rates: 3/5, 2/3, 3/4, 5/6,
8/9,9/10
o 16APSK Code Rates: 2/3, 3/4, 4/5, 5/6,
8/9,9/10
o 32APSK Code Rates: 3/4, 4/5, 5/6, 8/9,9/10
• Supports CCM and VCM
• Supports Single Transport Stream and Multiple
Transport Streams
• Roll-off factors for pulse shaping: 0.2, 0.25,and
0.35
• Carrier frequency acquisition range: 5MHz
• Fast automatic blind scan of symbol rates and
carrier frequencies
• Equalizer compensates for channel impairment
• DiSEqCTM 2.0 compatible with LNB
controller
• Automatic co-channel and adjacent channel
interference suppression
• Impulse-Noise suppression
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset
• Novel carrier recovery algorithms for tracking
and compensating large phase noises
• Supports Automatic FEC and Modulation
• Integrated FEC decoders for near Shannon
limit performances
• Integrated signal quality and BER monitors
DVB-S2X DemodulatorOptional
• Compliant with DVB-S2 Extensions (ETSI
EN302 307-2, Broadcast services except for
Channel Bonding)
• Data Rate: 1-70 Msps for QPSK , 8PSK,
8APSK-L,16APSK, 16APSK-L, 1-57 Msps
for 32APSK, and 32APSK-L
• Constellations: QPSK , 8PSK, 8APSK-L,
16APSK,16APSK-L, 32APSK, and 32APSK-
L
o QPSK Code Rates: 1/4, 1/3, 2/5, 1/2,
3/5,2/3, 3/4, 4/5, 5/6, 8/9, 9/10, 13/45,
9/20,11/20
o 8PSK Code Rates: 3/5, 2/3, 3/4, 5/6,
8/9,9/10, 23/36, 25/36, 13/18
o 8APSK-L Code Rates: 5/9, 26/45
o 16APSK Code Rates: 2/3, 3/4, 4/5, 5/6,
8/9,9/10, 26/45, 3/5, 28/45, 23/36,
25/36,13/18, 7/9, 77/90
o 16APSK-L Code Rates: 5/9, 8/15, 1/2,
3/5,2/3
o 32APSK Code Rates: 3/4, 4/5, 5/6, 8/9,9/10,
32/45, 11/15, 7/9
 o 32APSK-L Code Rates: 2/3
• Supports CCM and VCM
• Supports Single Transport Stream and
Multiple Transport Streams
• Roll-off factors for pulse shaping: 0.05, 0.1,
0.15, 0.2, 0.25, and 0.35
• Carrier frequency acquisition range: 5MHz
• Fast automatic blind scan of symbol rates and
carrier frequencies
• Equalizer compensates for channel
impairment
• DiSEqCTM 2.0 compatible with LNB
controller
• Automatic co-channel and adjacent channel
interference suppression
• Impulse-Noise suppression
• All digital demodulation and timing recovery
loops for tracking frequency and clock offset
• Novel carrier recovery algorithms for tracking
and compensating large phase noises
• Supports Automatic FEC and Modulation
Recommended Operating Conditions
Table 15: Recommended Operating Conditions
40
• Integrated FEC decoders for near Shannon
limit performances
• Integrated signal quality and BER monitors
Connectivity
• Three USB 2.0 host ports
• USB architecture designed for efficient
support of external storage devices in
conjunction with off air broadcasting
• Embedded 10/100 Ethernet PHY
• Supports Ethernet Wake-On-Lan
Miscellaneous
• DRAM interface support DDR3/4
• Supports PVR
• Parallel interface for external parallel eMMC
flash and NAND flash support
• Power control module with ultra low power
MCU available in standby mode
• 542-ball BGA package
• Operating Voltages: TBD
Absolute Maximum Ratings

Table 16: Absolute Maximum Ratings

7. 4 GB EMMC

SAMSUNG EMMC 4GB KLM4G1FETE-B041 (U103)

Description

SAMSUNG eMMC is an embedded MMC solution designed in a BGA package form. eMMC operation is
identical to a MMC device and therefore is a sim-ple read and write to memory using MMC protocol v5.1
which is a industry standard. eMMC consists of NAND flash and a MMC controller. 3V supply voltage is
required for the NAND area (VDDF or VCC) whereas 1.8V or 3V dual supply voltage (VDD or VCCQ) is
supported for the MMC controller. SAMSUNG eMMC supports HS400 in order to improve sequential
bandwidth, especially sequential read performance. There are several advantages of using eMMC. It is easy to
use as the MMC interface allows easy integration with any microprocessor with MMC host. Any revision or
amendment of NAND is invisible to the host as the embedded MMC controller insulates NAND technology
from the host. This leads to faster product development as well as faster times to market. The embedded flash
management software or FTL(Flash Transition Layer) of eMMC manages Wear Leveling, Bad Block
Management and ECC. The FTL supports all features of the Samsung NAND flash and achieves optimal
performance.

41
Key Features

• Embedded MultiMediaCard Ver. 5.1 compatible.

• SAMSUNG eMMC supports features of eMMC5.1 which are defined in JEDEC Standard
- Major Supported Features : HS400, Field Firmware Update, Cache, Command Queuing, Enhanced
Strobe Mode, Secure Write Protection, Partition types
- Non-supported Features : Large Sector Size (4KB)
• Backward compatibility with previous MultiMediaCard system specification (1bit data bus, multi-eMMC
systems)
• Data bus width : 1bit (Default), 4bit and 8bit
• MMC I/F Clock Frequency : 0 ~ 200MHz
MMC I/F Boot Frequency : 0 ~ 52MHz
• Temperature : Operation (-25°C ~ 85°C), Storage without operation (-40°C ~ 85°C)

• Power : Interface power →VCCQ(1.70V ~ 1.95V), Memory power → VCC(2.7V ~ 3.6V)

Table 17: Supply Voltage

8. USB INTERFACE

USB 0

USB 1

G32

USB 2
USB HUB
CY7C65642
Socket
DAA

42
 A. USB POWER SWITCH TPS2553-1 (U115-U116-U119)

B. HX2VL VERY LOW POWER USB 2.0 TETRAHUB CONTROLLER (U117)

Description
HX2VL is Cypress’s next generation family of high- performance,very low-power USB 2.0 hub controllers.
HX2VL has integrated upstream and downstream transceivers; a USB serial interface engine (SIE); USB hub
control and repeater logic; and transaction translator (TT) logic. Cypress has also integrated external
components such as voltage regulator and
pull-up/pull-down resistors, reducing the overall BOM required to implement a USB hub system.

43
 The CY7C65642 is a part of the HX2VL portfolio with four downstream ports and and independent TT
dedicated for each downstream port. This device option is for low-power but
high-performance applications that require up to four downstream ports. The CY7C65642 is available in 48-pin
TQFP and 28-pin QFN package options.

Features
• High-performance, low-power USB 2.0 hub, optimized for
low-cost designs with minimum bill-of-material (BOM).
• USB 2.0 hub controller
o Compliant with USB2.0 specification
o Up to four downstream ports support
o Downstream ports are backward compatible with FS, LS
o Multiple translator (TT), one per downstream port for maximum performance.
• Very low-power consumption
o Supports bus-powered and self-powered modes
o Auto switching between bus-powered and self-powered
o Single MCU with 2 K ROM and 64 byte RAM
o Lowest power consumption.
• Highly integrated solution for reduced BOM cost
o Internal regulator – single power supply 5 V required.
o Provision of connecting 3.3 V with external regulator.
o Integrated upstream pull-up resistor
o Integrated pull-down resistors for all downstream ports
o Integrated upstream/downstream termination resistors
o Integrated port status indicator control
o 12-MHz +/-500 ppm external crystal with drive level 600 uW (integrated PLL) clock input with
optional 27/48-MHz oscillator clock input.
o Internal power failure detection for ESD recovery
• Downstream port management
o Support individual and ganged mode power management
o Overcurrent detection
o Two status indicators per downstream port
o Slew rate control for EMI management
• Maximum configurability
o VID and PID are configurable through external EEPROM

44
 o Number of ports, removable/non-removable ports are configurable through EEPROM and I/O
pin configuration
o I/O pins can configure gang/individual mode power switching, reference clock source and
polarity of power switch enable pin
o Configuration options also available through mask ROM
• Available in space saving 48-pin TQFP (7 × 7 mm) and 28-pin QFN (5 × 5 mm) packages
• Supports 0 ◦C to +70 ◦C temperature range

Block Diagram

9. CI INTERFACE
17MB180E Digital CI Interface Block diagram:

Figure 19: CI interface

45
 10. SOFTWARE UPDATE
MAIN SOFTWARE UPDATE

In MB18OE project, please follow software update procedure:

1. 02_rom_emmc_boot_mb180.bin, mb180_en.bin, usb_auto_update_G32.txt and mboot_emmc_mb180.bin

documents should be copied directly inside root of a flash memory (not in a folder).
2. Insert flash memory to the TV when TV is powered off.
3. While pushing the OK button on remote control, then power on and wait. TV will power-up itself.
4. If First Time Installation screen comes, it means software update procedure is successful.

11. TROUBLESHOOTING
A. NO BACKLIGHT PROBLEM

Problem: If TV is working, led is normal and there is no picture and backlight on the panel.

Possible causes: Backlight pin, dimming pin, backlight supply, stby on/off pin
BACKLIGHT_ON/OFF pin should be high when the backlight is ON. Collector pin of Q110 must be low when
the backlight is OFF. If it is a problem, please check Q108. Also it can be tested in TP113 in main board. Please
also check panel cables.

Dimming pin should be high or square wave in open position. It also can be checked at TP111. Please
also check panel or power cables and connectors.

46
 Backlight power supply should be in panel specs. Please check Q101, shown below; also it can be
checked TP103.

STBY_ON/OFF_NOT should be low for TV on condition, please check Q106’s collector.

47
 B. CI MODULE PROBLEM

Problem: CI is not working when CI module inserted.

Possible causes: Supply, suply control pin, detects pins, mechanical positions of pins.
• CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin
should be low.

• Please check mechanical position of CI module. Is it inserted properly or not?

• Detect ports should be low. If it is not low please check CI connector pins, CI module pins.

48
 C. IR PROBLEM

Problem: LED or IR not working

Check LED card supply on MB180E chasis.

49
 D. KEYPAD TOUCHPAD PROBLEMS

Problem: Keypad or Touchpad is not working

Check keypad supply on MB180E.

50
 E. USB PROBLEMS

Problem: USB is not working or no USB Detection.

Check USB Supply, It should be nearly 5V. Also USB Enable should be logic high.
USB Control is optional, so U115 and U116 may not be added. Check supply voltages only.

F. NO SOUND PROBLEM

Problem: No audio at main TV speaker outputs.

Check supply voltages of 24V_VCC, VDD_AUDIO and 3V3_AMP with a voltage-meter. There may be a
problem in headphone connector or headphone detect circuit. Measure voltage at HP_DETECT pin, it should
be 3.3v.

51
 G. STANDBY ON/OFF PROBLEM

Problem: Device cannot boot, TV hangs in standby mode.

There may be a problem about power supply. Check main supplies with a voltage-meter. Also there may be a
problem about SW. Try to update TV with latest SW. Additionally it is good to check SW printouts via
Teraterm program. These printouts may give a clue about the problem. You can use HDMI1 for Teraterm
program connection.

H. NO SIGNAL PROBLEM

Problem: No signal or Low signal in DVB-S/S2 mode.

Check signal cables and LNB voltage, if there is no problem, check M88TS6011 (U114) supply voltages;
3V3_VCC_SAT.

52
If the above measurements are OK, then measure the voltage from the PIN1 of U114.
If the PIN9 voltage is equal to 0V, please check i2c waveforms and software. If the PIN9 voltage is lower than
1V(e.g: 0.8Vor 0.3V), change the U114 with a new part.

53
 12. SERVICE MENU SETTINGS
In order to reach service menu, first Press “MENU” buton, then write “4725” by using remote controller.
You can see the service menu main screen below. You can check SW releases by using this menu. In addition,
you can make changes on video, audio etc. by using video settings, audio settings titles.

Service Menu

Video Settings

54
 Audio Settings

Options 1

55
 Options 2

Options 3

56
 Tuning Settings

Source Settings

57
 Diagnostic

58
 1 2 3 4 5 6 7 8

Tuner
A A
X100

3V3_TUNER 1 4
2 3

C228

C243

C265

C266
100n
1n2

1n2

1n2
24MHz

560nH
C267

L109
50V
1n2

12n

18

17

16

15

14

13
NC

VDDH_2

GND_3

VDDH_1

XTAL_O

XTAL_I
3

2
19 RF_REF XOUT 12
C244 C259 R223
4 S133 20 11
CN107 1
RF_IP LIF_P 100R IF_P
5 47p 39p 21 10
B 50V GND_0
U107 LIF_N 100R IF_N B

7
C258
3v3_Tuner Decoupling

270nH
R222

L108
22 9

22n
RF_IN SI2151 VDDH_0 3V3_TUNER F125

C242

50V
180nH

1n2
100n 3V3_VCC 3V3_TUNER

L110
39p

560nH

100n 10V

100n 10V
23 8 60R

12n
ADDR GND_2 C240

L107

C285

C286

C275

C276
6V3

6V3
12n

10u

10u
GPIO2

GND_1
24 7

AGC2

AGC1
GPIO1 VDDL

SDA

SCL
16V

C241

C225
6V3

50V
1n2
3V3_TUNER
100n

1u
C268

180p
50V
C224

6
C227

27p
C215 R218
100R TUNER_IF_AGC
27p
16V

R214
100R

100R
R213
100n
C C226 C

TUNER_SDA

TUNER_SCL
3V3_VCC_SAT

Sat. Tuner LNBp

16

15

14

13

D D
VDDA3

VDDA2

VDDA1

CK_OUT/GPIO

5 4 3 2
100p
C385 C372
CN111 1 1 RF_IP IP 12 S2_IP
M88TS6011

C22V

D115

1N5819
50V 50V

D112
3p3 2 11 100nF
U114

50V 0p5 RF_IN IN S2_IN 220n

L113

6 7 8
3n9

C382 100p D114 C362

C367 3 ADDR_SEL QN 10 S2_QN LNB_OUT 10k 3V3_VCC
D116 1N5819 R285
4 XTAL_OUT QP 9 S2_QP R284
BAV99
1 LNB TONE 8

1N5819
100R DISEQC_OUT
XTAL_IN

D111
C342 C337 C330 C334 U112
LNB_OUT 10u 10u 10u 10u 2 BOOST NC 7 100R LNB_FAULT
SDA

SCL

AGC

1n 1n 1n 1n 1n 25V 25V 25V 25V 1N5819 RT5047 R286

C386

C388

C383

C387

C384

3 LX SEL 6 100R LNB_VOLTAGE

50V 50V 50V 50V 50V D113 R287
5

4 VIN EN 5
E L112
1 2 LNB_ENABLE E
S149
27MHz
3 2 S2_AGC_D1 12V_VCC
10u 10k 3V3_VCC
4 1 25V
10u F129 R288
AGC Connections 27p
X102
27p
R322
100R TUNER_SCL
C335 12V_VCC
1k
C338
220n
C361 C360 R323 50V
3V3_VCC F131 100R TUNER_SDA
C355 C349
1k 27p 27p
C353
R312 100n
10k

S2_AGC
R305
2k
R313
1k S2_AGC_D1 F132
3v3_Sat Decoupling
C354 C359 3V3_VCC 3V3_VCC_SAT
10n 10n 60R C380 C378 C376 C377 C381 C379 C370
C375

6V3
10u

F 100n 100n 100n 100n 100n 100n 10u F

Close to Mstar Side
Close To TS6011

VESTEL PROJECT NAME : 17MB180E A3

SCH NAME :TUNER_SAT_LNB T. SHT:8
DRAWN BY :<YOUR NAME HERE> 29/11/2019:16:22
1 2 3 4 5 6 7 8 AX M
 1 2 3 4 5 6 7 8

CN125
62

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TCONLESS/VBYONE SOCKET C1

CN124
LVSYNC_/_Mini_A_5-_/_VX1_0- VES12N
AH3 C2
62

61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
BACKLIGHT_ON/OFF_OUT GPIO0_PM_/_PWM_PM1_/_SD_CDZ_/_PM_SPI_DI
LHSYNC_/_Mini_A_5+_/_VX1_0+ VES12P

9
8
7
6
5
4
3
2
1
LED1 N2 GPIO1_PM_/_PM_TX_/_PM_SPI_DO LDE_/_Mini_A_4-_/_VX1_1- B1 VES11N
LED2 R2 GPIO5_PM_/_PM_RX_/_PM_SPI_CK LCK_/_Mini_A_4+_/_VX1_1+ B2 VES11P
AMP_MUTE AC4 B3
A GPIO6_PM_/_PM_SPI_CZ1 LVB0-_/_Mini_A_3-_/_VX1_2-
A3
VES10N A
LVB0+_/_Mini_A_3+_/_VX1_2+ VES10P
C3
4 LVB1-_/_Mini_A_CK-_/_VX1_3- VES9N

PMIC_GPIO
PAN_SDA
PAN_SCL

54 VES12N
53 VES12P

51 VES11N
50 VES11P

48 VES10N
47 VES10P

45 VES9N
44 VES9P

42 VES8N
41 VES8P

39 VES7N
38 VES7P

36 VES6N
35 VES6P

33 VES5N
32 VES5P

30 VES4N
29 VES4P

27 VES3N
26 VES3P

24 VES2N
23 VES2P

21 VES1N
20 VES1P
LOCKN
DEMURA_CS
DEMURA_DI
DEMURA_DO
DEMURA_CLK
TCON1/GST
TCON5/MCLK
TCON6/GCLK
TCON7/EO
TCON2
TCON3
M2 B4

3V3_STBY
GPIO2_PM GPIO2_PM__CHIP_CONFIG_ LVB1+_/_Mini_A_CK+_/_VX1_3+ VES9P
PMIC_GPIO M1 GPIO9_PM__CHIP_CONFIG_ LVB2-_/_Mini_A_2-_/_VX1_4- C4 VES8N
GPIO10_PM Y3 GPIO10_PM__CHIP_CONFIG_ LVB2+_/_Mini_A_2+_/_VX1_4+ B5 VES8P

CN106
LVBCLK-_/_Mini_A_1-_/_VX1_5- A5 VES7N
70

69
68
67
66
65
64
63
62
61
60
59
58
57
56
55

52

49

46

43

40

37

34

31

28

25

22

19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
LVBCLK+_/_Mini_A_1+_/_VX1_5+ C5 VES7P
R248 10u STBY_ON/OFF LVB3-_/_Mini_A_0-_/_VX1_6- A6 VES6N
1k P2 PWR_CTRL LVB3+_/_Mini_A_0+_/_VX1_6+ B6 VES6P
V5 C6

1N4148
C299 C298 C295 PWM_PM LVB4-_/_Mini_B_5-_/_VX1_7- VES5N

D108

R247
10k
100n 100n H6 RESET LVB4+_/_Mini_B_5+_/_VX1_7+ B7 VES5P
PMIC_GPIO
PAN_SDA
PAN_SCL

VES12N
VES12P

VES11N
VES11P

VES10N
VES10P

VES9N
VES9P

VES8N
VES8P

VES7N
VES7P

VES6N
VES6P

VES5N
VES5P

VES4N
VES4P

VES3N
VES3P

VES2N
VES2P

VES1N
VES1P

LOCKN
DEMURA_CS
DEMURA_DI
DEMURA_DO
DEMURA_CLK
TCON1/GST
TCON5/MCLK
TCON6/GCLK
TCON7/EO
TCON2
TCON3
TCON0
TCON4

DEMURA_WP
3V3_VCC
10V 10V R242 LVA0-_/_Mini_B_4-_/_Vx1_OSD_00- B8 VES4N
3V3_STBY 4k7 LVA0+_/_Mini_B_4+_/_Vx1_OSD_00+ C8 VES4P
SYS_SCL B20 DDCR_CK LVA1-_/_Mini_B_3-Vx1_OSD_01- B9 VES3N
3V3_STBY 4k7 SYS_SDA A20 DDCR_DA LVA1+_/_Mini_B_3+_/_Vx1_OSD_01+ A9 VES3P
R244 3V3_STBY 4k7 LVA2-_/_Mini_B_CK-_/_Vx1_OSD_02- C9 VES2N
J4 A10

CN105
DEBUG_RX R243 DDCA_CK LVA2+_/_Mini_B_CK+_/_Vx1_OSD_02+ VES2P
J5 B10
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
DEBUG_TX DDCA_DA LVACLK-_/_Mini_B_2-_/_Vx1_OSD_03- VES1N

9
8
7
6
5
4
3
2
1
3V3_STBY C10
B 3V3_STBY
4k7 LVACLK+_/_Mini_B_2+_/_Vx1_OSD_03+
B11
VES1P B
4k7 R381 LVA3-_/_Mini_B_1-_/_LOCKN VES_LOCKN
S128 R241 HP_AMP_MUTE AC5 SAR0 LVA3+_/_Mini_B_1+_/_HTPDN C11 TCON5/MCLK
PANEL_VCC OP_PIN38 KEYBOARD Y8 SAR1 LVA4-_/_Mini_B_0-_/_OSD_LOCKn B12 1
10k 2
3V3_VCC
S126 PANEL_VCC_ON/OFF AC9 SAR2 LVA4+_/_Mini_B_0+_/_OSD_HTPDn C12 R183
OP_PIN36
OP_PIN35
OP_PIN34
OP_PIN33
OP_PIN32
OP_PIN31
OP_PIN30
OP_PIN29
OP_PIN28

AB9
OP_PIN38
OP_PIN37

ALS_OUT SAR3 1
10k 2
3V3_VCC
F124

F122

F121

F120

F119

VBY_HTPDN
VBY_LOCKN

VBY_0P

VBY_1N
VBY_1P

VBY_2N
VBY_2P

VBY_3N
VBY_3P

VBY_4N
VBY_4P

VBY_5N
VBY_5P

VBY_6N
VBY_6P

VBY_7N
VBY_7P
H5
VBY_0N

S127 POWER_SENSE VPLUGIN R185

PAN_SCL S117
R217 3V3_STBY 4k7 Mini_C_5- F4 TCON6/GCLK
PANEL_VCC 33k OP_PIN37 Mini_C_5+ F3 TCON7/EO
R382 F5 S118
R212 Mini_C_4-
C177 TP132
PANEL_VCC

U5 F6

PANEL_VCC
10k CORE_VID0 VID0 Mini_C_4+
VES12N VBY_0N P7 E2
100n CPU_VID1 VID1 Mini_C_3-
C174 TP130 P3 E3
R216 CPU_VID2 VID2 Mini_C_3+
VES12P VBY_0P PANEL_VCC OP_PIN36 D2
100n 33k Mini_C_CK-
C173 TP129 D1
VES11N VBY_1N PANEL I2C BUFFER
R211 U108 Mini_C_CK+
E5
100n 10k Mini_C_2-
C175 TP128 E14 E4
VES11P VBY_1P
DEMURA_DO 22R
D17
LD_SPI_MISO_/_SPI2_DI MT9685LAAJAC Mini_C_2+
D4
100n S130 DEMURA_WP 22R R385 LD_SPI_CS_/_SPI2_CK Mini_C_1- 3V3_VCC
C171 TP127 E17 D5
R236

C PAN_SDA DEMURA_DI R386 22R LD_SPI_MOSI_/_SPI1_DI Mini_C_1+ C

10k
VES10N VBY_2N D14 D6
100n R215 DEMURA_CLK 22R R387 LD_SPI_CK_/_SPI1_CK Mini_C_0-

R384
C172 TP126

4k7
PANEL_VCC 33k OP_PIN35 R388 DEMURA_CS E18 GPIO0 Mini_C_0+ D7

C157
VBY_2P R224 R230

50V
VES10P E7

10p
100n R210 Mini_D_5-
C170 TP125 10k 10k F7
10k Mini_D_5+
VES9N VBY_3N E8
100n Mini_D_4- DEMURA_WP
C169 TP124 E9
SYS_SCL BSN20 S131 Mini_D_4+
VES9P VBY_3P PAN_SCL OP_PIN34 D8
100n PAN_SDA Mini_D_3-

R383
C167 TP123

4k7
Q113 S132 Mini_D_3+ D9
VES8N VBY_4N 4k7 3V3_STBY D10 nc
100n PAN_SCL OP_PIN33 Mini_D_CK-
C168 TP122 S134 R280 E10
PANEL_VCC

Mini_D_CK+
VES8P VBY_4P 4k7 3V3_STBY F11
100n R220 Mini_D_2-
C165 TP121 PANEL_VCC OP_PIN32 R276 U2 E11
33k TOUCHPAD_SCL GPIO7_PM Mini_D_2+
VES7N VBY_5N AB4 D11
100n R221 TOUCHPAD_SDA GPIO8_PM Mini_D_1-
C166 TP120 H1 D12
10k WOWL_EN GPIO11_PM Mini_D_1+
VES7P VBY_5P WOWL_DET M4 E12
100n GPIO12_PM Mini_D_0-
TP119 F12
C161 R207 3V3_STBY 4k7 Mini_D_0+
VES6N VBY_6N PANEL_VCC OP_PIN31
100n 33k R339
TP118
R237

C162 R208
10k

VES6P VBY_6P C13 S115

D C160
100n
TP117
10k TCON0
A14 S116
TCON0 D
TCON1 TCON1/GST
VES5N VBY_7N R238 R239 B14 S113
100n R206 TCON2 TCON2
C156 TP116 10k 10k PANEL_VCC OP_PIN30 AD16 C14 S110
33k LNB_VOLTAGE GPIO9 TCON3 TCON3
VES5P VBY_7P B15 S114
100n R209 TCON4 TCON4
AC16 R250 3V3_VCC
10k LNB_FAULT GPIO10 4k7
F116 1k TP131 M3
SYS_SDA
S123 GPIO11 CI_PWR_CTL
VES_LOCKN VBY_LOCKN PAN_SDA PANEL_VCC OP_PIN29 L3 HP_DETECT
GPIO12
Q114
BSN20

TCON5/MCLK VBY_HTPDN
S124
TP103

F117 1k TP133
R205
F101 PANEL_VCC 33k PWM0 A19 BACKLIGHT_DIM
S135 C17
PWM1
OP_PIN28 PWM2 C19
1

12V_STBY F103 PANEL_VCC S125

4

TESTPIN D18
R274
2

FDC642P
C110

R106

10k 1k POWER_SENSE
2

220n
25V
33k

12V_VCC
Q101

R273
E
1

needs GND shielding E

R275

D109

C3V6
C325
1

1k

330pF
1n2

CHIP CONFIGURATION
3

R111
1
47R
2

UART DEBUG CHIP_CONFIG[2:0]={PAD_PM_GPIO9,PAD_PM_GPIO10,PAD_PM_GPIO2}

12V_STBY
CN101 75LG_VCC
6 3V3_STBY 3V3_STBY 3V3_STBY 6
4

3V3_VCC

PANEL_VCC
TP138

4 1
FDC642P

R246

R260

R272
4k7

4k7

4k7
nc
Q100

nc C103 C104
3 2 100n 100n
ALS_OUT

GPIO9_PM GPIO10_PM GPIO2_PM 10V 10V

1
3V3_STBY

DEBUG_RX 2 PMIC_GPIO GPIO10_PM GPIO2_PM 3

C429
3

R107 S136
1 2
47R DEBUG_TX 1 4
R245

R256

R271
100n
4k7

4k7

4k7
S137
1

opt.
1

nc
R164

5 5
33k

TP139

CN108
R153

F 7 F
4k7

CN123

3
8

R152
PANEL_VCC_ON/OFF
2
10k
1 2
Q109 Value Description
BC848B 3'b010 ARM boot from ROM; outer storage is eMMC
C141
1n
1
3'b011 ARM boot from ROM; outer storage is NAND
VESTEL PROJECT NAME : 17MB180E A3
50V
ALS SOCKET SCH NAME :VBYONE T. SHT:8
DRAWN BY :<YOUR NAME HERE> 14/12/2019:10:21
1 2 3 4 5 6 7 8 AX M
 1 2 3 4 5 6 7 8

MIC_PWR_CTL
DAA INTERFACE

5V_VCC
A CN116 A
MIC_MCK
7 S176

2
TP165 60R

R321
1

2
4k7
1 USB_DAA_DP 5V_STBY

R340

R345
4k7

4k7
1 TP170 F148

1
2 USB_DAA_DN 60R

1
5V_VCC 5V_DAA R344
3 MIC_D0 1 4k7 2

1
S181 F146 C412 C407
10u 100n
4 DAA_SPDIF

2
DAA_SPDIF SPDIF_COAX 16V
1 TP142 16V 3V3_VCC MIC_PWR

2
5 5V_DAA Q121
Q122

R319

R320
WIFI&BT

4k7

4k7
TP185 S168 BSH103
2N7002

TP190
1

6 MIC_PWR

C431
S167

10u
16V
1

1
8 KEYBOARD_ONBOARD

1
B S186 B
3V3_WOWL
C399 CN122

TP189
W2 RIN0P TN T1 ETH_TN
V3 T2
V2
GIN0M 5 TP
R1
ETH_TP
6 OUT
100n S165 1 2
GIN0P RN ETH_RN 3V3_WOWL IN 1 3V3_STBY 1 TP188
U3 R3
BIN0P RP ETH_RP R374 U119 C5V6 D120 3 4 USB_WIFI_DP

1
5 ILIM S166
560R GND 2 5V_STBY
R5 USB_WIFI_DN
HSYNC0 R373 TPS2553-1 WOWL_DET 5 6
HUB BYPASS P6 VSYNC0 USB_CTRL
CID
P4
F14
USB_ENABLE 560R 4 FAULT EN 3 WOWL_EN
WOWL_EN
S187
7 8
1 TP187

DM_P0 N5 USB1_DN
S183 Y2 P5
USB2_DP USB_HUB_DP RIN1P DP_P0 USB1_DP 9 10
Y1 GIN1M S188
S185 W3
USB2_DN USB_HUB_DN GIN1P 11 12
W1 BIN1P DM_P1 N7 USB_HUB_DN
DP_P1 N6 USB_HUB_DP 13 14
DM_P2 M6 USB_WIFI_DN
S182 M7
USB_DAA_DP USB_HUB_DP U108 DP_P2 USB_WIFI_DP
C S184 C
USB_DAA_DN USB_HUB_DN MT9685LAAJAC
U6 CVBS0
47n IRIN N3 100R IR_RC
R350 R251 C306
AMP_RST 100R 68R T6 VCOM R338

C395 AH7 S138

R349 SC_CVBS_OUT XTAL_IN
3V3_HUB 4k7 T7 CVBS_OUT1 XTAL_OUT AG7 24MHz
S139
100n 4 1
1

10V
C308

R249
75R

3 2
33p

ONLY INTERNAL TEST X101

R346
100k
R347
100k

100k
R348

C297

C292
2

27p

27p
2

SC_CVBS_OUT
3
JK100
USB HUB 1

USB1 2.0
21

20

19

18

17

16

15

D D
VCC_D

OVR#3

OVR#4

TEST/I2C_SCL

RESET#

DD+4

DD-4

3V3_HUB R357
100k 22 SELFPWR VCC_A3 14 3V3_HUB 60R
R358 C402 F135 TP168 1

100k 23 GANG DD+3 13 4

R365 100n TP146 1

100k 24 OVR#2 DD-3 12 5V_VCC 1 IN OUT 6 USB1_DP 3

USB1_5V_VCC
R366 U116 TP149
U117
1

100k 25 OVR#1 XOUT 11 2 GND ILIM 5 560R 560R 2

USB1_DN
TPS2553-1 R359 R396 TP150
R369

CY7C65642
1

26 10 2 3 3 EN FAULT 4
1M

PWR#/I2C_SDA XIN USB_ENABLE 33R 560R USB1_5V_VCC 1

1 4
R367 R368 C389

C391
100n
27 VCC VCC_A2 9 3V3_HUB X103 10u CN114
VCC_A1

R375 24MHz 10V

C420

50V

28 8
DD-1

DD+1

DD-2

DD+2

18p

VREG REF 680R

C408

50V
D-

D+

18p
1

E E
S169

S171

S172

S173

S174

S175

1V8 TCON Level Shifter USB2 2.0

3V3_HUB

S119 60R TP163 1

C401 16V
USB_HUB_DN

USB_HUB_DP

F143 4
USB_DAA_DN

USB_DAA_DP

USB2_DP
USB2_DN

TP169 1

Q112 USB2_DP 3
100n 1 IN
VES_LOCKN LOCKN 5V_VCC OUT 6 USB2_5V_VCC TP174 1
2

U115 USB2_DN 2
2 GND ILIM 5 560R 560R TP175
1

R181 TPS2553-1 R352 R397 USB2_5V_VCC 1

10k 10k 33R 3 EN FAULT 4 560R C409
PANEL_VCC USB_ENABLE

C424
100n
R187 R353 R351 10u CN117
10V
R182
10k

F F134
3v3_HUB Decoupling F
3V3_VCC 3V3_HUB
60R C393
C400 C413 C392 C414 C416
10V
100n 100n 100n 100n 100n
10u
16V 16V 16V 16V 16V
VESTEL PROJECT NAME : 17MB180E A3
SCH NAME :USB T. SHT:8
DRAWN BY :<YOUR NAME HERE> 09/12/2019:16:19
1 2 3 4 5 6 7 8 AX M
 1 2 3 4 5 6 7 8
HDMI1 (SIDE)
CN109
1
2
R277
470R
HDMI0_RX2P
HDMI0_RX0N AF14 A_RX0N
***HOTEL TV OPTIONS*** ETHERNET
DEBUG_RX CN112
AG14
3 HDMI0_RX2N HDMI0_RX0P
AF15
A_RX0P 3 AE5 ETH_PIN1 S159 R282 S158 ETH_PIN1 1
4 HDMI0_RX1P HDMI0_RX1N A_RX1N LINEIN_L0 2
10k 1
3V3_STBY ETH_TP TD+
5 HDMI0_RX1P AG15 A_RX1P LINEIN_R0 AF5
AF16 S146 S157 ETH_PIN2 2
A 6 HDMI0_RX1N HDMI0_RX2N
AG16
A_RX2N DEBUG_RX ETH_TN TD- A
7 HDMI0_RX0P HDMI0_RX2P A_RX2P S145 TP158 1

8 HDMI0_CLKN AH13 A_RXCN 5V_STBY 3 TCT

TOUCHPAD_SDA
9 HDMI0_RX0N HDMI0_CLKP AG13 A_RXCP F139

C323

C322
AD11 AE6 S155 4

3n3

3n3
10 HDMI0_CLKP HDMI0_SCL DDCDA_CK LINEOUT_L0 R281 1k C397 ETH_RP RD+
AD12 AF6 ETH_PIN2 S156
11 HDMI0_SDA DDCDA_DA LINEOUT_R0 2
10k 1
3V3_STBY 1u
AE11 S154 5
12 HDMI0_CLKN HOTPLUG0 HOTPLUGA S148 ETH_RN RD-
13 CEC R283 HDMI0_5V 33R AC12 HOTPLUGA_HDMI20_5V DEBUG_TX TP156
AF4 S144 1

6
14 R257 470R DEBUG_TX R262 EARPHONE_OUTL S143 HP_LEFT 5V_STBY RCT
AG10 AH4 S147
15 33R HDMI0_SCL HDMI2_RX0N B_RX0N EARPHONE_OUTR HP_RIGHT TOUCHPAD_SCL F141
C328 AF11 C307 S164 7
16 33R HDMI0_SDA HDMI2_RX0P B_RX0P 1k C404 IR_FROM_ETH NC1
17 R261 HDMI2_RX1N AG11 B_RX1N VAG AG5 10u CLOSE TO MSTAR IC 1u
AF12 AH5 C319 8
18 HDMI0_5V 15p HDMI2_RX1P B_RX1P VRM_ADC C296 220R 12p NC2
19 33R HOTPLUG0 HDMI2_RX2N AG12 B_RX2N F126
50V AH12 100n 9
20 R263 HDMI2_RX2P B_RX2P 12p C321 SHLD1

16V
21 HDMI2_CLKN AG9 B_RXCN I2S_OUT_MCK K2
2

22 HDMI2_CLKP AF10 B_RXCP I2S_OUT_BCK H2 8 R1 1 10 SHLD2

AOLRCK
R258

R259
47k

47k

23 HDMI2_SCL AC13 DDCDB_CK I2S_OUT_WCK K3 7 R2 2 AOSDATA0

HDMI2_SDA AD13 DDCDB_DA I2S_OUT_SD0 J2 6 R3 3 AOMCLK
AB13 J3 5 R4 4 Q123
B
1

HOTPLUG2
AB12
HOTPLUGB I2S_OUT_SD1
K4
AOBCK
IR_FROM_ETH
B
HDMI2_5V 33R HOTPLUGB_HDMI20_5V I2S_OUT_SD2 22R IR_RC
R315 R255
AB2 R393
HDMI1_RX0N C_RX0N 3V3_VCC 5 R4 4 AOLRCK_SW BC848B R354
AB3 10k 1 2
HDMI1_RX0P C_RX0P 6 R3 3 AOSDATA0_SW 10k 5V_STBY
AC2 L1
HDMI1_RX1N
AC3
C_RX1N U108 SPDIF_IN
L2
AMP_RST 7 R2 2 AOMCLK_SW
HDMI1_RX1P C_RX1P SPDIF_OUT SPDIF_OUT
8 R1 1 AOBCK_SW
HDMI2 (SIDE) HDMI1_RX2N
HDMI1_RX2P
AD2
AD3
C_RX2N
C_RX2P
MT9685LAAJAC 22R
R254
AA3
CN110 HDMI1_CLKN
AB1
C_RXCN
K6
C318
1 HDMI2_RX2P HDMI1_CLKP C_RXCP I2S_IN_BCK 12p
2
3 HDMI2_RX2N
HDMI1_SCL
HDMI1_SDA
W7
V7
V6
DDCDC_CK
DDCDC_DA
I2S_IN_WCK
I2S_IN_DIN0
K5
K7
L4
DOLBY VISION PORT
R394
10k 3V3_VCC LED&IR TACT SWITCH
4 HDMI2_RX1P HOTPLUG1 HOTPLUGC I2S_IN_DIN1 5V_STBY
R332U4 L5
5 HDMI1_5V 33R HOTPLUGC_HDMI20_5V I2S_IN_DIN2 MIC_PWR_CTL F147 1k TP101
S163 10k
6 HDMI2_RX1N
AF1 R395
7 HDMI2_RX0P D_RX0N R102
8 AF2 D_RX0P 1 2
KEYBOARD_ONBOARD
47R
9 HDMI2_RX0N AG1 D_RX1N

R101

C108
4k7

100n
10V
AG2 B17 S179
C 10 HDMI2_CLKP
AG3
D_RX1P DMIC_BCK
C18 S180
MIC_MCK C

CN120

10
11 D_RX2N DMIC_SD0

8
MIC_D0
12 HDMI2_CLKN AH2 D_RX2P DMIC_SD1 B18
AE1 B19

S177TP181

S178TP182
13 CEC D_RXCN DMIC_SD2

9
S153 AE3
14 HDMI_ARC D_RXCP

SW100
D100
2

BZT52C5V6LP
15 33R W5 DDCDD_CK
HDMI2_SCL
16 R309 W6 DDCDD_DA
HDMI2_SDA
17 Y4 HOTPLUGD

1
33R Y7 AA5

1
18 R314 HDMI2_5V HOTPLUGD_HDMI20_5V MICIN1
AA6

TP179

TP164

TP159

TP161

TP108

TP180
19 33R HOTPLUG2 MICCM1
20 R316 R308 MICIN0 AB5
2

TOUCHPAD_SCL

TOUCHPAD_SDA
21 CEC 100R AD14 CEC0 MICCM0 AB6
R310

R311
47k

47k

22
23

CN119
AE15
1

NC

6
C347 S151
HDMI_ARC AD15 HDMIRX_ARCTXP
6V3 1u

DIMMING

CN118
D KEYBOARD_ONBOARD D

5
TP110
HDMI3 (BACK) KEYBOARD BSH103
Q105
S106
KEYBOARD_ONBOARD BACKLIGHT_DIM DIMMING

3
CN113 R342 2
C390 F144
21 10k 3V3_STBY 100n

1
2

2
20 1k
1

10V 1k

R143

R142

R141
10k

10k

4k7
1 HDMI1_RX2P R341 F133 5V_STBY D119 3

5V_VCC
1 2
2 47R KEYBOARD R355
Q124 2

1
1 2
3 HDMI1_RX2N F138 1k TP152 F140 C5V6 10k LED1
4 HDMI1_RX1P 3V3_STBY BC848B
IR_RC

R378
150R

C396

50V
5 F136 C403 1k 1

1n
6 HDMI1_RX1N TOUCHPAD_SCL 1 2

7 HDMI1_RX0P 1k
27p 50V
8 TOUCHPAD_SDA
9 HDMI1_RX0N F137 1k 3

10 HDMI1_CLKP R361
D117

2
4

2
Q126
E 11 LED2 1
10k
2

E
TP153

TP155

TP157

TP160

R376

220R
R360

220R
R370

R379
10k

10k
12 HDMI1_CLKN BC848B Q127 2
10k LED1
TP162

2 1

13 CEC
1 BC848B R362
SPDIF OUT
CDA4C16GTH

1
14 R335
15 33R HDMI1_SCL
16 33R HDMI1_SDA
5

17 R334 Q128
Q125
18 VIN 1 SPDIF_COAX
CN115

HDMI1_5V BC858B
FB100

19 33R HOTPLUG1 F130 BC858B

1

22 R333 VCC 2 5V_VCC

2

2
23 1k
R336

R337

C351

220R
R377

220R
R380
1

2
47k

47k

10V
100n

24 GND 3
R318
4k7

1
1

1
SPDIF_COAX

5V_STBY
2

C357 R324
TP148

Q120 100R SPDIF_OUT

BC848B 100n 10V
C363

1
100n
10V

F C356 F
R317
4k7

22p
1

2 220R 50V
3
2

JK101 R325
1
C364
VESTEL PROJECT NAME : 17MB180E
R326
220R

TP145 1 22p A3
50V
SCH NAME :HDMI_GPIO T. SHT:8
DRAWN BY :<YOUR NAME HERE> 14/12/2019:09:57
1 2 3 4 5 6 7 8 AX M
 1 2 3 4 5 6 7 8
C293
100n
C294

C239

EMMC_VIO
100n
AD9 IF_P

2
IP_T
EMMC_D0 AF28 EMMC_IO0_/_EMMC_D0_/_NAND-D4 2 AD8 IF_N

EMMC_CLK1
IM_T F123
1V8_VCC LDO

2
EMMC_D1 AE28 EMMC_IO1_/_EMMC_D1_/_NAND-D3 IFAGC_T AF7 10k 3V3_TUNER
EMMC_D2 AE27 EMMC_IO2_/_EMMC_D2_/_NAND-D2 100n R219 1k
EMMC_D3 AF27 EMMC_IO3_/_EMMC_D3_/_NAND-D5 TUNER_IF_AGC
2 1
EMMC_D4 AG28 U103

TP186
EMMC_IO4_/_EMMC_D4_/_NAND-D6 S129
EMMC_D5 AG27 AC7 C371 S2_IP
2

A EMMC_IO5_/_EMMC_D5_/_NAND-D7 IP_S C366 C223 H26M41208HPR A

R390
100n

4k7
EMMC_D6 AD27 EMMC_IO6_/_EMMC_D6_/_NAND-D0 IM_S AC8 C358 S2_IN 100n
1

R389
100n U120
EMMC_D7 AE26 EMMC_IO7_/_EMMC_D7_/_NAND-D1 QP_S AD7 C365 S2_QP LM1117 EMMC_CLK 22R EMMC_CLK1
M6 CLK NC_32 D3
EMMC_DS AH27 AE8 100n 100n S2_QN D4
EMMC_IO8_/_EMMC_DS_/_NAND-DQS QM_S 3 IN NC_33
EMMC_CMD AF26 AG6 S2_AGC 3V3_VCC OUT 2 1V8_VCC EMMC_CMD M5 D12
EMMC_IO9_/_EMMC_CMD_/_NAND_CEZ IFAGC_S 2 1
CMD NC_34
EMMC_CLK AH26 C430 C433 D13

D121
EMMC_IO10_/_EMMC_CLK_/_NAND_REZ S152 ADJ VOUT C432 NC_35
EMMC_RST AG26 10u 100n EMMC_D0 A3 D14
EMMC_IO11_/_EMMC_RSTN_/_NAND_RBZ 10V 1 4 10u 16V DAT0 NC_36
PCM2_IRQA_N_/_DISEQC_OUT AC17 DISEQC_OUT 10V EMMC_D1 A4 DAT1 NC_37 E1
PCM2_RESET/_DISEQC_IN AE18 LNB_ENABLE R299 EMMC_D2 A5 DAT2 NC_38 E2
AG25 EMMC_IO14_/_NAND_CLE 3V3_VCC 4k7 EMMC_D3 B2 DAT3 NC_39 E3
AF25 EMMC_IO15_/_NAND_ALE R298 EMMC_D4 B3 DAT4 NC_40 E5
AG24 EMMC_IO16_/_NAND_WEZ TGPIO2_/_SCK1 AC11 4k7 TUNER_SCL EMMC_D5 B4 DAT5 NC_41 E12
AF24 EMMC_IO17_/_NAND_WPZ TGPIO3_/_SDA1 AB11 4k7 TUNER_SDA EMMC_D6 B5 DAT6 NC_42 E13
R301 EMMC_D7 B6 DAT7 NC_43 E14
3V3_VCC 4k7 NC_44 F1
F149 EMMC_D6
R302 EMMC_RST K5 RSTN NC_45 F2
1V8_VCC EMMC_VIO EMMC_D6
TS2_CLK_/_SDIO_D0 AH18 NC_46 F3
220R C425 C426 EMMC_D6
TS2_SYNC_/_SDIO_D1 AH17 3V3_NAND E6 VCC_0 NC_47 F12
AF17 100n 100n F5 F13
TS2_VLD_/_SDIO_D2 VCC_1 NC_48
PCM_A0 AF18 AG17 16V 16V J10 F14
B PCM_A1 AA26
PCM_A0 TS2_D0_/_SDIO_D3
K9
VCC_2 NC_49
G1 B
PCM_A1 VCC_3 NC_50
PCM_A2 AF19 PCM_A2 NC_51 G2
PCM_A3 AA27 PCM_A3 EMMC_VIO C6 VCCQ_0 NC_52 G3
PCM_A4 AB27 PCM_A4 PCM2_CE_N/SDIO_CLK AC18 M4 VCCQ_1 NC_53 G12
PCM_A5 AF23 AD17 N4 G13
PCM_A6 AE24
PCM_A5 U108 PCM2_CD_N/SDIO_CMD
P3
VCCQ_2 NC_54
G14
PCM_A6 VCCQ_3 NC_55
PCM_A7 AG23 P5 H1
PCM_A8 AF21
PCM_A7 MT9685LAAJAC 22R
F118
VCCQ_4 NC_56
H2
y
PCM_A8 R119 NC_57 y
PCM_A9 AG22 AD19 1 R1 8 TS0_D0 3V3_VCC 3V3_NAND A6 H3
PCM_A9 TS0_D0 60R C181 VSS_0 NC_58 y
PCM_A10 AF20 PCM_A10 TS0_D1 AB19 2 R2 7 TS0_D1 C180 C176 E7 VSS_1 NC_59 H12
PCM_A11 AB26 AE21 3 R3 6 TS0_D2 10u 100n 100n G5 H13
PCM_A11 TS0_D2 10V 16V 16V VSS_2 NC_60
PCM_A12 AD24 PCM_A12 TS0_D3 AB20 4 R4 5 TS0_D3 H10 VSS_3 NC_61 H14
PCM_A13 AD25 PCM_A13 TS0_D4 AC20 1 R1 8 TS0_D4 J5 VSS_4 NC_62 J1
PCM_A14 AC24 PCM_A14 TS0_D5 AD20 2 R2 7 TS0_D5 K8 VSS_5 NC_63 J2
TS0_D6 AE20 3 R3 6 TS0_D6 NC_64 J3
PCM_D0 AE23 PCM_D0 TS0_D7 AC22 4 R4 5 TS0_D7 C4 VSSQ_0 NC_65 J12
PCM_D1 AH21 PCM_D1 TS0_CLK AB18 TS0_CLK R186 N2 VSSQ_1 NC_66 J13
PCM_D2 AH22 PCM_D2 TS0_VLD AC19 TS0_VALID 22R N5 VSSQ_2 NC_67 J14
PCM_D3 Y26 AB22 TS0_SYNC P4 K1
C PCM_D4 Y27
PCM_D3 TS0_SYNC
P6
VSSQ_3 NC_68
K2
EMMC_RST C
PCM_D4 C434 VSSQ_4 NC_69 EMMC_RST
PCM_D5 W28 K3

TP115
PCM_D5 22R 4u7 NC_70 EMMC_RST

BSH103
PCM_D6 W27 PCM_D6 R168 C2 VDDI NC_71 K6

Q107
PCM_D7 AF22 PCM_D7 TS1_D0 T28 1 R1 8 TS1_D0 x NC_72 K7
x
TS1_D1 U26 2 R2 7 TS1_D1 EMMC_DS 22R H5 DS NC_73 K10
R27 3 R3 6 TS1_D2 K12

1
TS1_D2 R150 5V_VCC R391 NC_74
PCM_CD AG19 T27 4 R4 5 TS1_D3 CI_PWR y E8 K13

C144
100n
y

3
PCM_CD_N TS1_D3 VSF_0 NC_75

10V

R504
R392
PCM_CE AD23 PCM_CE_N TS1_D4 V26 1 R1 8 TS1_D4 C149 2
C145 2
C146 E9 VSF_1 NC_76 K14
10u 100n 100n

1
PCM_IORD AC25 PCM_IORD_N TS1_D5 U27 2 R2 7 TS1_D5 E10 VSF_2 NC_77 L1
10V
1 1
EMMC_CLK1

1
PCM_IOWR AD22 W26 3 R3 6 TS1_D6 10V 10V F10 L2
PCM_IOWR_N TS1_D6 VSF_3 NC_78 EMMC_CLK1
PCM_IRQA AG21 PCM_IRQA_N TS1_D7 V27 4 R4 5 TS1_D7 R155 R162 G10 VSF_4 NC_79 L3
12V_VCC 1 2 1 2 EMMC_CLK1
PCM_OE AC23 PCM_OE_N TS1_CLK R26 TS1_CLK 47k 47k P10 VSF_5 NC_80 L12
PCM_REG AG20 PCM_REG_N TS1_VLD T26 TS1_VALID 22R NC_81 L13
PCM_RST Y28 PCM_RESET TS1_SYNC R28 TS1_SYNC R170 EMMC_D4 A1 NC_0 NC_82 L14
CI_PWR_CTL 1
10k 2 Q111
PCM_WAIT AG18 PCM_WAIT_N EMMC_D4 A2 NC_1 NC_83 M1
BC847B EMMC_CMD
PCM_WE AB23 PCM_WE_N EMMC_D7 A7 NC_2 NC_84 M2
EMMC_CMD
PCM2_WAIT_N AD18 A8 NC_3 NC_85 M3
EMMC_CMD
A9 NC_4 NC_86 M7
A10 M8
D A11
NC_5 NC_87
M9 D
NC_6 NC_88
A12 NC_7 NC_89 M10
A13 NC_8 NC_90 M11

PCM_D3
R198
CI_D3
CI EMMC_D3
A14
B1
B7
B8
NC_9
NC_10
NC_11
NC_91
NC_92
NC_93
M12
M13
M14
N1
22R NC_12 NC_94
CN104 B9 NC_13 NC_95 N3
R121 R112 R188 35 1 B10 NC_14 NC_96 N6
R110
22R 22R 1 2
3V3_VCC 10k PCM_CD1 22R 36 2 CI_D3 B11 NC_15 NC_97 N7
3V3_VCC 10k
PCM_A0 8 R1 1 CI_A0 PCM_D0 8 R1 1 CI_D0 R180 TS0_D3 37 3 CI_D4 B12 NC_16 NC_98 N8
PCM_A1 7 R2 2 CI_A1 PCM_D1 7 R2 2 CI_D1 1N4148 TS0_D4 38 4 CI_D5 B13 NC_17 NC_99 N9
PCM_A2 6 R3 3 CI_A2 PCM_D2 6 R3 3 CI_D2 PCM_CD1 PCM_CD TS0_D5 39 5 CI_D6 B14 NC_18 NC_100 N10
PCM_A3 5 R4 4 CI_A3 5 R4 4 D104 TS0_D6 40 6 CI_D7 x C1 NC_19 NC_101 N11
1N4148 R178 TS0_D7 41 7 CI_CE EMMC_D5 C3 NC_20 NC_102 N12
R124 PCM_CD2 3V3_VCC 10k 42 8 CI_A10 EMMC_D6 C5 NC_21 NC_103 N13
22R D101 10k 43 9 CI_OE C7 NC_22 NC_104 N14
PCM_A4 8 R1 1 CI_A4 PCM_D4 CI_D4 CI_IORD CI_A11 C8 P1
PCM_A5 7 2 CI_A5 PCM_D5 5 R4 4 CI_D5 R179
CI_IOWR
44 10
CI_A9 C9
NC_23 NC_105
P2
E PCM_A6 6
R2
3 CI_A6 PCM_D6 6 R3 3 CI_D6 TS1_SYNC1
45 11
CI_A8 C10
NC_24 NC_106
P7 E
R3 7 R2 2 CI_D7 46 12 NC_25 NC_107
PCM_A7 5 R4 4 CI_A7 PCM_D7 TS1_D0 CI_A13 C11 P8
8 R1 1 TS1_D1
47 13
CI_A14 C12
NC_26 NC_108
P9
22R 48 14 NC_27 NC_109
R177 R191 R176 TS1_D2 49 15 CI_WE R157 C13 NC_28 NC_110 P11
22R PCM_IORD 22R CI_IORD TS1_D3 50 16 CI_IRQA 4k7 CI_PWR C14 NC_29 NC_111 P12
PCM_A8 8 R1 1 CI_A8 PCM_OE R4 CI_OE R189 CI_PWR 51 17 EMMC_D5 D1 NC_30 NC_112 P13
CI_PWR
PCM_A9 7 R2 2 CI_A9 TS1_SYNC 5 R3
4 TS1_SYNC1 PCM_CE 22R CI_CE 52 18 R156 EMMC_D5 D2 NC_31 NC_113 P14
PCM_A10 6 R3 3 CI_A10 PCM_IOWR 6 R2
3 CI_IOWR TS1_D4 53 19 22R TS1_VALID
PCM_A11 5 R4 4 CI_A11 PCM_WE 7 R1
2 CI_WE TS1_D5 54 20 22R TS1_CLK
C134

C138

8 1
50V

50V

TS1_D6 CI_A12
10p

10p

22R 55 21 R151
C139

C140
50V

50V
TS1_D7 CI_A7

10p

10p
R171 56 22
R122 TS0_CLK 22R 57 23 CI_A6
22R R134 R123 CI_RST 58 24 CI_A5
PCM_A12 CI_A12 PCM_WAIT 8 R1 1 CI_WAIT CI_WAIT CI_A4
PCM_A13 5 R4 4 CI_A13 PCM_RST 7 R2 2 CI_RST
CI_PWR 10k 59 25
CI_A3
PCM_A14 6 R3 3 CI_A14 PCM_REG 6 R3 3 CI_REG CI_REG
60 26
CI_A2
PCM_IRQA 7 R2 2 CI_IRQA 5 R4 4 TS0_VALID
R120 61 27
CI_A1
8 R1 1 TS0_SYNC
22R 62 28
CI_A0
22R 22R 63 29
TS0_D0 CI_D0
F R163 R118
TS0_D1
64 30
CI_D1 F
65 31
TS0_D2 66 32 CI_D2
3V3_VCC 10k PCM_CD2 22R 67 33 10k CI_PWR
R108 R109 68 34 R117
VESTEL PROJECT NAME : 17MB180E A3
SCH NAME :CI_NAND T. SHT:8
DRAWN BY :<YOUR NAME HERE> 12/12/2019:13:41
1 2 3 4 5 6 7 8 AX M
 1 2 3 4 5 6 7 8

MAIN AMP
6W/8W/10W L116
A_OUT1B
1 PD VDDLA 24 10u
AMP_EN VDD_AUDIO C419

TP172

TP177
A R343
2 23
220n
50V
A
100R ERROR N.C.2
3 SDATA LA 22 A_OUT1A
AOSDATA0 C411
220n 4
F142 60R AOLRCK 4 LRCIN GNDL 21 L114 50V
3V3_VCC 3V3_AMP R363 A_OUT1A 3
100R 5 SDA LB 20 A_OUT1B 10u
L115
C405 SYS_SDA
100n R364 U118 A_OUT2B 2
16V 100R 6 SCL VDDLB 19 10u
SYS_SCL VDD_AUDIO C421
AD82587D 220n 1
AMP_RST 7 RESET VDDRB 18 50V
VDD_AUDIO

F145
CN121

1k
C410
8 17

TP178

TP173
DGND RB A_OUT2B C423
100n 220n
3V3_AMP 9 DVDD GNDR 16 L117 50V
R372 A_OUT2A
3V3_AMP 4k7 10 SA0 RA 15 A_OUT2A 10u
R371
11 14
B F102 60R AOMCLK 100R MCLK N.C.1 B
3V3_VCC 3V3_AMP_SW
C415 12 BCLK VDDRA 13
C102 AOBCK VDD_AUDIO

TP102
100n 12p
16V 50V

1
F100
S104

1k
12V_VCC VDD_AUDIO SW_A_OUT1A
CN100
C422 L101 C113

C406

C394

C418

C417
S105

100n

100n

100n

100n
24V_VCC 220u 10u 220n 3
10V 50V
C105 1
220n
50V 2
SUBWOOFER AMP C112
220n 4
50V
SW_A_OUT2A
1 PD VDDLA 24 10u
AMP_EN VDD_AUDIO_SW

1
C R105
2 23
L100 C

TP100
100R ERROR N.C.2
3 SDATA LA 22
AOSDATA0_SW SW_A_OUT1A

SYS_SDA
AOLRCK_SW
R104
100R
4

5
LRCIN

SDA
GNDL

LB
21

20
HEADPHONE AMP
R103 U100
100R 6 SCL VDDLB 19 C329 C350
SYS_SCL VDD_AUDIO_SW R293 R307
AD82587D HP_RIGHT
2
10k
1 1
10k
2
HP_LEFT
AMP_RST 7 RESET VDDRB 18
1u 1u

1
C107

R292

R304
33k

33k
8 DGND RB 17
100n 1 -INR 10
-INL
9 16

2
3V3_AMP_SW DVDD GNDR
HP_OUT_R 2 OUTR OUTL 9 HP_OUT_L
10 15
SA0 RA SW_A_OUT2A U111
R100 3 EN GND 8
HP_AMP_EN

R291

R306
4k7

4k7
11 14
D AOMCLK_SW 100R MCLK N.C.1
4 PVSS
AD22657B D
C101 PVDD 7
12p AOBCK_SW 12 BCLK VDDRA 13
1 2 VDD_AUDIO VDD_AUDIO_SW C333
S150 50V 1u 5 CN CP 6
6V3 F128 1k
2

3V3_VCC
R289
10k

C344

C346

100n
16V 10u

C341

6V3
100u S100

1u
24V_VCC 10V
1

VDD_AUDIO_SW

POP NOISE 1

C343
2

C115

C106

C114

C109

C111

C100
100n

100n

100n

100n

100n
2 1
10k 100u
2

R294 35V
R278

R290
10k

10k
3V3_VCC
5V_VCC

BC858B
Q119
E E
HEADPHONE OUTPUT
2
R252

R253

C324

100k
R269
4k7

4k7

100n

TP151
1

AMP_EN
3 3

2
R267 C317 R265

R328
BC848B 7

1
10k
AMP_MUTE 1
10k
2 2
100n Q115
2
33k C373 C368
Q116

TP144

2
16V 220p 10n
2

1 1 P3

1
BC848B
NC
100k
R279

TP143 S160 P5
HP_OUT_L
1

R266 HP_DETECT 4k7 P4 JK102

1

HP_AMP_EN 4k7 3V3_VCC R330

10k P2
R268 C312 2 1

AMP_MUTE 1
10k
2
10n S161 R327
6V3 P1
HP_OUT_R
R329
100R

3 3

F R270 C320 R264 F

TP147

BC848B 6
2

HP_AMP_MUTE 1
10k
2 2
100n Q117
2
33k C374 C369
R331

Q118 2
10k

16V 10n 220p

1 1
1

BC848B
3V3_VCC
1

VESTEL PROJECT NAME : 17MB180E A3

SCH NAME :AUDIO AMPs T. SHT:8
DRAWN BY :<YOUR NAME HERE> 10/12/2019:11:23
1 2 3 4 5 6 7 8 AX M
 F
E
D
C
B
A
A2 GND-1 GND-47 L8
A23 GND-2 GND-48 M8
B13
7 M9
GND-3 GND-49

DRAM__VREF_A
1V_VCC_CORE

10mA,20mil
B22 M10

1V_VCC_CPU
GND-4 GND-50

3.8A,160mil
B23 M19 V13

1V_VCC_CPU
GND-5 GND-51 VDDC_CPU-10
B24 GND-6 GND-52 M20 V14 VDDC_CPU-1

600mA,40mil
6

1
1

C7 GND-7 GND-53 M21 V15 VDDC_CPU-2

AVDDL_MOD, 2 pins
C15 GND-94 GND-54 M23 V16 VDDC_CPU-5
C21 GND-95 GND-55 M24 V17 VDDC_CPU-6

25V
DVDD_DDR, 4 pins 10u
25V
10u
C22 N4 W13

C208
GND-8 GND-155 VDDC_CPU-7

1V_VCC_CPU 10 pins
C24 GND-9 GND-56 N8 W14 VDDC_CPU-8
C27 GND-10 GND-57 N9 W15 VDDC_CPU-9

16V
100n
C190 16V
100n
C28 N10 W16

C203
C210
GND-11 GND-58 VDDC_CPU-4

16V
100n
16V
100n
D3 N11 W17

C236
C238
GND-12 GND-98 VDDC_CPU-3
D13 GND-13 GND-99 N19
D15 N20 R11

1V_VCC_CORE
GND-14 GND-100 VDDC-8

16V
100n
16V
100n
D19 N21 R12

C204
C199
GND-15 GND-101 VDDC-20

DVDD_DDR
16V
100n
16V
100n
D21 N22 T11

C254
C256
GND-16 GND-102 VDDC-22
D22 N23 T12

AVDDL_MOD
GND-17 GND-59 VDDC-4
D23 GND-18 GND-60 P8 P15 VDDC-7

16V
100n
D24 P9 P16

C194
GND-93 GND-61 VDDC-6

25V
10u
16V
100n
16V
100n
E6 P11 P17

C187
C235
C237
GND-19 GND-62 VDDC-2
E13 P19 P18

1V_VCC_CPU 10 pins VDDC 22 pins

GND-20 GND-63 VDDC-18
E15 GND-21 GND-64 P20 R13 VDDC-19

16V
100n
E19 P21 R14

C198
GND-22 GND-65 VDDC-17

16V
100n
16V
100n
E20 P22 R15

C253
C255
GND-96 GND-66 VDDC-16
E21 R8 R16

2
2

GND-97 GND-67 VDDC-11

E23 GND-23 GND-68 R9 R17 VDDC-5
E24 GND-24 GND-69 R10 R18 VDDC-3

16V
100n
16V
100n
E25 T3 R19

1V5_DRAM
C221
C222
GND-25 GND-70 VDDC-1
E26 GND-26 GND-71 T9 T13 VDDC-10
F2 GND-27 GND-72 T10 T14 VDDC-21

250mA,25mil
F10 GND-28 GND-89 U9 T15 VDDC-9
F13 GND-29 GND-90 U10 T16 VDDC-12
F15 GND-30 GND-91 U11 T17 VDDC-13
F17 GND-31 GND-92 U12 T18 VDDC-14

AVDD_DDR_A, 5 pins
AVDD_DDR_B, 5 pins
1V_VCC_CORE
F18 U13 T19
U108

AVDD_DRAM_A, 2 pins
AVDD_DRAM_B, 2 pins
GND-32 GND-73 VDDC-15

25V
10u
25V
10u
F19 U14

C216
C197
GND-33 GND-74

3.8A,160mil
F20 U15
MT9685LAAJAC

VDDC 22 pins
GND-34 GND-75
F21 GND-35 GND-76 U16 N13 DVDD_DDR-1
F23 GND-36 GND-77 U17 1V_VCC_CORE P13 DVDD_DDR-2

U108
16V
100n
16V
100n
F24 U18 P14

C245
C280
GND-37 GND-78 TP184 DVDD_DDR_RX_A

25V
10u

16V
100n
F26 U19 N14

C201
C184
GND-38 GND-79 TP183 DVDD_DDR_RX_B
G3 GND-86 GND-80 U23 1V_VCC_CORE N12 AVDDL_MOD-1
G6 U24 P12

MT9685LAAJAC
GND-87 GND-81 AVDDL_MOD-2

16V
100n
16V
100n
G7 U25

C272
C262
GND-88 GND-82

16V
100n
16V
100n
G8 V8

C205
C206
GND-39 GND-83

3
3

G9 GND-40 GND-84 V9
G10 GND-41 GND-85 V10 H27 AVDD_DDR_A-4

16V
100n
G15 V11 K14

C287
GND-42 GND-129 AVDD_DDR_A-1

25V
10u
16V
100n
16V
G17 V12 100n L14

C189
C200
C211
GND-43 GND-128 AVDD_DDR_A-2
G18 GND-44 GND-127 V18 1V5_DRAM M14 AVDD_DDR_A-3
G19 GND-45 GND-130 W8 M13 AVDD_DDR_A-5

16V
100n
G20 W9

C281
GND-46 GND-131

16V
100n
16V
100n
16V
100n

G21 W10 A24

C260
C249
C213

GND-103 GND-132 AVDD_DDR_B-5

G22 GND-104 GND-133 AA2 K12 AVDD_DDR_B-4
G24 GND-105 GND-134 AB14 1V5_DRAM L12 AVDD_DDR_B-1

16V
100n
G25 AC10 L11

C271
GND-106 GND-135 AVDD_DDR_B-2

16V
100n
16V
100n
16V
100n

G26 AD4 M11

C246
C231
C217

GND-107 GND-136 AVDD_DDR_B-3

100n
16V

H4 AD5
C284

GND-108 GND-137
H13 GND-109 GND-138 AD6 AVDD_DDR_DRAM_A-2 AC28
H14 GND-110 GND-139 AD10
16V
100n
16V
100n

H15 AD26 B27 J25

C264
C218
AVDD_DDR_A

GND-111 GND-140 1V5_DRAM AVDD_DDR_DRAM_A-6 AVDD_DDR_DRAM_A-4 1V5_DRAM

25V
10u
H16 AE2 B28 J26

C192
GND-112 GND-141 AVDD_DDR_DRAM_A-5 AVDD_DDR_DRAM_A-3

1V8_VCC
H18 GND-113 GND-142 AE4 AVDD_DDR_DRAM_A-1 L21
100n
16V

H19 AE7
C291

GND-114 GND-143

2
16V
100n
16V
100n

20mA,20mil
H20 AE9 A27 A16
C250
C232

GND-115 GND-144 1V5_DRAM AVDD_DDR_DRAM_B-3 AVDD_DDR_DRAM_B-4

16V
100n

4
4

H21 AE10 C273 B26 H17

0R
GND-116 GND-145 AVDD_DDR_DRAM_B-1 AVDD_DDR_DRAM_B-2 1V5_DRAM
H25 AE16

S142
AVDD_LDO, 1pin
GND-117 GND-146

1
H26 GND-118 GND-147 AE25 AVDD_DDR_B
16V
100n
16V
100n

J7 AF3 G28 N15

C234
C196

GND-119 GND-148 AVDD_DDR_VBP_A AVDD_DDR_VBP_A AVDD_DDR_VBP_A1

16V
100n

J8 AF8 J27 N16

C229

GND-120 GND-149 AVDD_DDR_VBN_A AVDD_DDR_VBN_A AVDD_DDR_VBN_A1

J9 GND-121 GND-150 AF9

16V
100n
J10 AF13 A25 J14

C316
GND-122 GND-151 AVDD_DDR_VBP_B AVDD_DDR_VBP_B AVDD_DDR_VBP_B1
16V
100n
16V
100n

J12 AH9 B25 K13

C251
C212

GND-123 GND-152 AVDD_DDR_VBN_B AVDD_DDR_VBN_B AVDD_DDR_VBN_B1

16V
100n

K9 AH16
C230

GND-124 GND-153
K10 GND-125 GND-154 AH25 MOD_VTERM A13 AVDD_MOD_VTERM
K27 GND-126
16V
100n
16V
100n

C193
C252

AVDD_LDO
16V
100n

K11
C248

AVDD_LDO AVDD_LDO_A
16V
100n
16V
100n

C220
C233

16V
100n
C247

G1 3V3_STANDBY-2
16V
100n
C219

G2

1V5_DRAM
1V5_DRAM

5
5

3V3_STBY 3V3_STANDBY-1
150mA,20mil

H3 3V3_STANDBY-3
3V3_VCC

VDDP33, 2pins
3V3_VCC
3V3_VCC

1k
1k
100n

AG8

R225
R227
3V3_STBY
C300

VDDP-2
DVDD_NODIE

R235 R233 3V3_VCC

25V
10u

AH8
C304

1k 1k VDDP-1
150mA,20mil
3
2
1

100n 100n
1V2_VCC
1V_VCC_CORE

EN
IN

16V
100n
16V
100n

AB24
C301
GND
C311

C278 C288 AVDD_EMMC_3318-2

1V8_VCC
2
2

AVDD_NODIE, 3pins 25V

10u

AB25
C309

AVDD_EMMC_3318-1
6V3
2u2
C310

U109

C277 C283
16V
100n
C290
S140
S141

TLV471P

1n 1n
1
1

NC
OUT

16V
100n
C313
1V2_VCC_VTERM

4
5
1V5_DRAM

6V3
MOD_VTERM option

6
6

A22 NC-1 470n

1V8_VCC

16V
100n
C314

B21
DRAM_VREF_B
DRAM_VREF_A

NC-2 C263
16V
100n
C305

16V
100n
6V3
470n

MOD_VTERM

C315
C269

GND1

25V
10u
C303

1V2_VCC
6V3
470n

20mA,20mil
C270

16V
100n
C289

16V
100n

1V5_DRAM
1V5_DRAM
C302
VDDP_3318-NAND, 2pins
AVDD_DDR_VBP_B

AVDD_DDR_VBN_B

DVDD_NODIE
F1 DVDD_NODIE
7
7

NC

1k
1k

AG4
NC R226
R228

6V3
NC
NC

GND
TP135
TP136
240R
R231
240R
R232
240R
R234
240R
R229

C279 C257 470n

DRAM_VREF_B
DRAM_VREF_A

100n 100n C261

SCH NAME :MAIN_POWER
6V3
1V5_DRAM 470n
C282

F27
L28
D26
N28
D27
M28
F28
G27
AC27
AC26

DRAWN BY :<YOUR NAME HERE>

6V3
470n
C274

ZQ_B
ZQ_A

B-RST
A-RST
ZQ1_B
ZQ1_A

DRAM_VREF_B
DRAM_VREF_A
AVDD_DDR_VBP_A

IO_CAL_BF]PHRF^
IO_CAL_AF]PLRF^
1

U108

8
8

AVDD_DDR_VBN_A

GS101
GS100
MT9685LAAJAC

VESTEL PROJECT NAME : 17MB180E

T. SHT:8
A3

02/12/2019:17:01
F
E
D
C
B
A

AX M
 1 2 3 4 5 6 7 8
CN103
12 11 12V_STBY

10 9 power_pin9 5V_STBY/VCC STEP-DOWN (3A) 5V_VCC SWITCH

8 7 DIMMING
F108
60R 5V_STBY 5V_VCC
3V3_STBY DC/DC (2A)
12V_VCC 33p C123

4
A 6 5 BACKLIGHT_ON/OFF F110 VFB 10u R296
R1
R295 A

NTGS3446
C131 10V 37k4 1
4k7
2

Q104
4 3 STBY_ON/OFF_NOT 60R R137 R127 R128
60R 120k R2 4k7 22k 33k C339
2 1 power_pin1 4k7
R1
12V_STBY F105 100nC122 C120 C119 F107 TP105 R136 2p NC

3
2
10u 10u 60R 12V_STBY 33k 50V
12V_STBY 60R 16V 16V 16V 5V_VCC
CN102

C345

TP154
100n
F104 F106 R138 16V

C5V6

D110
2 1 2
TP141 1 2 1 12V_VCC 33k 47R C348 16V
60R R135 6 BOOT GND 1 C352
R126
power_pin9S103 5V_STBY
100n
L111
4 3 2
10k
1 1
10k
2
F109 C135 U113 10u 10u

R145
16V 5 EN LX 2

1k
TP106 1 1 TP111 R125 60R 3V3_STBY
6 5 DIMMING 1 EN VIN 8 TP107 RT6213BHGJ6F 3u3 F127
L102 4 FB VIN 3
1 TP113 U101 C121 12V_STBY
8 7 BACKLIGHT_ON/OFF 2 VFB VBST 7 5V_STBY 16V 16V 60R
VFB R144 C340

C5V6D103
10u Q108
1 TP112 TPS54528 100n C124 C125 100n 60R 2
10k
1
R303 100n C336 C331
10 9 STBY_ON/OFF_NOT 3 VREG5 SSW 6 10u 10u F111 BC848B 1 2
16V 10u 10u
10k

STBY_ON/OFF_NOT

R2
10V 10V 16V C130
S107 4 VSS
B 12 11 GND 5 B

C132

R297

R300
10V

12k

4k7
1u
S108

50V
8n2
TP114 1 24V_VCC

power_pin1 C129

IPS55/PW30 OPTION
12V_VCC SWITCH 3V3_VCC DC/DC (3A) 1V5_DRAM DC/DC (2A) 3V3_STBY LDO
R130 R169 R1 R172
S102 R129
37k4 R1 1 2
47k 51k
4k7
S101 33k C137 C150 U110
4k7 LM1117
C TP109
3 IN C
12V_STBY 12V_VCC 2p NC 2p NC 5V_STBY OUT 2 3V3_STBY
50V 50V C332 ADJ VOUT C327 C326
4

10u 10u 10u

C133

TP104

C153

TP137
100n

100n

4
16V C209 10V 10V 10V
FDC642P

C5V6

D102

D106
C5V6
1

Q103

C116 16V 16V 16V

C118

R113
2

220n
25V

33k

6 BOOT GND 1 C117 6 BOOT GND 1 3u3 C202

L103 L104
1

U102 10u 10u U105 10u 10u

5 EN LX 2 5 EN LX 2
2

3V3_VCC 1V5_DRAM
3

RT6213BHGJ6F 3u3 F112 RT6213BHGJ6F F114

R115
1 2 4 FB VIN 3 12V_VCC 4 FB VIN 3 12V_STBY
47R
C128 16V 16V 60R C163 C154 16V 60R
1

R133 100n C126 C127 R173 100n 16V C158

R114
33k

1
10k
2
16V 10u 10u 1
10k
2
16V 10u 10u
R131R2

R2
100k
R175
12k
2

R132

R174
4k7

4k7
STBY_ON/OFF
R116
22k Q102 Vout=0.765x(1+(R1/R2)) Vout=0.765x(1+(R1/R2))
BC848B
D D

1V_VCC_CPU DC/DC (2A) DC/DC 5 Backlight On/Off Circuit

1V_VCC_CORE DC/DC (6A)

C143

100n
10V
FS100
R203 R154

1V_VCC_CORE
S189
18k 1
4k7 2 5V_VCC
NC L105 R149
C179 F113 BACKLIGHT_ON/OFF 1
4k7 nc 2 R147
3u3 4k7
12V_VCC 10u 10u 1 2 3V3_STBY
60R 16V 16V C159 C188 C195 R148

C5V6

D105
2p NC Q110
50V C155 C152 100n C191 16V 4k7 BACKLIGHT_ON/OFF_OUT

TP140
1 2

10u 10u 16V 16V 100n BC848B

C185

TP134

C142
100n

100n
10V
16V
C5V6

D107

E S190 6 BOOT
C207 C214 R167 E
CPU_VID2 300k GND 1 3u3 2
10k
1 1
10k
2

R201 U106 L106 10u 10u R166 R165 R159

5 EN S193
LX 2 1V_VCC_CPU 1 EN VIN 8 22k 5k6
R202 RT6213BHGJ6F F115 U104 C164 33p
S191 4 FB
CPU_VID1 100k VIN 3 12V_VCC VFB_1V_VCC 2 VFB VBST 7
60R
R204
C183
100n
16V
C186
16V
C182
TPS54528
3 VREG5 SSW 6
100n C148 STBY On/Off Circuit
1
10k 2
16V 10u 10u FS101 R160 R158
S192

4 VSS GND 5 68k 3k CORE_VID0

C178 C147 VFB_1V_VCC R146
R199
4k7

100n 1u C151 3V3_STBY 1

10k
2
STBY_ON/OFF_NOT
16V 16V 8n2

2
50V
R194

R139
91k

4k7
3

1
R140
STBY_ON/OFF 22k
2
Q106
BC848B

C136
2

100n
16V
1

F F

1
VESTEL PROJECT NAME : 17MB180E A3
SCH NAME :POWER T. SHT:8
DRAWN BY :<YOUR NAME HERE> 12/12/2019:14:34
1 2 3 4 5 6 7 8 AX M