Sn ta So eet Start Complete Exam Preparation Bee ed 7) Mock Tests UES} Masterclasses Crests Exe jownload App Question 1: View this Question Online > The Output is dependent only on present input? 1. Combinational Circuits 2. Analog Circuits 3. Flip Flop 4, Sequential Cifeuits Answer (Detailed Solution Below) Option 1 : Combinational CircuitsCorey-Let al) Tate [-Weomese | oft a C-<-ela (Lem cola) govt. exams Under One Roof GF) vere cases patie Combinational Logic Circuits Que: ion 1 Detailed Solution Combinational logic circui: + For the combinational logic circuit present output depends upon the present input + There is no memory element India's #1 Learning Platform ROCCO ost Start Complete Exam Preparation yi eae) MasterClasses Question Bank D- Download App Question 2: The combination of two half adders is a 1. full adder 2. Schimtt trigger3. Comparator 4, halfadder Answer (Detailed Solution Below) <0 Option 1: full adder Oo wat 2 Detailed Solution A®B (sum) Combinational Logic Ci Half add Oo AB (carry) The half adder is a type of combinational logic circuit that adds two 1-bit binary numbers. It generates the carry and sum of both inputs. A | B | Sum (Carry| Sum =A@B Carry = AB Full adder Co: : » TN (Carry out)SS ——$<$=—$———— $s The full adder is a type of combinational logic circuit that adds three 1-bit binary numbers. The full adder is the combination of two half adders. A B cy Sum Cout 0 0 0 0 0 ° 0 1 1 0 ° 1 0 1 0 ° 1 1 ° 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Sum =A @B @Cn Cout = AB + BC, + CinA & eee cad eee Start Complete Exam Preparation eau ed a See Lites etyQuestion 3: View this Question Online > Race Around condition can be avoided in Digital logic circuits using? 1. Shift Register 2. Master Slave JK Flip Flop 3. Full Adder Option 2: Master Slave JK Flip Flop Combinational Logic Circuits Question 3 Detailed Solution Race around condition in JK flip flop In JK Flip-flop, if ]=K=1, and if clk=1 for a long period of time, then Q output will toggle as long as CLK is high, which makes the output of the flip-flop unstable or uncertain. This problem is called race around condition in J-K flip-flop. The truth table of the JK flip-flop is given below: J K Qnet 0 ° Qn o 1 0 1 0 1 1 1 | invalid = The invalid at J=1 and K=1 is known as the race-around condition. omTo overcome this condition, a Master-slave JK flip flop is used. Q=1| JS Q CLK _ K Q Q=0) + The master-slave flip flop is constructed by combining two JK flip flops. + These flip-flops are connected in a series configuration. In these two flip flops, the 1st flip flop work as a “master”, called the master flip flop, and the 2nd work as a “slave”, called the slave flip flop. + When the clock pulse is true, the slave flip flop will be in the isolated state, and the system's state may be affected by the J and K inputs. + The “slave” remains isolated until the CP is 1. + When the CP is set to 0, the master flip-flop passes the information to the slave flip-flop to obtain the output. & iii ABE il Racial RE Re Start Complete Exam Preparation lees oo Mock Tests M Eero’ Cres eeog wee Download App Question 4: View this Question Online > An IC with four NOR gates is: 1, 7486 2. 7404 3, _ 4 7402Answer (Detailed Solution Below) Option 4: 7402 Combinational Logic Circuits Question 4 Detailed Solution IC 7402 7402 IC is a device containing four independent gates each of which performs the logic NOR function. According to logic NOR, if any of the input is high the oltput is always low. The truth table of NOR Gate is given below: > nee GAS NOR OR NOT yar =]o)- [=> =|=le[slo ojolol— India’s #1 Learning Platform Start Complete Exam Preparation RoC Sec eee likes Doser jownload App resto Question 5: View this Question Online > Which of the following circuit has its output dependent only upon the present input? 4. Analog Circuits 2. Flip Flops3 a Circuits 4. Sequential Circuits Answer (Detailed Solution Below) Option 3: Combinational Circuits Combinational Logic Circuits Question 5 Detailed Solution In combinational circuits, the output is dependent only upon the present input. {Combinational Circuits [Sequential Circuits |The output depends entirely on the |The output depends on'the present as well past lbresent input input INo feedback is present between the input _|A feedback path exists between the input and jand output joutput lit exhibits a faster speed ~ It exhibits slower speed IThese circuits do not have a clack, thus theyBecause a sequential circuit depends on a clock, don’t require triggering ft usually requires triggering [They do not possess any memory element [They always possess a memory element |Example- De-multiplexer, Multiplexer, Encoderéte, Example- Counters, Flip-flops etc. ol oe eer © Tos PSE Tame VCR chime) lel) Perret Gin ae hee oes tele ‘Question Bank Exe) Download App‘Question 6 \View this Question Online > are an example of a combinational circuit. 1. Shift Registers 2. Multiplexers 3. Counters 4. Flip-Flops Answe' lution Below) 2: Multiplexers Combinational Logic Circuits Question 6 Detailed Solution Com! ational Logic circuits: Combinational Logic circuits are circuits for which the present output depends only on the present input. ie, there is no memory element to store the past output. A combinational circuit can have ‘n’ number of inputs and ‘m’ number of outputs as shown: > OmD> Combinational circuits are: + Multiplexer/Demultiplexer + Encoder/Decoder + Adders + Subtractors + Code Converters Multiplexers: CG e + A multiplexer is Many to one data selector. ¥ ’ + A multiplexer selects one of the many deta available at its input n the bits on the select line. * For 2™ inputs, there are m select lines that determin: is to be connected to the output. . roe=} Important Point a Ina sequential circuit, the output depends on both the present and the past values. The circuit diagram is as shown: Input | Combinational | Output Logic Circuit Positive Previous Feedback State et Memory [f S71 Clock Signal Examples of sequential circuits: + Shift Registers + Flip flops * Counters co India's #1 Learning Platform Reta ct Pela CM CM nelle Lecel) ices coy eis MasterCl oresieicrg & Quizzes Download App Question 7 View this Question Online > Which of the following circuit has its output dependent only upon the present input? 1, Analog Circuits 2. Flip Flops 3. Combinational Circuits 4. Sequential Citcuits Answer (Detailed Solution Below) Option 3 : Combinational CircuitsCombinational Logic Circuits Question 7 Det d Solution In combinational circuits, the output is dependent only upon the present input. Combinational Circuits lSequential Cit [The output depends entirely onthe [The cutput depends on the present as well past lpresent input input INo feedback is present between theinput [A feedback path exists between the input and land output uutput It exhibits a faster speed It exhibits slower speed [These circuits do not have a clock, thus theyBecause a sequential circuit depends on a clock, ldon't require triggering it usually requires triggering [They do not possess any memory element [They always possess a memory element |Example- De-multiplexer, Multiplexer, Encoder ate Example- Counters, Flip-flops etc. See Pela (CM cima le laced) CaCO Sct rea Fab bcs Poem esac Extra ‘Question 8 View this Quastion Online >AY COMO OTOL Gan Oe. Cengned Using any 1, AND gates ‘ > 2. OR gates . ¢ 3. XOR gates kory A TR: : Answer (Detailed Solution Below) Option 4: NOR gates Combinational Logic Circuits Question 8 Det Concept: universal gate is the one with which any other Boolean function can be implemented without the need of other gates. Explanation: Two universal gates are NAND and NOR. NAND: In this gate, output of logic gate is false only when both the inputsiare true, It is the complement of AND gate. NOR gate: Output of this logic gate is true when both inputs.are false. ‘Truth Table: f A B JANAND B/A eh 0 0 1 1 0 1 1 0 1 0 1 0 1 1 0 0Start Complete Exam Preparation Des cela researc Exe r Download App levine Practice ips Question 9 View this Question Online > In the figure shown, DO and D1 are digital inputs, $ is a control input and ¥ is the output. When S=0, then Y=DO. When S=1, then Y=D1. The given combinational cireuit is DO | daha ufo Combinational 1 1 “ 2. 2 input multiplexer 3. Full Adder 4. Shift Register Answer (Detailed Solution Below) Option 2: 2 input multiplexer Combinational Logic Circuits Question 9 Detailed Solution Multiplexers: + A multiplexer is a combinational circuit. + A multiplexer is Many to one data selector. + A multiplexer selects one of the many data available atts input depending on the bits on the select line, * For 2" inputs, there are n select lines that determine, Which input is to be connected to the output.A2-input multiplexer is as shown below. DO) daive uRoy Combinational D1 Circuit : Output, ¥ = D5 + DyS eer ecu) Start Complete Exam Preparation Rte C a ccc Gece pee (ox) Mock Tests Dos cteenay Cresta Ex) Download App Question 10 View this Question Online > For which of the following gates the output is zero when one or more inputs are zero? 1. OR 2. NOR 3. NOT 4. AND len Na ne eae na:SEEN SS GMAT ARE VARIES Cee TNT TET EERE nen nS See Option 4: AND Combinational Logic Circuits Question 10 Detailed Solution Types of logic gates 1.) AND Gate sae cs AB aye Jel =|=Je[ole alololo When any of the inputs is low, the output is always low. When all the inputs are high, then only the output is high. 2.) OR gate Y=A+B 0 =]e]=|e> =|=[elela 7 7 5 When any of the inputs is high, the output is always high. When all the inputs are low, then only the output is low. 4 f G 3.) NOR Gate De me Dp xe? NOR OR NOT = xe =[S > =Jelele ofofo|= When any of the inputs is high, the output is always low. When all the inputs are low, then only the output is high 4.) NAND GateNAND GATE X= (ABY’ sye]-Jey> =)alelele of4fala When any of the inputs is low, the output is always high. When all the inputs are high, then only the output is low. id India's #1 Learning Platform Start Complete Exam Preparation araucd maa eres eats Byori Download App ‘Question 11 Identify the gate from the truth table Input Output ale eee occa: View this Question Online >1. NOR 2. NAND 3. XNOR 4. XOR Answer (Detailed Solution Below) Option 3: XNOR Combinational Logic Circuits Question 11 Detailed Solution XNOR Gate: symbol: Truth Table: Output Input A | InputB [Y= AGB 1 1 0 1 0 0 1 1 1 Y=AoB Output Equation:——————_e ee ore alee ey eoene een 2) The output is low when both the inputs are different. 3) The output is high when both the inputs are the same. 4) XNOR gate produces an output only when the two inputs are the same. Important Point XOR GATE symbol: s)>-Y- (A@B) Truth Table: Output Input A | Input B VY=AeB 0 0 0 0 1 1 1 0 1 1 1 oO Output Equation: ¥ = A © B= AB+ AB Key Points: 1) If B is always High, the output is the inverted value of the other input A, ie. A. 1) The output is low when both the inputs are the same. 2) The output is high when both the inputs are different. NOT GATEey Truth Table: Input (A) Output (A) 0 (Low) 1 (High) 1 (High) 0 (low) Output Equation: Y Key Points: The output of NOT gate is an invert of the input AND GATE symbol SDlioe¥ AB cal x Truth Table: Output Input A | Input B Y=AB 0 0 0 0 1 0 1 0 oO 1 1 1 Output Equation: Y = A.B Key Points: The output is high only when both the inputs are high OR GATE symbol: Truth Table: Outputae | pee V=A+B 0 ° ° o 1 1 1 0 1 1 1 1 Output Equation: Y = A - 8 Key Points: The output is low only when both the inputs are low NAND GATE Symbol: a B= Truth Table: Output I tA | th tB mp input’ ly = AB 0 0 1 0 1 1 4 0 1 1 1 oO Output Equation: ¥ = A. B= A+B Key Points: 1) The output is low only when both the inputs are high 2) Itis a universal gateigs ¥ hectic te baat Start Complete Exam Preparation Weary a ipa (es) eetizes Download App Question 12 View this Question Online > Race Around condition can be avoided in Digital logic circuits using? 1. Shift Register 2. Master Slave JK Flip Flop 3. Full Adder Ly 4. AND Gate Answer(Détailéd’Solution Below) Combinational Logic Circuits Question 12 Detailed Solution : Master Slave JK Flip Flop Race around condition in JK flip flop In JK Flip-flop, if J=K=1, and if clk=1 for a long period of time, then Q output will toggle as long as CLK is high, which makes the output of the flip-flop unstable or uncertain. This problem is called race around condition in J-k flip-flop. The truth table of the JK flip-flop is given below: J K Qn 0 0 Q& 0 1 0 1 0 11 1 Invalid The invalid at J=1 and K=1 is known as the race-around condition. To overcome this condition, a Master-slave JK flip flop is used. Q=1 J CLK: K Q=0 t.=10ns AM a) -: + The master-slave flip flop is constructed by combining two JK flip flops. + These flip-flops are connected in a series configuration. In these two flip flops, the 1st flip flop work as a “master”, called the master flip flop, and the 2nd work as a “slave”, called the slave flip flop. + When the clock pulse is true, the slave flip flop will be in the isolated state, and the system's state may be affected by the J and K inputs. * The “slave” remains isolated until the CP is 1. + When the CP is set to 0, the master flip-flop passes the information to the slave flip-flop to obtain the output. rg GR eee Lhe il Pela mei) (CM ci mede ltr l aed) aca A cera lee Practice Doers eens Download App ‘Question 13 View this Question Online > The Output is dependent only on present input? 1. Combinational Circuits, 2 Anata ruts= 3. FlipFlop 4, Sequential Circuits Answer (Detailed Solution Below) Option 1: Combinational Circuits Combinational Logic Circuits Question 13 Detailed Solution Combinational logic circuit: + For the combinational logic circuit present output depends upon the present input. + There is no memory element. A >A B oS =B' Combinational ‘ ¥ circuit me n t——>m ERE an acre Reon cet PE Ta CCM Cmte L ace) ea one mba Lean (x) ettteres ore resieocoag Download App Question 14 View this Question Online > The combination of two half adders is a 1, full adder 2. Schimtt trigger3. Comparator 4. half adder Answer (Detailed Solution Below) oO Option 1 : full adder oft Combinati: e. Question 14 Detailed Solution Half a x) A®B(s ye em AB (carry) The half adder is a type of combinational logic circuit that adds two 1-bit binary numbers. It generates the carry and sum of both inputs A | B | Sum Carry| Sum =A@B Carry = AB Full adder Ge IBS A®BOC.| p | Lt | eae D jpicen The full adder is a type of combinational logic circuit that adds three 1-bit binary numbers. The full adder is the combination of two half adders. A B cj, | Sum Cou ~ ° ° ° ° o ° 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Sum =A@B@C, Cout = AB + 8Cin + Cin al India’s #1 Learning Platform Seoul scuba etd CCAR Sec a} Pay oer Mock Tests aa scold researc Eyer) Question 15 View this Question Online >A combinational logic circuit for traffic control is designed. GATE can only be used to implement the designed control circuit without any additional GATES. 1. NOT 2. EXOR 3. AND er (Detailed Solution Below) Option 4: NAND Combinational Logic Circuits Question 15 Detailed Solution The logic gate for traffic control is: input] Red | Yellow | Green Input _K [Light x| Lighty | LightZ 0 0 1 0 oO oO 1 1 1 oO 1 0 oO oO 1 1 1 oO 1 oO For red light Output X = NOT ) For yellow light e Output Y = 7 nn - Output Z = | AND (NOT K) a ee oo -_zCombined Circuit is given as, J x Now, all the gates can be formed from NAND gate, as it is a universal gate NAND gate will be the correct answer.