Design a te pass fflten wetth a cut oft Frequency PowHa and % pass band ain € 2. Given Syed C= one Seon nies Ape 2 tye 7 BRE TREKS 1 Z = saan DX BAM H IMIS HOH MSs Age t+ & 4 = Re ae in oe as i+ St_ a 2 a ISM ARE = 31a4 = IS TRE RE = svwH —1s92 Re = isan Raima, RE = wI2~ Res isa Ane * ovo 4 it assed © scanned with OKEN Scanner& \pesaite dhe seed oer Higher pass fitter oith Hs Feequenyy Yesponse ard. design the Givurt cst the cub -9FF Frequonoy of GK + A Second - ovder high - pass Fader con be Formed From a Second ~ ste order loo- pass Fitey Sionply by Rooker changing, he Fequeney -deleerving Yesistor¢ and Capacitors + , © scanned with OKEN Scanner‘the voltage ge magnitude equation of he Second - Oder high ~ pews fire's 8 Jaros : Vo \e since Second - Sey low pos clvaate except thet she postion Finterchongals “We design ond Frecpency Same 9 Ag 14 fy p)* | igh poss fiw oe 7 oe for He le poss Ser Steps 4o Design geleck Value oF qut off heqpersy cho: & then Seleck C Bebscen dhe an adev High Pass Filter shep-ti- Skp-2- Agsume “fa. = Ra =8 & &=G=C croolug 2% OEE: Iskp-8:- Caleulote Value of R= Jentec Skp-W- “The possbord Gain AvF = (a 8elRd = | 986 ., Rp = Or B86Ri. Noes Select Rid look & Prd RES © scanned with OKEN ScannerGiven Dota, Fee Skire Assume C= Olur: | RoeRgeR & G=Q=C \ | Re Tone ar ebskrowl | Re Ale = Me ae jens = 1+ SE Res 0 S3GR Asoume Re = 0°586 xlck Re 2 S 86K Jor Re =* a a Olue vw Jeg Le Whe © scanned with OKEN Scanner- “igen -|ovaw and explain sss Timer Ic functional dia ses Tomer |* The 5 timer is highly stable device or genesating the | accurate time delay oy ascitlations | SES6S|NESSS - Available in 1w0 packages 8 pin circular Style , 8 plo DIP (or) 1} Pin DIP # This provides time delay ranging fiom pusec tb boots while Coonter timex provides moximum — timing range oF dap * This can be used with wpply voltage in the range of +5v to ti8v and can dive load upto acomA: this u Compatible wlth both TIL and CMOS logic clacvits * The applications include axcillatous, pulse generatov, ramp and squowe wave generator , MOno.shot Muttivibrator, buiglay alaxm, teatfic light contwol , voitage monitor etc: | | — VU 1 | gond [L A] vee (owe EY ggg fe | output S| |G | treshold | reset |4-| 1S] contol Vettage PLN DTAGRAM | Pind - Ground pins - Contwol voltage | Pina ~ Trigger a ~ Theeshold ping - output pint — Dischauge Ping Reset Prt Ne L_ — Bs © scanned with OKEN ScannerGround FUUCTIONAL DTAGRAM — = ape a NE ie Bevee tet | He a | 1 ' | Re] ,S=0 ; Som oso G1 6 Trxcshotd faemeeie 1 corttrcl 2 I> R g ! vottege Succ Control, ° i Vee ' Sha. flip Hep [sees tice 5 */5Vee ip J Ys vee 3 - : ! Acerca bet S=1 Reo | 8=| Bo 1 Power) | Rue lp. jinvevtal 1, © scanned with OKEN Scanner| pescaiption 3 | Dee : es Thee resisioss «of Sk Of intesnal reistors aa voulage divider , providing biag voltage (%)Vec © uppers comprar (Wc) 1 hewer comparator (Le) where CY Vcc is the Sepply voltage # since these foo voltages fix necewasy Comparator thxeshold voltage they avo help in deteamining timing interval | |* The Icsss Timer con be cpeiated with supply voltage — betcen | &SV and tev * In applications where no modulation u required, @ capacitor Cin 0-0l ME) Connected = betxen control. voltage (pin-5) and gqscend 10 by-pass noise (ov) sipple fam cpply. * IN Gable state, the ovtput B of the Contol tip flop (A) u high this maka 4 ovtpot ‘tow’ because of power armplities Which is | basically an Inverter’ | # A negative going tigger puse u applied to pin 2 and should have its de tevel greater thon the thseshold level ot lower compasaioy (4 Vc)+ % A negative going edqe of bigger, U tigger passer though bvec the eutput oF lower Comparator goes high and sets ## (Qo , Q=1) % boring the pasitive evasion When the method Voltage at Pin © passes though Zee the output ot Upper comparator go high ond veets the ff (Q=0, Fai The ‘weet input Cpin 4) wesels 4 overriding the effect of any tnstauction coming to ff form tower Companatos Te bonsislor 9, sewel a biter to isolate the reet inpot toon ff and the trans:stoxs & 440 @ BU driven by an Intesnal yefeerve voltage. Vwet cbtaind trom 94 vet ee Fe log BS © scanned with OKEN ScannerA) Pratd block diagram of PLL Ic Sés 4 explein Monolithic, phete, lected loop! Al) different . barildiing blocks of PLL oe aNlailable 3 independent IC packages 2 Gn be @ttonally intrcnnected te make PLL: Hooever number af manus pfecboe have introduced mansltic PLL tho: Some of inpeond Menelithic PLLs me SEINE Séo, 5¢) 562 S64, 565,564 manly Riffer iy operating Frequency ange folder Supply veqnivement Freanency & band esitth adjustment anges Sine 565 is most Commonly wed PLL Nee | Lene Input Jo SNe nbone Tnpat_—_| Eee Ne/sesés Veo outpt__, WNC hese Ganpoas) OC oored® te] 4 Nee Pefoene Ie 4 . Dercndulsed | eMtone! CoPecith Fis Neo cutpat 1 if Extanel vesict f% Veg Pin diagvam : 865 is ansileble ay FM packers The pin in 4g The output of freyuency of Veg fox 025 Ry Gy NW Pin Dip package 4 8 lO Pin mel Gnfiguretn & block diagram De shea GN be weerten 4s Hz, ‘The Value of Re ts : bles 2h b ropa vthe Vi ‘ IS adiatel Bitty Rhee ty i SNe frre sunning Prepamey at Centre of inpat Frege ney Yang, A © scanned with OKEN ScannerThe Phete locked loop fs internally broken bly Veo output & Phese Compegats) input MA shot chrcnit bls pin 4&5 Gnnects Veo olp tp Phase Gmp| eset So a3 tb Gmpare 4, with input Signal fo [A Gopociti Cis Gnneckid be PINT & fink te make leo pods FINE Lith intone vesistance of Behn Chaacterstis : Ht operecting Fremceney vange: 0:05) He. tp SookHe operating Moltage vange: eV b tev * Input lever: lomy sms min tb 3\pp Max ee . Tope linpedana: le pon typicas (Output sink Coment S ImA -typied Ke Band coidt, adiastment sane! 2 4 b tec Tangata Coole amplitude! 2.4 Vpp at tev Supply eltage * Sytre Wane omplitade ? SWNpp at tev SUPPLY Voltage I © scanned with OKEN Scanner5) dot —_—a TARAS ~ SB = pesSye the expression for estarie moti vinrator wlth Magram . avee te usidtth OF SSS Mono e wa ares | “4 : ayy ov & ‘ oorpor 4 any Monostable mociwitsrator | OPexesten ® a stacie strate $e holds Transistors on Cor thos Camnetang ho externa Hentog cagadter ‘c! £0 qrcund he avtpot werraing at ground toa). ® es srlgger faseer, “erroudn AE Noe Pe S&S see Ba SV R=O =) Deo [ext] “he waves, the troraiator | @ Off and shore cfreofe across fon? CH wRteaBed, 4 rock cor Mas & fs tow coteoe pes ih Cvmhaae eee | Gyee row ‘caging Since “e! {9 near ped vousge aces eey exporonifatt h om Tou En Fine constant Re. \ eee © scanned with OKEN Scannercrore Coje) yrgomped Fonetfonat Afeqrann @® rer akene perfod WX the Capac’ tor Yottage | Sp BBE qpreacter Hoan, 25 Nee and Upper Comparatoy Neer “We H Ret, Sto) | ‘fo 5] : : =\(@=0 @ Wis tory, || transistor 9, JWR OH “The. 4 eteerogtrny “the capacitor ‘o! o i ae < MOPIAY bo groung SHPO THUMM The stare State. © scanned with OKEN Scannerroume across ‘The Capacftor %% given by No = VeeS\e" ae rey AE €=T We rBNoe Bre = vob tert} > tlRc. e els — Rod (ls} de ire Tioving purse Nee = i Ly Lf ov 213 Vee ' ' ' ' ae | ol? 1 ial 4 ance ey a v > ; Oy 1 pera a 1 yvee Reset purce bid ole of FEY Pet aver Poke avolied | | lov: © scanned with OKEN Scannera 2, “the @tre eckog, Grteryar % Independens oF cory vowgg once triggered The Ovtpy trernaling ty ap etate wnkt Timer etapsesa wahloh epends t om Yawe oF Rands- ® wemoradte cet mis tigger on postive ede Poe oven estth Contror Po (08 CaRacftor prevent Wy mnodtited ekt € ued: wager CAPO Te palS& qV Tie wiceleg / nis Ryere OY © scanned with OKEN Scanneri Module - 3 (a1eWA04 eo) &- Explain how 995 Kimey tean be used as Aptable muttivibvelor —> The pin 4 oF fiackorgiog Lwanaistor Gy ts Connected to joncroo OF Ra Mk Re -bthen the power PLY Nee Is convacked the external bining capacttoy ‘e! changes Lowords Ue wath a time constant (Rat Ree - — Peveg Kis Kiere oulpuk Cpin a) is high Cequal bo ee} as Yet Reo ant gol @ -t and this combtrakion praxks =o Uncksenpeng, he Xeoning Copacitoy'C: ~> When cagacitor Nokage equals (oy {ust qqeotes tron) Eu. the LPPEN Comparator Kxiqgev's Xhe Conliol fi flop bo thak =t ~7 7S WW Luxe makes Mansistor Guon ard capacitor © ghaxts Aischesaina, Kounnds qrousd Brough Re ard Avansisor @y arth time, Gonskack Rec. The Cument also {ows tato bangighors Qa Srwvough Re Lr... 1 1 ' : ' ' | 1 ' ' | ' Ll \ ' ' copactley Natl ' +) ' \ ’ ' ' ' ' ' as 1 ' \ , 1 , Ko ! \ ' ' ' y 1 ! 1 ' ' —» Une) Tees Saguence OF Astable Mutivibxaton © scanned with OKEN ScannerThe cagacthos Niotkage fox Low pass Re ekk subject ko step tnpuk Of Vee ts quae by Nes Nee te etlee) The ume ky kaken by he ek bo change foun “Oko 2 Be Neh (ice Wee ky = poaRe The kame ty taken by the ckk ko rose form Oko Nee S Awd =e NA (tele bo. Lume’ bo chouge from Wee ky Mee w Nec: Wg Kaagh fbb, = LOWE - O- 405 Re Lrugh = OH Re New }+—_— % | output Lo = (Ra* Bec We RRC a Saget Askable Mutkivibyator © scanned with OKEN Scannercontvol fupf lop 3 dulput 0 Fonebional iocyvarn © scanned with OKEN Scannerat ean tl nln locked Coop (pLt) and hese backed keop C Prt) © The advancement. in He -feild of infegrotee ckt's PLL hos become one ef the mata building blocks in eleckon -ie Tech nolegy +The phose bechedt boop ‘is an importonl buildirg block in lineot system wesent The pris is aveLible on singe Te in -ot the se/Ne Series “The! diccrele fje's ore Used to Construct © pLl “Th block diogtom of pte Consts + phase dtentthor deteclor # [ow poss Filler & Crrey Amp: fier K volhege. Gakolled oscillate. \ of | phase Ver cow poss | detector P|, ilter Yi Jopet Signal to| Vo © scanned with OKEN Scanner“The ipput signal vi taith om input fequemy of its Passed Hough @ phose deleclor a phase detector besicatty @ Comporolor whith Gmpores tHe input frequen f with the chalice Fesueht (fe) “This Oc voltage is) then posse on fe Up ‘The Lpt Removes Hu high reg using signals s produces. Shady stole De level » This De level 's then passe on fo @ Veo The output Frequency of the Veo is diveckty Prepe Roach to fiegueny 0¢ inpub signal . Boks the input fegueny f owlput frequeny oxe Compoved £ ad juste tosorgh feedbacks loop unkl the output Frequeny equal fo the iepat feq>-09) | > Thes te pee Works tn Hese shages * free-running , ¥ Phase-lock * cophaye Pree Tenning shoge: St Yefevs cshan Here is no Input veltage pplied lock-fo Temge: Once PL is lockedsit Com hock frequeny changes in -jnleming signols . Te voug. of frequezny ovey whith pee Gm maintain Joel ait InGemieg Signo is Colled ‘lock iin Yonge” © scanned with OKEN Scanner“Cophxe Rosvge’ The vornge of Frequencies over cohich Conan me PLL @™ aque focle With an input signal is Colled Cophwe Yamge gh is capes as pecentoge fatl-h Time’ The fofot Hime taken by ptt te mene . establish lock is called poll tn time . This depund » of inikel place and Frequeny diflexcn@ blo two signals OF Leellas over loop qe ond loop Filler chrotkevs Kes of fo © scanned with OKEN Scanner3) Explain successive approximerion ty! dagrero pe Adc with Ciscuit A) Successive, Approrimetion, ADC.' “In ais fechnique besic thea iS adjust DAc's input code Such thet jts output Nite be AID Grverted Whe ade th New, TS Gitlin +5686 of anales input nt achieve ve prucnY duived Ape out pid This is efficient Gade serch sbategy wed b Groplete ne bit JPNeSien iQ Susk nei Periods -An g—bit Gnvertr would Feyrne eight clock Pulse, te obtain digital outpat lea oe Oc CEnd af Grnectiony nig tl afi re DO cin = = qr (58) pet — | ont a Farce) sae DAC Bock ingyen, of Succetsiue aPpreximetion AID my, i ef DAc, Compaets) & Successive, iia APP OM EMtion Register Csary “The. i " extrinel Clock INpuke — Sety internal timing Prameters, er MELAS. “The ial Stal stot of Gmlersion, Csocj Initiates : Pe eas Process A end of ZMVers ion Céoc} si, ne io Grversion, is Gompleted ae I i The SAp is sed to find seaueirey brinl & exsoy Nelue of each bie Ly © scanned with OKEN Scanneroperebin aetoith — arivlal cis MSB ChEN with all obhoy bi Za Se that bial of stent of Gnversin (SOC) Gmmend . SAR Gde iS [ococcoe tthe output Wy of DAC 1S Nes Cmpaced cith Anaby input Nao Tf Nae Va CBAC) output “then [000000 is leds thar Gorect digital seprese mtpbon i Wethe mse Ts eft ot WOR pene fever Significant «bit is |inede NY further tested le However Tf Nac [DAC OlP] Vy then leoooceo is greten When Covrect digital vepretemtetion So set MsB t ‘o' 4 [32 oN te Next fewer significant bit TINS procedune is xepented f8 al} Subsequent Lits, one at ime uti] all bits posibins have been teited “henever prc output (Na) Cwosses Vk, Gorn perats changes Stet, A this Gn be taken ss end of Ganersion (EOC) Gmmand | Grect Igib ~Sucaisheeappaeaimation ——_, Representation Yesistey outpul Vy ok Comper | Afeent sins in amvesinn otra | Nolotoo | Go lw | J000 0000 = jog | ft | | | Ne00000 = 192 | | 1 | W | | | "20000 = 2oy | \ | Weloooe = aog | 7 | | | ' | | NON G00 = 21g | | | | Nololes = 212 ° | | Noloite = ay | 1 | ° Moloroy = 293 | o \ | Woloteo = a4 | © scanned with OKEN Scanner/ | Sugcassive y coutpat register Acta! AMaled Signet Na > >. 4 Time 123456 te D/A, oudput, Noting, Seen te, LeGme, Sucassivel¥, Closer t, actual Analog. inpat. Nottase Do the D/A output Velinge Leama succeisively clase to actual Analy input Voltage “TE weyuives eight cIR palsy b establish Accumate output vegeardles of Value of analog input leone additibnel cIK pulse is wed t load output Cregadlers of [Nelue of anateg input vegiste A we inibalize. circuit) * This is mere Mersatife 4 superior Compared ty alt other cheurts AD 4592 -28 Pin Dip CMos Package 12-bit Al technique fone CIK pulse, additional cit pulse The time fi ComVert? using successive A pPxoximetion iS weyaired sap B® Gmpre each Lit an rewired BD veIet ve gistey Plex Grversion tal Gnversiin mst depeng beth cles period) B ni of bits ) Tt is siven by T= Tiney one analog to digr’ °n Whee Te = Gnversiin Time Tos CIR period N= ne of bits © scanned with OKEN Scannergo 9) Expain Levking of Flesh tyr ADC A) Flash Compara) tye, ADC, (a) poraiel comport type Apc: \nnatal] Pept Ne tp IMs 8 rc x $e 8 -line -—", b 8 line [> % Cisg Priovity Encoder Basic Circuit of Flashtype Alp Com Ven ter © scanned with OKEN ScanneraN is Simplat possible AIP Gnveier «it is fasbot & rust expensive of resistive divider fetook, © op_amp ae this technique «The civeait Gnsists Comparat8 K Saline fo 3-line enter (3- bit prfority Encoder} +A smal amount of hysteresis is built int Gmpatd) tp Soe any preblan that might occers fF both inputs ome of eqal Velisse oS Shen in bath tale TAK cach node of xesistie divider netsxt Gmpaisen Veltrye is GNsibUe sine all yeisins are of eye! Vhkues the Velthye levels asi) rable ot mode are equally divided Hla Yeference Voltage 4 ground The purpSe of Circuit is te Gmpre aneakg input Voltage Va With each of Mok Voltages Ent Voliaae | lesic output x wowy a, z Xzo L PSN IOS alae | Groped) A its, I HN yt | Trput Veltoge (1) | ob & | Se | five © 8 fo | gw Gy Be we | tos | q | Come ec eae | | | Me Ny a | lies Oe Oy Ss th, & 4 Cie ge BPP! Not | ety )) Bm | | | eee area ile eae ae ere | Me we | [tesa eae Seo ies ane! | © scanned with OKEN Scanner7 ee: TT nput Woltrse (ilk) Xq Xe Xs 3M oe o 1ot +h TE Me tae Te rb tt or ob ty Advantage ithe high Speed 93 GnVesin take plac Simultaneotly athe, then Seqentially Typiatly Gnwersion time is loons Ce) lex ‘Disadvantase: (eThe sof Gmpoetis vegubed — doubles FB ech added bit EX A 2b ADC repay 3 Ginpaetie BbiL Adc Needs Gmpaeih 4 YALE ADE Needs 15 Compre tgs S The number of Gmpaatd vepuived se PH Whee D> ne of bits He bO9e tue of tn! move Gmplex is priority En ander © scanned with OKEN Scanneros gi the operation of weighted “vecistor pac with the help a raeott diagram. Pegesipees taut ooet- Bray loctghed Resictoy DAC This cet uses tnwerting Suroresing araplifier toi th binary weighted [Fetlstor network . It has N-electronic Gwitched diydz,dg-- dn [esrebied | binary inpot word. | © This witcher ave of Single -pole - dovbte throw (spor) type tal) wput to particular ewitch i¢ V', PE connects ILE binary Cc ‘the xesistance to veference voltage Cve) and binary mput is ‘o! The witch connects the resistors -to ground Switch -ON ote vee : Switch - o¢¢ Ten * Op-Acnp used ag Sueomning amplifier, Due ty Sah input vesicta oF OP. Annp SUMMING —CUNTENE -PoLos ‘rough Rp © scanned with OKEN ScannerTe = T+ etgt-- 4p v - ~ | T= Blasteaa cago | dutput voltage {votrage across Re] qiven by | No = -ToRp | Nos [v4 TotTy 4 -4Ty] Rp | | toy Re=R i.e kat then | Vo: No = va Toit ya, + ly, Here the anateg output agit word * The anatog output stage For 83-bit Weighted wecitty Dac. No = Ve [aor ch dy Dor 2. 4p 24 ag2F] Vo = Ve C04 041.53] Vo = WR a didgs | orp Noe Valoaro® ve Ved t ad gt MR Set — S egal PR PR a e - - on = “& Ry Caw do 4dyay gana "] ove [data diary ates 4 an 2] As ete reference voltage use ol voltage WS Proportional t& tn pot i Positive ctatrcace so] > we: ¥e, | The total Coutput] current qiven by: -+dna"] td J &P Proximation! | © scanned with OKEN ScannerOR “ \ WO = Voz Ve (24040) 5 Vo= we tors vorvalataoix] Yorvalsat] No = ZvR N03 Vee vale asyoJes Vo=Velt + Yor Svp "Ws Mo evafa'sa%4a'3].5 vos va qt] te pete | Although op-Ampused in ern Mode, tt can alto be Wed in mon - erg mode. | The OP - Amp works al Curvent oto - Vottage SONVEYTRY the po tavtty | ok xefevence Voltage is ehooten IN cecordance toith ‘type of Svoitcl used * FOX TTL Switches ve ference voltage Used as tsv and ofp will be Megative. © scanned with OKEN ScannerDrow backs: - 1G Wide vange of vesishy value ove required used Foy R bit DAC the wesi¢tors " Veqyvived ave 2°, 2'R, PR. aR The Lovgest Yesigtoy jg 128-enes the Smallest one As Mo. of bits mereates rronge of resistance value AO I Neveases vs Tt is improcticable ty fabricate lorge values of resistor linac and yosoge lop accross lavge resistor duet bias Curvent alto affects the acewacy For smattey values | | [ok vesistoys, Locating effect will occur. & the finite wesistance of suitches disturbs the binary wei ghtedt ve lationship among Norious currents, Particvlart 1D most Significant bit pocitions, where the cuvrent Rerting wesistances ave veqvived. © scanned with OKEN Scanner