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Asymptotic Waveform Evaluation for Timing Analysis LAWRENCE T. PILLAGE, wenn, system designs the propagation delays du to signa, even ‘implied model, typi a Rte, enc) MOS Integrated iets he RC tree meted a he delay to within 10 peceat of» SPICE. sinlation and Fs In agra c= ‘it processing, operating speeds and new technologie ae cern {hat may requite more claboratenterconnest modes gal pear and highspeed MOS integrated systems cam require interconnect ‘modes which contain coupling capacitors and inductors I non, {een timing verBention atthe printed circuit board level ase rer ‘quires peneral RUC Interconnect modes, Asymptotic Waveform Fah tation LAW) provides a generated approach to liner RUC tel fain apactrs, grounded resistors indctrs at even inca om relied seurees. The transient prton of the response i approximated by matching the iia bounds soni ad he Bst ar momen's he exact respome ta lower order pole mode. Foe te case of an Ictrce model a frstarder AWE approximation reeset RC eee 1. Ierropuction ITH FINER feature sizes and higher signal speeds, systems that are designed to be digital may evi- dence aspects of analog behavior in their interconnect, which become the ultimate determinants of performance ‘Timing analyzers (1]-[4] and timing simolators {5}, {6} attempt to capture the effect of the interconnect om the Uelay to produce reliable timing verification. For many (MOS circuits, timing analyzers {1}, [3] ar often able to predict the interconnect delay with a simplified model, typically an RC tree 7], to within 10 percent of a SPICE {8} simulation prediction. RC trees are RC circuits with capacitors from all nodes to ground, no floating capaci- tor, no resistor loops, and no resistors to ground. The signal delays through an RC tree are often estimated using a form of the Elmore delay [9], which provides a domi- rant time constant approximation for monotonic step re- sponses, ‘Toenable the timing verification of bipolar circuit, the Manuscript eeived Septem 6, 198K revised Ap 24, 1989. This Semicomiucior Research Corporation. This paper was recomended BY cosine Edtor RK Bayi. TET. Pilg jw the Deprinent of Eletial pd Compater ag setng,Camepie Melon Unvemiy, Pisborg PA IS2D3 TEE Lap Number #93519, 18EE, AND RONALD A. ROHRER, FFiLow interconnect model may need to include grounded resis- {ors [10] and inductors [11] which are not compatible with RC trees. Even for MOS circuits at paniculatly high speeds, the effects of coupling capacitance may need to be included in the delay estimate. Particularly at the printed circuit board level, input voltage rise time can ominate the timing of a net thus precluding the use of sep response approximations for delay estimation. More- lover, for generality, a solution is required when there are nonequilibrium intial conditions so thatthe delays de to charge sharing effects can be predicted. RLC cireuts with nonequilibrium inital conditions may have response waveforms which are nonmonotonic. A single time constant approximation with the Elmore delay is not generally applicable for such circuits. Two time constant models have been shown to improve the acct racy {12}, where they too have been applied to RC tree monotone response approximations. Asymptotic Wave: form Evaluation (AWE) provides a generalized approach to waveform estimation for REC circuits with inital con ditions and nonzero input signal rsetimes. The RLC cit- ‘cuits may contain floating capacitors, grounded resistors inductors, and linear controlled sources. The transient re sponse of an RLC circuit is approximated by matching the initial boundary conditions and the frst 29-1 moments of the actual response o a lower order g-pole model. For the case of an RC tree driven by a step input, a first-order AWE approximation is equivalent to the methods which employ Elmore's delay expression, Section II begins witha discussion of previous work in elay estimation for timing analysis. The RC tree methods Which employ Elmore's delay expression are briefly re- viewed. For a more detailed summary of the previous work refer to [11]. Next, AWE is described in general in terms of state variable analysis. The state variable for ‘mulation is used only to explain AWE as applied in gen eral to RLC cireuits. Then in Section IV the practical pro- cedural steps of AWE are described and related to the RC tree methods. Finally, examples of AWE are provided for a varity of REC interconnect circuit models, followed by ‘our concluding remarks in Section VI H. RC Tree Mertions ‘A typical approach to timing analysis of MOS inte: igated circuits is 10 divide the design into stages, with each stage consisting ofa gate output and the interconnect (0278-0070/90/0400-0352801.00 © 1990 IEEE. path which it drives. A simple example ofa stage is shown in Fig. 1, The RC tree approach to delay estimation of this stage models the MOSFETs in terms of linear ap- proximate resistors and capacitors determined as func~ tions of their process parameters and the voltage changes which are to appear across their gates {1], 13}, {S], [61 ‘The interconnect is modeled by an RC tree network. An RC ree is an RC network with a capacitor from each node to ground, no floating capacitors, no resistor loops, and ro resistors to ground. The MOS circuit delay is then es- timated in terms of the delay through the RC tree model. ‘The more popular methods of estimating the delay through these linear RC tees will be reviewed in this section. 2.1. Delay Estimation for Linear RC Trees ‘There are many definitions of delay given the actual transient response. The most straightforward isthe time at which the ousput transient rises to 50 percent of its final value, as shown in Fig. 2. Elmore [9] proposed an expres- sion for approximating the time, Tp, at which the transient step response would reach 50 percent ofits final value for monotonic waveforms. Elmore's expression approxi- mates the mid-point of the monotone step response wave: form by the mean, or first moment, of the impulse re sponse: T= \ wd a Since #(¥) is monotone. i fist derivative, the impulse response will aivays be ofthe frm ofa probability don- iy function as shown ta Fig. 2. The mean of the dst tution given by (1 isa good approximation for the SO. erent point ofthe transient poron of (2). Foran RC tree, Elmore’s expression can be applied sce the slep response wavefonns are lvays monotone {7 “The Elmore delay provides a single vale for the delay estimate, Tp, Such an estimate doesnot consider the loge threshols of actul MOS device. To Jo so requires find ing an approximating response waveform and determining the time at which the lope threshold is crossed [1]. The Elmore delay, or first moment ofthe impulse response, s also a good approximation forte donant ine constant af the sep response (11. Peneld and Rubenstein [7] 3p- plied the Elmore delay s a dominant tine consant 2p. Froximation wo deter the noua delay fom single ‘exponential function with T7' as the pole. v1) = o(e)(1 ~ e) @) ‘The Elmore delay can be found by inspection as a sum: sation of series path resistance and shunt capacitance val tues when the circuit is restricted to the configuration of an RC tree {7}, [11]. The Elmore delay expressed as a summation of R's and C°s can also be bounded for worst- and best-case responses [7], [18]. As in the original [9]. ‘only step inputs are considered and initial con assumed to be 2e10 & interconnect Pig. t, RC tre modelo snl ope wage % % Fig. 2, Bumple of monotonic ep sapose an is drat 2.2, Grounded Resistors RC tree methods were extended to circuit configura- tions which contain loops of resistors [11]. The Elmore delay for these RC meshes is calculated and applied as before. To enable delay evaluation for bipolar circuits, the RC tree models were further extended to include grounded resistors. Resistance to ground requires thatthe ‘steady state be obtained and thatthe delay value be scaled by the magnitude of the voltage transition. This extension has been presented in {10}, {15}, {16] independently, all of which result in an expression similar to Based ty - + |" [n(o») ~ ota] @) aya be tH) = 0 2.3. Nonequilibrium Ital Conditions Lin and Mead (S} extended the Elmore definition to evaluate the delay for nonmonotone step responte Wave fom. The cru configurons were again ested 0 [RC meshes but now equilibrium inal conditions, which generate nonmorotone response waveforms, wore a missable, The nonmonolone response waveoms were no predicted, but only a delay value was obtained ‘Chu and Horowitz [13], [17] developed a two-pole model for analysis of RC meses with aiilar nonegu Ibvum inal conditions to consider charge sharing ef fects, Consistent with Elmore’ definition, however, oy tmonotone response Waveforms were considered. 2.4. Comments on Previous Work These RC tree approaches to timing estimation have been used successfully for timing analysis [1]-(3) and timing simulation [5], {6} of low- to mid-frequency MOS Gigital integrated circuits. The single time-constant and double time-constant models provide good delay esti- ‘mates for RC tree paths when driven by step inputs; higher order approximations may be required, however, when inductance and floating capacitance effets are not negli- sible. Although nonequilibrium initial conditions are eon- sidered for the one- and two-pole models, they are valid for a limited set of conditions and may be unable to pro- vide a means of handling the nonmonotone waveforms which may result in general Il, Asyspronic Waverorm Bvatustion (AWE) Timing analysis of more general digital circuits may require models more elaborate than RC trees driven by Single step inputs. Analysis of RLC interconnect circuit ‘models with initial conditions and nonmonotone response ‘waveforms requires a more comprehensive waveform es- timator. AWE isa generalized approach to approximating the waveform response of linear circuits with multiple step and ramp input signals and unrestricted nonequilibrium initial conditions. 3.1. The AWE Approximation AWE is most conveniently explained in general in terms of the differential state equations for a lumped, linear, time-invariant circuit: BoA + Bu (a) ‘where x is the n-dimensional state vector and w is the m- dimensional excitation vector. In all but the most patho- logical cases such a citcut description exists {18}. Once ‘AWE is explained in general, the results will be particu larized to the more familiar RC tree eicuits for compari- son with the present practices of delay estimation from the previous section ‘Suppose that the particular excitation is of the form H() =u tut, 1h (3) where uy and 1 are constant m-dimensional vectors. In ‘general the form of wp() need not be confined to such simple signals but rather could assume any form of input excitation for which a particular solution can easily be ‘biained, Inputs that are polynomials in time or sums of complex-valued exponentials can in theory be as easly accommodated as the step/ramp combination in expres- sion (5). For present purposes this simple class of inpat excitations is considered because itis adequate forthe ine vestigation of delay and rise time effects For the excitation up, (5), the differential-state equa- tions (4) has the particular solution 3,(0) = ~A"Buy ~ A Buy ~ A'Buyt (6) ‘The A-matrix may not be singular for this particular so- lution to exist. This condition is equivalent to specifying that the circuit in question have a unique and well-defined de solution when al of its capacitances are open-citeuted and al of its inductances are shor-citcuited. This is not ‘an unreasonable restriction for most of the citcuits for Which delay estimation may be of interest. There are sit uations, however, when a node is isolated such that i i ‘connected to the supply voltage only through capacitors. ‘The steady-state solution for these floating nodes must be determined by the charge conservation equation. Assum- ing for now that thete are no floating nodes in the circuit, we complete the solution of (4) with the homogeneous equation: Bh Ax a” ‘now with the intial condition 4i(0) =x + A'Buy FAB (8) ‘where xy is the intial state at time zero. The Laplace transform solution of the homogeneous equation is Ay(s) = (of = A) 4 (0) 9) ‘To approximate this solution, X(s) is fist expanded in 4 Maclaurin series Ai(s) = AU EATS + ate +) (0) (a0) land as many moments as necessary or desirable are matched in terms of lower order approximating functions. ‘The justification for such a moment matching approach follows from the Laplace transform definition 1 xine Femina EAC)! Poe a since it ha long been established that the time moments ye a I tuna, (2) provide excellent measures of delays, rise times, et. [9]. [19]. Focusing for now on a specific component of Xy (5). say the ith, its inital conditions and first 2g — 1 moments (from (10)) are characterized as {m1}, = [n(0)], [mo], = [~A>'x4(0)], [rm], = [-a*24(0)], {m,,-2], = [-A-**'34(0)], (3) It is these moments that are matched to a lower order frequency-domain function ofthe form Ay X= (ay where through p, are the complex approximating poles tnd A, though & thir approprite residues. Tn other ‘words, the time-domain moments are to be matched t0 those ofan approximating function ofthe form a(t) = She Under the assumption thatthe moments (13) can be generated easily—more on this when computational con- Siderations are discussed-what remains now ist solve for the time constants and their coresponding residues Expanding each of the tems in (14) int a series about the engin, and upon inclusion ofthe inal conditions, the following set of noliner simultaneous equations for the ith state variable s obtained — (ki th + (as) +h) = (ma), +) (16) ‘A solution forthe approximating poles and residues from this set of nonlinear equations could proceed in terms of 'Newton-Raphson (20] ora similar iteration method. The ‘complexity ofthese indirect solution methods, however, is not fixed, but varies with the problem. Moreover, heu istics are needed to monitor the iteration step size 10 con- twol convergence Instead of attempting to solve the nonlinear equations given by (16), we will eformulate the problem to allow for direct solution of the approximating poles and resi- dues. The st of equations in (16) can be summarized in matrix form as ~Vk = [mi], any and vA~tk = [my], (as) where m; represents the low-order. moments (—1, 0. q~ 2),.m, represents the high-order moments (4 = 1g, ++, 2q'= 2), A“! is a diagonal matrix of the reciprocal complex poles, and V is the well-known Van- ddermonde matrix [21] (as) 1k follows then from (17) that k= =m, (20) and VAU' m= my en Since the Vandermonde matrix is the modal matrix for & system matrix in companion form {19], (21) is equivalent © Actm, (22) where o 1 0 o oo 4 0 = i (23) with the coefficients normalized so that ay = 1. This ma- trix is characterized as A"! rather than A, because it ¢ ‘zenvalues are the reciprocals of the approximating poles for the original system (4). Its shown in (22] that the set ‘of simultaneous nonlinear equations (22) for the coef cients ay through ay, dq, can be written recursively t0 Yield the following set of linear equations: may my ot mya | [ao m1 my my a [} ma | dm mga mys ce Myst L=ayd Lig (24) Its in terms of a, that we can form a characteristic polynomial ay + apt + asp e bay yp tp =O (25) the roots of which are the reciprocals of the desired poles. ‘Ifthe poles are not distinc, the Vandermonde matri is bby definition singular. For such cases the residues must be found using an expression other than (20). For the ease ‘of a double pole given a second-order approximation: ky ky X= + (O° Gay Ea (26) Expanding the terms in (26) into a series about s = 0: From (27) it is apparent thatthe poles and residues are related to the moments by ) fe] api? pi?) Uke mo More generally, fran rondr rot, the approximate es ides are eated fo the approxima poles by (28) time invariant circuit takes the following form {18} co | “Hee Hex t) lite My ‘The C and L submatrixes are symmetric diagonally dom- inant descriptions of the capacitance and inductance por tions of the circuit. If there are no capacitance-voltage Gn cy (pet 1 / pee wen (ea nee 7 fot rT fs |_| m i a) eee oon 5 : : ym (= 2) Peek Lies r= gy r= 3)! (r= (F-2= Expression (24) can still be applied in cases of repeated Poles to find the approximating characteristic polynomial, ‘This expression arises also in the model order reduction problem much studied in linear control system theory [23] ‘Typically in control theory the model-order reduction problem is stated first in terms ofa rational transfer func- (30) to which a lower order rational transfer function approx imation is sought. For the case of m =n — 1, matching the moments from the expansion of (30) tothe first m + 1 + 1 circuit moments result in expression (24) [23] To summarize, determining the set of q approximating poles and residues from the moments requires first: solV- ing a qt-order set of linear equations (24) by Gaussian terms must be matched. Matching the m_» term is tanta- ‘mount to ensuring thatthe first derivative of the approx- imate voltage response matches the first derivative of the actual voltage response at time 1 = 0. This extended tmatching guarantees thatthe initial slope at time r = O is ——— —, of the correct sign. For most timing analysis applications the possible error in voltage slope at time 1 = 0 does not affect the delay estimate. However, if necessary, this alitch can be removed by proper matching of the m terms. Moreover, as more positive moments are matched ice, the onder of approximation is increased, the initial slope at 1 = 0 better approaches exact. This phenomenon will be demonstrated by several ramp response examples, inthe next section. 44. Increased Orders of Approximation The first-order step response approximation in Fig. 7 exhibits an error which may be unacceptable for some de lay applications. In [7], what corresponds to a first-order AWE response waveform is bounded to what are some~ times overly pessimistic max/min values, ‘Since with AWE higher orders of approximation can be obtained at fan incremental cost to the first-order approximation, the forder of approximation is increased until an acceptable error term exists. For the firstorder approximation, the error term as described in Section II-3.4, is calculated to be 36 percent. A second-order approximation for the RC woe in Fig. 4 can be obtained upon calculating the next ‘wo moments, The second-order AWE unit step response approximation is compared with the SPICE response in Fig. 15. The error term is decreased to 1.6 percent. The AWE and SPICE response plots are indistinguishable at the resolution shown, Higher orders of approximation are ‘obviously desirable for improving the accuracy ofthe re- sponse approximation. More importantly, though, higher ‘orders of approximation are necessary forthe general han dling of nonmonotone response waveforms arising from circuits which contain multiple input signals, nonequil brium intial conditions, floating capacitors, complex poles, ec. Inthe section which follows several examples are used to demonstrate AWE’s ability to analyze these types of circuit responses, V. General. RLC Cixcurt ExaMnes A firstorder AWE approximation has been shown to be equivalent to some of the RC tree methods. The benefit ‘of AWE is the ability to recognize and handle more com plex interconnect models without loss of generality. In this section some linear RLC circuits are used to demon strate the applicability of AWE for solving general linear interconnect models. 5.J. MOS Interconnect Low- to midsfrequency MOS circuit interconnect can bbe modeled well with an RC tee. The RC te in Fig. 16 isa typical example of such a model. Of panicularinter- est is the widely varying time constants for this cieuit ‘Sif cirewits such as this RC tee ate normally troublesome for circuit [8] and timing [32], [33] simulators: however, in AWE the small time constants are not obtained if they are not required forthe delay estimation. For the case of no initial nonzero voltages and a positive input with a slope of 1 ns, the first-order AWE approximation for the voltage across C; is shown and compared with that of SPICE in Fig. 17. The error term (from Section III-3.4) is calculated to be 4.4 percent. A second-onler approxi- ‘mation is made by determining the next «wo moments ‘The second-order approximation is shown in Fig. 18. At the resolution shown, this approximation and the SPICE response are difficult to distinguish, The error term is de> creased t0 0.15 percent Higher orders of approximation not only provide an im proved waveform estimate but also enables a measure of the accuracy of the first-order approximation. This capa~ bility is essential for interconnect models in general, since there may be complex poles or low frequency zeros which render a first-order approximation useless. Moreover, a8 described in Sections III and IV. the higher orders of ay proximation are obtained at an incremental costo the first- ‘order estimate, For example, the cost of a second-order ‘approximation as compared to the first-order estimate for this cireuit is shown in Fig. 19. The first-onder approxi ‘mation time is the CPU time required to set up the equa tions, find the steady state and mip, and solve forthe dom inant pole and residue. The second-order approximation incremental CPU time is that required to find the next wo ‘moments, and the two approximating poles and residues. PILLAGE AND ROWRER: WAVEFORM EVALUATION FOR TIMING ANALYSIS 368 Armmonsuarna ano Exact POLE rOR RC Tate Exar eps = =a J I“? ca Fig. 16 RC tree with widely varying time constants. ee He ae ee 7 Bate pole. The second-order approximation finds two poles Fae sett a ote ps e See eae ea oe eae See ean beso Ce pe . era ys aca Win AWE way moe iil ots anlar sowed RL cle ee a ce ta Fig. 17 Fintonerappronniton fr the voge at capacitor Cn the ‘out of Fg Te Fig. 18 Secont-ner approximation forthe vole a capuior in the ‘ica of Fg 6 ig. 19, CPU time comparison tewess ft and secont-oner appro ‘The approximate poles forthe first- and second-order ‘approximations are given along with the actual poles in Table I. The first-order AWE analysis approximates the dominant pole ata value very close tothe actual dominant various nodes. It is well known thatthe initial state of circuit, xp, cam excite oF suppress various of its natural Frequencies (28). With AWE the moments are functions of the initial conditions x) so as to include this effect. The ‘dominant pole approximations are, therefore, determined by the initial state as well as the circuit elements. With the initial voltage of C, in Fig. 16 equal to 5 V, the first- and second-order approximate poles that result are shown in Table I, The AWE approximation forthe case of vg( = 0) = 0 shows the two most dominant poles to be very near the frst two actual poles. With v(¢ = 0) = 5, how= ever, the inital conditions introduce a low-frequency zero which partially cancels the second pole. The AWE ap- proximation finds the two most dominant poles to be near the first and thied actual poles when v(t = 0) = 5. The first- and second-order approximate waveforms deter- ‘mined by these approximate poles are shown in Figs. 20 and 21, respectively. Obviously, a firstorder approxi- mation, or single exponential function, cannot be used to approximate this nonmonotone response. The error term {or ths first-order approximation is 150 percent. The sec: ‘ond-order AWE response, which has an error estimate of (0.65 percent, is indistinguishable from the SPICE re- sponse atthe resolution ofthis plot. 5.3. Floating Capacitors Although floating capacitors do not usually appear in digital signal paths directly, the charge that may be ‘dumped to other paths due to coupling capacitance cannot always be neglected. In MOS technologies the floating ‘capacitors which model the gate-drain can sometimes sig- nificantly affect the delay. For example, consider the RC tree circuit in Fig. 16 with a floating capacitor connected Fig. 20, Fistonterapprosiaton forte respnse of he citing Tomihe(0) = 30. Fi. 21 Sesont-onder approximation rhe espns of the cc in Fg To wine tO) = 30 Tt Fig 22, RC eo Fig, 1 with ating capactr aed to the output node as shown in Fig, 22. The second-order approximation for the voltage at C; is shown in Fig. 23, ‘The delay, taken to be the point at which a logic threshold of 4.0 V is reached, changes from 1.6 to 1.7 ns because of charge sharing through C to Cj. Notice too, that this second-order approximation is not as accurate as the re- sponse approximation in Fig. 18. This inaccuracy is re- flected in the error term which is now 15 percent with the floating capacitance path, as compared to 0.15 percent without it. From second: to third-order the error term re ‘duces from 15 10 0.14 percent, ‘The charge dumped onto Ci is shown in Fig. 24. Note that since we match the my term of the actual response, the area under these voltage curves, hence, the charge transferred, is always exact. 3.4, Inductors For an example of «circuit with complex poles consider the analysis of the underdamped RLC circuit in Fig. 25 This circuit is characterized by three pairs of complex poles as shown in Table II. A first-order AWE approxi- ‘mation for a circuit with dominant complex poles pro- Fig. 23, Second-order approximation forthe vohge of apace Cy inthe Fig. 2, Second-order apposition forthe volage of ap the ecu of Fg 2 ‘TABLE = ew Taie aaa] Tae sea Tae Siar as asa Te = seed aia | hat eT 7 aT ‘duces inaccurate results, The nonmonotone homogeneous response cannot be modeled by a single exponential func tion. A second-order approximation is required mini- mally. ‘The input voltage is a 5-V ideal step. A first-order ap- proximation produces a single real dominant pole at p = Fig. 26, AWE socom and fourier apprsimaions for the tp Spon of he RLCcicutia Fg 28 2.83369. The ertor term for this fist-omder approxima tion is large—74 percent. A second-order AWE analysis Yields the approximating poles shown in Table Tl. This dominant complex pole pair is near the actual fist pole pai shown in Table Il The second-order AWE approxi- ‘ation is compared with the SPICE response in Fig. 26 ‘At second-order, AWE is able to detect the overshoot but there is sill a significant waveform difference as com- pared to the SPICE response. The error tem at second Corder is 22 percent. Its only at fourth onder, with the approximating poles shown in Table I, tht the ero erm ‘becomes less than I percent ad all of the response wave form detail is matched. The fourth-order AWE response is also shown ploted in Fig. 26. For the most part this Approximation is coincident with the SPICE. waveform plo. The step response at C) was shown to be dominated by two pairs of complex poles. The residues were such that bo pairs of poles made significant contributions 1 the response waveform. Ifthe input voltage rise time were changed from 0 to 1 ns, the residues would be changed Such that there would be only one complex pole pai dom- inating the response. The second-order RLC circuit re- sponse ta 5-V input witha L-s ese time is compared {© the corresponding SPICE response in Fig. 27. As in the RC tee case, the rise time of the input signal afets the error of the approximation. In general, the step re sponse approximation will exhibit the largest eror term Since its ansient response is more significant than forthe case of finite input signal slope VI. Coxcwusions AWE is an efficient approach to waveform estimation for linear REC interconnect circuit models. Floating ea: pacitors, inductors, linear controlled sources, finite input rise time, and charge sharing are all easily addressed in terms of AWE at any level of detail by merely increasing the order of the approximation. Because of its generality AWE should be applicable both to bipolar circuitry and printed circuit board level interconnect as well as to MOS circuit and interconnect timing estimation, ig 77. AWE seconde approimato forthe RLC itn Fig. 25 ‘tka Sling wage ne ie Acknowtena ment The authors wish to thank especially Xiaoli Huang, Dominic Virgilio, and Krishnan Ravichandran from CMU for their contributions to Asymptotic Waveform Evalua~ tion. They would also like to thank John Wyatt, Bruce Krogh, Steve McCormick, Jonathan Allen, and Stephen Haley for the helpful discussions they had with them dur- ing the course of this work. Rerexences 114. &. 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Homi "Chargeshsing model fr sich eel Sn 1h Don Compt ied esi S10 1131 RCE: Brat, “MOSSIM: A sich eel ilar for MOS LS," In Pc. Tah Dete anton Conf une 19 18] 1 Rbenseo.P Beate es and M.A Hetow” Signal delay ‘n AC toe nwo." BEE Tran Coupe ded Deen Exbe2 pp 30-311 19, 11S} A Raghtnthan aed C.D. Thompvon, “Sina delays in RC ees ‘ih care sang ad leauge, Io Pro kAsonar Co on {Great Sems and Comptes Nov. 15. Neh CS ak Phang. A Tour pron forming verison, 'n Pac In Co Compared Desig, Naw 108. LUT] M.A. Horie. Timing modes for MOS cat.” PAD des {08] 0. Ch and Lis, Computer Aided Anas of Electronic Cr ‘ts’ Ago and Computational Technigae Engen CS, 1191 Vlg and K: Sng. Computer Methods for Cire Anais amt Design New Yor Van Nownd Reba, 18 (20) Atom and P Ratios Fn Conse in Numerical Anal (21) C16. Callen Liner Agee ond Difroial Fusions (2a) LT. lag, “asymp mancfonm esoation for ing analy Sis." Ph.D dseration,Careie Mellon Un. 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Con. om ComputerstdedDeson (28) 1 Pigs Xan and R Rober {Gam elation for tnng asl tan Con 190, "AWEsim: Asympoic wave PP eTM'S EE. depres tom he Unitas of hel Westen ech thee pues He carey ah asia’ Pa Soros tical an computer engincenng We VLSI design and i Ronald A. Rober (5'7-HT6-SM076480 reece the WS.EE. dete fm MIT. Cat Irae MA in 1960, andibe M SEE and PhD Specs rom the University of Cann. Boe a f bs, Roker wan the Presiden of he IEEE Civ an Shen Sct fleced the Naima Academy of Eapinccring. :

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