Note: Answer 3 full questions, selecting at least one question from each part.

Q.
Question CO`s CL
No.
1 What is mapping function. Write a note on Direct Mapping, Associative CO4 L1
mapping and Set-associative mapping.
2 Define bus arbitration. Explain the two approaches for bus arbitration. CO4 L2
3 What is an interrupt. With example illustrate the concept of interrupts and CO4 L2
handling multiple device interrupts.
4 What is cache memory? Explain it's working with a neat diagram. CO4 L2

5 Explain memory mapped I/O and I/O mapped I/O, with examples. CO4 L2

6 What is cache memory? explain it's working with a neat diagram. CO4 L2

7 List out the function of I/O interface for and input device CO4 L2

8 Write a program that reads one line from the keyboard, stores it in CO4 L2
memory buffer and echoes it back to the display
9 Describe DMA with its registers and controllers. CO4 L2

10 Describe single-Bus organization of data path inside a processor with neat CO5 L2
diagram.
11 Explain the control sequence for an unconditional branch instruction. CO5 L2

12 Explain the control sequence for execution of complete instruction CO5 L2

ADD (R3), R1.
13 Discuss the role of cache memory of a 4-stage pipeline. CO5 L2

14 Explain speed, size and cost with respect to memory. CO L2

15 Illustrate the process of fetching a word from memory with help of a CO5 L2
timing diagram.
16 With a detailed timing diagram, explain the transfer of data using multiple CO5 L2
cycles.
17 What are Hazards? Explain Data Hazard, Control Hazard and Structural Hazard. CO5 L2