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AFS..Lenovo IdeaCentre AIO 510-22asr - CCA20 LA-D961P PDF
AFS..Lenovo IdeaCentre AIO 510-22asr - CCA20 LA-D961P PDF
ZZZ1
PCB
Part Number = DAZXXXXX
LA-D961P
PCB@
1 1
Compal Confidential
2 2
3
LA-D961P REV: 0.2 3
2016-02-16
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
COVER PAGE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 1 of 56
A B C D E
5 4 3 2 1
FG FG
lo
t
i
LCD PANEL
B
X X
x x
8 4
( S
r o
s en
) )y
D D
(
t
21.5" LCD (C4) AMD DDR4-SO-DIMM DDR4-SO-DIMM
R16M-M1-30 BANK 0, 1 BANK 0, 1
25W
Bristol Ridge
eDP
/
LVDS
HDMI OUT Stoney Ridge
LVDS conn Converter 2133 MHz
RTD2136N-CG
/Scalar
HDMI In HDMI IN RTD2506S-CG
Connector Co-lay
(Option)
C C
A SATA x 2 USB2.0
USB3.0
USB2.0 x 4
Side port x 2
USB2.0/3.0 x 4 One port with Charger WebCAM
Touch Screen
PCIe (x1) x4 Rear port x 3 (Reserve) (Option) 720P
HDMI Out GFX x 4 (Stoney) /
GFX x 8 (Bristaol)
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Connector USB2.0 x 6 USB2.0
15W USB2.0/3.0 x 2
FP4 BGA 986 PCIE x 4 PCIE
HDA 37mm x 29mm SATA x 2
PCIEx1
PCIEx1 PCIEx1 PCIEx1
SATA3.0 SATA2.0
M.2 Slot
EC TPM/TCM RJ45
Amplifier SSD Conn 6 in 1 Slot
NCT6685D Nuvoton 650LA0WX
A Anpec APA6003 /Infineon SLB9660
/NationZ ZH320TC
SPI (Reserve)
(Option)
SPK Conn.
EC FW
3W x2
A
W25X10BVSNIG A
(128KB)
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CCA20/21 Black Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 2 of 56
5 4 3 2 1
A B C D E
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BR@ For Bristol only
1 DVT For Bristol DIS only
SMBus List BR_DIS@
2 PVT
EC SMBus Port0 (+3VS_S0) EC SMBus Port2(+3V3_DSW) 3 Pre-MP
4 MP
Device Address HEX Device Address HEX
RTD2136N-CGT
SKU ID(Project) Table
DGPU Temp. 1000 001X b 82H 1001-0100xb 94
Thermel IC 1001_101xb 9AH CONVERTOR 0110-0010xb 62 SKU (UMA&DIS) BOM Configure Table
3
PCB CCA21
(UMA)
UMA@/PCB@/E2@/EMI@/ESD@/RF@/CVT@/NCHG@
3
BARCODE_20X4 BARCODE_10X10
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTES LIST
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 3 of 56
A B C D E
5 4 3 2 1
1 1a PSIN#
3
+DC20V
EN2
+3V3_DSW 3VCC/3VSB
GPEN17
EC_RSMRST#
RSMRST# APU
4 PBTN_OUT#
EC_5V_EN 1c
GPIO88
GPEN03 PWR_BTN_L Bristol
PJP1 EN1 5a PM_SLP_S3#
1d +5VALW
3V5V_PG 1e SLP_S3# SLP_S3_L /
PG GPIO53
+3VALW_S5 EC SLP_S5# 5 PM_SLP_S5#
SLP_S5_L Stoney
+5VALW_S5
NCT6685DKBRST#
GPIO55
8 KB_RST#
KBRST_L
RT8068A
3V5V_PG
+1.8VALW EN 11
RT9045GSP APU_FCH_POK
2 PWROK0 PWR_GOOD
+0.775VALW
GPIO33 15
C
2 3V5V_PG C
GPIO50
3V5V_PG DGPU_PWROK
+3VALW_S5 TPS5121 EN PWROK AGPIO12
GPIO46 GPIO56
3V5V_PG +0.95V_+1.05VALW
2 AGPIO85
RT9059GSP 10
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6
SYSON
RT8207 EN
+1.5VALW +1.2V_VDDQ_S3 VGATE APE8990
6a DGPU_PWR_EN +0.95VGS_S0
9 ISL62771HRTZ 13 ON 13a
+0.6VS_S0
EN PGOOD +1.8VGS_S0
7a SUSP# 7 VR_ON
ME2301DC
PWROK
B APU_PWRGD B
GATE 13b
+DC20V +APU_CORE
9a 12 DISCRETE +3VGS_S0
+APU_CORE_NB
DGPU
RT8130BGQW
2 ISL62771HRTZ
HW_12V_EN#
+12VALW EN 14
VGA_PWRGD
2a EN PGOOD
VR_ON_B
+12VALW_S5
+VGA_CORE
+DC20V
AO4423 7 14a
SUSP#
EN
+12VS_S0 +1.5V_VRM
7a AO4354 7a +0.95V_+1.05VALW
+3VALW_S5 SUSP#
GATE
EM5209VF 7
A SUSP# A
VIN1 +3VS_S0 +0.95VS_+1.05VS_S0
+5VALW_S5
7a +1.8VALW_S5 SUSP#
EM5209VF
VIN2 +5VS_S0 Security Classification Compal Secret Data Compal Electronics, Inc.
VIN1 +1.8VS_S0 2015/01/23 2017/01/23 Title
+1.5VALW_S5 Issued Date Deciphered Date
7a THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence diagram
Size Document Number Rev
VIN2 +1.5VS_S0
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 4 of 56
5 4 3 2 1
5 4 3 2 1
UC1A
MEMORY A UC1I
AE28 H17 (12,13) DDRB_SMA[0..13] DDRB_SDQ[63..0] (12,13)
MA_ADD[0] MA_DATA[0] MEMORY B
Y27 MA_ADD[1] MA_DATA[1] J17 DDRB_SMA0 AG31 MB_ADD[0] MB_DATA[0] A25 DDRB_SDQ0
Y29 MA_ADD[2] MA_DATA[2] F20 DDRB_SMA1 AC30 MB_ADD[1] MB_DATA[1] C25 DDRB_SDQ1
Y26 MA_ADD[3] MA_DATA[3] H20 DDRB_SMA2 AC31 MB_ADD[2] MB_DATA[2] C27 DDRB_SDQ2
W28 MA_ADD[4] MA_DATA[4] E17 DDRB_SMA3 AB32 MB_ADD[3] MB_DATA[3] D27 DDRB_SDQ3
W29 MA_ADD[5] MA_DATA[5] F17 DDRB_SMA4 AA32 MB_ADD[4] MB_DATA[4] B24 DDRB_SDQ4
W26 MA_ADD[6] MA_DATA[6] K18 DDRB_SMA5 AA33 MB_ADD[5] MB_DATA[5] B25 DDRB_SDQ5
U29 MA_ADD[7] MA_DATA[7] E20 DDRB_SMA6 AA31 MB_ADD[6] MB_DATA[6] B27 DDRB_SDQ6
W25 MA_ADD[8] DDRB_SMA7 Y33 MB_ADD[7] MB_DATA[7] A27 DDRB_SDQ7
U26 MA_ADD[9] MA_DATA[8] A21 DDRB_SMA8 AA30 MB_ADD[8]
AG29 MA_ADD[10] MA_DATA[9] C21 DDRB_SMA9 W32 MB_ADD[9] MB_DATA[8] A29 DDRB_SDQ8
U27 MA_ADD[11] MA_DATA[10] C23 DDRB_SMA10 AG32 MB_ADD[10] MB_DATA[9] C29 DDRB_SDQ9
T28 MA_ADD[12] MA_DATA[11] D23 DDRB_SMA11 Y32 MB_ADD[11] MB_DATA[10] B32 DDRB_SDQ10
D D
AK26 MA_ADD[13] MA_DATA[12] B20 DDRB_SMA12 W33 MB_ADD[12] MB_DATA[11] D32 DDRB_SDQ11
T26 MA_ADD[14]/MA_BG[1] MA_DATA[13] B21 DDRB_SMA13 AL31 MB_ADD[13] MB_DATA[12] B28 DDRB_SDQ12
T25 MA_ADD[15]/MA_ACT_L MA_DATA[14] B23 W30 MB_ADD[14]/MB_BG[1] MB_DATA[13] B29 DDRB_SDQ13
A23 (12,13) DDRB_BG1 V32 A31
MA_DATA[15] MB_ADD[15]/MB_ACT_L MB_DATA[14] DDRB_SDQ14
(12,13) DDRB_ACT# C31
MB_DATA[15] DDRB_SDQ15
MA_DATA[16] G22
AG26 MA_BANK[0] MA_DATA[17] H22 MB_DATA[16] E30 DDRB_SDQ16
AG27 MA_BANK[1] MA_DATA[18] E25 AH32 MB_BANK[0] MB_DATA[17] E31 DDRB_SDQ17
T29 G25 (12,13) DDRB_SBS0# AG33 G33
MA_BANK[2]/MA_BG[0] MA_DATA[19] MB_BANK[1] MB_DATA[18] DDRB_SDQ18
J20 (12,13) DDRB_SBS1# W31 G32
MA_DATA[20] MB_BANK[2]/MB_BG[0] MB_DATA[19] DDRB_SDQ19
E19 E22 (12,13) DDRB_BG0 C33
MA_DM[0] MA_DATA[21] MB_DATA[20] DDRB_SDQ20
D21 H23 (12,13) DDRB_SDM[7..0] D25 D33
MA_DM[1] MA_DATA[22] DDRB_SDM0 MB_DM[0] MB_DATA[21] DDRB_SDQ21
K21 MA_DM[2] MA_DATA[23] J23 DDRB_SDM1 D29 MB_DM[1] MB_DATA[22] G30 DDRB_SDQ22
F29 MA_DM[3] DDRB_SDM2 E33 MB_DM[2] MB_DATA[23] G31 DDRB_SDQ23
AP28 MA_DM[4] MA_DATA[24] F26 DDRB_SDM3 J33 MB_DM[3]
AV26 MA_DM[5] MA_DATA[25] E27 DDRB_SDM4 AR30 MB_DM[4] MB_DATA[24] J30 DDRB_SDQ24
AR22 MA_DM[6] MA_DATA[26] J26 DDRB_SDM5 AW30 MB_DM[5] MB_DATA[25] J31 DDRB_SDQ25
BC22 MA_DM[7] MA_DATA[27] J27 DDRB_SDM6 BC30 MB_DM[6] MB_DATA[26] L33 DDRB_SDQ26
K29 H25 DDRB_SDM7 BC26 L32 DDRB_SDQ27
MA_DM[8] MA_DATA[28]
E26
MB_DM[8] N33
MB_DM[7] MB_DATA[27]
H32 DDRB_SDQ28
MA_DATA[29] MB_DM[8] MB_DATA[28]
H19 MA_DQS_H[0] MA_DATA[30] G28 Not support in Type3. MB_DATA[29] H33 DDRB_SDQ29
G19 MA_DQS_L[0] MA_DATA[31] G29 B26 MB_DQS_H[0] MB_DATA[30] L30 DDRB_SDQ30
B22 (12,13) DDRB_SDQS0 A26 L31
MA_DQS_H[1] MB_DQS_L[0] MB_DATA[31] DDRB_SDQ31
A22 AN26 (12,13) DDRB_SDQS0# B30
MA_DQS_L[1] MA_DATA[32] MB_DQS_H[1]
F23 AP29 (12,13) DDRB_SDQS1 A30 AN31 DDRB_SDQ32
MA_DQS_H[2] MA_DATA[33] MB_DQS_L[1] MB_DATA[32]
E23 AR26 (12,13) DDRB_SDQS1# F32 AP32 DDRB_SDQ33
MA_DQS_L[2] MA_DATA[34] MB_DQS_H[2] MB_DATA[33]
G27 AP24 (12,13) DDRB_SDQS2 E32 AT32 DDRB_SDQ34
MA_DQS_H[3] MA_DATA[35] MB_DQS_L[2] MB_DATA[34]
F27 AN29 (12,13) DDRB_SDQS2# K32 AU32 DDRB_SDQ35
MA_DQS_L[3] MA_DATA[36] MB_DQS_H[3] MB_DATA[35]
AP25 AN27 (12,13) DDRB_SDQS3 J32 AN33 DDRB_SDQ36
MA_DQS_H[4] MA_DATA[37] MB_DQS_L[3] MB_DATA[36]
AP26 AR29 (12,13) DDRB_SDQS3# AR32 AN32 DDRB_SDQ37
MA_DQS_L[4] MA_DATA[38] MB_DQS_H[4] MB_DATA[37]
AW27 AR27 (12,13) DDRB_SDQS4 AR33 AR31 DDRB_SDQ38
MA_DQS_H[5] MA_DATA[39] MB_DQS_L[4] MB_DATA[38]
C AV27 (12,13) DDRB_SDQS4# AW32 AT33 DDRB_SDQ39 C
MA_DQS_L[5] MB_DQS_H[5] MB_DATA[39]
AV22 AU26 (12,13) DDRB_SDQS5 AW33
MA_DQS_H[6] MA_DATA[40] MB_DQS_L[5]
AU22 AV29 (12,13) DDRB_SDQS5# BA29 AU30 DDRB_SDQ40
MA_DQS_L[6] MA_DATA[41] MB_DQS_H[6] MB_DATA[40]
BA21 AU25 (12,13) DDRB_SDQS6 AY29 AV32 DDRB_SDQ41
MA_DQS_H[7] MA_DATA[42] MB_DQS_L[6] MB_DATA[41]
AY21 AW25 (12,13) DDRB_SDQS6# BA25 BA33 DDRB_SDQ42
MA_DQS_L[7] MA_DATA[43] MB_DQS_H[7] MB_DATA[42]
L27 AU29 (12,13) DDRB_SDQS7 AY25 AY32 DDRB_SDQ43
MA_DQS_H[8] MA_DATA[44] MB_DQS_L[7] MB_DATA[43]
L26 AU28 (12,13) DDRB_SDQS7# P32 AU33 DDRB_SDQ44
MA_DQS_L[8] MA_DATA[45] MB_DQS_H[8] MB_DATA[44]
MA_DATA[46] AW26 MB_DQS_H[8],MB_DQS_L[8] N32 MB_DQS_L[8] MB_DATA[45] AU31 DDRB_SDQ45
AE25 MA_CLK_H[0] MA_DATA[47] AT25 MB_DATA[46] AW31DDRB_SDQ46
AE26 Not support in Type3. AE33 AY33 DDRB_SDQ47
MA_CLK_L[0] MB_CLK_H[0] MB_DATA[47]
AD26 AV23 (12) DDRB_CLK0 AE32
MA_CLK_H[1] MA_DATA[48] MB_CLK_L[0]
AD27 AW23 (12) DDRB_CLK0# AE30 BC31 DDRB_SDQ48
MA_CLK_L[1] MA_DATA[49] MB_CLK_H[1] MB_DATA[48]
(12) DDRB_CLK1
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AB28 MA_CLK_H[2] MA_DATA[50] AV20 AE31 MB_CLK_L[1] MB_DATA[49] BB30 DDRB_SDQ49
AB29 AW20 (12) DDRB_CLK1# AD32 BB28 DDRB_SDQ50
MA_CLK_L[2] MA_DATA[51] MB_CLK_H[2] MB_DATA[50]
AB25 AR23 (13) DDRB_CLK2 AD33 AY27 DDRB_SDQ51
MA_CLK_H[3] MA_DATA[52] MB_CLK_L[2] MB_DATA[51]
AB26 AT23 (13) DDRB_CLK2# AC33 BB32 DDRB_SDQ52
MA_CLK_L[3] MA_DATA[53] MB_CLK_H[3] MB_DATA[52]
AR20 (13) DDRB_CLK3 AC32 BA31 DDRB_SDQ53
MA_DATA[54] MB_CLK_L[3] MB_DATA[53]
N29 AT20 (13) DDRB_CLK3# BC29 DDRB_SDQ54
MA_RESET_L MA_DATA[55] MB_DATA[54]
AE29 MA_EVENT_L T33 MB_RESET_L MB_DATA[55] BB29 DDRB_SDQ55
BB23 (12,13) MEM_MB_RST# AG30
MA_DATA[56] MEM_MB_EVENT# MB_EVENT_L
P27 BB22 (12,13) MEM_MB_EVENT# BB27 DDRB_SDQ56
MA_CKE0 MA_DATA[57] MB_DATA[56]
P29 MA_CKE1 MA_DATA[58] BB20 1 U32 MB_CKE0 MB_DATA[57] BB26 DDRB_SDQ57
AY19 (12,13) DDRB_CKE0 U33 BB24 DDRB_SDQ58
MA_DATA[59] MB_CKE1 MB_DATA[58]
BA23 (12,13) DDRB_CKE1 AY23 DDRB_SDQ59
MA_DATA[60] CC80 MB_DATA[59]
MA_DATA[61] BC23 100P_0402_50V8J MB_DATA[60] BA27 DDRB_SDQ60
AK27 MA0_ODT[0] MA_DATA[62] BC21 2 MB_DATA[61] BC27 DDRB_SDQ61
AL26 MA0_ODT[1] MA_DATA[63] BB21 AL30 MB0_ODT[0] MB_DATA[62] BC25 DDRB_SDQ62
AH25 (12) DDRB_ODT0 AM32 BB25 DDRB_SDQ63
MA1_ODT[0] ESD@ MB0_ODT[1] MB_DATA[63]
AL25 K26 (12) DDRB_ODT1 AJ32
MA1_ODT[1] MA_CHECK[0] Change to 100PF 0302 (13) DDRB_ODT2 MB1_ODT[0]
MA_CHECK[1] K28 AM33 MB1_ODT[1] MB_CHECK[0] N30
AH26 N26 (13) DDRB_ODT3 N31
MA0_CS_L[0] MA_CHECK[2] MB_CHECK[1]
B AL29 MA0_CS_L[1] MA_CHECK[3] N28 AJ33 MB0_CS_L[0] MB_CHECK[2] R33 B
AH29 J29 (12) DDRB_SCS0# AL32 R32
AL28
MA1_CS_L[0] MA_CHECK[4]
K25 (12) DDRB_SCS1# AJ30
MB0_CS_L[1] MB_CHECK[3]
M32
MB_CHECK
MA1_CS_L[1] MA_CHECK[5] MB1_CS_L[0] MB_CHECK[4]
(13) DDRB_SCS2#
MA_CHECK[6] L29
(13) DDRB_SCS3#
AL33 MB1_CS_L[1] MB_CHECK[5] M33 Not support in Type3.
MA_CHECK[7] N25 MB_CHECK[6] R30
AG24 MA_RAS_L/MA_RAS_L_ADD[16] MB_CHECK[7] R31
AK29 MA_CAS_L/MA_CAS_L_ADD[15] AH33 MB_RAS_L/MB_RAS_L_ADD[16]
AH28 (12,13) DDRB_SRAS# AK32
MA_WE_L/MA_WE_L_ADD[14] MB_CAS_L/MB_CAS_L_ADD[15]
(12,13) DDRB_SCAS# AJ31 MB_WE_L/MB_WE_L_ADD[14]
(12,13) DDRB_SW E#
B19 MA_VREFDQ MA_ZVDDIO_MEM_S AD29 MEM_MA_ZVDDIO 1 2
+1.2V_VDDQ_S3
T32 M_VREF RC148 39.2_0402_1% A19 MB_VREFDQ MB_ZVDDIO_MEM_S AF32 MEM_MB_ZVDDIO 1 2
+MEM_VREF_S3 +1.2V_VDDQ_S3
BR@ RC140 39.2_0402_1%
FP4 REV 0.93
FP4 REV 0.93
Stoney 1215
@ Stoney
@
+1.2V_VDDQ_S3 +MEM_VREF_S3
RPC5
1 8
2 7
CLOSE TO APU
3 6 1 1
4 5 MEM_MB_EVENT#
CC48 CC49
1K_0804_8P4R_1% .1U_0402_16V7K 1000P_0402_50V7K
2 2
MEMORY VREF
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 MEMORY INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 5 of 56
5 4 3 2 1
5 4 3 2 1
D D
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PCIE_GTX_C_CRX_N6 K8 P_GFX_RXN[6] P_GFX_TXN[6] G2 PCIE_CTX_C_GRX_N6 CC22 BR_DIS@ 1 2 0.22U_0402_16V7K PCIE_CTX_GRX_N6
PCIE_GTX_C_CRX_P[7..0] PCIE_CTX_GRX_P[7..0]
(14) PCIE_GTX_C_CRX_P[7..0] PCIE_CTX_GRX_P[7..0] (14)
GPU FP4 REV 0.93
GPU
PCIE_GTX_C_CRX_N[7..0] Stoney PCIE_CTX_GRX_N[7..0]
(14) PCIE_GTX_C_CRX_N[7..0] PCIE_CTX_GRX_N[7..0] (14)
@
B B
UC1
UC1 E2@ UC1 A6@ UC1 A9@
BR@
BR@
SA00009PV10 SA00009PU10 SA00009PT00 SA00009LC00
UC1
PVT USE R3 Part number 0330
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 6 of 56
5 4 3 2 1
A B C D E
+3VS_S0
2
+1.8VS_S0
RC1
5
UC2 2.2K_0402_5%
DP_VARY_BL, DP_BLON, DP_DIGON: 1
1
NC 4
UC1C Type1&3--> VDD_18 EDP_BKLON_R 2
A
Y EDP_BKLON (21)
G
DISPLAY/SVI2/JTAG/TEST
Type2--> VDD_33 NL17SZ07DFT2G_SC70-5
3
SA00004BV00
B6 DP2_TXP[0] DP_ZVSS A9 DP_ZVSS RC2 1 2 2K_0402_1% +3VS_S0
A6 DP2_TXN[0] DP_AUX_ZVSS B9 DP_AUX_ZVSS RC3 1 2 150_0402_1%
DP_BLON G5 EDP_BKLON_R
1 1
1
D7 DP2_TXP[1] DP_DIGON G6 DP_DIGON TPC1 +1.8VS_S0
C7 DP2_TXN[1] DP_VARY_BL F11 EDP_BKLCTL_R
RC5
A7 DP2_TXP[2] 4.7K_0402_5%
5
B7 DP2_TXN[2] DP2_AUXP H9 UC3
2
G9 1
P
DP2_AUXN
D9 E9 NC 4 EDP_BKLCTL
DP2_TXP[3] DP2_HPD EDP_BKLCTL (21,22)
C9 EDP_BKLCTL_R 2 Y
DP2_TXN[3]
A
G
DP1_AUXP F7
APU_HDMIOUT_CLK (25)
A2 DP1_TXP[0] DP1_AUXN E7 NL17SZ07DFT2G_SC70-5
(25) HDMI_TX2+ APU_HDMIOUT_DAT (25)
3
A3 DP1_TXN[0] DP1_HPD F5 HDMI out SA00004BV00
(25) HDMI_TX2- APU_HDMIOUT_HPD (25)
B4 DP1_TXP[1] DP0_AUXP F8
(25) HDMI_TX1+ EDP_AUXP (21)
A4 E8 eDP To LVDS Converter
DP PORT Port mapping (25) HDMI_TX1- DP1_TXN[1] DP0_AUXN
G8 DP0_HPD
EDP_AUXN (21)
HDMI out D5
DP0_HPD
2
E2 DP0_TXP[0] TEST410 AK24 APU_TEST410 RC20 0_0402_5%
(21) EDP_TXP0 TPC6
E1 DP0_TXN[0] TEST411 AL24 APU_TEST411 RC145
(21) EDP_TXN0 TPC7
eDP To LVDS Converter / Scaler TEST4 P24 APU_TEST4 @
TPC8
E3 DP0_TXP[1] TEST5 N24 APU_TEST5 1M_0402_5%
+1.8VS_S0 (21) EDP_TXP1 TPC9
E4 DP0_TXN[1] TEST6 AN24 1 2 100K_0402_5%
1
(21) EDP_TXN1 AB8
TEST9 EDP_AUXP RC150
1 2 APU_SVT D1 DP0_TXP[2] TEST10 Y9 EDP_AUXN
RC31 1K_0402_5% @ D2 DP0_TXN[2] TEST14 B10 APU_TEST14
2
1 2 APU_SVD TEST15 D11 APU_TEST15 TPC13
RC32 1K_0402_5% @ C1 DP0_TXP[3] TEST16 A10 APU_TEST16 RC146
2 1 2 APU_SVC B1 C11 APU_TEST17 1M_0402_5% @ RC10 2
DP0_TXN[3] TEST17
RC33 1K_0402_5% @ TEST11 B11 APU_TEST11 APU_TEST14 8 1
APU_SVT RC13 1 2 0_0402_5% APU_SVT_R C15 SVT0 TEST18 A14 APU_TEST18 APU_TEST16 7 2
1
(49) APU_SVT D17 B14 6 3
Remove RC9/RC20 APU_SVC RC14 1 2 0_0402_5% APU_SVC_R SVC0 TEST19 APU_TEST19 APU_TEST17
(49) APU_SVC D19 5 4
APU_SVD RC15 1 2 0_0402_5% APU_SVD_R SVD0 APU_TEST11
change to idepedent resistor (49) APU_SVD
Reserve 12/08
0219 (48) GFX_SVT
GFX_SVT RC16 1 2 BR@ 0_0402_5% GFX_SVT_R B15 SVT1 TEST28_H A13 APU_TEST28_H TPC14 1K_0804_8P4R_5%
For APU_VDDGFX_RUN GFX_SVC RC18 1 2 BR@ 0_0402_5% GFX_SVC_R B16 SVC1 TEST28_L B13 APU_TEST28_L TPC15 @
(48) GFX_SVC
(Bristol Only) GFX_SVD RC19 1 2 BR@ 0_0402_5% GFX_SVD_R A18 SVD1 TEST31 P26 APU_TEST31 TPC16
(48) GFX_SVD E11 +3VALW _S5
DP_STEREOSYNC/TEST36 DP_STEREOSYNC
+1.8VS_S0 APU_SIC B18 SIC TEST37 A17 APU_TEST37
APU_SID C17 SID DP_STEREOSYNC 1 2
+1.8VS_S0
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1 2 GFX_SVD CORETYPE RC7 1 2 RC24 1K_0402_5%
RC34 1K_0402_5% @ +1.8VS_S0 RC22 1 2 300_0402_5% APU_RST# D15 RESET_L 100K_0402_5%
1 2 GFX_SVC RC23 1 2 300_0402_5% APU_PW RGD C19 PWROK @
+1.8VS_S0
RC35 1K_0402_5% @ 1 2
(48,49) APU_PW RGD TPC34
1 2 GFX_SVT H_PROCHOT# A15 PROCHOT_L RC26 1K_0402_5%
(38) H_PROCHOT# TPC33
RC37 1K_0402_5% @ APU_ALERT# B17 ALERT_L @
VDDCR_GFX_SENSE H11 APU_VDDCR_GFX_SEN
H15 J12 APU_VDDR_NB_SEN APU_VDDCR_GFX_SEN (48)
APU_TDI TDI VDDCR_NB_SENSE AMD requeir to separate pull down resistor for
H14 G12 APU_VDDCR_CPU_SEN APU_VDDR_NB_SEN (49)
APU_TDO TDO VDDCR_CPU_SENSE DP_STEREOSYNC/TEST36 12/23
D13 AY18 APU_VDDP_SEN APU_VDDCR_CPU_SEN (49)
APU_TCK TCK VDDP_SENSE TPC31 TPC32 RC24 change to pop / RC26 change to non-pop for
+1.8VS_S0 APU_TMS G15 TMS
APU_RST# CC25 1 2 APU_TRST# J14 H12 APU_VSS_SEN
HDMI-OUT mode 01/29
TRST_L VSS_SENSE
C13 APU_VSS_SEN (48,49)
RC25 33P_0402_50V8J ESD@ APU_DBRDY DBRDY
8 1 APU_SIC APU_PW RGD CC26 1 2 APU_DBREQ# A11 DBREQ_L Add 12/14
7 2 APU_ALERT# 33P_0402_50V8J ESD@
6 3 APU_SID H_PROCHOT# CC27 1 2 APU_TEST37 1 2
+1.8VS_S0
5 4 H_PROCHOT# 33P_0402_50V8J @ESD@ RC27 1K_0402_5% @
2
APU_ALERT# CC28 1 2 FP4 REV 0.93
1K_0804_8P4R_5% 33P_0402_50V8J @ESD@ Stoney RC28
3 @ @ 1K_0402_5% 3
1
+1.8VS_S0
+1.8VS_S0 RC29
APU_TDI 1 8
QC2 change to 2xBSS138 QC4/QC6 01/26 APU_TCK APU_TMS 2 7
TPC22
APU_TCK 3 6
QC3 change to unpop 01/26
2
APU_TMS APU_DBREQ# 4 5
G
TPC23
EC_SMB_CK0 1 3 APU_SIC APU_TDI 1K_0804_8P4R_5%
(15,36,38) EC_SMB_CK0 TPC24
QC4
D
S
2
TPC25
RC36
EC_SMB_DA0 1 3 APU_SID APU_PW RGD APU_TRST# 1 8
(15,36,38) EC_SMB_DA0 TPC26
QC6 2 7
Remove HDT 12/08
D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 DISP/MISC/HDT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 7 of 56
A B C D E
A B C D E
1 2 UC1D
CC31 150P_0402_50V8J ACPI/SD/AZ/GPIO/RTC/I2C/UART/MISC
RC46 1 2 33_0402_5% PLT_RST_R# BB12 LPC_RST_L SD0_WP/EGPIO101 BB2
(38) PLT_RST#
RC47 1 2 33_0402_5% APU_PCIE_RST#_R AN7 PCIE_RST_L/EGPIO26 SD0_PWR_CTRL/AGPIO102 BB5
(14,27,28,29,30) APU_PCIE_RST# BC2
SD0_CD/AGPIO25
1 2 EC_RSMRST#_R AE4 RSMRST_L SD0_CLK/EGPIO95 BB4
CC33 150P_0402_50V8J SD0_CMD/EGPIO96 AY5
CC81 AE1
.1U_0402_16V7K EC PBTN_OUT# PWR_BTN_L/AGPIO0
2 1 (38) PBTN_OUT# BC9
APU_FCH_PW RGD PWR_GOOD
CC81 close to UC1 ESD@ SYS_RST# AF2 SYS_RESET_L/AGPIO1
GLAN (27,38) AG2 WAKE_L/AGPIO2 SD0_DATA0/EGPIO97 BC3
APU_PCIE_W AKE# +3VS_S0
SD0_DATA1/EGPIO98 BA3
AK7 SLP_S3_L SD0_DATA2/EGPIO99 BC5
(38) PM_SLP_S3# AH5 BA5
EC SLP_S5_L SD0_DATA3/EGPIO100 APU_SCLK0 2.2K_0402_5% 1 2 RC51
1 (38) PM_SLP_S5# BB6
1
SD0_LED/EGPIO93 APU_SDATA0 2.2K_0402_5% 1 2 RC52
+3VALW _S5 RC53 1 2 10K_0402_5% APU_S0A3 AE8 S0A3_GPIO/AGPIO10
S5_MUX_CTRL AH8 S5_MUX_CTRL/EGPIO42 SCL0/I2C2_SCL/EGPIO113 BA15 APU_SCLK0
(39) S5_MUX_CTRL AY17 APU_SDATA0 APU_SCLK0 (12,13,22)
RC55 1 2 15K_0402_1% APU_TEST0 AH6
SDA0/I2C2_SDA/EGPIO114
APU_SDATA0 (12,13,22) DDR SO-DIMM
TEST0
RC57 1 2 15K_0402_1% APU_TEST1 AK8 TEST1/TMS SCL1/I2C3_SCL/AGPIO19 AG5 AGPIO19 2.2K_0402_5% 1 2 RC58
+3VALW _S5
RC59 1 2 15K_0402_1% APU_TEST2 AE3 TEST2 SDA1/I2C3_SDA/AGPIO20 AG4 AGPIO20 2.2K_0402_5% 1 2 RC60
TPM_STSIRQ# change to AGPIO6
AY15 ESPI_RESET_L/KBRST_L/AGPIO129 for TPM Voltage level is S5 0218
(38) KB_RST# BC19 GA20IN/AGPIO126
EC AD7 LPC_PME_L/AGPIO22 AGPIO3 AL5 AGPIO3 Add SCA_FW_FLASH on AGPIO4 0216
(38) EC_SCI# BB13 AL6
LPC_SMI_L/AGPIO86 AGPIO4
AJ1 AGPIO5 SCA_FW _FLASH (22)
AGPIO5
(35) USB_OC#4
AG3 AC_PRES/USB_OC4_L/IR_RX0/AGPIO23 AGPIO6/LDT_RST AJ3
TPM_STSIRQ# (28) AGPIO69 for DGPU Select 0126+3VS_S0
W AKEUP#_R AD5 IR_TX0/USB_OC5_L/AGPIO13 AGPIO7/LDT_PWROK AH1
RC64 1 2 AL8 IR_TX1/USB_OC6_L/AGPIO14 AGPIO8 AJ4 AGPIO8 10K_0402_5% 2 UMA@ 1 RC77
(28) PCIE_W AKE#_W LAN AN8 AK5
0_0402_5% IR_RX1/AGPIO15 AGPIO9
DGPU_PW ROK AE2 IR_LED_L/LLB_L/AGPIO12 VDDGFX_PD/AGPIO39 AD8 GFX_VR_PD AGPIO69 10K_0402_5% 2 DIS@ 1 RC74
(47) DGPU_PW ROK BC15 AG8 AGPIO40 GFX_VR_PD (48)
LAN_CLKREQ# CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92 AGPIO40
(27) LAN_CLKREQ#
W LAN_CLKREQ# BB17 CLK_REQ1_L/AGPIO115 AGPIO64 AW15 AGPIO5 10K_0402_5% 2 1 RC66
(28) W LAN_CLKREQ# BC17 AU15 2 1 RC69
CR_CLKREQ# CLK_REQ2_L/AGPIO116 AGPIO65 AGPIO8 10K_0402_5%
(29) CR_CLKREQ# BB18 2 1 RC70
CLK_REQ3 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131 AGPIO40 10K_0402_5%
VGA_CLKREQ# BB16 CLK_REQG_L/OSCIN/EGPIO132 AGPIO66/SHUTDOWN_L AT15
(15) VGA_CLKREQ# AH9 AU12
USB_OC0_L/TRST_L/AGPIO16 AGPIO68/SGPIO_CLK
(35) USB_OC#0 AG1 AT14
USB_OC1_L/TDI/AGPIO17 AGPIO69/SGPIO_LOAD AGPIO69 GPU
(35) USB_OC#1 AH2 AR14
Follow DSG reserve 10K pull-down 1228(34) USB_OC#2 USB_OC2_L/TCK/AGPIO18 AGPIO71/SGPIO_DATAOUT
DGPU_HOLD_RST# (14)
+3VS_S0 AL9 USB_OC3_L/TDO/AGPIO24 AGPIO72/SGPIO_DATAIN BC13
2 (34) USB_OC#3
@ 1 RC76
10K_0402_5% HDA_BITCLK AU6 AZ_BITCLK/I2S_BCLK_MIC SPKR/AGPIO91 BA17 APU_SPKR
2 1 RC73 AR8 APU_SPKR (32)
CLK_REQ3 HDA_SDIN0 AZ_SDIN0/I2S_DATA_MIC[0]
(32) HDA_SDIN0 AP6 AN5 AGPIO11
10K_0402_5% HDA_SDIN1 AZ_SDIN1/I2S_LR_PLAYBACK BLINK/USB_OC7_L/AGPIO11
2 2 1 RC75 KB_RST# RPC1 HDA_SDIN2 AR5 RC80 0_0402_5% 2
AZ_SDIN2/I2S_DATA_MIC[1]
10K_0402_5% 1 8 HDA_RST# HDA_RST# AU9 AZ_RST_L/I2S_LR_MIC GENINT1_L/AGPIO89 BB14 HVBEN_L 1 @ 2
(32) HDA_RST_AUDIO# 2 7 AT9 BA19
RPC2 HDA_SYNC HDA_SYNC AZ_SYNC/I2S_BCLK_PLAYBACK GENINT2_L/AGPIO90
1 8 (32) HDA_SYNC_AUDIO 3 6 AR7 W L_ON (28)
CR_CLKREQ# Audio Codec HDA_SDOUT HDA_SDOUT AZ_SDOUT/I2S_DATA_PLAYBACK
2 7 (32) HDA_SDOUT_AUDIO 4 5 BC18
LAN_CLKREQ# HDA_BITCLK FANIN0/AGPIO84
3 6 (32) HDA_BITCLK_AUDIO BB10 BB19 BT_ON (28)
W LAN_CLKREQ# APU_I2C0_SCL I2C0_SCL/EGPIO145 FANOUT0/AGPIO85
4 5 BB9 DGPU_PW R_EN (16,47)
VGA_CLKREQ# RPC1 / CC36 ,Close to UC1 1 33_0804_8P4R_5% APU_I2C0_SDA I2C0_SDA/EGPIO146
APU_I2C1_SCL BB7 I2C1_SCL/EGPIO147 UART0_CTS_L/EGPIO135 AY9
10K_0804_8P4R_5% CC36 APU_I2C1_SDA BC7 I2C1_SDA/EGPIO148 UART0_RXD/EGPIO136 AW8 USB Debug port
10P_0402_50V8J UART0_RTS_L/EGPIO137 AV5 1.8V_S0
@EMI@ 2 (28) RTC_CLK RTC_CLK AG7 RTCCLK UART0_TXD/EGPIO138 AV8
UART0_INTR/AGPIO139 AW9 KDBG_MUX_SEL_R @
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+3VALW _S5 WLAN_SUSCLK 3.3V 1 2
AT1 AV11 KDBG_MUX_SEL (34)
32K_X1 X32K_X1 UART1_CTS_L/BT_I2S_BCLK/EGPIO140 RC79 0_0402_5%
UART1_RXD/BT_I2S_SDI/EGPIO141 AU7
RPC6 UART1_RTS_L/EGPIO142 AT11 RC79 change to short pad 0401
1 8 W AKEUP#_R UART1_TXD/BT_I2S_SDO/EGPIO143 AR11 +1.8VS_S0
2 7 USB_OC#0 32K_X2 AT2 X32K_X2 UART1_INTR/BT_I2S_LRCLK/AGPIO144 AP9
3 6 USB_OC#1 BR@ RC17
FP4 REV 0.93
4 5 USB_OC#2 8 1 HDA_RST# KDBG_MUX_SEL_R 1 2 10K_0402_5%
7 2 HDA_SYNC Stoney RC82
10K_0804_8P4R_5% 6 3 HDA_SDOUT @
RPC7 5 4 HDA_BITCLK
1 8 USB_OC#3
2 7 USB_OC#4 1K_0804_8P4R_5%
3 6 HDA_SDIN1
4 5 HDA_SDIN2 TYPE1 Only 1215
10K_0804_8P4R_5% HW Strap Pin
MEM_VOLT_SEL1/AGPIO3 RTC_CLK BLINK/AGPIO11 SYS_RST#
3 CLK_PCI_EC LPC_CLK1 LPC_FRAME# <INT PU> <INT PU> <INT PU> <INT PU> 3
LDT_RST#/PG
BOOT FAIL CLKGEN SPI ROM COIN BATT OUTPUT TO NORMAL
+3VALW _S5
H TIMER
ENABLED
ENABLE
(DEFAULT)
(DEFAULT) ENHANCED RESET
LOGIC (quick S5)
ON BOARD
(DEFAULT)
APU
(DEFAULT)
RESET MODE
(DEFAULT)
RC91 1 2 10K_0402_5% PBTN_OUT#
BOOT FAIL
RPC8 TIMER CLKGEN TRADITION AL COIN BATT OUTPUT SHORT RST
1
2
3
8
7
6
APU_I2C0_SCL
APU_I2C0_SDA
APU_I2C1_SCL
L DISABLED
(DEFAULT)
DISABLED LPC ROM RESET LOGIC NOT ON
BOARD
TO PADS MODE
4 5 APU_I2C1_SDA
1
1
1
1
1
1
Pull-up 2.2K to 1.8V for EGPIO @
+1.8VALW _S5 +3VS_S0 @ RC102
Pull-down 10K to VSS for unused RC96 RC97 RC98 RC99 RC100 RC101 10K_0402_5%
RSMRST# 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
1.8V /EC program to 1.8V OUTPUT
2
2
2
2
2
2
(38,9) LPC_FRAME#
1
1
1 2EC_RSMRST#_R AGPIO11
(38) EC_RSMRST#
32.768KMHz CRYSTAL
1
1
1
1
DC4
4 CH751H-40PT_SOD323-2 @ @ @ @ @ @ 4
32K_X1 1 2APU_FCH_PW RGD RC106 RC107 RC108 RC109 RC110 RC111 RC112
(38) APU_FCH_POK
RC113 20M_0402_5% 2 2 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5% 2K_0402_5%
32K_X2 1 2 .1U_0402_16V7K 1U_0402_6.3V6K 2
2
2
2
2
2
CC37 CC38
YC1
1 2 1 1
10ppm,ESR:50Kohm
32.768KHZ_12.5PF_1TJF125BJ1A000 Security Classification Compal Secret Data Compal Electronics, Inc.
1 SJ10000NB00 1 Issued Date 2015/01/23 Deciphered Date 2017/01/23 Title
S CRYSTAL 32.768KHZ 9.0PF +-10PPM 1TJF090BJ1A000A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 GPIO/AZ/MISC/STRAPS
CC39 CC40 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
7P_0402_50V8 2 7P_0402_50V8 2 CC39/CC40 change to 7P 0221 Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 8 of 56
A B C D E
A B C D E
UC1E
CLK/SATA/USB/SPI/LPC
AU3 SATA_TX0P USBCLK/25M_48M_OSC AP8
(26) SATA_PTX_DRX_P0 AU4 SATA_TX0N
(26) SATA_PTX_DRX_N0 AP5 USB_ZVSS
USB_ZVSS RC114 1 2 11.8K_0402_1%
HDD AV1 SATA_RX0N
(26) SATA_PRX_DTX_N0 AV2 AR2
SATA_RX0P USB_HSD0P
(26) SATA_PRX_DTX_P0 AR1 USB20_P0 (35)
USB_HSD0N
USB20_N0 (35) Rear USB2 port 1
AY2 SATA_TX1P
(26) SATA_PTX_DRX_P1 AY1 AR3
SATA_TX1N USB_HSD1P
(26) SATA_PTX_DRX_N1 AR4 USB20_P1 (35)
RC115 place from UC1.AW1(SATA_ZVSS) =< 1000mil ODD USB_HSD1N
USB20_N1 (35) Rear USB2 port 2
RC117 place from UC1.AW2(SATA_ZVDDP)=<1000mil AW4 SATA_RX1N
(26) SATA_PRX_DTX_N1 AW3 AN2
SATA_RX1P USB_HSD2P
2015/12/15 (26) SATA_PRX_DTX_P1 AN1 USB20_P2 (35)
USB_HSD2N
USB20_N2 (35) Rear USB2 port 3
1
RC115 2 1 1K_0402_1% SATA_ZVSS AW1 SATA_ZVSS
1
+0.95VS_+1.05VS_S0 RC117 2 1 1K_0402_1% SATA_ZVDD AW2 SATA_ZVDDP USB_HSD3P AN3
USB20_P3 (28)
RC118 2 1 10K_0402_5% DEVSPL0 AT17 DEVSLP[0]/EGPIO67 USB_HSD3N AN4 WLAN/BT combo
USB20_N3 (28)
RC119 2 1 10K_0402_5% DEVSPL1 AT12 DEVSLP[1]/EGPIO70
2 1 W4 GPP_CLK1P
2 1 (28) CLK_PCIE_W LAN W3
WLAN (28) CLK_PCIE_W LAN# GPP_CLK1N
W1 GPP_CLK2P
(29) CLK_PCIE_CR W2
Cardreader (29) CLK_PCIE_CR# GPP_CLK2N
Y2 GPP_CLK3P
(30) CLK_PCIE_SATA Y1
PCIE to SATA (30) CLK_PCIE_SATA# GPP_CLK3N
BC10 X25M_48M_OSC
3 4 USB_SS_ZVSS AD2 USBSS_ZVSS RC121 1 2 1K_0402_1%
3 4 AD1 USBSS_ZVDD RC122 1 2 1K_0402_1%
USB_SS_ZVDDP +0.95V_+1.05VALW _S5
1
1
48M_X1 T2 X48M_X1
2 CC41 CC42 AA3 2
USB_SS_0TXP
6P_0402_50V8D 6P_0402_50V8D USB_SS_0TXN AA4
2
2
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BA13 LAD3 USB_SS_2TXP AC1
(38) LPC_AD3 AV14 AC2 USB3_CTX_DRX_P2 (34)
LFRAME_L USB_SS_2TXN
(38,8) LPC_FRAME# BA1 USB3_CTX_DRX_N2 (34)
ESPI_ALERT_L/LDRQ0_L Side USB3.0 port1
BC14 SERIRQ/AGPIO87 USB_SS_2RXP Y6
(38) SERIRQ BC11 Y7 USB3_CRX_DTX_P2 (34)
RC133/ CC79 Close to UC1 12/11 LPC_CLKRUN_L/AGPIO88 USB_SS_2RXN
USB3_CRX_DTX_N2 (34)
EMI@ AE9 LPC_PD_L/AGPIO21
SPI_CLK 2 1RC133 USB_SS_3TXP AC4
AC3 USB3_CTX_DRX_P3 (34)
0_0402_5%
1 USB_SS_3TXN
BC6 USB3_CTX_DRX_N3 (34)
SPI_CLK_R SPI_CLK/ESPI_CLK/EGPIO117 Side USB3.0 port2
CC79 SPI_CS#0 BB8 SPI_CS1_L/EGPIO118 USB_SS_3RXP AB5
AW7 AB6 USB3_CRX_DTX_P3 (34)
10P_0402_50V8J @EMI@ SPI_CS#1 SPI_CS2_L/ESPI_CS_L/EGPIO119 USB_SS_3RXN
2 BA9 USB3_CRX_DTX_N3 (34)
SPI_MISO SPI_DI/ESPI_DATA/EGPIO120
SPI_MOSI AY7 SPI_DO/EGPIO121
SPI_W P# AW11 SPI_WP_L/EGPIO122
SPI_HOLD# BA7
(28) APU_SPI_TPMCS# APU_SPI_TPMCS# AW12
SPI_HOLD_L/EGPIO133
SPI_TPM_CS_L/AGPIO76 BIOS ROM
FP4 REV 0.93
SOC to EC Level Shift BIOS Recovery Stoney +1.8V_SPI_S5 +1.8VALW _S5 +1.8V_SPI_S5
3 +1.8V_SPI_S5 +3V3_DSW @ @ 3
RC126 1 2 10K_0402_5% SPI_CS#0_R 1 2
RC128 1 2 10K_0402_5% SPI_CS#1 RC127 0_0402_5%
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
1 1 1 2
RC130 1 2 10K_0402_5%
CC45
CC43 CC44 SPI_W P#
RC129 1 2 10K_0402_5% SPI_HOLD#
CC46
.1U_0402_16V7K .1U_0402_16V7K
2 UC7 2 2 1
1 14
VCCA VCCB
BIOS_SPI_SO_LS 2 13 EC P52 Close to SPI ROM
A1 B1 BIOS_SPI_SO (28,38)
SPI ROM ( 8MByte/1.8V/Quad-IO )
BIOS_SPI_CLK_LS 3 12 EC P50
4 A2 B2 11 BIOS_SPI_CLK (28,38)
BIOS_SPI_SI_LS EC P48
5 A3 B3 10 BIOS_SPI_SI (28,38)
BIOS_SPI_CS0#_LS EC P54
6 A4 B4 9 BIOS_SPI_CS0# (38)
NC NC +1.8V_SPI_S5
7 8 LS_OE 1 2 UC8
GND OE +1.8V_SPI_S5
RC132 10K_0402_5% SPI_CS#0_R 1 8
TXB0104PW R_TSSOP14 1 2 SPI_MISO 2 CS# VCC 7 SPI_HOLD#
12/8 modify, Vendor DO(IO1) HOLD#(IO3)
SA00001S200 RC134 100K_0402_5% SPI_W P# 3 6 SPI_CLK
recommend. Add 100K PD. 4 WP#(IO2) CLK 5 SPI_MOSI
SPI_CLK 2 1 SPI_CLK_Bios GND DI(IO0)
Close to UC1 IC
1 2 0_0402_5% RC136 10_0402_5% 1 W 25Q64FW SSIQ_SO8
RPC4 RC135 @ @EMI@ SA00006ZV10
4 5 +1.8V_SPI_S5 CC47
BIOS_SPI_SO_LS 3 6 SPI_MISO 10P_0402_50V8J
Correct UC8 footprint 1222
@EMI@ 2
SPI ROM SOCKET(co-lay)
BIOS_SPI_CLK_LS 2 7 SPI_CLK_R
SPI_CS#0_C
BIOS_SPI_SI_LS 1 8 SPI_MOSI
BIOS_SPI_CS0#_LS
5
GND SO/SIO1
ACES_91960-0084N_MX25L3206EM2I
+1.8V_SPI_S5
UC10
1
NC VCC
5 @ RC139 100K_0402_5% Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 2015/01/23 2017/01/23 Title
2
+1.8V_SPI_S5 Issued Date Deciphered Date
EC Pin56 Buffer
(35,38) USB_BIOS_MISO IN A 4 SPI_MISO
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FP4 SATA/CLK/USB/SPI
3 Y Size Document Number Rev
GND AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
NL17SZ07DFT2G_SC70-5 @
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 9 of 56
A B C D E
A B C D E
+1.2V_VDDQ_S3 +APU_CORE_NB_S0
+1.2V_VDDQ_S3
CC68
CC69
CC70
CC71
CC72
CC73
CC74
CC75
CC76
CC77
CC78
CC50
CC51
CC52
CC53
CC54
CC55
CC56
CC57
CC58
CC59
CC60
CC61
CC62
CC63
CC64
CC65
CC66
CC67
1 1 1 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
@ @ @
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
180P_0402_50V8J
180P_0402_50V8J
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
2 2 2 2 2 2 2 2 2 2 2
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
180P_0402_50V8J
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
1 1
DIMMS/GND
Bottom Side Decoupling Under APU ACROSS VDDNB AND VSS SPLIT
DDR4 UC1F
POWER
P25 VDDIO_MEM_S3_1 VDDCR_CPU_1 U8
+1.2V_VDDQ_S3 P28 W7
+APU_CORE_S0
2.5A T24
VDDIO_MEM_S3_2 VDDCR_CPU_2
W12
35A
FOR DEBUG ONLY +1.8VS_S0
T27
VDDIO_MEM_S3_3
VDDIO_MEM_S3_4
VDDCR_CPU_3
VDDCR_CPU_4 W15
+1.5VALW _S5
CC100
CC119
U25 VDDIO_MEM_S3_5 VDDCR_CPU_5 W18
1 2 1 1 U28 VDDIO_MEM_S3_6 VDDCR_CPU_6 W21
+3VS_S0 +3VS_APU_S0
CC115
CC106
CC124
V30 VDDIO_MEM_S3_7 VDDCR_CPU_7 Y8
CC118
10U_0603_6.3V6M
0.22U_0402_10V6K
0_0402_5% 1 W24 VDDIO_MEM_S3_9 VDDCR_CPU_9 Y13
2 2 W27 VDDIO_MEM_S3_10 VDDCR_CPU_10 Y16
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
Y25 VDDIO_MEM_S3_11 VDDCR_CPU_11 Y19
2 2 2
10U_0603_6.3V6M
CC138
CC139
CC140
CC142
CC143
0.22U_0402_10V6K
10U_0603_6.3V6M
0.22U_0402_10V6K
10U_0603_6.3V6M
0.22U_0402_10V6K
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AH7
0.2A AE6 VDDP_GFX_2
VDDCR_CPU_36
VDDCR_CPU_28 AE18
+VDDP_GFX_S0
AE5 AE21
(0.95V) 1.5A VDDP_GFX_1 VDDCR_CPU_29
VDDCR_CPU_40 AH21
AP19 VDD_33_1 VDDCR_CPU_30 AG6
+3VS_APU_S0
AP21 AH12
Close AP15, AR15 Close AP10, AR9 Close AP13, AR12 0.2A VDD_33_2 VDDCR_CPU_37
VDDCR_CPU_49 AN6
Modify VDDP/ VDDP_GFX Caps follow SCL_1.13 0225 AP16 VDD_18_1 VDDCR_CPU_38 AH15
+1.8VS_S0
AP18 AH18
1.5A VDD_18_2 VDDCR_CPU_39
VDDCR_CPU_48 AL7 Vinafix.com
+0.95VS_+1.05VS_S0 AP10 VDD_18_S5_1 VDDCR_CPU_41 AK6
+1.8VALW _S5
AR9 AE15
+0.95V_+1.05VALW _S5 0.5A VDD_18_S5_2 VDDCR_CPU_27
CC149
CC150
AP15 VDD_33_S5_1
+3VALW _S5
CC152
CC147
CC146
CC153
AR15 L8
1 1 0.2A VDD_33_S5_2 VDDCR_GFX_14
L13
+APU_CORE_GFX_S0
1 1 1 1
AN12 VDDP_S5_1
VDDCR_GFX_15
VDDCR_GFX_16 L16
35A
+0.95V_+1.05VALW _S5
10U_0603_6.3V6M
0.22U_0402_10V6K
AP12 L19
2 2 0.8A VDDP_S5_2 VDDCR_GFX_17
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
VDDCR_GFX_18 L22
3 2 2 2 2 AP13 VDDCR_FCH_S5_1 VDDCR_GFX_19 N7 3
+APU_CORE_FCH_S0_S5
AR12 N12
0.2A VDDCR_FCH_S5_2 VDDCR_GFX_20
VDDCR_GFX_21 N15 RTC OF APU +CHGRTC_S5 +3VL_S5
AW19 VDDP_6 VDDCR_GFX_22 N18
+0.95VS_+1.05VS_S0
AU17 N21 +RTCVCC_S5 RC147 +RTCBATT_G3
7A AU19
VDDP_1
VDDP_2
VDDCR_GFX_23
VDDCR_GFX_24 P8 DC3 1.5K_0603_5%
AV17 VDDP_3 VDDCR_GFX_25 P13 2 1 2
AV19 VDDP_4 VDDCR_GFX_26 P16 20mils
AW17 VDDP_5 VDDCR_GFX_27 P19 1 20mils
VDDCR_GFX_28 P22 1
AL12 VDDCR_NB_1 VDDCR_GFX_29 T7 @ 3 +RTCBATT_R_S5 RC142 1 2
+VDDP_GFX_S0 +APU_CORE_NB_S0
AL13 F12 CC151 1K_0402_5%
(0.95V) 21A AL15
VDDCR_NB_2
VDDCR_NB_3
VDDCR_GFX_1
VDDCR_GFX_2 F15 1U_0603_6.3V6K BAT54CW -L SOT-323
+0.95VS_+1.05VS_S0 2
LC1 1 2
+0.95VS_+1.05VS_S0
AL18 VDDCR_NB_4 VDDCR_GFX_3 G11
CC148
CC154
CC155
CC156
CC145
CC164
CC157
CC159
SM01000C000 AN13 J8
1 1 1 1 1 1 1 (0.95V) 1 1 AN16
VDDCR_NB_6
VDDCR_NB_7
VDDCR_GFX_5
VDDCR_GFX_6 J9 +RTC_APU_S5 +RTC_APU_R_S5 +RTCVCC_S5
BR@
AN19 VDDCR_NB_8 VDDCR_GFX_7 J11 20 mils UC11
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
0.22U_0402_10V6K
180P_0402_50V8J
0.22U_0402_10V6K
0.22U_0402_6.3V6K
VDDCR_GFX_10
GND
BR@
BR@
AR17 K15
CC160
1U_0603_6.3V6K CC161
+RTC_APU_S5 VDDBT_RTC_G VDDCR_GFX_11 2 1
2
VDDCR_GFX_12 K16 @ RT9063-15GVN SOT23 1
VDDCR_GFX_30 T12 QC5 RC144
1
T15 D 0_0805_5%
VDDCR_GFX_31 SA000076X00
VDDCR_GFX_32 T18 1 2 2 CC162
(38) EC_RTCRST 2
VDDCR_GFX_33 T21 G 1U_0603_6.3V6K
1
VDDCR_GFX_34 U13 L2N7002W T1G_SC-70-3 S
3
U16 SB00000ST00 For clear CMOS
Bottom Side Decoupling Under APU Close AE6, AE5 VDDCR_GFX_35
VDDCR_GFX_36 U19 Close to AR17 Pin
VDDCR_GFX_37 U22
4 VDDCR_GFX_13 K19 4
The VDDP_GFX Power Rail change to +VDDP_GFX_S0 on 0219 FP4 REV 0.93
CC158/CC159/LC1 change to BR@ on PVT Stoney
@
Remove CC163 follow AMD SCH CKL 0219
1 1
UC1G UC1H
GND GND UC1J
A8 VSS_1 VSS_63 L28 AE10 VSS_125 VSS_187 AV30
A12 VSS_2 VSS_64 M4 AE13 VSS_126 VSS_188 AV33 APU_RSVD_2 U30 RSVD_2
A16 M30 AE16 AW22 TPC20
VSS_3 VSS_65 VSS_127 VSS_189 APU_RSVD_3 U31 RSVD_3
A20 N10 AE19 AY4 TPC18
APU_RSVD_4 AN30
TPC19@
VSS_4 VSS_66 VSS_128 VSS_190 RSVD_4
A24 VSS_5 VSS_67 N13 AE22 VSS_129 VSS_191 AY6 @
A28 VSS_6 VSS_68 N16 AF1 VSS_130 VSS_192 AY8 @
A32 VSS_7 VSS_69 N19 AF4 VSS_131 VSS_193 AY10
B2 VSS_8 VSS_70 N22 AG9 VSS_132 VSS_194 AY12
B8 VSS_9 VSS_71 N27 AG12 VSS_133 VSS_195 AY14
B12 VSS_10 VSS_72 P1 AG15 VSS_134 VSS_196 AY16
B33 VSS_11 VSS_73 P2 AG18 VSS_135 VSS_197 AY20
C3 VSS_12 VSS_74 P4 AG21 VSS_136 VSS_198 AY22 FP4 REV 0.93
D4 VSS_13 VSS_75 P5 AH4 VSS_137 VSS_199 AY24
D6 VSS_14 VSS_76 P12 AH10 VSS_138 VSS_200 AY26 Stoney
D8 VSS_15 VSS_77 P15 AH13 VSS_139 VSS_201 AY28
D10 VSS_16 VSS_78 P18 AH16 VSS_140 VSS_202 AY30
@
D12 VSS_17 VSS_79 P21 AH19 VSS_141 VSS_203 BB1
D14 VSS_18 VSS_80 P30 AH22 VSS_142 VSS_204 BB33
D16 VSS_19 VSS_81 P33 AK1 VSS_143 VSS_205 BC4
D18 VSS_20 VSS_82 T4 AK4 VSS_144 VSS_206 BC8
D20 VSS_21 VSS_83 T10 AK12 VSS_145 VSS_207 BC12
D22 VSS_22 VSS_84 T13 AK15 VSS_146 VSS_208 BC16
D24 VSS_23 VSS_85 T16 AK18 VSS_147 VSS_209 BC20
D26 VSS_24 VSS_86 T19 AL16 VSS_148 VSS_210 BC24
2 D28 T22 AL19 BC28 2
VSS_25 VSS_87 VSS_149 VSS_211
D30 VSS_26 VSS_88 T30 AL22 VSS_150 VSS_212 BC32
F1 VSS_27 VSS_89 U5 AM4 VSS_151
F2 VSS_28 VSS_90 U12 AN9 VSS_152
F4 VSS_29 VSS_91 U15 AN10 VSS_153
F9 VSS_30 VSS_92 U18 AN15 VSS_154
F19 VSS_31 VSS_93 U21 AN18 VSS_155
F22 VSS_32 VSS_94 U24 AN21 VSS_156
F25 VSS_33 VSS_95 V1 AN25 VSS_157
F30 VSS_34 VSS_96 V2 AN28 VSS_158
F33 VSS_35 VSS_97 V4 AP1 VSS_159
G7 VSS_36 VSS_98 W10 AP2 VSS_160
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G17 VSS_37 VSS_99 W13 AP4 VSS_161
G20 VSS_38 VSS_100 W16 AP7 VSS_162
G23 VSS_39 VSS_101 W19 AP22 VSS_163
G26 VSS_40 VSS_102 W22 AP27 VSS_164
H4 VSS_41 VSS_103 Y4 AP30 VSS_165
H30 VSS_42 VSS_104 Y5 AP33 VSS_166
J5 VSS_43 VSS_105 Y12 AR6 VSS_167
J15 VSS_44 VSS_106 Y15 AR25 VSS_168
J19 VSS_45 VSS_107 Y18 AR28 VSS_169
J22 VSS_46 VSS_108 Y21 AT4 VSS_170
J25 VSS_47 VSS_109 Y24 AT19 VSS_171
J28 VSS_48 VSS_110 AB1 AT22 VSS_172
K1 VSS_49 VSS_111 AB2 AT30 VSS_173
K2 VSS_50 VSS_112 AB4 AU5 VSS_174
K4 VSS_51 VSS_113 AB10 AU8 VSS_175
K10 VSS_52 VSS_114 AB13 AU11 VSS_176
K22 VSS_53 VSS_115 AB16 AU14 VSS_177
K27 VSS_54 VSS_116 AB19 AU20 VSS_178
K30 VSS_55 VSS_117 AB22 AU23 VSS_179
3 K33 VSS_56 VSS_118 AD4 AU27 VSS_180 3
L5 VSS_57 VSS_119 AD9 AV4 VSS_181
L12 VSS_58 VSS_120 AD12 AV7 VSS_182
L15 VSS_59 VSS_121 AD15 AV9 VSS_183
L18 VSS_60 VSS_122 AD18 AV12 VSS_184 VSS_213 L24
L21 VSS_61 VSS_123 AD21 AV15 VSS_185 VSS_215 AL10
L25 VSS_62 VSS_124 AD24 AV25 VSS_186 VSS_214 AK21
Stoney Stoney
@ @
4 4
180P_0402_50V8J
CD17
1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD15
0.1U_0402_25V6
CD34
0.1U_0402_25V6
CD35
0.1U_0402_25V6
CD36
0.1U_0402_25V6
CD37
0.1U_0402_25V6
CD39
0.1U_0402_25V6
CD38
0.1U_0402_25V6
CD9
0.1U_0402_25V6
CD10
0.1U_0402_25V6
CD11
0.1U_0402_25V6
CD12
0.1U_0402_25V6
CD13
0.1U_0402_25V6
CD14
2 2 2 2 2 2 2 2 2 2 2 2 2 2
100U_1206_6.3V6M
1
(8.0 mm) STD @ @ @ @ @ @
JDIMM1A 180P*1
DDRB_SDQ[0..7] (13,5)
(5) DDRB_CLK0
137
CK0(T)
STD
DQ0
8 DDRB_SDQ0 100uF*1
139 7 DDRB_SDQ1
(5) DDRB_CLK0# 138 CK0#(C) DQ1 20 DDRB_SDQ2 Follow reference board Gardenia
(5) DDRB_CLK1 140 CK1(T) DQ2 21 DDRB_SDQ3
(5) DDRB_CLK1# CK1#(C) DQ3 4 DDRB_SDQ4
109 DQ4 3 DDRB_SDQ5
(13,5) DDRB_CKE0 110 CKE0 DQ5 16 DDRB_SDQ6 Layout Note:
(13,5) DDRB_CKE1 CKE1 DQ6 17 DDRB_SDQ7
149 DQ7 13 PLACE THE CAP WITHIN 200 MILS
(5) DDRB_SCS0# S0# DQS0(T) DDRB_SDQS0 (13,5)
(5) DDRB_SCS1#
157
S1# DQS0#(C)
11
DDRB_SDQS0# (13,5) FROM THE JDIMM1
162
165 S2#/C0 28 DDRB_SDQ[8..15] (13,5)
DDRB_SDQ8
S3#/C1 DQ8 29 DDRB_SDQ9
155 DQ9 41 DDRB_SDQ10
(5) DDRB_ODT0 161 ODT0 DQ10 42 +0.6V_DDRA_VREFCA_S3 +1.2V_VDDQ_S3 +1.2V_VDDQ_S3
DDRB_SDQ11 JDIMM1B
(5) DDRB_ODT1 ODT1 DQ11 24 DDRB_SDQ12 STD
115 DQ12 25 DDRB_SDQ13 111 141
(13,5) DDRB_BG0 113 BG0 DQ13 38 112 VDD1 VDD11 142
DDRB_SDQ14 2 CD19
(13,5) DDRB_BG1 150 BG1 DQ14 37 117 VDD2 VDD12 147
DDRB_SDQ15
(13,5) DDRB_SBS0# 145 BA0 DQ15 34 118 VDD3 VDD13 148
(13,5) DDRB_SBS1# BA1 DQS1(T) 32 DDRB_SDQS1 (13,5) 123 VDD4 VDD14 153
1000P_0402_50V7K
(13,5) DDRB_SMA[0..13] DQS1#(C) DDRB_SDQS1# (13,5) 1
1nF*1 +0.6V_DDRA_VREFCA_S3 VDD5 VDD15 +0.6VS_VTT_S0
DDRB_SMA0 144 124 154
133 A0 50 DDRB_SDQ[16..23] (13,5) 129 VDD6 VDD16 159
DDRB_SMA1 DDRB_SDQ16
DDRB_SMA2 132 A1 DQ16 49 DDRB_SDQ17 130 VDD7 VDD17 160
DDRB_SMA3 131 A2 DQ17 62 DDRB_SDQ18 +3VS_S0 135 VDD8 VDD18 163
DDRB_SMA4 128 A3 DQ18 63 DDRB_SDQ19 136 VDD9 VDD19 +2.5V_S3
DDRB_SMA5 126 A4 DQ19 46 DDRB_SDQ20 RD28 VDD10
DDRB_SMA6 127 A5 DQ20 45 DDRB_SDQ21 2 1 VDDSPD1 255 258
DDRB_SMA7 122 A6 DQ21 58 DDRB_SDQ22 VDDSPD VTT
A7 DQ22 0_0603_5%
1U_0402_6.3V6K
2 DDRB_SMA8 125 59 DDRB_SDQ23 164 257 2
DDRB_SMA9 121 A8 DQ23 55 VREFCA VPP1 259
A9 DQS2(T) DDRB_SDQS2 (13,5) Layout Note: VPP2 2
DDRB_SMA10 146 53 2 1 CD18
CD21
DDRB_SMA11 120 A10_AP DQS2#(C) DDRB_SDQS2# (13,5) Place near JDIMM1 1 99
0.1U_0402_25V6
A11 DDRB_SDQ[24..31] (13,5) VSS VSS
0.1U_0402_25V6
CD32
DDRB_SMA12 119 70 DDRB_SDQ24 2 102
DDRB_SMA13 158 A12 DQ24 71 DDRB_SDQ25 5 VSS VSS 103 1
A13 DQ25 1 2 VSS VSS
151 83 DDRB_SDQ26 6 106
(13,5) DDRB_SW E# 156 A14_WE# DQ26 84 9 VSS VSS 107
DDRB_SDQ27
(13,5) DDRB_SCAS# 152 A15_CAS# DQ27 66 +0.6VS_VTT_S0 10 VSS VSS 167
DDRB_SDQ28 4.7uF*1
(13,5) DDRB_SRAS# A16_RAS# DQ28 67 14 VSS VSS 168
DDRB_SDQ29
+1.2V_VDDQ_S3 114 DQ29 79 DDRB_SDQ30 0.1uF*1 15 VSS VSS 171
(13,5) DDRB_ACT# ACT# DQ30 80 18 VSS VSS 172
DDRB_SDQ31
DQ31 VSS VSS
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RD7 1 @ 2 0_0402_5% D1_PAR 143 76 1 1 19 175
116 PARITY DQS3(T) 74 DDRB_SDQS3 (13,5) VSS VSS
RD10 2 1 1K_0402_1% DIM1_ALERT# CD22 CD24 22 176
134 ALERT# DQS3#(C) DDRB_SDQS3# (13,5) 23 VSS VSS 180
MEM_MB_EVENT#
.1U_0402_16V7K
4.7U_0603_6.3V6K
(13,5) MEM_MB_EVENT# 108 EVENT# 174 DDRB_SDQ[32..39] (13,5) 26 VSS VSS 181
DDRB_SDQ32
(13,5) MEM_MB_RST# RESET# DQ32 173 2 2 27 VSS VSS 184
DDRB_SDQ33
DQ33 187 DDRB_SDQ34 30 VSS VSS 185
254 DQ34 186 DDRB_SDQ35 31 VSS VSS 188
(13,22,8) APU_SDATA0 253 SDA DQ35 170 35 VSS VSS 189
DDRB_SDQ36
(13,22,8) APU_SCLK0 SCL DQ36 169 36 VSS VSS 192
DDRB_SDQ37
166 DQ37 183 DDRB_SDQ38 39 VSS VSS 193
SA1_DIM1 260 SA2 DQ38 182 DDRB_SDQ39 40 VSS VSS 196
SA0_DIM1 256 SA1 DQ39 179 43 VSS VSS 197
SA0 DQS4(T) 177 DDRB_SDQS4 (13,5) 44 VSS VSS 201
+1.2V_VDDQ_S3 DQS4#(C) DDRB_SDQS4# (13,5) 47 VSS VSS 202
92 195 DDRB_SDQ[40..47] (13,5) 48 VSS VSS 205
DDRB_SDQ40
91 CB0_NC DQ40 194 DDRB_SDQ41 51 VSS VSS 206
RD11 2 1MEM_MB_EVENT# 101 CB1_NC DQ41 207 DDRB_SDQ42 52 VSS VSS 209
105 CB2_NC DQ42 208 DDRB_SDQ43 56 VSS VSS 210
CB3_NC DQ43 Layout Note: VSS VSS
1K_0402_1% 88 191 DDRB_SDQ44 57 213
3 87 CB4_NC DQ44 190 DDRB_SDQ45 Place near JDIMM1 60 VSS VSS 214 3
100 CB5_NC DQ45 203 DDRB_SDQ46 61 VSS VSS 217
104 CB6_NC DQ46 204 DDRB_SDQ47 64 VSS VSS 218
97 CB7_NC DQ47 200 65 VSS VSS 222
95 DQS8(T) DQS5(T) 198 DDRB_SDQS5 (13,5) 68 VSS VSS 223
DQS8#(C) DQS5#(C) DDRB_SDQS5# (13,5) +2.5V_S3 69 VSS VSS 226
DDRB_SDQ[48..55] (13,5) 0.1uF*2 VSS VSS
216 DDRB_SDQ48 72 227
(13,5) DDRB_SDM[7..0]
DDRB_SDM0 12 DQ48 215 DDRB_SDQ49 180F*1 73 VSS VSS 230
DDRB_SDM1 33 DM0#/DBI0# DQ49 228 DDRB_SDQ50 77 VSS VSS 231
DM1#/DBI1# DQ50 VSS VSS
180P_0402_50V8J
DDRB_SDM2 54 229 DDRB_SDQ51 1 1 1 78 234
DM2#/DBI2# DQ51 VSS VSS
CD27
DDRB_SDM3 75 211 DDRB_SDQ52 81 235
+3VS_S0 +3VS_S0 DM3#/DBI3# DQ52 VSS VSS
0.1U_0402_25V6
CD26
0.1U_0402_25V6
DDRB_SDM4 178 212 DDRB_SDQ53 CD25 82 238
DDRB_SDM5 199 DM4#/DBI4# DQ53 224 DDRB_SDQ54 85 VSS VSS 239
DDRB_SDM6 220 DM5#/DBI5# DQ54 225 DDRB_SDQ55 2 2 2 +1.2V_VDDQ_S3 86 VSS VSS 243
DDRB_SDM7 241 DM6#/DBI6# DQ55 221 89 VSS VSS 244
DM7#/DBI7# DQS6(T) DDRB_SDQS6 (13,5) VSS VSS
1
96 219 90 247
DM8#/DBI8# DQS6#(C) DDRB_SDQS6# (13,5) 93 VSS VSS 248
@
RD20 RD21 94 VSS VSS 251
4.7K_0402_5% 98 VSS VSS 252
DDRB_SDQ[56..63] (13,5) VSS VSS
2
4.7K_0402_5% 237 DDRB_SDQ56
2
1
DQ60
1
Security Classification
2014/05/19
Compal Secret Data
2015/12/31 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDR4_DIMM1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 12 of 56
A B C D E
A B C D E
+1.2V_VDDQ_S3 +1.2V_VDDQ_S3
Layout Note:
180P_0402_50V8J
CD46
Place near JDIMM2 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CD31
0.1U_0402_25V6
CD40
0.1U_0402_25V6
CD41
0.1U_0402_25V6
CD42
0.1U_0402_25V6
CD43
0.1U_0402_25V6
CD45
0.1U_0402_25V6
CD44
0.1U_0402_25V6
CD16
0.1U_0402_25V6
CD20
0.1U_0402_25V6
CD23
0.1U_0402_25V6
CD28
0.1U_0402_25V6
CD30
0.1U_0402_25V6
CD29
2 2 2 2 2 2 2 2 2 2 2 2 2 2
100U_1206_6.3V6M
@ @ @ @ @ @
CD48
(5) DDRB_ODT2 ODT0 DQ10 0_0603_5%
161 42 DDRB_SDQ11 164 257
1000P_0402_50V7K
(5) DDRB_ODT3 ODT1 DQ11 2 VREFCA VPP1
1U_0402_6.3V6K
24 DDRB_SDQ12 1 259 2
115 DQ12 25 DDRB_SDQ13 VPP2
0.1U_0402_25V6
(12,5) DDRB_BG0 BG0 DQ13 1
CD51
113 38 DDRB_SDQ14 1 99
CD64
(12,5) DDRB_BG1 BG1 DQ14 VSS VSS
0.1U_0402_25V6
CD33
150 37 DDRB_SDQ15 2 102
(12,5) DDRB_SBS0# 145 BA0 DQ15 34 2 5 VSS VSS 103 1
(12,5) DDRB_SBS1# BA1 DQS1(T) 32 DDRB_SDQS1 (12,5) 2 6 VSS VSS 106
(12,5) DDRB_SMA[0..13] 144 DQS1#(C) DDRB_SDQS1# (12,5) 9 VSS VSS 107
DDRB_SMA0
133 A0 50 DDRB_SDQ[16..23] (12,5) 10 VSS VSS 167
DDRB_SMA1 DDRB_SDQ16
2 DDRB_SMA2 132 A1 DQ16 49 DDRB_SDQ17 14 VSS VSS 168 2
DDRB_SMA3 131 A2 DQ17 62 DDRB_SDQ18 15 VSS VSS 171
DDRB_SMA4 128 A3 DQ18 63 DDRB_SDQ19 18 VSS VSS 172
A4 DQ19 Layout Note: VSS VSS
DDRB_SMA5 126 46 DDRB_SDQ20 19 175
DDRB_SMA6 127 A5 DQ20 45 DDRB_SDQ21 Place near JDIMM2 22 VSS VSS 176
DDRB_SMA7 122 A6 DQ21 58 DDRB_SDQ22 23 VSS VSS 180
DDRB_SMA8 125 A7 DQ22 59 DDRB_SDQ23 26 VSS VSS 181
DDRB_SMA9 121 A8 DQ23 55 27 VSS VSS 184
146 A9 DQS2(T) 53 DDRB_SDQS2 (12,5) 30 VSS VSS 185
DDRB_SMA10
120 A10_AP DQS2#(C) DDRB_SDQS2# (12,5) +2.5V_S3 31 VSS VSS 188
DDRB_SMA11 0.1uF*2
119 A11 70 DDRB_SDQ[24..31] (12,5) 35 VSS VSS 189
DDRB_SMA12 DDRB_SDQ24
DDRB_SMA13 158 A12 DQ24 71 DDRB_SDQ25 180F*1 36 VSS VSS 192
A13 DQ25 VSS VSS
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151 83 DDRB_SDQ26 39 193
(12,5) DDRB_SW E# A14_WE# DQ26 VSS VSS
180P_0402_50V8J
156 84 DDRB_SDQ27 1 1 1 40 196
(12,5) DDRB_SCAS# A15_CAS# DQ27 VSS VSS
CD57
152 66 DDRB_SDQ28 43 197
(12,5) DDRB_SRAS# A16_RAS# DQ28 VSS VSS
0.1U_0402_25V6
CD55
0.1U_0402_25V6
CD56
67 DDRB_SDQ29 44 201
+1.2V_VDDQ_S3 114 DQ29 79 DDRB_SDQ30 47 VSS VSS 202
(12,5) DDRB_ACT# ACT# DQ30 80 2 2 2 48 VSS VSS 205
0_0402_5% DDRB_SDQ31
RD16 1 @ 2 D2_PAR 143 DQ31 76 51 VSS VSS 206
PARITY DQS3(T) DDRB_SDQS3 (12,5) VSS VSS
RD12 2 1 1K_0402_1% DIM2_ALERT# 116 74 52 209
134 ALERT# DQS3#(C) DDRB_SDQS3# (12,5) 56 VSS VSS 210
MEM_MB_EVENT#
(12,5) MEM_MB_EVENT# 108 EVENT# 174 DDRB_SDQ[32..39] (12,5) 57 VSS VSS 213
DDRB_SDQ32
(12,5) MEM_MB_RST# RESET# DQ32 173 60 VSS VSS 214
DDRB_SDQ33
DQ33 187 DDRB_SDQ34 61 VSS VSS 217
254 DQ34 186 DDRB_SDQ35 64 VSS VSS 218
(12,22,8) APU_SDATA0 253 SDA DQ35 170 65 VSS VSS 222
DDRB_SDQ36
(12,22,8) APU_SCLK0 SCL DQ36 169 68 VSS VSS 223
DDRB_SDQ37
166 DQ37 183 DDRB_SDQ38 69 VSS VSS 226
SA1_DIM2 260 SA2 DQ38 182 DDRB_SDQ39 72 VSS VSS 227
SA0_DIM2 256 SA1 DQ39 179 73 VSS VSS 230
SA0 DQS4(T) 177 DDRB_SDQS4 (12,5) 77 VSS VSS 231
3 DQS4#(C) DDRB_SDQS4# (12,5) 78 VSS VSS 234 3
92 195 DDRB_SDQ[40..47] (12,5) 81 VSS VSS 235
DDRB_SDQ40
91 CB0_NC DQ40 194 DDRB_SDQ41 82 VSS VSS 238
101 CB1_NC DQ41 207 DDRB_SDQ42 85 VSS VSS 239
105 CB2_NC DQ42 208 DDRB_SDQ43 86 VSS VSS 243
CB3_NC DQ43 Layout Note: VSS VSS
88 191 DDRB_SDQ44 89 244
87 CB4_NC DQ44 190 DDRB_SDQ45 Place near JDIMM2 90 VSS VSS 247
100 CB5_NC DQ45 203 DDRB_SDQ46 93 VSS VSS 248
104 CB6_NC DQ46 204 DDRB_SDQ47 94 VSS VSS 251
97 CB7_NC DQ47 200 98 VSS VSS 252
95 DQS8(T) DQS5(T) 198 DDRB_SDQS5 (12,5) VSS VSS
DQS8#(C) DQS5#(C) DDRB_SDQS5# (12,5) +0.6VS_VTT_S0 262 261
DDRB_SDQ[48..55] (12,5) 4.7uF*1 GND GND
216 DDRB_SDQ48
(12,5) DDRB_SDM[7..0]
DDRB_SDM0 12 DQ48 215 DDRB_SDQ49 0.1uF*1
DDRB_SDM1 33 DM0#/DBI0# DQ49 228 DDRB_SDQ50
DDRB_SDM2 54 DM1#/DBI1# DQ50 229 DDRB_SDQ51 LOTES_ADDR0106_P06A
4.7U_0603_6.3V6K
DM2#/DBI2# DQ51 1 1
75 211
CD49
DDRB_SDM3 DDRB_SDQ52
DDRB_SDM4 178 DM3#/DBI3# DQ52 212 DDRB_SDQ53 CD50
DM4#/DBI4# DQ53 CONN@
DDRB_SDM5 199 224 DDRB_SDQ54
.1U_0402_16V7K
236 DDRB_SDQ57
DQ57 249 DDRB_SDQ58
RD24 RD25 DQ58 250 DDRB_SDQ59
4.7K_0402_5% DQ59 232 DDRB_SDQ60
4.7K_0402_5% DQ60 233 DDRB_SDQ61
2
@
RD26 RD27
4.7K_0402_5% @ 4.7K_0402_5% CONN@
LOTES_ADDR0106_P06A Security Classification Compal Secret Data Compal Electronics, Inc.
2
UV1A
DIS@
AF30 AH30 PCIE_GTX_CRX_P0 CV1 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P0 AE31 PCIE_RX0P PCIE_TX0P AG31 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P0 (6)
PCIE_GTX_CRX_N0 CV2
(6) PCIE_CTX_GRX_N0 PCIE_RX0N PCIE_TX0N PCIE_GTX_C_CRX_N0 (6)
DIS@
A
DIS@ A
AE29 AG29 PCIE_GTX_CRX_P1 CV3 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P1 AD28 PCIE_RX1P PCIE_TX1P AF28 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P1 (6)
PCIE_GTX_CRX_N1 CV4
(6) PCIE_CTX_GRX_N1 PCIE_RX1N PCIE_TX1N PCIE_GTX_C_CRX_N1 (6)
DIS@
DIS@
AD30 AF27 PCIE_GTX_CRX_P2 CV5 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P2 AC31 PCIE_RX2P PCIE_TX2P AF26 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P2 (6)
PCIE_GTX_CRX_N2 CV6
(6) PCIE_CTX_GRX_N2 PCIE_RX2N PCIE_TX2N PCIE_GTX_C_CRX_N2 (6)
DIS@
DIS@
AC29 AD27 PCIE_GTX_CRX_P3 CV7 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P3 AB28 PCIE_RX3P PCIE_TX3P AD26 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P3 (6)
PCIE_GTX_CRX_N3 CV8
(6) PCIE_CTX_GRX_N3 PCIE_RX3N PCIE_TX3N PCIE_GTX_C_CRX_N3 (6)
DIS@
BR_DIS@
AB30 AC25 PCIE_GTX_CRX_P4 CV9 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P4 AA31 PCIE_RX4P PCIE_TX4P AB25 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P4 (6)
PCIE_GTX_CRX_N4 CV10
(6) PCIE_CTX_GRX_N4 PCIE_RX4N PCIE_TX4N PCIE_GTX_C_CRX_N4 (6)
BR_DIS@
BR_DIS@
AA29 Y23 PCIE_GTX_CRX_P5 CV11 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P5 Y28 PCIE_RX5P PCIE_TX5P Y24 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P5 (6)
PCIE_GTX_CRX_N5 CV12
(6) PCIE_CTX_GRX_N5 PCIE_RX5N PCIE_TX5N PCIE_GTX_C_CRX_N5 (6)
BR_DIS@
DIS@
Y30 AB27 PCIE_GTX_CRX_P6 CV13 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P6 W31 PCIE_RX6P PCIE_TX6P AB26 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P6 (6)
PCIE_GTX_CRX_N6 CV14
(6) PCIE_CTX_GRX_N6 PCIE_RX6N PCIE_TX6N PCIE_GTX_C_CRX_N6 (6)
DIS@
BR_DIS@
W29 Y27 PCIE_GTX_CRX_P7 CV15 1 2 0.22U_0402_6.3V6K
(6) PCIE_CTX_GRX_P7 V28 PCIE_RX7P PCIE_TX7P Y26 1 2 0.22U_0402_6.3V6K PCIE_GTX_C_CRX_P7 (6)
PCIE_GTX_CRX_N7 CV16
(6) PCIE_CTX_GRX_N7 PCIE_RX7N PCIE_TX7N PCIE_GTX_C_CRX_N7 (6)
BR_DIS@
V30 W24
U31 NC#V30 NC#W24 W23
NC#U31 NC#W23
B B
U29 V27 No Use GPU Display Port outpud
T28 NC#U29 NC#V27 U26
NC#T28 NC#U26
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P30 T24
N31 NC#P30 NC#T24 T23 AL15
NC#N31 NC#T23 TXCAP_DPA3P AK14
TXCAM_DPA3N
N29 P27 AH16
M28 NC#N29 NC#P27 P26 TX0P_DPA2P AJ15
NC#M28 NC#P26 TX0M_DPA2N
AL17
M30 P24 TX1P_DPA1P AK16
L31 NC#M30 NC#P24 P23 TX1M_DPA1N
NC#L31 NC#P23 AH18
TX2P_DPA0P AJ17
L29 M27 TX2M_DPA0N
K30 NC#L29 NC#M27 N26 AL19
NC#K30 NC#N26 NC_TXOUT_L3P AK18
NC_TXOUT_L3N
TMDP
CLOCK
C CLK_PEG_VGA AK30 C
(9) CLK_PEG_VGA AK32 PCIE_REFCLKP AH20
CLK_PEG_VGA#
2 1 GPU_RST# (9) CLK_PEG_VGA# PCIE_REFCLKN +0.95VGS_S0 TXCBP_DPB3P AJ19
APU_PCIE_RST# @
RV6 100_0402_5% TXCBM_DPB3N
CALIBRATION RV1 AL21
+3VGS_S0 Y22 CALR_TX 1 DIS@ 2 1.69K_0402_1% TX3P_DPB2P AK20
PCIE_CALR_TX TX3M_DPB2N
RV2 1 DIS@ 21K_0402_5% TEST_PG N10 AA22 CALR_RX 1 DIS@ 2 1K_0402_1% AH22
TEST_PG PCIE_CALR_RX TX4P_DPB1P
5
1K_0402_1%
1
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R16M-M1-30(1/5)_PCIE/DP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 14 of 56
1 2 3 4 5
1 2 3 4 5
UV1B U?
+1.8VGS_S0
AF2
PS_0[3:1]=001
NC#AF2 AF4
NC#AF4 PS_0[5:4]=11
1
N9 AG3 DIS@
L9 DBG_DATA16 NC#AG3 AG5 RV9
AE9 DBG_DATA15 NC#AG5 8.45K_0402_1%
DPA
Y11 DBG_DATA14 AH3
2
AE8 DBG_DATA13 NC#AH3 AH1 PS_0
AD9 DBG_DATA12 NC#AH1
DBG_DATA11
1
AC10 AK3
0.68U_0402_10V
DBG_DATA10 NC#AK3 1
AD7 AK1 DIS@
AC8 DBG_DATA9 NC#AK1 CV18 RV10
DVO
AC7 DBG_DATA8 AK5 2K_0402_1%
A AB9 DBG_DATA7 NC#AK5 AM3 @ 2 A
2
AB8 DBG_DATA6 NC#AM3
AB7 DBG_DATA5 AK6
AB4 DBG_DATA4 NC#AK6 AM5
AB2 DBG_DATA3 NC#AM5
DPB
Y8 DBG_DATA2 AJ7
Y7 DBG_DATA1 NC#AJ7 AH6
Strap Name :
DBG_DATA0 NC#AH6
AK8
PS_0[1] ROM_CONFIG[0]
NC#AK8 AL7
NC#AL7 PS_0[2] ROM_CONFIG[1]
W6
PS_0[3] ROM_CONFIG[2]
V6 NC#W6
NC#V6 V4
PS_0[4] N/A
AC6 NC#V4 U5
AC5 NC#AC5 NC#U5 PS_0[5] AUD_PORT_CONN_PINSTRAP[0]
NC#AC6 W3
AA5 NC#W3 V2
Add GPU_VR_HOT# on GPIO5 1228 AA6 NC#AA5 NC#V2 +1.8VGS_S0
+3VGS_S0 NC#AA6 DPC
Y4
PS_1[3:1]=001
NC#Y4 W5
Capacitor Divider Lookup Lable
NC#W5 PS_1[5:4]=11
1
1@ 2 RV31 U1 AA3 PLL_ANALOG_OUT 1 DIS@ 2 DIS@
Strap Name :
4.7K_0402_5% W1 NC#U1 NC#AA3 Y2 RV13 RV11
Cap (nF) Bitd [5:4]
0_0402_5% 1 FB_VDDCI U3 NC#W1 NC#Y2 16.2K_0402_1% 8.45K_0402_1%
PS_1[1] STRAP_BIF_GEN3_EN_A
RV741 2 VGA_GPIO5 TV1 Y6 NC#U3 J8
(47) GPU_VR_HOT# PS_1[2] TRAP_BIF_CLK_PM_EN 680nF 00
2
DIS@ 1 PLL_ANALOG_IN AA1 NC#Y6 NC#J8 PS_1
TV2 NC#AA1
PS_1[3] N/A 82nF 01
1
0.68U_0402_10V
1
+3VGS_S0 DIS@ PS_1[4] STRAP_TX_CFG_DRV_FULL_SWING 10nF 10
CV19 RV12
2
2
10K_0402_5% 10K_0402_5% R1
DIS@ DIS@ R3 SCL
B SDA B
DIS@ Resistor Divider Lookup Lable
1
GPIO_0
2
1
DIS@ DIS@ U8 VGA_SMB_DA2
RV38 RV37 U7 VGA_SMB_CK2 SMBDATA AH24 RV18 AMD recommend 09/25 @
NC 4.75k 000
10K_0402_5% 10K_0402_5% T9 VGA_GPIO5 SMBCLK B AG25 RV14
Strap Name :
4.7K_0402_5% 8.45k 2k 001
1
1
2
P10 GPIO_7_BLON HSYNC AJ27 VSYNC PS_2
1G_ROMSO P4 GPIO_8_ROMSO VSYNC PS_2[2] N/A
TV6 GPIO_9_ROMSI 6.98k 4.99k 011
1
1G_ROMSI P2
PS_2[3] STRAP_BIOS_ROM_EN
0.68U_0402_10V
TV7 GPIO_10_ROMSCK 1
1G_ROMSCK N6 AD22 RV19 @ DIS@
TV8 @ 4.53k 4.99k 100
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N5 GPIO_11 RSET CV20 RV17
@
N3 GPIO_12 AG24
4.7K_0402_5%
DIS@ 4.75K_0402_1%
PS_2[4] STRAP_BIF_VGA_DIS
+3VGS_S0
@
Y9 GPIO_13 AVDD AE22 2 3.24k 5.62k 101
PS_2[5] N/A
2
GPU_VID3 N1 GPIO_14_HPD2 AVSSQ
M4 GPIO_15_PWRCNTL_0 AE23
3.4k 10k 110
GPIO_16 VDD1DI Pull down for none OBFF design
RV27 2 DIS@ 1 THM_ALERT# R6 AD23
4.75k NC 111
4.7K_0402_5% W10 GPIO_17_THERMAL_INT VSS1DI
GPIO19_CTF M2 GPIO_18
GPU_VID1 P8 GPIO_19_CTF FutureASIC/SEYMOUR/PARK
AM12
0402 1% resistors are equired
+3VGS_S0 P7 GPIO_20_PWRCNTL_1 CEC_1
RPV1 @ 1 G_ROMCSB N8 GPIO_21 ZZZ4
TV9 GPIO_22_ROMCSB
1 8 JTAG_TRSTB AK10 AK12
2 7 JTAG_TDI AM10 GPIO_29 RSVD#AK12 AL11
@ GPIO_30 RSVD#AL11
3 6 JTAG_TMS N7 AJ11
4 5 (8) VGA_CLKREQ# CLKREQB RSVD#AJ11
JTAG_TCK Hynix 1G
JTAG_TRSTB L6
10K_8P4R_5% JTAG_TDI L5 JTAG_TRSTB
JTAG_TCK L3 JTAG_TDI H1G@
JTAG_TMS L1 JTAG_TCK AL13 Part Number = X7668038L01
+3VGS_S0 5.11K_0402_5% JTAG_TDO K4 JTAG_TMS GENLK_CLK AJ13
1 @ 2 TESTEN K7 JTAG_TDO GENLK_VSYNC ZZZ5
C +3VGS_S0 C
RV30 1 @ 2 10K_0402_5% JTAG_TDO RV25 AF24 TESTEN
1 DIS@ 2 NC#AF24 AG13
RV28 2 @ 1 4.7K_0402_5% GPU_GPIO5 RV26 SWAPLOCKA AH12
1K_0402_5% AB13 SWAPLOCKB Micron 1G
RV29 1 @ 2 4.7K_0402_5% W8 GENERICA
W9 GENERICB
W7 GENERICC AC19 PS_0
RV7/RV8 modify to 4.7K 0303 GENERICD PS_0
M1G@
AD10 Part Number = X7668038L02
+3VGS_S0 AJ9 GENERICE AD19 PS_1
1 AL9 AL9 NC#AJ9 PS_1 ZZZ6
TV4 NC#AL9 X7668038L01 : RV20 = NC , RV22 = 4.75K
AE17 PS_2 X7668038L02 : RV20 = 8.45K , RV22 = 2K
AC14 PS_2
@ HPD1 X7668038L03 : RV20 = 4.53K , RV22 = 2K
1 PX_ENAB16 AE20 PS_3 X7668038L04 : RV20 = 6.98K , RV22 = 4.99K
TV5
1
PX_EN PS_3
1
RV7 RV8 @
G
AE19 +1.8VGS_S0
4.7K_0402_5%
4.7K_0402_5%
1
6 1 VGA_SMB_DA2
Strap Name :
S
(36,38,7) EC_SMB_DA0
+3VGS_S0 @ ZZZ7
D
PLL/CLOCK AE5
PS_3[2] BOARD_CONFIG[1] (Memory ID)
2
DDC1DATA RV21 PS_3 Samsung 2G
3 4 VGA_SMB_CK2 AD2 1K_0402_1% PS_3[3] BOARD_CONFIG[2] (Memory ID)
S
1
AD4
D
0.68U_0402_10V
AUX1N DIS@ 1
CV21
@ PS_3[4] AUD_PORT_CONN_PINSTRAP[1] S2G@
2
XTALIN XTALOUT D 2
2
DIS@ XTALIN AM28 AD13 GPIO19_CTF 2 QV7
1M_0402_5% XTALOUT AK28 XTALIN AUX2P AD11
XTALOUT AUX2N
active high G DIS@
2
10K_0402_5% S L2N7002WT1G_SC-70-3
3
UV1E @ U?
+1.8VS TO +1.8VGS
+0.95VS TO +0.95VGS AA27
AB24
AB32
GND
GND
GND
GND
A3
A30
AA13
GND GND
Load switch No Use GPU Display Port outpud AC24
AC26
AC27
GND
GND
GND
GND
AA16
AB10
AB15
+1.8VGS_S0 AD25 GND GND AB6
AD32 GND GND AC9
UV1G @ U? GND GND
modify 1209 AE27
GND GND
AD6
1CV121
AF32 AD8
CV26
CV25
DP POWER NC/DP POWER GND GND
AG27 AE7
A +0.95VS_+1.05VS_S0 1 1 GND GND A
AG15 AE11 AH32 AG12
DP_VDDR#AG15 NC#AE11 K28 GND GND AH10
VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=15mohm AG16 AF11 GND GND
AF16 DP_VDDR#AG16 NC#AF11 AE13 K32 AH28
10U_0603_6.3V6M
1U_0402_6.3V6K
CV106 DP_VDDR#AF16 NC#AE13 L27 GND GND B10
2 2
0.1U_0402_16V7K
AG17 AF13
2
M32 GND GND B12
DIS@
+0.95VGS = 1916mA AG18 DP_VDDR#AG17 NC#AF13 AG8
DIS@
DIS@
GND GND
1U_0402_6.3V6K
DIS@
VIN1 VOUT1 AG20 AF6 GND GND
CV107
RV72 DP_VDDC#AG20 NC#AF6 U25 B6
AG21 AF7 GND GND
0.1U_0402_16V7K
DGPU_PW R_EN 2 1 DGPU_PW R_EN_R 3 12 0.95VGS_CT 1 @2 DP_VDDC#AG21 NC#AF7 U27 B8
2
ON1 CT1 +0.95VGS_S0 AF22 AF8 GND GND
150K_0402_5% 2200P_0402_50V7K CV108 DP_VDDC#AF22 NC#AF8 V32 C1
AG22 AF9 GND GND
4 11 AD14 DP_VDDC#AG22 NC#AF9 W25 C32
+5VALW _S5 VBIAS GND GND GND
0.1U_0402_16V7K
DP_VDDC#AD14 W26 E28
1
GND GND
0.1U_0402_16V7K
DIS@
CV27
ON2 CT2 GND GND
1
1
0_0603_5% AG14 AE1
7 VIN2 VOUT2 8 +1.8VGS_LS RV41 1 DIS@ 2 DP_VSSR NC#AE1 GND GND F16
AH14 AE3
2
DIS@
AM14 AG1
1U_0402_6.3V6K
CV28
GND
CV111
2
15 2 AM16 DP_VSSR NC#AG1 AG6 F2
DIS@
GPAD DP_VSSR NC#AG6 GND F20
AM18 AH5
DIS@
2
RT9740AGQW W DFN-14TL DP_VSSR NC#AH5 M6 GND F22
AF23 AF10 GND GND
SA00007VD00 AG23 DP_VSSR NC#AF10 AG9 N13 F24
GND GND
0.1U_0402_16V7K
1 +1.8VGS = 311mA DP_VSSR NC#AG9 N16 F26
1
DIS@ AM20 AH8 GND GND
modify 1209 @ CV112 AM22 DP_VSSR NC#AH8 AM6 N18 F6
DP_VSSR NC#AM6 N21 GND GND F8
1st source : RT9740AGQW (SA00007VD00) AM24 AM8 GND
GND
GND
1U_0402_6.3V6K
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U9 K6
V13 GND GND
modify 1209 QV2 GND
V16
+3VS_S0 AO3416L_SOT23-3 +3VGS_S0 V18 GND
DIS@ Y10 GND
Y15 GND
1 3 4.7U_0603_6.3V6K Y17 GND
RV73 change to 10K
D
1 1 R11 A32
1
CV29 DIS@ T11 GND VSS_MECH AM1
G
2
GND VSS_MECH
2
RV42
CV30
AA11 AM32
RV73 DIS@ DIS@ 680_0603_5% M12 GND VSS_MECH
3VGS_EN
2 2 N11 GND
QV2 change to NMOS 12/24 10K_0402_5% GND
3VGS_DIS 2 V11
DIS@ GND
1
DIS@
+12VALW _S5 3VGS_EN_R 1 2 S IC 216-0867-071 R16M-M1-30 FCBGA
0.1U_0402_16V7K
RV47 10K_0402_5%
3
L2N7002DW 1T1G_SC88-6
C DIS@ C
1
DIS@ D
RV46 DIS@ DGPU_PW R_EN# 5 20K_0402_5% QV3 2
QV5B RV75 DIS@ G +0.95VGS_S0
1
6
3
4
SB00000ST00
2
CV31
2
DIS@
2
2 RV45
(47,8) DGPU_PW R_EN
L2N7002DW 1T1G_SC88-6 RV43 RV44 470_0603_5%
DGPU_PW R_EN# 470_0603_5% 470_0603_5% DIS@
QV5A
1
DIS@ DIS@
1
3VGS_EN_R add RV75 to GND for 3VGS_EN = 8V 01/26
1.8VGS_DISCHARGE
1
6 0.95VGS_DISCHARGE
All the ASIC supplies must reach their respective nominal voltages within 20 ms
1VGA_CORE_DISCHARGE
of the start of the ramp-up sequence, though a shorter ramp-up duration is
DGPU Power Sequence preferred. The maximum slew rate on all rails is 50 mV/µs.
1.the 3.3-V rail ramp up first.
2.the 0.95-V rail reach at least 90% of its nominal value
no later than 2 ms from the start of VDDC ramping up
3
DIS@
D L2N7002DW 1T1G_SC88-6 5 DGPU_PW R_EN# DIS@ 2 DGPU_PW R_EN#
DGPU_PW R_EN# 2 QV6 QV4B
DIS@ G L2N7002DW 1T1G_SC88-6
4
L2N7002W T1G_SC-70-3 QV4A
1
S
3
SB00000ST00
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R16M-M1-30 (3/5)_PWR/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 16 of 56
1 2 3 4 5
1 2 3 4 5
A A
+1.5V_VRM_S0
UV1D @ +1.8VGS_S0
U?
PCIE
MEM I/O
CV36
CV32
H13 AB23 1 1
H16 VDDR1 NC#AB23 AC23
VDDR1 NC#AC23
CV37
CV33
CV39
H19 AD24
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1 1 1 VDDR1 NC#AE24
1
2.2U_0402_16V6K CV41
2.2U_0402_16V6K CV42
2.2U_0402_16V6K CV43
2.2U_0402_16V6K CV44
2.2U_0402_16V6K CV45
J23 AE25 2 2
J24 VDDR1 NC#AE25 AE26
DIS@
DIS@
J9 VDDR1 NC#AE26 AF25
DIS@ 2
DIS@ 2
DIS@ 2
DIS@ 2
DIS@ 2
2 2 2 VDDR1 NC#AF25
@
K10 AG26
DIS@
DIS@
CV51
CV52
CV54
CV50
CV53
CV55
T22
+1.8VGS_S0 LEVEL PCIE_VDDC U22
TRANSLATION PCIE_VDDC 1 1 1 1 1 1
V22
AA20 PCIE_VDDC
AA21 VDD_CT
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VDD_CT 2 2 2 2 2 2
CV56
AB20 AA15
B VDD_CT VDDC B
@
AB21 CORE N15
DIS@
DIS@
DIS@
DIS@
DIS@
1 VDD_CT VDDC N17
+3VGS_S0 VDDC R13
I/O VDDC R16
1U_0402_6.3V6K
2 AA17 VDDC R18
AA18 VDDR3 VDDC Y21
DIS@
VDDR3 VDDC
CV57
AB17 T12
AB18 VDDR3 VDDC T15 +VGA_CORE_S0
1 VDDR3 VDDC T17
V12 VDDC T20
Y12 VDDR4 VDDC U13 VDDC+VDDCI =28A MAX
1U_0402_6.3V6K
2 U12 VDDR4 VDDC U16
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VDDR4 VDDC U18
DIS@
VDDC V21 VGA_CORE Caps in power side sheet
VDDC V15
VDDC V17
VDDC V20
VDDC
POWER
Y13
VDDC Y16
VDDC Y18
VDDC AA12
VDDC M11
VDDC N12
VDDC U11
1.8V MAX 160 mA VDDC
+1.8VGS_S0
DIS@ PLL
LV2 1 2 0_0603_5% +MPLL_PVDD
+0.95VGS_S0
10U_0603_6.3V6M
1U_0402_6.3V6K
CV58
CV59
CV117
R21
0.1U_0402_16V4Z
C BIF_VDDC U21 C
1 1 1 BIF_VDDC
L8
+1.8VGS_S0 MPLL_PVDD
DIS@
2 2 2 +VGA_CORE_S0
CV61
DIS@
DIS@
ISOLATED
LV3 1 2 0_0402_5% +SPLL_PVDD CORE I/O 1
M13
VDDCI
10U_0603_6.3V6M
1U_0402_6.3V6K
CV63
CV116
CV62
H7 M15
0.1U_0402_16V4Z
1U_0402_6.3V6K
1 1 1 VDDCI 2
M17
+0.95VGS_S0 VDDCI
@
M18
VDDCI M20
DIS@
LV4
SPLL_VDDC VDDCI N20
J7 VDDCI
DIS@ SPLL_PVSS
10U_0603_6.3V6M
1U_0402_6.3V6K
CV64
CV65
CV115
0.1U_0402_16V4Z
1 1 1
VGA_CORE Caps in power side sheet
S IC 216-0867-071 R16M-M1-30 FCBGA
DIS@
?
2 2 2
DIS@
DIS@
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R16M-M1-30(4/5)_PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 17 of 56
1 2 3 4 5
1 2 3 4 5
@
UV1C U?
GDDR5/DDR3 GDDR5/DDR3
M_DA[63..32] M_DA0 K27 K17 MAA0_0
(20) M_DA[63..32] DQA0_0 MAA0_0/MAA_0 MAA0_0 (19)
M_DA1 J29 J20 MAA0_1
M_DA[31..0] DQA0_1 MAA0_1/MAA_1 MAA0_1 (19)
A M_DA2 H30 H23 MAA0_2 A
(19) M_DA[31..0] DQA0_2 MAA0_2/MAA_2 MAA0_2 (19)
M_DA3 H32 G23 MAA0_3
DQA0_3 MAA0_3/MAA_3 MAA0_3 (19)
M_DA4 G29 G24 MAA0_4
DQA0_4 MAA0_4/MAA_4 MAA0_4 (19)
M_DA5 F28 H24 MAA0_5
DQA0_5 MAA0_5/MAA_5 MAA0_5 (19)
M_DA6 F32 J19 MAA0_6
DQA0_6 MAA0_6/MAA_6 MAA0_6 (19)
M_DA7 F30 K19 MAA0_7
DQA0_7 MAA0_7/MAA_7 MAA0_7 (19)
M_DA8 C30 G20 MAA0_8
DQA0_8 MAA0_8/MAA_13 MAA0_8 (19)
M_DA9 F27 L17
M_DA10 A28 DQA0_9 MAA0_9/MAA_15
M_DA11 C28 DQA0_10 J14 MAA1_0
DQA0_11 MAA1_0/MAA_8 MAA1_0 (20)
M_DA12 E27 K14 MAA1_1
DQA0_12 MAA1_1/MAA_9 MAA1_1 (20)
M_DA13 G26 J11 MAA1_2
DQA0_13 MAA1_2/MAA_10 MAA1_2 (20)
M_DA14 D26 J13 MAA1_3
DQA0_14 MAA1_3/MAA_11 MAA1_3 (20)
M_DA15 F25 H11 MAA1_4
DQA0_15 MAA1_4/MAA_12 MAA1_4 (20)
M_DA16 A25 G11 MAA1_5
DQA0_16 MAA1_5/MAA_BA2 MAA1_5 (20)
M_DA17 C25 J16 MAA1_6
DQA0_17 MAA1_6/MAA_BA0 MAA1_6 (20)
M_DA18 E25 L15 MAA1_7
DQA0_18 MAA1_7/MAA_BA1 MAA1_7 (20)
M_DA19 D24 G14 MAA1_8
DQA0_19 MAA1_8/MAA_14 MAA1_8 (20)
M_DA20 E23 L16
MEMORY INTERFACE
M_DA21 F23 DQA0_20 MAA1_9/RSVD
M_DA22 D22 DQA0_21 E32 A0_W CK01
+1.5V_VRM_S0 DQA0_22 WCKA0_0/DQMA0_0 A0_W CK01 (19)
M_DA23 F21 E30 A0_W CK01#
DQA0_23 WCKA0B_0/DQMA0_1 A0_W CK01# (19)
M_DA24 E21 A21 A0_W CK23
DQA0_24 WCKA0_1/DQMA0_2 A0_W CK23 (19)
M_DA25 D20 C21 A0_W CK23#
DQA0_25 WCKA0B_1/DQMA0_3 A0_W CK23# (19)
M_DA26 F19 E13 A1_W CK01
DQA0_26 WCKA1_0/DQMA1_0 A1_W CK01 (20)
1
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DQA1_13 DDBIA1_1/QSA1_1B DDBIA1_1 (20)
M_DA46 F9 C5 DDBIA1_2
DQA1_14 DDBIA1_2/QSA1_2B DDBIA1_2 (20)
M_DA47 D8 H4 DDBIA1_3
+1.5V_VRM_S0 DQA1_15 DDBIA1_3/QSA1_3B DDBIA1_3 (20)
M_DA48 E7
M_DA49 A7 DQA1_16 L18 ADBIA0
DQA1_17 ADBIA0/ODTA0 ADBIA0 (19)
M_DA50 C7 K16 ADBIA1
DQA1_18 ADBIA1/ODTA1 ADBIA1 (20)
M_DA51 F7
DQA1_19
1
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
R16M-M1-30(5/5)_MEM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 18 of 56
1 2 3 4 5
5 4 3 2 1
1
(18) MAA0_3 BA3/A3 BA1/A5 DQ12 DQ20 N13 M_DA17
DQ13 DQ21 M11 M_DA18 DIS@ RV63
MAA0_7 K4 DQ14 DQ22 M13 M_DA16 2.37K_0402_1%
(18) MAA0_7 MAA0_1 H5 A8/A7 A10/A0 DQ15 DQ23 U4 M_DA24
(18) MAA0_1 MAA0_0 H4 A9/A1 A11/A6 DQ0 DQ24 U2 M_DA25
2
(18) MAA0_0 MAA0_6 K5 A10/A0 A8/A7 DQ1 DQ25 T4 M_DA26 VREFC_A0
(18) MAA0_6 A11/A6 A9/A1 DQ2 DQ26
1U_0402_6.3V6K
MAA0_8 J5 T2 M_DA27
1
(18) MAA0_8 A12/RFU/NC DQ3 DQ27 N4 M_DA29 RV64 1 1
DQ4 DQ28
CV113
A5 N2 M_DA30 5.49K_0402_1% CV72
RV60 U5 VPP/NC DQ5 DQ29 M4 M_DA31 820P_0402_50V7K
1 DIS@ 2 VPP/NC DQ6 DQ30 M2 M_DA28 DIS@ EMI@
DQ7 DQ31 2 2
1K_0402_1%
2
MF_A0 J1 +1.5V_VRM_S0 DIS@
RV61 1 DIS@ 2 1K_0402_1%A0_SEN J10 MF
RV62 1 DIS@ 2 121_0402_1% A0_ZQ J13 SEN B1 Near ball J14
ZQ VDDQ D1
VDDQ F1
J4 VDDQ M1
(18) ADBIA0 G3 ABI# VDDQ P1
(18) A0_RAS# G12 RAS# CAS# VDDQ T1
C (18) A0_CS# L3 CS# WE# VDDQ G2 +1.5V_VRM_S0 C
(18) A0_CAS# L12 CAS# RAS# VDDQ L2
(18) A0_W E# WE# CS# VDDQ B3 2 DIS@ 1 A0_CLK
VDDQ D3 60.4_0402_1% RV58
VDDQ F3
A0_W CK01# D5 VDDQ H3 2 DIS@ 1 A0_CLK#
(18) A0_W CK01# A0_W CK01 D4 WCK01# WCK23# VDDQ K3 60.4_0402_1% RV59
(18) A0_W CK01 WCK01 WCK23 VDDQ M3
A0_W CK23# P5 VDDQ P3
(18) A0_W CK23# A0_W CK23 P4 WCK23# WCK01# VDDQ T3
(18) A0_W CK23 WCK23 WCK01 VDDQ E5
VDDQ N5
A10 VDDQ E10
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U10 VREFD VDDQ N10
VREFC_A0 J14 VREFD VDDQ B12
VREFC VDDQ D12
VDDQ F12
VDDQ H12
J2 VDDQ K12
16 mil (18,20) DRAM_RST RESET# VDDQ M12
VDDQ P12 +1.5V_VRM_S0
VDDQ T12
VDDQ G13
1U_0402_6.3V6K
1U_0402_6.3V6K
VDDQ
10U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
H1 L13
VSS VDDQ 1 1
K1 B14 1 1 1 1 1 1 1
CV78
CV118
VSS VDDQ
CV79
CV73
CV88
CV75
CV76
CV77
CV119
B5 D14
G5 VSS VDDQ F14
L5 VSS VDDQ M14 2 2
VSS VDDQ 2 2 2 2 2 2 2
T5 P14 DIS@ DIS@
B10 VSS VDDQ T14 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
D10 VSS VDDQ
G10 VSS
B B
L10 VSS A1
P10 VSS VSSQ C1
T10 VSS VSSQ E1
VSS VSSQ
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
H14 N1
K14 VSS VSSQ R1 1 1 1 1 1 1 1 1
VSS VSSQ
CV86
CV80
CV81
CV82
CV83
CV84
CV85
CV87
+1.5V_VRM_S0 U1
VSSQ H2
G1 VSSQ K2
VDD VSSQ 2 2 2 2 2 2 2 2
L1 A3
G4 VDD VSSQ C3 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
L4 VDD VSSQ E3
C5 VDD VSSQ N3
R5 VDD VSSQ R3
C10 VDD VSSQ U3
R10 VDD VSSQ C4
D11 VDD VSSQ R4
G11 VDD VSSQ F5
L11
P11
VDD
VDD
VSSQ
VSSQ
M5
F10
建建建建
VDD VSSQ
G14
L14 VDD VSSQ
M10
C11
0.1ux8,1ux8,10ux1
VDD VSSQ
VSSQ
R11
A12 for 1pcs VRAM X32
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
170-BALL VSSQ U12
VSSQ H13
SGRAM GDDR5 VSSQ K13
VSSQ A14
A VSSQ A
C14
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VSSQ
K4G80325FB-HC03_BGA170
SA000094R00 X76@ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/03/01 Deciphered Date 2014/03/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GDDR5 VRAM A Lower
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 19 of 56
5 4 3 2 1
5 4 3 2 1
1
(18) MAA1_8 N4 M_DA63
A5 DQ4 DQ28 N2 M_DA61 DIS@ RV70
RV66 U5 VPP/NC DQ5 DQ29 M4 M_DA62 2.37K_0402_1%
1 DIS@ 2 VPP/NC DQ6 DQ30 M2 M_DA60
1K_0402_1% DQ7 DQ31
2
MF_A1 J1 +1.5V_VRM_S0 VREFC_A1
RV68 1 DIS@ 2 1K_0402_1% A1_SEN J10 MF
16 mil
1U_0402_6.3V6K
SEN
1
RV69 1 DIS@ 2 121_0402_1% A1_ZQ J13 B1 RV71 1 1
ZQ VDDQ
CV114
D1 5.49K_0402_1% CV89
VDDQ F1 820P_0402_50V7K
ADBIA1 J4 VDDQ M1 DIS@ EMI@
(18) ADBIA1 A1_RAS# G3 ABI# VDDQ P1 2 2
2
(18) A1_RAS# A1_CS# G12 RAS# CAS# VDDQ T1 DIS@
(18) A1_CS# A1_CAS# L3 CS# WE# VDDQ G2
C (18) A1_CAS# A1_W E# L12 CAS# RAS# VDDQ L2 C
(18) A1_W E# WE# CS# VDDQ Near ball J14
B3
VDDQ D3
VDDQ F3
A1_W CK01# D5 VDDQ H3
(18) A1_W CK01# D4 WCK01# WCK23# VDDQ K3
A1_W CK01
(18) A1_W CK01 WCK01 WCK23 VDDQ M3
A1_W CK23# P5 VDDQ P3
(18) A1_W CK23# P4 WCK23# WCK01# VDDQ T3
A1_W CK23
(18) A1_W CK23 WCK23 WCK01 VDDQ E5
VDDQ N5 +1.5V_VRM_S0
A10 VDDQ E10
VREFD VDDQ
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U10 N10
VREFC_A1 J14 VREFD VDDQ B12
10U_0805_6.3V6M
10U_0805_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
VREFC VDDQ D12
VDDQ 1 1 1 1 1 1 1 1 1
CV90
CV91
CV92
CV93
CV94
CV95
CV96
CV105
CV120
F12
VDDQ H12
J2 VDDQ K12
(18,19) DRAM_RST RESET# VDDQ M12 2 2 2 2 2 2 2 2 2
VDDQ P12 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
VDDQ T12
VDDQ G13
H1 VDDQ L13
K1 VSS VDDQ B14
B5 VSS VDDQ D14
G5 VSS VDDQ F14
L5 VSS VDDQ M14
T5 VSS VDDQ P14
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
B10 VSS VDDQ T14
VSS VDDQ 1 1 1 1 1 1 1 1
CV104
CV97
CV98
CV99
CV100
CV101
CV102
CV103
D10
G10 VSS
B L10 VSS A1 B
P10 VSS VSSQ C1 2 2 2 2 2 2 2 2
T10 VSS VSSQ E1 DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@ DIS@
H14 VSS VSSQ N1
K14 VSS VSSQ R1
+1.5V_VRM_S0 VSS VSSQ U1
VSSQ H2
G1 VSSQ K2
L1
G4
VDD
VDD
VSSQ
VSSQ
A3
C3
建建建建
VDD VSSQ
L4
C5 VDD VSSQ
E3
N3
0.1ux8,1ux8,10ux1
VDD VSSQ
R5
C10 VDD VSSQ
R3
U3 for 1pcs VRAM X32
R10 VDD VSSQ C4
D11 VDD VSSQ R4
G11 VDD VSSQ F5
L11 VDD VSSQ M5
P11 VDD VSSQ F10
G14 VDD VSSQ M10
L14 VDD VSSQ C11
VDD VSSQ R11
VSSQ A12
VSSQ C12
VSSQ E12
VSSQ N12
VSSQ R12
170-BALL VSSQ U12
VSSQ H13
SGRAM GDDR5 VSSQ K13
VSSQ A14
VSSQ C14
A A
VSSQ E14
VSSQ N14
VSSQ R14
VSSQ U14
VSSQ
K4G80325FB-HC03_BGA170
SA000094R00 X76@
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/03/01 Deciphered Date 2014/03/01 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GDDR5_A Upper
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
1.0
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 20 of 56
5 4 3 2 1
5 4 3 2 1
+3VS_DVCCTL_S0
Close to Pin18 Close to Pin22 +1.2VS_SW R_S0 External EEPROM Mode
Close to Pin17
CVT@ CVT@ CVT@ CVT@ +3VS_DVCCTL_S0
CVT@ CVT@ CVT@ @ CVT@ CCV6 CCV7 CCV8 CCV9
1 CCV1 1 CCV2 1 CCV3 1 CCV4 1 CCV5 1 1 1 1
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
@
2 2 2 2 2 2 2 2 2 UCV1
8 1
7 VCC A0 2
EESCL 6 WP A1 3
D SCL A2 D
EESDA 5 4
SDA GND
Close to
Close to L1 CAT24C64W I-GT3_SO8
Pin43
40mil
+3VS_AVCCTL_S0
Addr:A8 (1010 100x)
+3VS_AVCCTL_S0
Close to Pin5 60mil
Note:
+3VS_DVCCTL_S0 Pin 45,46,47 & 48 Pull-High
CVT@ CVT@ CVT@ when External EEPROM Mode.
1 CCV10 1 CCV11 1 CCV12
+3VS_S0
UCV2
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
PWR
1 2 5
HCB2012KF-221T30_2P DP_V33 39 LVDS_TXO1+_C RCV5 1 CVT@ 2 0_0402_5%
TXO1+ LVDS_TXO1+ (22,23)
17 40 LVDS_TXO1-_C RCV6 1 CVT@ 2 0_0402_5%
SWR_LX TXO1- LVDS_TXO1- (22,23)
15 37 LVDS_TXO2+_C RCV7 1 CVT@ 2 0_0402_5%
SWR_VCCK TXO2+ LVDS_TXO2+ (22,23)
38 LVDS_TXO2-_C RCV8 1 CVT@ 2 0_0402_5%
43 TXO2- LVDS_TXO2- (22,23)
VCCK
60mil TXO3+
33 LVDS_TXO3+_C RCV9 1 CVT@ 2 0_0402_5%
LVDS_TXO3+ (22,23)
11 34 LVDS_TXO3-_C RCV101 CVT@ 2 0_0402_5%
+1.2VS_SW R_S0 DP_V12 TXO3- LVDS_TXO3- (22,23)
LVDS
7 TXEC+ 26 LVDS_TXEC+ (22,23)
DP0_TXP0_C LVDS_TXEC-_C RCV121 CVT@ 2 0_0402_5%
LVDS_TXEC- (22,23)
DP0_TXN0_C 8 LANE0P TXEC-
LANE0N 31 LVDS_TXE0+_C RCV131 CVT@ 2 0_0402_5%
TXE0+ LVDS_TXE0+ (22,23)
DP0_TXP1_C 9 32 LVDS_TXE0-_C RCV141 CVT@ 2 0_0402_5%
eDP port DP0_TXN1_C 10 LANE1P TXE0- LVDS_TXE0- (22,23)
LANE1N +3VS_DVCCTL_S0 +3VS_DVCCTL_S0
DP
29 LVDS_TXE1+_C RCV151 CVT@ 2 0_0402_5%
TXE1+ LVDS_TXE1+ (22,23)
RCV161 @ 2 1K_0402_5% EDP_AUXP_C 4 30 LVDS_TXE1-_C RCV171 CVT@ 2 0_0402_5%
+3VS_DVCCTL_S0 AUX-CH_P TXE1- LVDS_TXE1- (22,23)
EDP_AUXN_C 3
AUX-CH_N
1
27 LVDS_TXE2+_C RCV181 CVT@ 2 0_0402_5% @
TXE2+ LVDS_TXE2+ (22,23)
EDP_HPD_R RCV191 CVT@ 2 1K_0402_5% EDP_HPD 1 28 LVDS_TXE2-_C RCV201 CVT@ 2 0_0402_5% CVT@
(22,7) EDP_HPD_R DP_HPD TXE2- LVDS_TXE2- (22,23) RCV21 RCV22
4.7K_0402_5%
www.teknisi-indonesia.com
RCV231 @ 2 100K_0402_5% 23 LVDS_TXE3+_C RCV241 CVT@ 2 0_0402_5% 4.7K_0402_5%
TXE3+ LVDS_TXE3+ (22,23)
24 LVDS_TXE3-_C RCV251 CVT@ 2 0_0402_5%
LVDS_TXE3- (22,23)
2
TXE3- EESDA EESCL
RCV26 1 @ 2 0_0402_5% PW MIN 21
(22,7) EDP_BKLCTL PWM_IN
1
2 46 EESCL
1 2 UCV3_DP_REXT 12 TESTMODE MIICSCL 45 EESDA
PIN45 CVT@
PIN46
DP_REXT MIICSDA
OTHERS
RCV27 CVT@ 12K_0402_1% RCV28
20 S_ENVDD 4.7K_0402_5%
PANEL_VCC 19 S_ENVDD (22,23)
S_INVT_PW M
2
48 PWMOUT 44 S_INVT_PW M (22,51)
MODE_CFG1 SC_BKOFF# RCV291 2
47 MODE_CFG1 BL_EN EC_BKOFF# (38,51)
MODE_CFG0 SC@ 0_0402_5%
MODE_CFG0 DVT : change placement to TOP side Converter Board
6 +3VS_S0
RCV30 1 @ 2 0_0402_5% CIISCL 13 DP_GND
To EC (22,38,51) EC_SMB_CK2 CIICSCL
0.1U_0402_16V4Z
GND
RCV31 1 @ 2 0_0402_5% CIISDA 14 16
(22,38,51) EC_SMB_DA2 CIICSDA SWR_GND
1
49 CCV13 +3VS_DVCCTL_S0 +3VS_DVCCTL_S0
PAD @
B CVT@ B
1
RTD2136N-CGT_QFN48_6X6 2
5
SA00007A400 CVT@ CVT@ @
RCV32 RCV33
VCC
1 4.7K_0402_5% 4.7K_0402_5%
(22) SC_BKOFF# IN1 4
2
2 OUT MODE_CFG0 MODE_CFG1
EC/Scalar IC
GND
(7) EDP_BKLON IN2
1
UCV3
1
RCV34 MC74VHC1G08DFT2G_SC70-5
100K_0402_5%
PIN47 PIN48 CVT@
3
DVT : change placement to TOP side RCV35
4.7K_0402_5%
2
2015.11.19
2
CVT@ RCV361 2 0_0402_5% DP0_TXP0_C Change NET NAME
CVT@ RCV371 2 0_0402_5% DP0_TXN0_C
0 1 0 1
CCV141 2 0.1U_0402_10V7K EDP_TXP0_SC
(7) EDP_TXP0 EDP_TXP0_SC (22)
CCV151 2 0.1U_0402_10V7K EDP_TXN0_SC
(7) EDP_TXN0 EDP_TXN0_SC (22)
0 X 0 X EP Mode
CCV161 2 0.1U_0402_10V7K EDP_TXP1_SC
A From CPU(7) EDP_TXP1
CCV171 2 0.1U_0402_10V7K EDP_TXN1_SC
EDP_TXP1_SC (22)
Pin 46 Pin 48
A
(7) EDP_TXN1 EDP_TXN1_SC (22) To Scaler
CCV181 2 0.1U_0402_10V7K EDP_AUXP_SC 1 EP Mode EEPROM 1 ROM EEPROM
(7) EDP_AUXP EDP_AUXP_SC (22)
CCV191 2 0.1U_0402_10V7K EDP_AUXN_SC
(7) EDP_AUXN EDP_AUXN_SC (22)
Security Classification
2014/09/24
Compal Secret Data
2016/09/24 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS Converter RTD2136N
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 21 of 56
5 4 3 2 1
5 4 3 2 1
SC@
+
3
V
S
C
A
R
u
s
e
P
o
w
e
r
s
w
i
t
c
h
U
S
C
5
D
a
t
e
0
1
/
2
9
SCA_XO_C 1 2 SCA_XO
_ _
+3VALW TO +1.1VALW +3V_SCA_S5 RSC41 0_0402_5% SCA_XI
+3V3_DSW +3V_SCA_R
+1.1V_SCA_S5 SPI 4M Change to 4M 0106 YSC1 SC@
284mA SC@ @ 1 2
OSC NC
1
@ RSC2 RSC3
1
LSC1
2
+3V_SCA_R 4.7K_0402_5% 4.7K_0402_5% FOR Scalar Firmware Code 4
NC OSC
3
+1.1V_SCA_L SC@RSC9 22_0402_5%
2
USC5 TAI_HCB2012KF-121T50 @ @ CSC4 SC@RSC8 22_0402_5% +3V_SCA_S5 14.31818MHZ_12PF_X3G01431ADC1H
2
RSC51 1 1U_0402_6.3V6K SC@RSC10 0_0402_5% USC2 SC@
2
VOUT RSC7 USC1 1 2 SCA_SPI_CS# 1 2 SCA_SPI_CS#_R 1 8 1 2
10K_0402_5%
5 2
RT9059GSP_SO8 SCA_SPI_SDO 1 2 SCA_SPI_SDO_R 2 /CS VCC 7 SCA_SPI_HOLD# RSC46 SC@ 1M_0402_5%
@ VIN DO_IO1 /HOLD
2 @ 39.2_0402_1% 5 4 @ CSC7 SCA_SPI_W P# 1 2 SCA_SPI_W P#_R 3 6 SCA_SPI_CK_R SC@ SC@
1
GND NC VDD 4 /WP CLK
1
CSC5 CSC6 1 @ 6 3 1 2 5 SCA_SPI_SDI_R 1 2 SCA_SPI_SDI CSC24 CSC25
1
VOUT VIN GND DIO_IO0
1
10U_0603_6.3V6M
4 SC@ FB_SC 7 2 12P_0402_50V8J 12P_0402_50V8J
GND
(38) SCALER_ON# EN# 1 ADJ EN
1U_0402_6.3V6K
3 8 1 4.7U_0603_10V6K SC@ W 25X40CLSNIG_SO8
2
D OCB GND PGOOD D
2
1 @ RSC13 RSC14 SA00006LS00 SC@ RSC11 22_0402_5%
CSC1 @ 2 @ 4.7K_0402_5% 4.7K_0402_5%
9
0.1U_0402_16V4Z RT9742DGJ5_SOT23-5 RSC15
2
100_0402_1%
2 +3V_SCA_S5 +3V_SCA_S5 +3V_SCA_S5
SC@
1
+1.1VALW=VFB(1+RSC7/RSC15)
2
Main: SA00009R300 RT9742DGJ5 TSOT23 5P +3V_SCA_S5 Add Project_ID select :
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P ,VFB=0.8V Pin63 change to PROJECT_ID3 RSC43 RSC53 RSC55
1 2 SCA_SPI_HOLD# SC@ 10K_0402_5% 10K_0402_5% 10K_0402_5%
SC@RSC4 1 2 10K_0402_5% Pin60 change to PROJECT_ID1 SC_C4@ @
main source : RT9059GSP SC@CSC2 1 2 0.1U_0402_16V4Z Pin61 change to PROJECT_ID2
1
+3V_SCA_R +3V_SCA_S5 @ CSC3 0.1U_0402_16V4Z PROJECT_ID1 PROJECT_ID2 PROJECT_ID3
SC@ second srouce: APL5933CKAI
2
LSC2 RSC47 RSC54 RSC60
1 2 158mA CSC27 10K_0402_5% 10K_0402_5% 10K_0402_5%
TAI_HCB2012KF-121T50 SC@ SC@ SC@ SC@ SC@ SC@ SCA_SPI_CK_R 1 @EMI@2 SCA_SPI_CK_R_1 1 2 @
1 CSC9 1 CSC10 1 CSC11 1 CSC12 1 CSC13 1 CSC14 RSC59 0_0402_5% @EMI@ SC_C5@ SC@
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
108
2 2 2 2 2 2
25
40
76
89
94
USC4 CSC15 SC@
0.1U_0402_16V4Z
PVCC33
PVCC33
PVCC33
PVCC33
PVCC33
PVCC33
1 2
L H H H
(21) EDP_TXP0_SC
EDP_TXP0_SC 1
2 RX2P_0/LANE0P_0/MHLP_0 AUDIO_DAC_V33
62
63
+3V_SCA_S5 AMD PROJECT_ID1 PROJECT_ID2 PROJECT_ID3
EDP_TXN0_SC PROJECT_ID3
(21) EDP_TXN0_SC 3 RX2N_0/LANE0N_0/MHLN_0 GPIO/PWM0/PMW3/INT1/T2/DVI_CTRL2/IHS 64 S_ENVDD
H L
L L H
eDP (21) EDP_TXP1_SC
EDP_TXP1_SC 4 GDI_GND
RX1P_0/LANE1P_0
GPIO/PWM2/INT0/DVI_CTRL1/IENA/CLKO
GPIO
65
S_ENVDD (21,23)
C4
EDP_TXN1_SC 5 66
(21) EDP_TXN1_SC RX1N_0/LANE1N_0 GPIO
6 HDMI-Port0 67 LVDS_TXE3+_S RSC291 SC@ 2 0_0402_5% LVDS_TXE3+ (21,23)
C RX0P_0/LANE2P_0 GPIO/TXO3+_8b_10b C
+3V_SCA_S5
1 2
7
RX0N_0/LANE2N_0 GPIO/TXO3-_8b_10b
68 LVDS_TXE3-_S RSC301 SC@ 2 0_0402_5% LVDS_TXE3- (21,23) C5
8 69 LVDS_TXE2+_S RSC331 SC@ 2 0_0402_5% LVDS_TXE2+ (21,23)
+1.1V_SCA_S5 0.67mA CSC17 0.1U_0402_16V4Z 9 RXCP_0/LANE3P_0 GPIO/TXO2+_8b_10b 70 LVDS_TXE2-_S RSC341 SC@ 2 0_0402_5%
SC@ RXCN_0/LANE3N_0 GPIO/TXO2-_8b_10b LVDS_TXE2- (21,23)
10
MHL_V33 GPIO/TXO1+_8b_10b
71 LVDS_TXE1+_S RSC351 SC@ 2 0_0402_5% LVDS_TXE1+ (21,23) S5
HDMI_IN_D2+ 11 72 LVDS_TXE1-_S RSC361 SC@ 2 0_0402_5% LVDS_TXE1- (21,23)
(24) HDMI_IN_D2+ RX2P_1/LANE0P_1/MHLP_1 GPIO/TXO1-_8b_10b
1
S
w
a
p
L
V
D
S
O
D
D
&
E
V
E
N
1
2
/
2
4
RSC21 HDMI_IN_D1- 15 4.7K_0402_5% 2 @ 1RSC56 SC_MODE1
(24)
(24)
HDMI_IN_D1-
HDMI_IN_D0+
HDMI_IN_D0+ 16 RX1N_1/LANE1N_1
RX0P_1/LANE2P_1 GPIO
77 LVDS
2
www.teknisi-indonesia.com
SC@ HDMI_IN_CK- 19 80 LVDS_TXO3-_S RSC221 SC@ 2 0_0402_5% 4.7K_0402_5% 2 @ 1RSC58 SC_MODE3
(24) HDMI_IN_CK- RXCN_1/LANE3N_1 TXE3-_8b_10b LVDS_TXO3- (21,23)
+1.1V_SCA_ADC 20 81 LVDS_TXEC+_S RSC311 SC@ 2 0_0402_5% LVDS_TXEC+ (21,23)
SC@ 0.1U_0402_16V4Z GDI_V11 TXEC+_8b_10b 82 LVDS_TXEC-_S RSC321 SC@ 2 0_0402_5%
2 2 EDP_HPD_R TXEC-_8b_10b LVDS_TXEC- (21,23) RSC56/RSC57/RSC58 change to unpop 0401
Pull-low 100K to GND close APU 1218 83 LVDS_TXO2+_S RSC181 SC@ 2 0_0402_5% LVDS_TXO2+ (21,23)
TXE2+_8b_10b
TXE2-_8b_10b
84 LVDS_TXO2-_S RSC231 SC@ 2 0_0402_5% LVDS_TXO2- (21,23) SC_MODE3
EDP_HPD_R 21 85 LVDS_TXO1+_S RSC191 SC@ 2 0_0402_5%
(21,7) EDP_HPD_R
HDMI_IN_HPD 22 CBUS0/GPIO TXE1+_8b_10b 86 LVDS_TXO1-_S RSC201 SC@ 2 0_0402_5%
LVDS_TXO1+
LVDS_TXO1-
(21,23)
(21,23) SC_MODE1 SC_MODE2 (Reserve)
(24) HDMI_IN_HPD 23 CBUS1/GPIO TXE1-_8b_10b 87 LVDS_TXO0+_S RSC241 SC@ 2 0_0402_5% LVDS_TXO0+ (21,23)
24 NC TXE0+_8b_10b 88 LVDS_TXO0-_S RSC261 SC@ 2 0_0402_5%
Add RPSC1 for Panel ID pull-high 01/26
L L H H
L H L H
X X X X
+3V3_DSW NC TXE0-_8b_10b LVDS_TXO0- (21,23)
26
NC +1.1V_SCA_S5 +3V_SCA_S5 PC mode
RPSC1 27 91 CSC20 SC@
PANEL_ID3 1 8 28 NC NC 92 0.1U_0402_16V4Z 10K_0402_5%
NC NC
PANEL_ID2 2 7 29
NC VCCK11
93 1 2 RSC49 Monitor mode
PANEL_ID1 3 6 30 S_INVT_PW M 1 @ 2
4 5 31 NC 96 SCA_SPI_W P#
NC GPIO(Flash WP)/INT0
32
NC GPIO/INT1/IVS
97
98
SC_MODE1
SC_MODE1 (38) AMP Mute
10K_0804_8P4R_5% SC_MODE2
GPIO/T0 99 SC_MODE2 (38)
Add Panel_ID4 on Pin34 02/16 SC_BKOFF# SC_BKOFF# (21)
GPIO/PWM2/PMW3/T1
(38) PANEL_ID4 SC@
34
35 GPIO/PWM0/I2S_MCK/CLKO GPIO/PWM_IN/AUX_D2/DCLK/T2EX
100
101
EDP_BKLCTL
EDP_BKLCTL (21,7) S5 Mode
B PANEL_ID3 S_INVT_PW M S_INVT_PW M (21,51)
B
(38,51) PANEL_ID3 36 GPIO/PWM1/I2S_SCK/IRQB GPIO/PWM4/PWM_OUT/AUX_D1 102
SC_MODE3 RSC12 22_0402_5% CSC8
(38) SC_MODE3 37 GPIO/PWM2/I2S_WS NC 103 2 1SCA_SPI_CK_R 1 2 +3VS_S0
PANEL_ID1 SCA_SPI_CK * CSC8 Close to USC2
(38,51) PANEL_ID1 38 GPIO/PWM3/IICSCL0/RXD/I2S_SD0/SPDIF0 SPI_CLK/SDIO 104
PANEL_ID2 SCA_SPI_SDI SC@ @EMI@
(38,51) PANEL_ID2 39 GPIO/PWM4/ IICSDA0/TXD/I2S_SD1/SPDIF1 SPI_SI/MCU_SCLK 105
EDID_W P SCA_SPI_SDO 10P_0402_50V8J
(24) EDID_W P GPIO/PWM5/I2S_SD2/SPDIF2 SPI_SO/SCSB 106 +1.1V_SCA_S5
SCA_SPI_CS# EDP_AUXP/N swap for error pin define 01/26
SPI_CEB/IRQB 107 SC@
Add HDMI_CABLE_DET# on Pin44 01/26 NC
5
41 109 CSC211 2 0.1U_0402_16V4Z QSC4B
Add SCA_FW_FLASH on Pin43 02/16 42 NC VCCK11 110 EDP_AUXP_SC SC@
A-ADC0/GPIO GPIO/DDCSCL0/AUXP/PWM4 EDP_AUXP_SC (21)
43 111 EDP_AUXN_SC SC_SMLCLK1 3 4
(8) SCA_FW _FLASH 1 2 44 A-ADC1/GPIO/MUX_DDCSCLVGA GPIO/DDCSDA0/AUXN/PWM5 112 EDP_AUXN_SC (21) APU_SCLK0 (12,13,8)
RSC52 @ CABLE_DET# HDMI_IN_SCLK SC@
(24,38) HDMI_CABLE_DET# A-ADC2/GPIO/MUX_DDCSDAVGA GPIO/DDCSCL1/AUXP HDMI_IN_SCLK (24)
2
0_0402_5% 45 113 HDMI_IN_SDAT L2N7002DW 1T1G_SC88-6 QSC4A
46 A-ADC3/GPIO GPIO/DDCSDA1/AUXN 114 HDMI_IN_SDAT (24)
SC_SMLCLK1
RSC421 SC@ 2 4.7K_0402_5% SC_EESCL 47 GPIO/PWM1/PWM5 GPIO/DDCSCL2/AUXP 115 SC_SMLDATA1 SC_SMLDATA1 6 1
+3V_SCA_S5 GPIO/IICSCL1/IICSCL_AUX GPIO/DDCSDA2/AUXN APU_SDATA0 (12,13,8)
RSC441 SC@ 2 4.7K_0402_5% SC_EESDA 48 116
SC_DDCSCL 49 GPIO/IICSDA1/IICSDA_AUX NC 117 SCA_XO L2N7002DW 1T1G_SC88-6
GPIO/DDCSCLVGA/RXD X0 Remove RSC50/RSC51 ,add QSC4 for SC_SMLCLK/DATA1 01/26
SC_DDCSDA 50 For Port1 118 SCA_XI
51 GPIO/DDCSDAVGA/TXD XI 119
+1.1V_SCA_S5 VCCK11 RX_V33 +3V_SCA_S5 +3V_SCA_S5
52 For Port0 120 REXT
SC@ CSC22
1
SC_W P_PRO 53 GPIO/PWM0/I2S_SD3/SPDIF3
GPIO/PWM3/PWM4
REXT(12k to GND)
NC
121
1 SC@
0.1U_0402_16V4Z
EEPROM 16K
54 122 @
AUDIO_DAC_GND NC
1
1
2 SC@ 56 124 SC@ 2 0.1U_0402_16V4Z @
GPIO/I2S_SCK/LINE_INR NC Remove RSC45
1 2 SC_57 57 125 RSC48 1 2 RSC17
CSC26 1U_0402_6.3V6K 58 GPIO/I2S_WS/AUDIO_REF NC 126 12K_0402_1%
CSC23 change to 0.1U 01/26 4.7K_0402_5%
(33) S_LINE_OUTL 59 GPIO/I2S_SD0/SPDIF0/SOUTL NC 127
2
2
remove HP-OUT 12/09 PROJECT_ID2 61 GPIO/IICSCL2//RXD/I2S_SD2/SPDIF2/HOUTL NC USC3 @
GPIO/IICSDA2/TXD/I2S_SD3/SPDIF3/HOUTR 1 8
+3V_SCA_S5 +3V_SCA_S5 SC_BKOFF# RSC391 @ 2 10K_0402_5% 2 A0 VCC 7 SC_W P_PRO_R1 @ 2 SC_W P_PRO
3 A1 WP 6 RSC25 47_0402_5%
A2 SCL
PGND
PGND
PGND
PGND
2.2K_0402_5% SC@ 2.2K_0402_5% S IC RTD2506S-CG LQFP 128P DISPLAY CTRL SC@ SC_SMLDATA1 RSC501 SC@ 2 4.7K_0402_5%
FOR OSD/HDCP Parameter Value
5
SC_DDCSCL 4 3
EC_SMB_CK2 (21,38,51) Security Classification Compal Secret Data Compal Electronics, Inc.
2
0.75A_6V_0805L075ULYR 1 Touch
CCA1 RSC62/RSC63 near JLVDS1 pin22 and 23
10U_0603_6.3V6M
2 LVDS_TXOC- 2 SC@ 1 LVDS_TXEC-
D Correct pin define 1224 0_0402_5% RSC62 D
LVDS_TXOC+ 2 SC@ 1 LVDS_TXEC+
0_0402_5% RSC63
CAMERA EMI@ RTO1 1 2 0_0402_5%
+5VS_TOUCH_S0 JLVDS1
+3VS_CAM_S0 JTO1 30 32
1 (21,22) LVDS_TXO0- 29 30 GND 31
(9) USB20_N4 1 (21,22) LVDS_TXO0+ 29 GND
JCAM1 USB20_N4_R 2 28
1 9 3 2 (21,22) LVDS_TXO1- 27 28
USB20_P4_R
2 1 GND 4 3 6 (21,22) LVDS_TXO1+ 26 27
2 (9) USB20_P4 1 4 6 (21,22) LVDS_TXO2- 26
3 5 7 25
4 3 5 7 (21,22) LVDS_TXO2+ 24 25
USB20_N5_R CTO1
USB20_P5_R 5 4 1 2 0.1U_0402_16V7K CONN@ LVDS_TXOC- 23 24
6 5 2 (21) LVDS_TXOC- 22 23
EMI@ RTO2 0_0402_5% SP02001DG00 LVDS_TXOC+
7 6 (21) LVDS_TXOC+ 21 22
8 7 10 (21,22) LVDS_TXO3- 20 21
8 GND (21,22) LVDS_TXO3+ 19 20
(21,22) LVDS_TXE0- 18 19
CONN@
(21,22) LVDS_TXE0+ 17 18
SP02000CZ00 16 17
(21,22) LVDS_TXE1- 15 16
(21,22) LVDS_TXE1+ 14 15
13 14
(21,22) LVDS_TXE2- 12 13
(21,22) LVDS_TXE2+ 11 12
LVDS_TXEC-
(21,22) LVDS_TXEC- 10 11
LVDS_TXEC+
(21,22) LVDS_TXEC+ 9 10
DTO1 0.75A PTC
2 +5VS_S0 (21,22) LVDS_TXE3- 8 9
USB20_P4_R +5VS_TOUCH_S0
1 2 (21,22) LVDS_TXE3+ 7 8
LCA1 EMI@ FTO1
2 1 USB20_N5_R 1 3 USB20_N4_R 1 2 6 7
(9) USB20_N5 3 +LCDVDD_S5 6
DVT: pin6 change to NC 5
C SM070003Z00 AZC199-02SPR7G_SOT23-3 0.75A_6V_0805L075ULYR 4 5 C
1 4
3 4 USB20_P5_R @ESD@ SC600001600 3
(9) USB20_P5 3
CTO2 2
MCM1012B900F06BP_4P 0.1U_0402_16V4Z 1 2
2 1 1
CCV20
680P_0402_50V7K
@ CONN@
2
SP01001J800
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3 USB20_N5_R
1 3
1 2 USB20_P5_R
AZC199-02SPR7G_SOT23-3
2
vinafix.com
SC600001600 ESD@
CMIC1
10P_0402_50V8J CMIC2
1 1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS/Convertor/CAM/Touch
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 23 of 56
5 4 3 2 1
5 4 3 2 1
+5V_HDMI_IN_S0 +HDMI_IN_5V
HDMI_IN_CK+_R
W=40mils
(22) HDMI_IN_CK+
UHI1 W=40mils
1
LHI1 HDMIIN@ VOUT 5
4 3 2 VIN
1 GND RHI15
HCM1012GH900BP_4P CHI7 +HDMI_IN_5V 3 4 HI_DI 1 2+5V_HDMI_IN_S0
D EN DIS 1 1 D
1 2 HDMIIN@ 100K_0402_5% CHI5 CHI6
1U_0402_6.3V6K 2 APL3522_SOT23-5 HDMIIN@ HDMIIN@
+HDMI_IN_5V_S0
.1U_0402_16V4Z
10U_0603_6.3V6M
HDMI_IN_CK-_R HDMIIN@ 2 2
(22) HDMI_IN_CK-
HDMIIN@
SA00009Y500
RHI4 RHI5
LHI2 HDMIIN@ 4.7K_0402_5% 4.7K_0402_5%
4 3 HDMIIN@ HDMIIN@
HCM1012GH900BP_4P
1 2 HDMI_IN_SDAT
(22) HDMI_IN_SDAT
1
HDMI_IN_D1+_R 4
LHI3 HDMIIN@ HDMIIN@ 5 D1+
4 3 RHI7 HDMI_IN_D1-_R 6 D1_shield
10K_0402_5% HDMI_IN_D0+_R 7 D1-
C HCM1012GH900BP_4P 8 D0+ C
2
1 2 HDMI_IN_D0-_R 9 D0_shield 23
HDMIIN@ HDMI_IN_CK+_R 10 D0- GND4 22
1 2 HDMI_IN_P11# 11 CK+ GND3 21
(22,38) HDMI_CABLE_DET# CK_shield GND2
HDMI_IN_D1-_R RHI9 0_0402_5% HDMI_IN_CK-_R 12 20
(22) HDMI_IN_D1- CK- GND1
13
14 CEC
+HDMI_IN_5V HDMI_IN_SCLK 15 Reserved
SCL
1
HDMI_IN_SDAT 16
@ SDA
17
HDMI_IN_D2-_R +HDMI_IN_5V_S0 0_0402_5% 18 DDC/CEC_GND
(22) HDMI_IN_D2- RHI16 +5V
HDMI_IN_HPD 19
HP_DET
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2
LHI4 HDMIIN@ SUYIN_100042GR019M12RZR
1 2 reserve 0 ohm to GND 0225 CONN@
1
HDMIIN@
HCM1012GH900BP_4P RHI12 DC232000T00
4 3 1K_0402_5%
2
(22) HDMI_IN_D2+ HDMI_IN_D2+_R
(22) HDMI_IN_HPD
1
CHI3
DHI1 +HDMI_IN_5V
0.1U_0402_16V4Z
HDMIIN@ 2 HDMI_IN_SDAT 1 4 HDMI_IN_P11#
I/O1 I/O3
Reserve RHI14 for Non-Write protect 12/18
B B
2 5
+5V_HDMI_IN_S0 GND VDD
+5VALW _S5
FOR HDMI EDID HDMI_IN_HPD 3 6 HDMI_IN_SCLK
I/O2 I/O4
AZC199-04S.R7G SOT23-6
2
HDMIIN@
1 2
8 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI-IN conn
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 24 of 56
5 4 3 2 1
A B C D E
+5VS_S0
+5VS_HDMI_S0
ADD UHO1 for HDMI OUT 0219
W=40mils UHO1
+5VS_HDMI_S0 1 W=40mils
VOUT 5
LHO1 EMI@ LHO2 EMI@ 2 VIN
1 GND
HDMIOUT_CLK-_C 1 2 HDMIOUT_R_CK- HDMIOUT_TX0-_C 4 3 HDMIOUT_R_D0- RHO20
CHO10 +5VS_S0 3 4 HO_DI1 2 +5VS_HDMI_S0
EN DIS 100K_0402_5%
2 1 1
HDMIOUT_CLK+_C 4 3 HDMIOUT_R_CK+ HDMIOUT_TX0+_C 1 2 HDMIOUT_R_D0+ 1U_0402_6.3V6K APL3522_SOT23-5 CHO11 CHO5
1 1
HCM1012GH900BP_4P HCM1012GH900BP_4P
0.1U_0402_16V7K
EMI Request EMI Request 2 2
10U_0603_6.3V6M
SA00009Y500
HDMI-OUT
Connector
JHO1
HDMIOUT_R_D2+ 1
LHO3 EMI@ LHO4 EMI@ 2 D2+
HDMIOUT_TX1-_C 1 2 HDMIOUT_R_D1- HDMIOUT_TX2-_C 4 3 HDMIOUT_R_D2- HDMIOUT_R_D2- 3 D2_shield
HDMIOUT_R_D1+ 4 D2-
5 D1+
HDMIOUT_TX1+_C 4 3 HDMIOUT_R_D1+ HDMIOUT_TX2+_C 1 2 HDMIOUT_R_D2+ HDMIOUT_R_D1- 6 D1_shield
HDMIOUT_R_D0+ 7 D1-
HCM1012GH900BP_4P HCM1012GH900BP_4P 8 D0+
HDMIOUT_R_D0- 9 D0_shield 23
EMI Request EMI Request D0- GND4
HDMIOUT_R_CK+ 10 22
11 CK+ GND3 21
HDMIOUT_R_CK- 12 CK_shield GND2 20
13 CK- GND1
14 CEC
+5VS_HDMI_S0 HDMIOUT_SCLK 15 Reserved
Follow SCL SCL
HDMIOUT_SDAT 16
17 SDA
18 DDC/CEC_GND
HDMIOUT_HPD 19 +5V
2 HP_DET 2
RPHO1 SUYIN_100042GR019M12RZR
2
CHO1 1 2 0.1U_0402_10V6K HDMIOUT_TX1+_C 1 8 CONN@
(7) HDMI_TX1+ 1 2 2 7
CHO2 0.1U_0402_10V6K HDMIOUT_TX1-_C DHO1
HDMI_Term_CON
DC232000T00
2
(7) HDMI_TX1- 1 2 3 6
CHO3 0.1U_0402_10V6K HDMIOUT_CLK+_C AZC199-02SPR7G_SOT23-3
(7) HDMI_CLK+ 1 2 4 5
CHO4 0.1U_0402_10V6K HDMIOUT_CLK-_C SC600001600
(7) HDMI_CLK-
1
499_0804_8P4R_1% ESD@
1
499_0804_8P4R_1%
CHO8 1 2 0.1U_0402_10V6K HDMIOUT_TX2+_C 4 5 Add RB751 on HDMIOUT DDC 0219
(7) HDMI_TX2+ 1 2 3 6 +5VS_HDMI_S0
CHO9 0.1U_0402_10V6K HDMIOUT_TX2-_C
(7) HDMI_TX2-
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FROM APU (7) HDMI_TX0+ CHO6 1 2 0.1U_0402_10V6K HDMIOUT_TX0+_C 2 7
(7) HDMI_TX0- CHO7 1 2 0.1U_0402_10V6K HDMIOUT_TX0-_C 1 8
2
RPHO2 DHO5
1
D
RB751V-40_SOD323-2
Close to JHO1 2 QHO1 2k 5V Pull-High on Connector side
+3VS_S0
G L2N7002W T1G_SC-70-3
1
S SB00000ST00
3
DDC_PU_5V RHO131 2 2K_0402_5% HDMIOUT_SCLK
2
DHO2
2
AZC199-02SPR7G_SOT23-3
SC600001600
1
1
1
3 RHO18 RHO19 +3VS_S0 ESD@ 3
1
2.2K_0402_1% 2.2K_0402_1% Close to JHO1
2
QHO2A
2
2
(7) APU_HDMIOUT_DAT
1 6 HDMIOUT_SDAT QHO3 1 C RHO17
MMBT3904_NL_SOT23-3 2 HDMI_OUT_DET 1 2 HDMIOUT_HPD
2N7002KDW _SOT363-6 B
E 10K_0402_5%
3
5
1
QHO2B
4 3 HDMIOUT_SCLK RHO16 DHO3 DHO4
(7) APU_HDMIOUT_CLK
1
2
ESD Reauest
HDMIOUT_R_CK+ 4 7 HDMIOUT_R_CK+ HDMIOUT_R_D0+ 4 7 HDMIOUT_R_D0+
2
3 3
8 8
AZ1043-04F AZ1043-04F
Part Number = SC300003M00 Part Number = SC300003M00
ESD@ ESD@
ESD Reauest ESD Reauest
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P21-HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 25 of 56
A B C D E
A B C D E
1 1 1 1 1 1 1 1 1 1
10U_0603_6.3V6M
CHD1
.1U_0402_16V4Z
CHD2
.1U_0402_16V4Z
CHD3
0.1U_0402_25V6
CHD5
10U_0805_25V6K
CHD6
10U_0603_6.3V6M
COD1
.1U_0402_16V4Z
COD2
1U_0402_6.3V6K
COD3
@EMI@
33P_0402_50V8J
COD4
@
CHD4
47U_1210_16V6M
+5VS_S0 2 2 2 SE00000M400 2 2 2 2 2 2 2
@
1 1
@ESD@ DOD1
1
SATA_PTX_C_DRX_P1_R9 10 1 1 SATA_PTX_C_DRX_P1_R
CHD7 +5VS_S0
JHDP1 33P_0402_50V8J @ESD@ DHD1 SATA_PTX_C_DRX_N1_R8 9 2 2 SATA_PTX_C_DRX_N1_R JODP1
6 2 @EMI@ SATA_PTX_C_DRX_P0_R 9 10 1 1 SATA_PTX_C_DRX_P0_R 6
GND 5 SATA_PRX_C_DTX_N1_R7 4 SATA_PRX_C_DTX_N1_R GND 5
7 4
GND 4 SATA_PTX_C_DRX_N0_R 8 2 SATA_PTX_C_DRX_N0_R GND 4
9 2
4 3 +12VS_S0 SATA_PRX_C_DTX_P1_R6 5 SATA_PRX_C_DTX_P1_R 4 3 +12VS_S0
6 5
3 2 SATA_PRX_C_DTX_N0_R 7 4 SATA_PRX_C_DTX_N0_R 3 2
7 4
2 1 3 2 1
3
1 SATA_PRX_C_DTX_P0_R 6 5 SATA_PRX_C_DTX_P0_R 1
1 6 5 1
ACES_88290-044G_4P 8 ACES_88290-044G_4P
CONN@ CHD8 3 3 CONN@ COD5
33P_0402_50V8J AZ1143-04F DFN2510P10E 33P_0402_50V8J
2 @EMI@ 8 SC300004G00 2 @EMI@
AZ1143-04F DFN2510P10E
SC300004G00
2 2
JODD1
0.01U_0402_16V7K ROD2 1 2 0_0402_5%
EMI@ 0.01U_0402_16V7K EMI@ 1
RHD1 1 2 0_0402_5% COD7 1 2SATA_PTX_C_DRX_P1 SATA_PTX_C_DRX_P1_R 2 GND
(9) SATA_PTX_DRX_P1 A+
(9) SATA_PTX_DRX_N1 COD6 1 2SATA_PTX_C_DRX_N1 SATA_PTX_C_DRX_N1_R 3
0.01U_0402_16V7K JHDD1 4 A-
RHD2 1 GND
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0.01U_0402_16V7K 2 0_0402_5% (9) SATA_PRX_DTX_N1 COD8 1 2SATA_PRX_C_DTX_N1 SATA_PRX_C_DTX_N1_R 5
1 COD9 1 2SATA_PRX_C_DTX_P1 SATA_PRX_C_DTX_P1_R 6 B-
GND (9) SATA_PRX_DTX_P1 B+
(9) SATA_PTX_DRX_P0 CHD101 2 SATA_PTX_C_DRX_P0 EMI@ SATA_PTX_C_DRX_P0_R 2 0.01U_0402_16V7K 7 8
CHD9 1 2 SATA_PTX_C_DRX_N0 SATA_PTX_C_DRX_N0_R 3 A+ 0.01U_0402_16V7K GND GND 9
(9) SATA_PTX_DRX_N0 A- GND
4
CHD121 2 SATA_PRX_C_DTX_N0 SATA_PRX_C_DTX_N0_R 5 GND ROD3 1 2 0_0402_5% LOTES_GAP-ABA-SAT-055
3
(9) SATA_PRX_DTX_N0
CHD111 2 SATA_PRX_C_DTX_P0 SATA_PRX_C_DTX_P0_R 6 B- Place CAP close to EMI@ SP011501091 3
(9) SATA_PRX_DTX_P0 B+
7 8 JODD <100mil CONN@
0.01U_0402_16V7K GND GND 9 ROD4 1 2 0_0402_5%
0.01U_0402_16V7K EMI@ GND EMI@
RHD3 1 2 0_0402_5% LOTES_GAP-ABA-SAT-055
SP011501091
Place CAP close to CONN@
JHDD1 <100mil RHD4 1 2 0_0402_5% EMI request
EMI@
EMI request
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 26 of 56
A B C D E
5 4 3 2 1
+3.3V_LAN_S5
+LAN_VDDREG
JRJ1
+LAN_VDDREG
C 2015.11.18 C
30
11
32
22
UL1
3
8
AVDD10
AVDD10
AVDD10
AVDD33
AVDD33
DVDD10
CL13 2 1 .1U_0402_16V7K PCIE_PRX_C_LANTXP 17 1 LAN_MIDI0+
(6) PCIE_PRX_LANTXP HSOP MDIP0
CL14 2 1 .1U_0402_16V7K PCIE_PRX_C_LANTXN 18 2 LAN_MIDI0-
(6) PCIE_PRX_LANTXN HSON MDIN0 4 LAN_MIDI1+ LAN_MIDI0+ 1
13 MDIP1 5 LAN_MIDI1- TD1+ R1
(6) PCIE_PTX_LANRXP 14 HSIP MDIN1 6 2
LAN_MIDI2+ LAN_MIDI0-
(6) PCIE_PTX_LANRXN HSIN MDIP2 7 TD1- R2
LAN_MIDI2-
MDIN2
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CLK_PCIE_LAN 15 9 LAN_MIDI3+ LAN_MIDI1+ 3
(9) CLK_PCIE_LAN 16 REFCLK_P MDIP3 10 TD2+ R3
CLK_PCIE_LAN# LAN_MIDI3-
(9) CLK_PCIE_LAN# REFCLK_N MDIN3 4
LAN_MIDI1-
1 2 LAN_CLKREQ#_R 12 TD2- R4
+3VS_S0 +3.3V_LAN_S5 CLKREQB
RL1 10K_0402_5% @ JRJ1_CT_R5R6 5
2 @ 1 LANW AKEB 21 25 LAN_LED_ORG# CT R5
(38,8) APU_PCIE_W AKE# LANWAKEB LED2 TL1
1
RL2 0_0402_5% 26 LAN_PHY_DIS# 1 6
LED1/GPIO LAN_PHY_DIS# (38) CT R6
1 2 ISOLATE# 20 27 LAN_LED_YEL#
ISOLATEB LED0 TL2 RL4
RL3 1K_0402_5% @ CL15 LAN_MIDI2+ 7
19 0_0402_5% TD3+ R7
(14,28,29,30,8) APU_PCIE_RST# PERSTB @ 0.1U_0402_16V7K
+LAN_VDDREG 2 LAN_MIDI2- 8
2
23 EMI@ TD3- R8
+3.3V_LAN_S5 VDDREG
1 2 UL1_RSET_P31 31 24 LAN_MIDI3+ 9
RL5 2.49K_0402_1% RSET REGOUT TD4+ R9
RL6 LAN_MIDI3- 10
15K_0402_5% TD4- R10
LAN_X2 29
LAN_X1 28 CKXTAL2 33
CKXTAL1 GND RL7
B 510_0402_5%
20mils B
CONN@
L2N7002W T1G_SC-70-3
SB00000ST00 RL8 2 5
SP011312232
GND VDD +3.3V_LAN_S5
10K_0402_5%
2
G
LAN_LED_YEL# LAN_GND
3 1 LAN_CLKREQ#_R LAN_MIDI1+ 1 4 LAN_MIDI0-
(8) LAN_CLKREQ# I/O1 I/O3
LAN_X1 RL10 LAN_X2
S
2
ESD@ SC300002900
2
2
RL9 @ 0_0402_5% RL14
0_0402_5%
1
DL2
LAN_MIDI2+ 3 6 LAN_MIDI3- AZC199-02SPR7G_SOT23-3 RL11 1 @ 2 0_0805_5%
1
1
YL1 I/O2 I/O4 SC600001600
LAN_X2_R
RL13 @
10K_0402_5%
LAN_PHY_DIS#
Issued Date 2014/12/15 Deciphered Date 2016/12/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111G-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 27 of 56
5 4 3 2 1
A B C D E
WLAN Conn.
WLAN (WIFI/BT Combo)
NGFF E-KEY +3V_WLAN_S5
JWLAN1
1 2
EMI@ RWL1 1 2 0_0402_5% USB20_P3_R 3 GND 3.3VAUX 4 +3V_WLAN_S5
(9) USB20_P3 USB_D+ 3.3VAUX
USB20_N3_R 5 6
1 2 7 USB_D- LED1# 8
(9) USB20_N3 GND PCM_CLK
EMI@ RWL4 0_0402_5% 9 10 RWL3 @ 10K_0402_5%
11 SIDO_CLK PCM_SYNC 12 BT_ON_R 1 2
13 SDIO_CMD PCM_IN 14
15 SDO_DAT0 PCM_OUT 16
Place close to JWLAN1 SDO_DAT1 LED2#
17 18 RWL6 @ 10K_0402_5%
19 SDO_DAT2 GND 20 WL_ON_R 1 2
21 SDO_DAT3 UART_WAKE# 22
1 2 CLKREQ_WLAN#_R 23 SDIO_WAKE# UART_RX
(8) WLAN_CLKREQ# @
1 SDIO_RESET# 1
RWL5 0_0402_5% RWL3/RWL6 change to non-POP 02/19
24
25 UART_TX 26
27 GND UART_CTS 28
(6) PCIE_PTX_WLANRXP 29 PETP0 UART_RTS 30 E51_TXD_WLAN RWL7 1 2 0_0402_5% E51_TXD E51_TXD (34,38)
(6) PCIE_PTX_WLANRXN PETN0 RESERVED
31 32 E51_CLK_WLAN RWL8 1 2 0_0402_5% E51_CLK E51_CLK (38)
33 GND RESERVED 34
(6) PCIE_PRX_WLANTXP PERP0 RESERVED
(6) PCIE_PRX_WLANTXN 35 36 RWL9 change to unpop 0219
37 PERN0 COEX3 38
39 GND COEX2 40
(9) CLK_PCIE_WLAN REFCLKP0 COEX1
41 42 SUSCLK RWL9 1 @ 2 0_0402_5% RTC_CLK (8)
+3VALW_S5 +3V_WLAN_S5 (9) CLK_PCIE_WLAN# 43 REFCLKN0 SUSCLK 44 PLT_RST#_WL
CLKREQ_WLAN#_R 45 GND PERST0# 46 BT_ON_R RWL101 @ 2 0_0402_5%
CLKEQ0# W_DISABLE2# BT_ON (8)
W=60mils Place close to JWLAN1 1 @ 2 WLAN_WAKE#_R 47 48 WL_ON_R RWL121 @ 2 0_0402_5%
(8) PCIE_WAKE#_WLAN PEWAKE0# W_DISABLE1# WL_ON (8)
RWL11 0_0402_5% 49 50
JPWL1 51 GND I2C_DATA 52
1 2 53 RSRVD/PETP1 I2C_CLK 54
55 RSRVD/PETN1 ALERT 56
1 GND RESERVED
JUMP_43X79 1 1 1 1 1 57 58
CWL1 @ @ 59 RSRVD/PERP1 RESERVED 60
RSRVD/PERN1 RESERVED
.1U_0402_16V7K
CWL4
4.7U_0603_6.3V6K
CWL2
.1U_0402_16V7K
CWL5
.1U_0402_16V7K
CWL6
.1U_0402_16V7K
CWL3
1U_0402_6.3V6K 61 62
2 63 GND RESERVED 64
2 2 2 2 2 65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX PLT_RST#_WL RWL141 2 0_0402_5%
GND APU_PCIE_RST# (14,27,29,30,8)
69 68 CWL8 1 2 @ESD@
MTG77 MTG76 33P_0402_50V8J
CONN@
SP070011H00
LOTES_APCI0019-P009A
2 2
2.ST_ST33HTPH2E32AAE8 1 2 TPM_SPI_CS#2
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RTP1 4.7K_0402_5%
3.Infineon_SLB 9670 1
TPM@
2 TPM_SIRQ#
RTP2 4.7K_0402_5%
TPM@ +3VALW_S5
TPM_SPI_CLK
RPTP1 +3VS_TPM_S5
2
0_0804_8P4R_5% 29 VSB
0_0402_5% RTP4
TPM@ 30 XOR_OUT/SDA/GPIO0 8
SCL/GPIO1 VDD1 1 1 1
3 14 TPM_VDD2 TPM@ TPM@ TPM@
6 GPX/GPIO2 VDD2 22 CTP1 CTP2 CTP3
GPIO3/BADD VDD3 10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z
TPM_MISO 24 2 2 2 2
2 LAD0/MISO NC1
CTP4 11/30 update TPM_MOSI 21 7
10P_0402_50V8J 1 2 @ TPM_SIRQ# 18 LAD1/MOSI NC2 10
(8) TPM_STSIRQ# 15 LAD2/SPI_IRQ# NC3 11
@EMI@ RTP5 0_0402_5%
1 LAD3 NC4 25
3
TPM_SPI_CLK 19 NC5 26 3
TPM_SPI_CS#2 20 LCLK/SCLK NC6 31
APU_PCIE_RST# 1 2 TPM_SPI_RST# 17 LFRAME#/SCS# NC7
RTP6 0_0402_5% TPM_SERIRQ 27 LRESET#/SPI_RST#/SRESET# 9
11/30 update TPM@ 13 SERIRQ GND1 16 +3VALW_S5
1 CLKRUN#/GPIO4/SINT# GND2
CTP5 +3VS_TPM_S5 28 23
0.1U_0402_16V4Z LPCPD# GND3 32 10 mils
@ESD@ 4 GND4 33 TPM_VDD2 2 1 RTP7
2
Symbol: NPCT650LA0YX_QFN32_5X5
TPM/TCM IC (Default)
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
WLAN (NGFF) / TPM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 28 of 56
A B C D E
5 4 3 2 1
+3VS_S0
CCR7 UCR1
1U_0402_6.3V6K 9
1 2 +DV33_18 15 3V3_IN
7 SP3
+1.2VS_CR_AV AV12
11 Length of per trace 2inch no more 2 via
+1.2VS_CR_DV DV12_S
40mil1 @ 2 +3VS_CR_R 10 mismatch trace length <100mil
+3VS_CR Card_3V3
RCR1 0_0402_5% 25
1 2 RREF 8 GND 50ohm +-15% impedance.
RCR2 6.2K_0402_1% RREF
W=12mil, L<200mil
1 12 SD_D1 * CCR10/CCR11 RCR5 /RCR9 Close to UCR1
(6) PCIE_PTX_CRRXP 2 HSIP SP1 13 SD_D0_MS_D1
(6) PCIE_PTX_CRRXN 1 2 0.1U_0402_16V7K PCIE_PRX_C_CRTXP 5 HSIN SP2 14
(6) PCIE_PRX_CRTXP CCR8 SD_CLK_MS_D0
CCR9 1 2 0.1U_0402_16V7K PCIE_PRX_C_CRTXN 6 HSOP SP3 16 SD_CMD_MS_D2 SD_D1 1 2 SD_D1_R
(6) PCIE_PRX_CRTXN HSON SP4 17 SD_D3_MS_D3 RCR3 0_0402_5%
C SP5 18 SD_D2_MS_CLK SD_D0_MS_D1 1 2 SD_D0_MS_D1_R C
11/30 update 3 SP6 RCR4 0_0402_5% EMI@
2015.11.18 CAP close to UCR1 (9) CLK_PCIE_CR 4 REFCLKP SD_CLK_MS_D0 1 EMI@ 2 SD_CLK_MS_D0_R 1 2
(9) CLK_PCIE_CR# REFCLKN RCR5 0_0402_5% CCR10
23 20 SD_W P_MS_BS SD_CMD_MS_D2 1 2 SD_CMD_MS_D2_R 6.8P_0402_50V8C
(14,27,28,30,8) APU_PCIE_RST# PERST# SD_WP RCR6 0_0402_5%
CR_CLKREQ# 24 21 SD_CD# SD_D3_MS_D3 1 2 SD_D3_MS_D3_R
(8) CR_CLKREQ# CLK_REQ# SD_CD# RCR7 0_0402_5%
1 2 GPIO_CR 19 22 MS_CD# SD_D2_MS_CLK 1 EMI@ 2 SD_D2_MS_CLK_R 1 2
+3VS_S0 GPIO MS_INS#
2 RCR8 10K_0402_5% RCR9 0_0402_5% CCR11 5P_0402_50V
CCR12 RTS5229-GR_QFN24_4X4 EMI@
0.1U_0402_16V4Z
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@ESD@
1
+3VS_CR
40mil
JCR1 +3VS_CR
SD_D2_MS_CLK_R 1
2 SD-DAT2
SD_D3_MS_D3_R 3 MS-VSS 40mil
4 SD-DAT3/MMC-RSV
B SD_D2_MS_CLK_R 5 MS-VCC B
SD_CMD_MS_D2_R 6 MS-SCLK
SD-CMD/MMC-CMD 1 1 1
SD_D3_MS_D3_R 7
MS_CD# 8 MS-DAT3 CCR13 CCR14 CCR15
9 MS-INS 10U_0603_6.3V6M 0.1U_0402_16V4Z 0.1U_0402_16V4Z
SD_CMD_MS_D2_R 10 SD-VSS/MMC-VSSI 2 2 2
11 MS-DAT2
SD_CLK_MS_D0_R 12 SD-VDD/MMC-VDD
SD_D0_MS_D1_R 13 MS-DAT0
SD_CLK_MS_D0_R 14 MS-DAT1
SD_W P_MS_BS 15 SD-CLK/MMC-CLK
16 MS-BS
17 MS-VSS
SD_D0_MS_D1_R 18 SD-VSS/MMC-VSS2 CCR15, CCR14 close to JCR1
SD_D1_R 19 SD-DAT0/MMC-DAT Pin 4, 11
SD_CD# 20 SD-DAT1
21 SD-CD 23
SD_W P_MS_BS 22 SD-GND GND1 24
SD-WP GND2
SP070012V00
CONN@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCIE-Card Reader-RTS5229
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 29 of 56
5 4 3 2 1
5 4 3 2 1
+INTERNAL_1.2V
W=40mil LA1
4.7UH_MMD-06CZ-4R7M-V1_5.5A_20% SSD@ W=40mil close to
+INTERNAL_1.2V 1 2 +EXTL 12.1K_0402_1% pin3/pin 1
RA1
+EXTL
1 @ 2 +VCC33IN
1 1 SH00000KN00 SSD@ 2 1 SREXT 0_0402_5% 2
+VCC33IN
RAS1
D 0.1U_0402_16V7K D
CAS1
10U_0603_6.3V6M
CAS2
RA2 CAS3
L and C close to pin2 2 1 PREXT 10U_0603_6.3V6M
2 2 1
12.1K_0402_1% SSD@
CAS2.Pin2 close to UAS1.Pin 1
SSD@ UAS1
37
18
44
11
43
48
19
12
25
36
30
2
7
VCC33IN
VCC33S
VCC33P
VDD12P
PREXT
SREXT
EXTL
VCC33_1
VCC33_2
VCC12_1
VCC12_2
VCC12_3
VCC12_4
VDD12S_1
VDD12S_2
SSD@ SSD@
SSD@
34 PCIE_PRX_C_ATX_P3 CA1 1 2 0.1U_0402_16V7K
31 PTXP 35 1 2 PCIE_PRX_ATX_P3 (6)
PCIE_PRX_C_ATX_N3 CA2 0.1U_0402_16V7K
(6) PCIE_PTX_ARXP PRXP PTXN PCIE_PRX_ATX_N3 (6)
32 SSD@
(6) PCIE_PTX_ARXN 26 PRXN 20
(9) CLK_PCIE_SATA PECLKP STXP_A SATA_PTX_DRX_P2 (31)
27 21 SATA_PTX_DRX_N2 (31)
(9) CLK_PCIE_SATA# 45 PECLKN STXN_A 13
(14,27,28,29,8) APU_PCIE_RST# PERST# SRXP_B 14
24 SRXN_B
(31) SATA_PRX_DTX_P2 23 SRXP_A 4
(31) SATA_PRX_DTX_N2 SRXN_A GPIO0
17 5
16 STXP_B GPIO1 6
STXN_B GPIO2 46
ASM_XI 29 LED 47
C XI TESTMODE H/W Strapping C
VSSPWM
SPI_CK TPA2
39 ASM_SPI_DO 1 2 SPI_DO
GNDA1
GNDA2
GNDA3
SPI_DO
GND1
GND2
GND3
GND4
40 ASM_SPI_CS#
SPI_CS# TPA3 0: Spin up by H/W
4.7K_0402_5% 1: Spin up by S/W
8
10
42
15
22
33
49
ASM1061_QFN48_7X7
SA000067I00 XI & XO follow differential layout rule for Min. jitter
CA3
SSD@ 12P_0402_50V8J RA3
ASM_XI 1 2 ASM_XO 1 2
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SSD@ SSD@
YA1
Crystal 0_0402_5%
4 3 ASM_XO_R
NC OUT
1 2
IN NC
B B
20MHZ_12PF_7V20000007
SJ10000FU00
SSD@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ASM1061
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 30 of 56
5 4 3 2 1
5 4 3 2 1
+3VS_S0 +3V_SSD_S0
W=60mils
Place close to JSSD1
JPSSD1
1 2
JUMP_43X79 1 1 1
D @ SSD@ D
4.7U_0603_6.3V6K
CSSD1
.1U_0402_16V7K
CSSD2
.1U_0402_16V7K
CSSD3
SSD@
2 2 2
JSSD1
1 2
3 GND 3.3VAUX 4
5 GND 3.3VAUX 6
7 PERn3 N/C 8
9 PERp3 N/C 10
11 GND DAS/DSS# 12
13 PETp3 3.3VAUX 14
ADD L/R Close to JSSD1 1216 PETn3 3.3VAUX
15 16
C GND 3.3VAUX C
17 18
19 PERn2 3.3VAUX 20
21 PERp2 N/C 22
23 GND N/C 24
25 PETp2 N/C 26
27 PETn2 N/C 28
SSD_EMI@ 29 GND N/C 30
RSSD71 2 0_0402_5% 31 PERn1 N/C 32
33 PERp1 N/C 34
35 GND N/C 36
RSSD61 2 0_0402_5% 37 PETn1 N/C 38
39 PETp1 DEVSLP 40
2 0.01U_0402_16V7K
CSSD4 1 SSD@ SATA_PRX_C_DTX_P2 SSD_EMI@ SATA_PRX_C_DTX_P2_R 41 GND N/C 42
(30) SATA_PRX_DTX_P2 PERn0/SATA-B+ N/C
(30) SATA_PRX_DTX_N2
2 0.01U_0402_16V7K
CSSD5 1 SSD@ SATA_PRX_C_DTX_N2 SATA_PRX_C_DTX_N2_R 43 44
45 PERp0/SATA-B- N/C 46
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2 0.01U_0402_16V7K
CSSD6 1 SSD@ SATA_PTX_C_DRX_N2 SATA_PTX_C_DRX_N2_R 47 GND N/C 48
(30) SATA_PTX_DRX_N2 PETn0/SATA-A- N/C
2 0.01U_0402_16V7K
CSSD7 1 SSD@ SATA_PTX_C_DRX_P2 SATA_PTX_C_DRX_P2_R 49 50
(30) SATA_PTX_DRX_P2 51 PETp0/SATA-A+ PERST# 52
53 GND CLKREQ# 54
SSD_EMI@ 55 REFCLKN PEWake# 56
RSSD81 2 0_0402_5% 57 REFCLKP N/C 58
GND N/C
RSSD51 2 0_0402_5%
B Key M B
SSD_EMI@ 67 68
69 N/C SUSCLK(32kHz) (O)(0/3.3V) 70
71 PEDET (OC-PCIe/GND-SATA) 3.3VAUX 72
73 GND 3.3VAUX 74
DSSD1 @SSD_ESD@ 75 GND 3.3VAUX
SATA_PRX_C_DTX_P2_R 10 1 SATA_PRX_C_DTX_P2_R GND
SATA_PRX_C_DTX_N2_R 9 2 SATA_PRX_C_DTX_N2_R 77 76
MTG77 MTG76
SATA_PTX_C_DRX_N2_R 7 4 SATA_PTX_C_DRX_N2_R
AZ1043-04F
Part Number = SC300003M00
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SSD (M2) - SATA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 31 of 56
5 4 3 2 1
5 4 3 2 1
1
GNDA EMI@ 2 1 CAC11 2
CAC4 CAC5 1 RAC5 RAC6 330P_0402_50V7K
4.7U_0603_10V6K 0.1U_0402_16V4Z 2.2K_0402_5% 2.2K_0402_5% EMI@ 2 1 CAC12 AZ5125-02S.R7G 3P C/A SOT23
2 CAC6 330P_0402_50V7K ESD@
Need
4.7U_0603_10V6K
600 Ohm
2
2
D 40Mils 500 mA SM01000LP00 JHP1 D
MIC2-R LAC21 2 MURATA BLM15BD601SN1D 0402 MIC_R 4
Remove LDO 0222 MIC2-L LAC31 2 MURATA BLM15BD601SN1D 0402 MIC_L 3
40Mils SM01000LP00 HPR 2
HPL 1
GNDA SM01000LP00
HP_RIGHT_SW 1 2 HP_RIGHT_SW _R LAC41 2 MURATA BLM15BD601SN1D 0402 5
RAC9 47_0402_5% SM01000LP00 G 7
HP_LEFT_SW 1 2 HP_LEFT_SW _R LAC51 2 MURATA BLM15BD601SN1D 0402 6 8
G
RAC10 47_0402_5%
Need CONN@
680P_0402_50V7K
680P_0402_50V7K
SP061212202 GNDA
600 Ohm
CAC19 EMI@
CAC20 EMI@
@ @
1
500 mA EMI@
3
RAC11 RAC12 CAC21 1 2 0.1U_0402_16V4Z
20K_0402_5% 20K_0402_5%
2
RAC13 Place near Pin25 DAC3
1 2 +5VS_PVDD DAC2 2
+5VS_S0
GNDA GNDA AZ5125-02S.R7G 3P C/A SOT23 1
@ 0_0805_5% ESD@ 3
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0603_6.3V6K
2 1 1
CAC25
CAC24
GNDA AZ5125-02S.R7G 3P C/A SOT23
CAC23 +5VDDA_CODEC_S0 ESD@
1
JPH1_HP_DET# CAC221 2 0.1U_0402_16V4Z
1 2 2 @EMI@
10U_0603_6.3V6M
Place near Pin40 CAC27 10U_0603_6.3V6M
0.1U_0402_16V4Z
+IOVDD_CODEC_S0 +1.5VS_S0
1 1
C +IOVDD_CODEC_S0 C
CAC28
2 1
CAC26
GNDA +1.5VS_S0
@
+1.5VS_CODECS0_AVDD2 1 2 2 2 @
+3VDD_CODEC_S0 RAC15 0_0402_5% 1 RAC8 2
10U_0603_6.3V6M
0.1U_0402_16V4Z
1 1 0_0402_5%
+3V3_DSW
CAC15
CAC16
+3VALW _S5_VDD33 STB RAC191 2
0_0402_5%
2 @ 2
EMI
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GNDA
41
46
26
40
20
1
DVDD-IO
PVDD1
PVDD2
AVDD1
AVDD2
VDD33 STB
RAC201 2 12/26 add pin name
0_0402_5%
RAC35 1K_0402_5% HDA_BITCLK_AUDIO_EMI 1 2 HDA_BITCLK_AUDIO
HP_LEFT_SW 1 2 LINE1_LEFT_R CAC52 1 2 4.7U_0603_10V6K LINE1_LEFT 22 +3VDD_CODEC_S0 RAC17 27_0402_5% @EMI@
HP_RIGHT_SW 1 2 LINE1_RIGHT_RCAC51 1 2 4.7U_0603_10V6K LINE1_RIGHT 21 LINE1-L(PORT-C-L) 43 +3VS_S0
LINE1-R(PORT-C-R) SPK-OUT-L- 1
RAC36 1K_0402_5% 1U_0402_6.3V6K 42
AMP_FRONT_LEFT CAC43 2 1 A_LINE_L 24 SPK-OUT-L+ CAC29
(33) AMP_FRONT_LEFT AMP_FRONT_RIGHT CAC44 2 1 A_LINE_R 23 LINE2-L(PORT-E-L) 45 1 @ 2 33P_0402_50V8J
(33) AMP_FRONT_RIGHT 1U_0402_6.3V6K LINE2-R(PORT-E-R) SPK-OUT-R+ 44 RAC7 0_0603_5% 2 @EMI@
1U_0402_6.3V6K
0.1U_0402_16V4Z
MIC2-L 17 SPK-OUT-R-
correct wrong net name MIC2-L(PORT-F-L) /RING2 1
1
18
CAC13
MIC2-R
CAC14
Add 1U for Vedor review 1224 MIC2-R(PORT-F-R) /SLEEVE * RAC17/CAC29 Close to UAC4
32 HP_LEFT_SW
HP_LEFT_SW _R RAC37 1 2 4.7K_0402_5% LINE1_VREFO-L 31 HPOUT-L(PORT-I-L) 33 HP_RIGHT_SW
2
HP_RIGHT_SW _R RAC38 1 2 4.7K_0402_5% LINE1_VREFO-R 30 LINE1-VREFO-L HPOUT-R(PORT-I-R) 2
LINE1-VREFO-R 10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO (8)
2 6 HDA_BITCLK_AUDIO
(23) INT_DMIC_DATA GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO (8)
B 1 2 INT_DMIC_CLK_R 3 Place near Pin1 B
(23) INT_DMIC_CLK GPIO1/DMIC-CLK
1 LAC6 EMI@ SBY100505T-301Y-N
+3VDD_CODEC_S0
47 5
CAC33
@EMI@ HDA_SDOUT_AUDIO
22P_0402_50V8J
SENSEA JPH1_HP_DET# RAC271 2 SENSEA 13 MIC2/LINE2 JD(JD2) MONO-OUT 12/26 add pin name
CBP 37
HP/LINE1 JD(JD1)
MIC2-VREFO
29
+MIC2_VREFO_S0 PC Beep
HDA_RST_AUDIO# CAC352 1 1U_0402_6.3V6K CBN 35 CBP 7 LDO3 CAC36 1 2 10U_0603_6.3V6M
CBN LDO3-CAP 39 LDO2 CAC37 1 2 10U_0603_6.3V6M
1
CAC30 LDO2-CAP 27 LDO1 CAC38 1 2 10U_0603_6.3V6M EC Beep
0.1U_0402_16V4Z 36 LDO1-CAP RAC281 2 100K_0402_5% APU_SPKR 1 2 PCH_SPKR_C 1 2PCH_SPKR_R2 1 2 PC_BEEP
+3VS_S0 CPVDD (8) APU_SPKR
ESD@ CAC391 2 10U_0603_6.3V6M CAC31 0.1U_0402_16V4Z RAC21
2 28 UAC1_VREF 1 2 1K_0402_5% CAC32
VREF
1
CAC40 2.2U_0402_16V6K 12/25 modify pin name 0.1U_0402_16V7K
1
CAC30 close to UAC4 GNDA @
CAC411 2UAC3_MICCAP_P19 19 34 CPVEE RAC22 CAC34
MIC-CAP CPVEE 10K_0402_5%
Modify CAC40 to 2.2U 1229 0.1U_0402_16V7K
10U_0603_6.3V6M 2
2
2
EMI@ CAC45 1 2 0.1U_0402_16V4Z 49 25 CAC42
Thermal PAD AVSS1 38
AVSS2 1U_0402_6.3V6K
EMI@ CAC46 1 2 0.1U_0402_16V4Z 1
ALC233-VB2-CG_MQFN48_6X6
EMI@ CAC47 1 2 0.1U_0402_16V4Z GNDA
GNDA
A EMI@ CAC48 1 2 0.1U_0402_16V4Z A
Add 0 ohm connect GND / GNDA Security Classification Compal Secret Data Compal Electronics, Inc.
GND GNDA Issued Date 2014/09/24 Deciphered Date 2016/09/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec_ALC233-VC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 32 of 56
5 4 3 2 1
1 2 3 4 5
+12VALW _S5
+12V_AMP_S5 LAA1 EMI@
FCM1608KF-300T07_0603
OUTPL 1 2 SPKL+
120 mil LAA2 120 mil 1 1
1 2
HCB1608KF-121T30_0603 1 @EMI@ CAA1 CAA2
220U_16V_M
CAA5
680P_0603_50V8J 1500P_0603_50V7K
+ 2 2
A A
OUTPL_EMI
1
2 RAA1
@EMI@ 10_0805_5%
2
LAA4 EMI@
FCM1608KF-300T07_0603
RAA25 / RAA29 change to pop 01/26 OUTNL 1 2 SPKL-
RAA25,29,35,39 Change to 3.9K (38) AMP_PD# 1 1
+12V_AMP_S5
1
RAA26,28,33,36 Change to 2.8K 02/18 @EMI@ CAA12 CAA13
CAA31 change to 0.1U 03/09 RAA20 680P_0603_50V8J 1500P_0603_50V7K
2 2
100K_0402_5% OUTNL_EMI
1 RAA24 2 1 1
2
(22) S_LINE_OUTL
1
10K_0402_1%
APA6003 for Speaker (CRB) CAA28 CAA21 RAA2
UAA1 0.1U_0402_16V7K 1000P_0402_50V7K @EMI@ 10_0805_5%
RAA25 2 2
Change to 32dB 1 2 3.9K_0402_1% LINE_OUTL_R_C CAA291 20.1U_0402_25V6 S_LINE_OUTL_R 1 28
+12V_AMP_S5 GNDA LINPA /FLAG
in INV
2
1 RAA26 2 2.8K_0402_1% LINE_OUTL_N_C CAA331 20.1U_0402_25V6 S_LINE_OUTL_N 2 27 AMP_PD#
GNDA LINNA /SD
1 RAA27 2 LINP_C CAA301 20.1U_0402_25V6 AMP_FRONT_LEFT_R 3 26
(32) AMP_FRONT_LEFT LINP LPVDD
2
@ @ 10K_0402_1% Change CCA28/CCA21 GND from GNDA to GND. 0215 LAA5 EMI@
RAA12 RAA13 1
1 RAA28 2AMP_L_C_N_1 2 AMP_L_C_N 4 25 BSPL 1 2 CAA32 0.22U_0603_25V7K FCM1608KF-300T07_0603
B RAA29 LINN LBSP B
100K_0402_5% 100K_0402_5% 1 2 3.9K_0402_1% 2.8K_0402_1% CAA31 0.1U_0402_25V6 OUTPR 1 2 SPKR+
GNDA
AMP_GAIN0 5 24 OUTPL 1 1
GAIN0 LOUTP
2 1
2 1
1
CAA36
1
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GNDA RAA32 20K_0402_1%
2
1 RAA33 2 AMP_R_C_N_1 1 2 AMP_R_C_N 11 18 BSNR 1 2 CAA40 0.22U_0603_25V7K +12V_AMP_S5
GNDA RINN RBSP
2.8K_0402_1% CAA39 0.1U_0402_25V6
RAA341 2 10K_0402_1% AMP_FRONT_RIGHT_R_C1 2 CAA41 AMP_FRONT_RIGHT_R 12 17
(32) AMP_FRONT_RIGHT RINP RPVDD +12V_AMP_S5
RAA35 0.1U_0402_25V6
1 2 3.9K_0402_1% 13 16
GNDA RINNA MONO
1 1 LAA6 EMI@
1 RAA36 2 S_LINE_OUTR_N_C 1 2 S_LINE_OUTR_N 14 15 FCM1608KF-300T07_0603
GNDA RINPA SEL MUX_SEL (38)
2.8K_0402_1% CAA42 0.1U_0402_25V6 CAA10 CAA11 OUTNR 1 2 SPKR-
1
0.1U_0402_16V7K 1000P_0402_50V7K 1 1
1 RAA372 S_LINE_OUTR_C 1 2 S_LINE_OUTR_R RAA38 2 2
(22) S_LINE_OUTR 29
10K_0402_1% CAA43 0.1U_0402_25V6 100K_0402_5% @EMI@ CAA25 CAA27
GPAD 680P_0603_50V8J 1500P_0603_50V7K
RAA39 SC@ 2 2
1 2 3.9K_0402_1%
GNDA
2
APA6003RI-TRG_TSSOP28 GNDA
RAA31 change to 88.7K / RAA32 change to 20K 0216 SA00009OY00 OUTNR_EMI
INPUT Close to UAA1 Pin17
1
GAIN1 GAIN0 AV(inv) IMPEDANCE CAA441 2 0.1U_0402_16V4Z RAA14
C @EMI@ 10_0805_5% C
0 0 20dB 60Kohm L=Audio Codec Input source
EMI@ MUX_SEL H=Scalar Input source
2
GND GNDA
0 1 26dB 30Kohm Speaker Conn.
3Wx2 4ohm Speaker
1 0 32dB 15Kohm
JSPK1
SPKL+ 1
SPKL- 2 1
1 1 36dB 9Kohm 2
SPKR- 3
SPKR+ 4 3
4
5
6 GND
GND
CONN@
SP02000ZS00
2
DAA2 DAA1
PESD5V0U2BT_SOT23-3 PESD5V0U2BT_SOT23-3
@ESD@ @ESD@
1
D D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amp APA6003
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 33 of 56
1 2 3 4 5
5 4 3 2 1
1
LUS1 EMI@
2
USB3.0 Conn. W=80mil
+USB3_VCCA_S5
JUSB1
+USB3_VCCA_S5 4 3 @ 1
+USB3_VCCA_S5 VBUS
CUS3
CUS4
CUS6
CUS5
1 1 USB20_N6_C 2
D-
1
HCM1012GH900BP_4P USB20_P6_C 3
1 2 USB3_CTX_C_DRX_N2 USB3_CTX_L_DRX_N2 4 D+
(9) USB3_CTX_DRX_N2 GND
1
CUS2 .1U_0402_16V7K USB3_CRX_L_DTX_N2 5
2
2 2 SSRX-
100U_1206_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
0.1U_0402_16V7K
RUS3 USB3_CRX_L_DTX_P2 6 10
470_0603_5% USB_KDBG_DET 7 SSTX+ GND 11
(38) USB_KDBG_DET GND GND
USB3_CRX_L_DTX_P2 USB3_CTX_L_DRX_N2 8 12
(9) USB3_CRX_DTX_P2 SSTX- GND
USB3_CTX_L_DRX_P2 9 13
1+USB3_VCCA_DIS 2
3
1 2 SP011412195
1
DUS1 CONN@
3
4 3 AZC199-02SPR7G_SOT23-3 RUS5
1
100K_0402_5%
HCM1012GH900BP_4P DUS2
2
USB3_CRX_L_DTX_N2 USB3_CRX_L_DTX_N2 1 1 10 9 USB3_CRX_L_DTX_N2 ESD@
(9) USB3_CRX_DTX_N2
D 2 2
USB3_CRX_L_DTX_P2 9 8 USB3_CRX_L_DTX_P2
USB3_VCCA_EN# 2 QUS1
G L2N7002WT1G_SC-70-3 USB20_P6_SW USB3_CTX_L_DRX_N2 4 4 7 7 USB3_CTX_L_DRX_N2
(9) USB20_P6
S SB00000ST00
3
2 1 8
USB MUX Selection
MCM1012B900F06BP_4P AZ1043-04F DFN2510P10E
USB20_N6_SW SC300003M00 ESD@ +3V3_DSW KDBG_MUX_SEL Output
(9) USB20_N6
Place close to JUSB4 H D = D2
+USB3_VCCA_S5 L D = D1
+5VALW_S5 2.0A 1
5
VOUT
(28,38) E51_TXD 1
@
2
For WIN 7 Debug 2
1
3 RUS12 0_0402_5% USB20_P6_SW 3 8 USB20_P6_C D QUS2
C OCB USB_OC#3 (8) 2D+ D+ C
1 USB20_N6_SW 4 7 USB20_N6_C 2 USB_KDBG_DET
5 2D- D- 6 G
GND OE# 1
CUS9 RT9742DGJ5 _SOT23-5 S L2N7002WT1G_SC-70-3 CUS8
3
0.1U_0402_16V7K NX3DV221GM_XQFN10U10_2X1P55 SB00000ST00
2 56P_0402_50V7K
Main: SA00009R300 RT9742DGJ5 TSOT23 5P 2
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P
QUS2 swap D/S for errror pin define 01/26
W=80mils +USB3_VCCB_S5
W=80mils
+5VALW_S5 NCHG@ 2.0A UUS3
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1 LUS4 EMI@
NCHG@ VOUT USB20_N7_CHR 3 4 USB20_N7_CHR_L +USB3_VCCB_S5
CUS101 2 5
0.1U_0402_16V7K VIN 2
GND USB20_P7_CHR 2 1 USB20_P7_CHR_L
PSU: USB3_VCCB_EN# 4
RUS20= 30Kohm
(38) USB3_VCCB_EN# EN#
OCB
3 USB_OC#2 MCM1012B900F06BP_4P USB3.0 Conn. @
CUS11
CUS12
CUS13
CUS14
Non Charger 1 1
1
RUS21= 30Kohm
RT9742DGJ5 _SOT23-5
USB20_N7 1 2 USB20_N7_CHR +USB3_VCCB_S5
Adapter:
2
2 2
100U_1206_6.3V6M
47U_0805_6.3V6M
47U_0805_6.3V6M
0.1U_0402_16V7K
NCHG@ RUS15 0_0402_5% W=80mil
RUS20= 48.7Kohm USB20_P7 1 2 USB20_P7_CHR
RUS21= 20Kohm NCHG@ RUS16 0_0402_5% JUSB2
Main: SA00009R300 RT9742DGJ5 TSOT23 5P 1
USB20_N7_CHR_L 2 VBUS
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P D-
USB20_P7_CHR_L 3
+5VALW_S5 LUS5 EMI@ 4 D+
CHG@ 4 3 USB3_CRX_L_DTX_N3 5 GND
(9) USB3_CRX_DTX_N3 SSRX-
CUS15 0.1U_0402_16V4Z USB3_CRX_L_DTX_P3 6 10
1 2 +USB3_VCCB_S5 7 SSTX+ GND 11
B B
1 2 8 GND GND 12
Charger W=80mils UUS4 CHG@
W=80mils
(9) USB3_CRX_DTX_P3
9 SSTX-
SSTX+
GND
GND
13 +USB3_VCCB_S5
1 12 HCM1012GH900BP_4P
IN OUT
Modify RUS20 to 48.7K ohm for USB30 0.9A SP011412195
(8) USB_OC#2 USB_OC#2 13 9 CONN@
FAULT# STATUS# Modify RUS21 to 20K ohm for 2.1A DCP 0217
3
USB20_N7 2 11 USB20_N7_CHR DUS3
3
(9) USB20_N7 DM_OUT DM_IN
USB20_P7 3 10 USB20_P7_CHR
(9) USB20_P7 DP_OUT DP_IN CHG@ CUS16 0.1U_0402_16V7K LUS6 EMI@
1
4 15 UUS5_ILIM_L 1 RUS20 2 48.7K_0402_1% (9) USB3_CTX_DRX_N3 1 2 USB3_CTX_C_DRX_N3 4 3 USB3_CTX_L_DRX_N3
(38) USB_ILIM_SEL 5 ILIM_SEL ILIM_LO 16 UUS5_ILIM_H 1 2
1
(38) USB_CHR_EN EN ILIM_HI RUS21 20K_0402_1% CUS17 0.1U_0402_16V7K @ESD@
6 CHG@ (9) USB3_CTX_DRX_P3 1 2 USB3_CTX_C_DRX_P3 1 2
(38) USB_CHRMODE1 CTL1
7 14 AZC199-02SPR7G_SOT23-3
(38) USB_CHRMODE2 CTL2 GND
8 17 HCM1012GH900BP_4P
(38) USB_CHRMODE3 CTL3 GPAD
TPS2546RTER_QFN16_3X3
+USB3_VCCB_S5
1
RUS23
470_0603_5% DUS4 DUS5 ESD@
USB3_CRX_L_DTX_N3 1 10 USB3_CRX_L_DTX_N3 USB20_P6_C 1 10 USB20_P6_C
Charger CT CTL1 CTL2 CTL3 ILIM_SEL
1+USB3_VCCB_DIS 2
3 Place close 3
to JUSB5
A 8 8 A
D
USB3_VCCB_EN# 2 QUS3 AZ1043-04F AZ1143-04F
G L2N7002WT1G_SC-70-3 Part Number = SC300003M00 Part Number = SC300003M00
S SB00000ST00 ESD@
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Side USB30
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 34 of 56
5 4 3 2 1
A B C D E
+USB2_VCCA_S3
BIOS Recovery USB2.0 Conn.
+USB2_VCCA_S3 +USB2_VCCA_S3
1
MCM1012B900F06BP_4P JUSB3
W=100mils 2.0A W=100mils RUH2 3 4 1
+5VALW _S5 +USB2_VCCA_S3 (9) USB20_N0 2 VBUS
470_0603_5% USB20_N0_R
D-
3
UUH1 SM070003Z00 USB20_P0_R 3
1 DUH1 2 1 4 D+
3
1+USB2_VCCA_DIS 2
VOUT (9) USB20_P0 5 GND
(38) USB_BIOS_CLK USB_BIOS_CLK
5 LUH1 EMI@ USB_BIOS_MOSI 6 SSRX-
VIN (38) USB_BIOS_MOSI SSRX+
1
2 USB_BIOS_DET 7
GND (38) USB_BIOS_DET GND_DRAIN
USB_BIOS_MISO 8
(38,9) USB_BIOS_MISO
1
USB2_VCCA_EN# 4 @ESD@ USB_BIOS_CS# 9 SSTX-
(38) USB2_VCCA_EN# EN# (38) USB_BIOS_CS# SSTX+
3 USB_OC#0 Place close to JUSB3
1 OCB USB_OC#0 (8) 1
1 AZC199-02SPR7G_SOT23-3 10
GND
1
+USB2_VCCA_S3 11
CUH1 RT9742DGJ5_SOT23-5 RUH4 12 GND
D DUH2 ESD@ 13 GND
100K_0402_5% GND
0.1U_0402_16V7K 2 USB2_VCCA_EN# 2 QUH1 USB20_P1_R 1 1 10 9 USB20_P1_R
47U_0805_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
2
CUH2
CUH3
CUH4
3
1
USB20_N0_R 4 4 7 7USB20_N0_R
2
2 2 5 5
Main: SA00009R300 RT9742DGJ5 TSOT23 5P USB20_P0_R 6 6USB20_P0_R
Second: SA00009RN00 UP7549UMA5-20 SOT23 5P
3 3
+USB2_VCCB_S3
8 Place close to JUSB3 and JUSB4
+USB2_VCCB_S3
W=100mils W=100mils AZ1043-04F DFN2510P10E
2.0A
3
+5VALW _S5 +USB2_VCCB_S3 SC300003M00 +USB2_VCCB_S3
1
UUH2 DUH3
3
1 RUH5
+USB2_VCCB_S3 VOUT 470_0603_5%
1
5 JUSB4
VIN 2 MCM1012B900F06BP_4P 1
1+USB2_VCCB_DIS 2
1
GND 2 1 USB20_N1_R VCC @ESD@
(9) USB20_N1
47U_0805_6.3V6M
0.1U_0402_16V7K
0.1U_0402_16V7K
USB2_VCCB_EN# 4 2
(38) USB2_VCCB_EN# EN# D-
CUH5
CUH6
CUH7
1 3 4 USB20_P1_R 3 5
(9) USB20_P1 D+ GND1
CUH8 RT9742DGJ5_SOT23-5 LUH2 EMI@ 4 6
2
3
CONN@
USB2.0 Conn.
2.0A
www.teknisi-indonesia.com +USB2_VCCC_S3
W=100mils W=100mils
+5VALW _S5 +USB2_VCCC_S3 JUSB5
UUH3 MCM1012B900F06BP_4P 1
1 2 1 VCC
VOUT (9) USB20_N2 2
USB20_N2_R
5 SM070003Z00 D-
VIN 2 3 4 USB20_P2_R 3 5
GND (9) USB20_P2 D+ GND1
USB2_VCCC_EN# 4 LUH3 EMI@ 4 6
(38) USB2_VCCC_EN# EN# 3 GND GND2
USB_OC#1 USB_OC#1 (8)
OCB
1
3 TYCO_2041230-1 3
CUS18 RT9742DGJ5_SOT23-5
0.1U_0402_16V7K DC233006L00
2
+USB2_VCCC_S3 DUH4
USB2.0 Conn.
+USB2_VCCC_S3 1 1 10 9
2 2 9 8
1
0.1U_0402_16V7K
47U_0805_6.3V6M
0.1U_0402_16V7K
CUH10
CUH9
CUH11
RUS24 1 1 USB20_N2_R 4 4 7 7 USB20_N2_R
1
470_0603_5%
USB20_P2_R 5 5 6 6 USB20_P2_R +USB2_VCCC_S3
1+USB2_VCCC_DIS2
2 2 3 3
3
8
DUH5
3
AZ1043-04F DFN2510P10E
SC300003M00 ESD@
1
1
D @ESD@
USB2_VCCC_EN# 2 QUS4
G L2N7002W T1G_SC-70-3 AZC199-02SPR7G_SOT23-3
S SB00000ST00
3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Rear USB PORT
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 35 of 56
A B C D E
5 4 3 2 1
D D
+3VS_S0
CTH1 1 2 APU_ALERT#_R
.1U_0402_16V7K
2
@ESD@
RTH1
51_0402_5%
For ESD
@
@ UTH1
1
CTH2 1 2 VDD_T_2V85 1 8
EC_SMB_CK0 (15,38,7)
.1U_0402_16V7K VDD SCLK
UTH1_D+ 2 7
EC
D+ SDATA EC_SMB_DA0 (15,38,7)
2200P_0402_50V7K
1
@ CTH3 3 6 APU_ALERT#_R
C D-ALERT/THERM2 C
1
QTH1C 4 5 1 2
2 THERM GND +3VS_S0
SB000008E10 2 UTH1_D- RTH2 10K_0402_5%
MMBT3904W H NPN SOT323-3 B @
E@ W 83L771AW G-2 TSSOP 8P
3
SA00003PU00 @ main source:SA00003PU00
Second source:SA00000V200
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+5VS_S0
RFA1
10K_0402_5%
JFAN1
1
3
1K_0402_5% 2 1
1
RFA2 1 2 FAN_CPU_SPEED_R 3 2
(38) FAN_SPEED 3
(38) FAN_PW M 1 2 FAN_CPU_PW M_R 4
RFA3 4
2
100_0402_5% 1 5
CFA3 6 GND
CFA4 GND
1000P_0402_50V7K
1000P_0402_50V7K 1 CONN@
2
FAN_PWM signal need keep 10 mil to other signal SP02000ZS00
A A
@ESD@
SC600001600
1
1
1
G
G
5
6
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1
RPW R2
10K_0402_5%
Bottom Side
2
RPW R3
@ 33_0402_5%
1 R17 2 ON/OFF#_R 1 2 ON/OFF#
ON/OFF# (38)
0_0805_5% 1
CPW R1
0.1U_0402_16V4Z
2
Test Only
3 3
1
1
H4 H5 H6 H7 @ @
1
H_4P2-G H_4P2-G H_4P2-G H_4P0-G H_4P0-G H_4P0-G @ @ @ @
1
1
1
1
H_3P3 H_3P3
H18 H19
H_3P8 H_3P8 H_3P8 H_3P8
@ @
1
H10 H11
H_4P0-G @ @
H_4P0-G
1
1
H_3P3 H_3P3 FD1 FD2 FD3 FD4
H18 for Convertor board GND SCREW HOLE 1217 @ @ @ @
1
1
1
4 4
2P0 x2
H20 H21 H22 H23 H24
@ @ @ @ @
Security Classification Compal Secret Data Compal Electronics, Inc.
1
H_4P0X3P5N H_3P5N H_3P0N H_2P0N H_2P0N Issued Date 2011/09/12 Deciphered Date 2012/09/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR SW/LED/SCREW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 37 of 56
A B C D E
A B C D E
CEC5 0.1U_0402_16V4Z
CEC2 0.1U_0402_16V4Z
CEC3 0.1U_0402_16V4Z
1 1 1 1 V1.0 update 1 1 LEC1 FCM1608KF-800T07_0603 EC_SPI_CS# 1 8
CS# VCC
1 REC4 2
+RTCVCC_S5 +RTC_EC_S5
0_0603_5%
0_0603_5% CEC6 EC_SPI_DO 2 7 EC_SPI_HOLD#
REC2 REC3 CEC4 CEC7 EC_SPI_W P# 3 DO(IO1) HOLD#(IO3) 6 EC_SPI_CLK
+3V3_DSW REC5 1 WP#(IO2) CLK
0.1U_0402_16V4Z
10_0402_5% 10_0402_5% 10U_0603_6.3V6M 2 0_0603_5% 10U_0603_6.3V6M 4 5 EC_SPI_DI
2 2 2 2 2 2@ GND DI(IO0)
CEC9
@EMI@ @EMI@
0.1U_0402_16V4Z
1 1
2
3VCC_S0
LPC_CLK0_EC_EMI EC_SPI_CLK_R_EMI 1 @ 2 ECAGND W 25X10CLSNIG_SO8 +3VALW _EC_S5
1 1 SA00006HH00
REC6
CEC10 @ CEC8 EC_SPI_HOLD# REC7 1 2 4.7K_0402_5%
0_0603_5% 2 2
6.8P_0402_50V8C CEC11 ECAGND EC_SPI_W P# REC8 1 2 4.7K_0402_5%
@EMI@ 10P_0402_50V8J 0122 update 10U_0603_6.3V6M REC27 33_0402_5%
108
119
2 2
@EMI@ HDMI_IN_function change to pin126 (12/17)EC_SPI_CLK_R 1 2 EC_SPI_CLK RPEC1
99
24
46
85
1
UEC2 EMI@ EC_SPI_DO_R 1 8 EC_SPI_DO
1 1
1 2 EC_RSMRST# CEC12 change to pop for EMI request 2/15 EC_SPI_DI_R 2 7 EC_SPI_DI
VBAT
3VCC
3VSB
3VSB
3VSB
AVSB
VTT
ESD@ CEC13 5P_0402_50V 126 HDMI_IN_function 3 6
1 2 VR_ON PANEL_ID1 27 GPIO81 / PWMOUT / TACHIN / USB_LED 127 PCIE_W AKE# 1 2 REC9 EC_SPI_CS#_R 4 5 EC_SPI_CS#
(22,51) PANEL_ID1 GA20 / SPI_WP# / GPIO11 GPIO82 / PWMOUT / TACHIN / TACHPWM 3 APU_PCIE_W AKE# (27,8)
@ESD@ CEC14 0.1U_0402_16V4Z KB_RST# 28 KBC Interface PWM FAN_SPEED 0_0402_5%
1 2 (8) KB_RST# 25 KBRST# / SPI_HOLD# / GPIO12 PWMOUT / TACHIN / GPIO00 / TACHPWM 4 FAN_SPEED (36)
PW R_ON_LED# (8,9) LPC_FRAME# LPC_FRAME# FAN_PW M 22_0804_8P4R_5% EMI@
20 LFRAME# PWMOUT / TACHIN / GPIO01 / TACHPWM FAN_PW M (36)
EMI@ CEC12 0.1U_0402_16V4Z (9) LPC_AD3 LPC_AD3
1 2 ON/OFF# LPC_AD2 21 LAD3 96 AMDPW R_EN 1 2
(9) LPC_AD2 LAD2
@EMI@ CEC15 0.1U_0402_16V4Z (9) LPC_AD1 LPC_AD1 22 Strapping CIRTX1/(AMDPWR_EN) / CIRTX1 / GPIO05 103 PANEL_ID2 REC10 4.7K_0402_5% +3VALW _EC_S5
23 LAD1 TACHIN / PWMOUT / GPIO83 104 PANEL_ID2 (22,51)
(9) LPC_AD0 LPC_AD0 LPC & MISC PANEL_ID3
19 LAD0 TACHIN / PWMOUT / GPIO84 PANEL_ID3 (22,51)
+3V3_DSW
SERIRQ
(9) SERIRQ SERIRQ#
1
SC_MODE2 18
+3VALW _S5 (22) SC_MODE2 LDRQ# / GPIO10
EC_SCI# 65 105 EC_AD_BID REC111 2 AD_BID Ra
(8) EC_SCI# PME# / GPEN02 V_COMP0 / THR0 / VIN0
2
CLK_PCI_EC 17 114 10K_0402_5% REC12
REC56 1 2 EC_SCI#
(8,9) CLK_PCI_EC
PLT_RST# 26 PCICLK V_COMP1 / THR1 / VIN1 115 AD Voltage Range: REC50 (100K) 100K_0402_5%
10K_0402_5% (8) PLT_RST# LRESET# V_COMP2 / THR2 / VIN2 116 10K_0402_5%
0 to 2.048 V
2
CEC161 2 @ESD@ AD Input V_COMP3 / THR3 / VIN3 111 C5@
33P_0402_50V8J 29 THR16 / VIN16 / TD2P 112 AD_BID
1
+3VS_S0 30 CTSA# / CIRRX / GPIO20 THR15 / VIN15 / TD1P 113
DSRA# / CIRWB / GPIO21 THR14 / VIN14 / TD0P
1
EC_SIO_SEL 31 Add Panel_ID4 0216 PANEL_ID4
REC57 1 2 SERIRQ 4.7K_0402_5% 2 1 REC15 HW ACPI_DIS 32 RTSA# / CIRTX1 / GPIO22 (2E_4E_SEL) Strapping
REC16
+3VALW _EC_S5 DTRA# / CIRTX2 / GPIO23 (DIS_HWACPI) Strapping
2
10K_0402_5% E51_RXD 33 2 PANEL_ID4
(34) E51_RXD 34 SINA / GPIO24 SMI# / OVT# / GPIO85 55 PANEL_ID4 (22)
E51_TXD LAN_PHY_DIS# REC51 56K_0402_1%
+3VS_S0 (28,34) E51_TXD 35 SOUTA_P80 / SOUTA / GPIO25 STB# / GPIO13 / GRN_LED 100 LAN_PHY_DIS# (27)
SC_MODE3 10K_0402_5%
2
36 DCDA# / GPIO26 GPIO67 / CASEOPEN# 15 SCALER_ON# SC_MODE3 (22) C4@
ADD EN_1.8V_EN 12/08 RIA# / GPIO27 Serial Port Interface GPIO80 SCALER_ON# (22)
1
5
USB_D+
1
(48,49) VGATE
VGATE 7
8 CTSB# / TACHIN / PWMOUT / GPIO50
USB
USB_D-
6 EVT : 30K Ohm : 0.76V
REC14 Side USB Port
4.7K_0402_5% EC_1.8V_EN 9 DSRB# / TACHIN / PWMOUT / GPIO51 56 EC_DB_SO REC191 2 33_0402_5% DVT : 56K Ohm : 1.18V
(44,45,46) EC_1.8V_EN RTSB# / TACHIN / PWMOUT / GPIO52 MCLK / MCU_TDI / DB_SO / USB_MISO USB_BIOS_MISO (35,9)
(39,42,44,45,46) 3V5V_PG 3V5V_PG 10
DTRB# / TACHIN / PWMOUT / GPIO53
KBC Interface
MDAT / MCU_TDO / DB_SI / DB_TX / USB_CS#
57 EC_DB_SI REC201 2 33_0402_5%
USB_BIOS_CS# (35) PVT : 100K Ohm : 1.67V
Rear USB Port USB2_VCCA_EN# 11 58 EC_DB_SCK REC211 2 33_0402_5%
MP : 150K Ohm : 1.98V
2
2 (35) USB2_VCCA_EN# IRRX / SINB / TACHIN / PWMOUT / GPIO54 MCU_TCK / DB_SCK / KCLK / USB_SCK USB_BIOS_CLK (35) 2
EC_SIO_SEL SYSON 12 59 EC_DB_SCE# REC221 2 33_0402_5%
(39,41,45) SYSON 13 IRTX / SOUTB / TACHIN / PWMOUT / GPIO55 DB_RX / MCU_TMS / DB_SCE# / KDAT / USB_MOSI USB_BIOS_MOSI (35)
VR_ON
(48,49) VR_ON DCDB# / TACHIN / PWMOUT / GPIO56
1
SCE1#
1
(34) USB_CHRMODE2 125 GPIO72 / TACHIN / PWMOUT / CIRTX1 / TACHPWM P2_DGL# / BUSY / GPIO32 41
0: 2Eh/2Fh (34) USB_CHRMODE3
USB_CHRMODE3 SUSP#
SUSP# (39,41)
BIOS recovery
E51_CLK 37 GPIO73 / TACHIN / PWMOUT / CIRTX2 / TACHPWM P2_DGH# / ACK# / GPIO33 42
1: 4Eh/4Fh (28) E51_CLK GPIO74 / TACHIN / PWMOUT / TACHPWM P2_DGH# / PD7 / GPIO34 EC_BKOFF# (21,51)
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EC_RTCRST 102 43
(10) EC_RTCRST GPIO77 / SKTOCC# LED_A / PD6 / GPIO35 44 PW R_ON_LED# (37) (24mA sink current)
REC53 CEC28 Close to UEC2 1209 DGPU_OVERT#
LED_B / PD5 / GPIO36 45 DGPU_OVERT# (15)
118 Intel PECI/PWR Fault GPIO LED_C / PD4 / GPIO37 AMP_PD# (33)
AMDSIC / PWR_FAULT#
Add INA300_ALERT#
120 & 47 BIOS_SPI_CSOUT# on pin49 1214
AMDSID / PECI LED_D / PD3 / GPIO40 / CSOUT# 48 BIOS_SPI_CSOUT# (9)
AMD SB-TSI Int BIOS_SPI_SI
LED_E / PD2 / GPIO41 / CHPST_MOSI 49 BIOS_SPI_SI (28,9)
INA300_ALERT#
LED_F / PD1 / GPIO42 50 INA300_ALERT# (40)
+3VS_S0 BIOS_SPI_CLK
76 LED_G / PD0 / GPIO43 / CHPST_SCK 51 BIOS_SPI_CLK (28,9)
(15,36,7) EC_SMB_DA0 EC_SMB_DA0 CODEC_EAPD CODEC_EAPD (32)
REC24 EC_SMB_CK0 75 GPIO62 / MSDA0 SM Bus P1_DGL# / SLIN# / GPIO44 52 BIOS_SPI_SO
1 2 1K_0402_5% EC_SMB_CK0 (15,36,7) EC_SMB_CK0 GPIO63 / MSCL0 P1_DGL# / INIT# / GPIO45 / CHPST_MISO BIOS_SPI_SO (28,9)
REC25 1 2 1K_0402_5% EC_SMB_DA0 53 HW _12V_EN#
P1_DGH# / ERR# / GPIO46 54 HW _12V_EN# (43)
BIOS_SPI_CS0#
61 P1_DGH# / AFD# / GPIO47 / CHPST_CS# BIOS_SPI_CS0# (9)
ON/OFF#
(37) ON/OFF# PSIN# / GPEN04
+3VALW _EC_S5 PBTN_OUT# 60 97 PCHVSB REC341 2 4.7K_0402_5%
+3VALW _EC_S5
(8) PBTN_OUT# 101 PSOUT# / GPEN03 PCHVSB 93
(8) EC_RSMRST# EC_RSMRST# USB2_VCCB_EN# USB2_VCCB_EN# (35)
PM_SLP_S3# 64 RSMRST# / GPEN17 GPIO90 / SUSWARN# 92 Rear USB Port
REC261 2 4.7K_0402_5% EC_CRISIS (8) PM_SLP_S3# SLP_S3# / GPEN01 5VDUAL Change with pin 51
PM_SLP_S5# 84 DSW 90 EC_CRISIS
(8) PM_SLP_S5# SLP_S5# / GPEN06 GPIO91 / SUSWARN_5VDUAL
+3VALW _S5 80 ACPI 91 EC_CRISIS_KSO0
73 ATXPGD / GPEN10 GPIO92 / SUSACK# 89 SC_MODE1
Pin73 Reserve for INTEL platform 0222 GPEN16 / DPWROK SLP_SUS# / GPIO93 / 3VSBSW# SC_MODE1 (22)
3 83 88 EC_5V_EN +3VALW _S5 3
REC301 2 10K_0402_5% EC_RSMRST# RESETCON# / GPEN05 GPIO94 / SLP_SUS_FET EC_5V_EN (39,42) Power
USB2_VCCC_EN# 74
(35) USB2_VCCC_EN# GPIO95 / BKFD_CUT
USB3_VCCB_EN# 79 109
(34) USB3_VCCB_EN# 78 RSTOUT0# / GPEN11 VCORE / THR5 / VIN5 106
(21,22,51) EC_SMB_DA2 EC_SMB_DA2
+3V3_DSW EC_SMB_CK2 77 GPEN12 / RSTOUT1# / MSDA2 VLDT / THR6 / VIN6 107 PWR_0.95V_PG move to pin63 0223
(21,22,51) EC_SMB_CK2 GPEN13 / RSTOUT2# / MSCL2 VDIMM / THR7 / VIN7 63 1 2
AMD Power-On PW R_0.95V_PG PCIE_W AKE#
PSON# / AMD_PSON# / GPEN00 81 PW R_0.95V_PG (44)
Sequence APU_FCH_POK REC36 10K_0402_5%
1 SC@ 2 2.2K_0402_5% 87 PWROK0 / AMD_PWROK0 / GPEN14 82 APU_FCH_POK (8)
REC37 EC_SMB_CK2 EC_XIN
REC38 1 SC@ 2 2.2K_0402_5% EC_SMB_DA2 EC_XOUT 86 XIN PWROK1 / AMD_PWROK1 / GPEN15
XOUT REC39 CEC22 Close to UEC1 (SPI ROM)
1 1 HDMI_CABLE_DET# 70
(22,24) HDMI_CABLE_DET# 71 DEEP_S5_0 / 3VSBSW / LATCH_BKFD_CUT / GPIO66 110
(33) MUX_SEL MUX_SEL +EC_VREF_S5 +EC_VREF_S5 EC_SPI_CLK 2 1 EC_SPI_CLK_EMI
CEC18 CEC19 72 3VSBSW# / LATCH_BKFD_CUT# / GPEN07 VREF 62 EC_PAD_CAP REC39 10_0402_5%
DEEPS5_1 / CASEOPEN1# PAD_CAP
1
AGND
VSS
+3VS_S0 2 2 CEC22
EC_XOUT 1 2 EC_XIN CEC20 CEC21 6P_0402_50V8D
2
2
94
117
2
REC421 2 10K_0402_5% EC_RTCRST
4 3 REC54
REC431 2 4.7K_0402_5% SYSON NC OSC REC461 2 0_0402_5%
1 1 (48,49) VR_HOT# H_PROCHOT# (7) 10K_0402_5%
14.31818MHZ_12PF_X3G01431ADC1H Power @ SC@
REC451 2 10K_0402_5% VR_ON CEC26 CEC27 From power CPU_CORE 1
1
1
2
QEC1 G 47P_0402_50V8J
REC481 2 10K_0402_5% SUSP# 2 REC55
4 L2N7002W T1G_SC-70-3 S 4
3
SB00000ST00 10K_0402_5%
CEC26 /27 change to 15P 02/18 CVT@
1
AC in-->One touch -->Power button--> Clear CMOS
Always short-->AC in-->Power button--> Crisis EC DEBUG port
JCRIS1 Reserve R2009 for EC debug.
Security Classification Compal Secret Data Compal Electronics, Inc.
EC_CRISIS_KSO0 1 2015/01/23 2017/01/23 Title
EC_CRISIS 2 1 REC44
Issued Date Deciphered Date
2 1 2 E51_TXD
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC NCT6685D
100K_0402_5% AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
CVI_CH31022M107-0P Custom 0.1
CONN@
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 38 of 56
A B C D E
A B C D E
D
1 2 3VS_ON 1U_0402_6.3V6K 3 12 +3VS_CT1 1 2 .1U_0402_16V7K 1 3 CORE_NB_S 3 1
S
(38,41) SUSP# ON1 CT1
RDC1 0_0402_5% @ CDC3 1000P_0402_50V7K @
22U_0603_6.3V6M
22U_0603_6.3V6M
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1 1 1
1
4 11 1 CDC4
CDC8
CDC9
+5VALW _S5 VBIAS GND 4.7U_0603_6.3V6K
CDC6
CDC7
G
G
2
2
1 2 5VS_ON 5 10 +5VS_CT2 1 2 CORE_NB_GATE
2
RDC2 0_0402_5% ON2 CT2 CDC5 470P_0402_50V7K +5VS_S0 2 2 2
6 9 JPDC2 QDC3 QDC4
+5VALW _S5
1 1 1 2 7 VIN2 VOUT2 8 +5VS_LS_S0 AO3416L_SOT23-3 AO3416L_SOT23-3
CDC11 CDC13 CDC10 VIN2 VOUT2 +0.775VALW _S5
1 2 1
.1U_0402_16V7K .1U_0402_16V7K 1U_0402_6.3V6K 15 JUMP_43X118 CDC12
GPAD
D
@ @ @ @ .1U_0402_16V7K 1 3 0.775VALW _S 3 1
S
2 2 RT9740AGQW W DFN-14TL @
1 1 1
1st source : RT9740AGQW (SA00007VD00) CDC14 CDC15
4.7U_0603_6.3V6K 4.7U_0603_6.3V6K
G
G
2nd source :APL3523AQBI-TRG (SA00006P400)
2
0.775VALW _GATE
2 2
VIN 5V and 3.3V (VBIAS=5V),IMAX(per channel)=6A,Rds=15mohm
+1.8VS_S0
UDC2 JPDC3
1 14 +1.8VS_LS_S0 Add 1K ohm pull-high +5VALW_S5
+1.8VALW _S5 VIN1 VOUT1 +5VALW _S5
1 2 2 13 @ 2 03/02
CDC16 VIN1 VOUT1 JUMP_43X118 CDC18 +APU_CORE_NB_S0
SUSP# 1 2 1.8VS_ON 1U_0402_6.3V6K3 12 +1.8VS_CT1 1 2 .1U_0402_16V7K UDC3A
ON1 CT1
8
RDC3 0_0402_5% @ CDC17 470P_0402_50V7K @ LM393DR_SO8 +5VALW _S5
4 11 1 3 RDC5
P
+5VALW _S5 VBIAS GND + 1 CORE_NB_GATE 1 2
1 2 1.5VS_ON 5 10 +1.5VS_CT2 1 2 +0.775MOS 2 O 1K_0402_1%
ON2 CT2 -
G
RDC4 0_0402_5% CDC19 1000P_0402_50V7K +1.5VS_S0 +5VALW _S5
6 9 JPDC4
+1.5VALW _S5
4
1 2 7 VIN2 VOUT2 8 +1.5VS_LS_S0 UDC3B
1 1 VIN2 VOUT2
8
CDC22 CDC23 CDC20 @ 2 LM393DR_SO8
.1U_0402_16V7K .1U_0402_16V7K 1U_0402_6.3V6K 15 JUMP_43X79 CDC21 5 RDC6
P
@ @ @ GPAD .1U_0402_16V7K + 7 0.775VALW _GATE 1 2
2 2 RT9740AGQW W DFN-14TL @ 6 O 1K_0402_1%
-
G
1
4
1st source : RT9740AGQW (SA00007VD00)
[Main] 2nd source :APL3523AQBI-TRG (SA00006P400) +5VALW _S5
Rdson:5.3mohm.
2 Max.23A @25 degree temp. +0.775VALW _S5 2
2
Max.14A @100 degree temp.
+0.95VS =9606mA +3VALW _S5 RDC7
23A (Rds=5.3m ohm) 100K_0402_5%
+DC20V +12VS_S0
6
+0.95V_+1.05VALW _S5 +0.95VS_+1.05VS_S0 +12VALW _S5 Vgs=20V,Id=15A,Rds=7mohm
1
D
RDC8 S5_MUX_CTRL_M 2 G QDC5B
UDC4 100K_0402_5% S L2N7002DW 1T1G_SC88-6
1
8 1
1 CVT@
1
3
7 2 RDC10 2 0_1206_5% +0.775MOS
1
D
RDC9 6 3 5 G
2
1
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1U_0603_10V6K CVT@ L2N7002DW 1T1G_SC88-6 RDC13
4
2
1
20K_0402_1% QDC6
+0.95VS_DISCHRG
RDC16 @ 2 @ 1 8
2
2
1 0.95VS_GATE 2 S D 7
1 S D
1
20K_0402_5% 3 6
S D
1
CDC27 RDC17 4 5
1 RDC18 2 CDC26 0.1U_0402_16V7K 20K_0402_5%
G D For FP4 Processor (S5 MUX CTRL)
1
20K_0402_1% 0.1U_0603_25V7K @ 2 AO4423_SO8 SC@
SC@
2
6
12VS_EN CDC28
2
3
1U_0603_25V6K
2
2
SUSP 2 L2N7002DW 1T1G_SC88-6 RDC28
QDC7A L2N7002DW 1T1G_SC88-6 5 SUSP
SUSP (38) 10K_0402_1% 1
Main (SB00000ZN00) AO4354 QDC7B SC@ CDC29
SC@
1
D
+3VDSW_S5 to +3VALW_S5 Transfer SUSP#
SC@ G
2 QDC8
SB00000ST00 +1.2V_VDDQ_S3
1
+3VALW_S5 +3VALW _S5
1
2 1 RDC24
CDC30 1U_0402_6.3V6K UDC5 RDC25 470_0603_5%
2
2
1 2 UDC2_EN 3
(38,42) EC_5V_EN RDC22 0_0402_5% ON RDC19 100_0603_5%
+0.6VS_DISCHRG_S0
2
1 7 10K_0402_5%
VIN VOUT +1.2VDDQ_DISCHR
3
1 @ 2 2 8
1
(38,42,44,45,46) 3V5V_PG RDC23 0_0402_5% VIN VOUT
VBIAS 1 1
6
5
4
UDC2_CT_P6 6 GND 9 CDC32
CDC31
CT GND 10U_0603_6.3V6M
2N7002KDW _SOT363-6
1
2 2 2 D
1 1 (38,41,45) SYSON
APL3526QBI-TRG_TDFN 8P QDC11A SUSP 2 QDC10
4 CDC33 CDC34 SA00006R100 G 4
1
1U_0402_6.3V6K 2200P_0402_50V7K L2N7002W T1G_SC-70-3 S
3
2 2 SB00000ST00
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 39 of 56
A B C D E
5 4 3 2 1
D D
Main source:AO4407AL
PD =I^2*Rds(on)=6^2*11m ohm=0.396W
θ JA= 40°C/W*0.396W=15.84°C
soldering open
PJ1
Second source:FDS6675BZ
2 1
DC_IN_S1 DC_IN_S2 PD =I^2*Rds(on)=6^2*13m ohm=0.468W 2 1
200K_0402_1%
0.22U_0603_25V7K
PJP1 EMI@ PL2 3 6 VIN+ 2 3 VIN-
0.022U_0603_25V7K
0.1U_0603_25V7K
7 HCB2012KF-121T50_0805 5 1
GND
100U_25V_M
2.2_1206_5%
PC1
PR3
6 1 2
GND
1
PR2
PC2
PC3
PC4
5 +
P=I^2* R(max)=0.3636W
4
GROUND 4
2
POWER 3 @ @
2
DETECT 2 2
2
POWER
1
1 EMI@ EMI@ EMI@
GROUND PC5 PC6 PC7 EMI@ PC8 DC_IN_S2_2
LOTES_AJAK0031-P002A 1000P_0402_50V7K 100P_0402_50V8J 100P_0402_50V8J 1000P_0402_50V7K
EMI reserve
2
1
PC9 P2-1
C C
2.2U_1206_50V7K
150K_0402_1%
PR4
2
+RTCBATT_G3
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+3VS_S0
Current Monitor
PJP2 CONN@
1
PR8
PR7
100K_0402_1% PR9
VIN+ 1 2 INA300_IN+ 10K_0402_1% 2 1
PU1 INA300AIDSQR_SON10_2X2 - +
1
4 INA300_EN
2
0_0402_5% PC11 1 ENABLE
PR10 IN+ 6
100P_0402_50V8J
2
INA300_LIMIT 3 7
B LIMIT DELAY RTC BATT CONNECTER B
1
10 9
+5VS_S0
GND
PR11 HYS VS
TP
2.7K_0402_1%
2
11
8 PC12
2
.1U_0402_16V7K
1
120W:
Full Load(100%) --> 6A
Vtrip=6*10m=60mV
VLimit=Vtrip; Rlimit=(60mV+0.5mV)/20uA= 3.025K
10U_1206_25V6K
+1.2VP
2200P_0402_50V7K
1
PC104
PR111
68P_0402_50V8J
0.1U_0402_25V6K
0_0805_5%
@RF@ PC101
@EMI@ PC102
EMI@ PC103
1 2 UG_1.2V
+0.6VSP
0.1U_0603_25V7K
LX_1.2V
+1.2VP
10U_0805_6.3V6M
10U_0805_6.3V6M
2
PC105
UG_1.2V_1
1
Vin = 20V
PC106
PC107
5
16
17
18
19
20
1
Iin = 1.2*5.3/0.85/20 LG_1.2V PU101
PE606BA_PDFN8-5
2
PQ101
2.2UH
BOOT
VTT
PHASE
UGATE
VLDOIN
= 0.37A 21
7X7X3 PAD
Idc: 8A 4 15
LGATE VTTGND
1
Isat: 14A Pin 14 Via*2
DCR: 20mΩ(Max) 14 2
PL102 PR102 PGND VTTSNS
1
2
3
2.2UH_MMD-06CZ-2R2M-V1_8A_20% 16.2K_0402_1%
2 1 1 2 CS_1.2V 13 3
+1.2VP PC108 CS RT8207MZQW_WQFN20_3X3 GND
C 1U_0603_10V6K C
10U_0805_25V6K
5
1 12
2VDDP_1.2V 4 VTTREF_1.2V
@EMI@ PR103
4.7_1206_5%
PR104 VDDP VTTREF
1
PE600BA_PDFN8-5
1
5.1_0603_5%
1
PQ102
1 2 11 5
PC115
PC109 VDD_1.2V
VDD VDDQ +1.2VP
1
PGOOD
330U_6.3V_M
4 +5VALW_S5 PR105 PC110
Pin 5 is FB
TON
2
1
2 5.1_0603_5% 0.033U_0402_16V7K
FB
S5
S3
2
2
LG_1.2V_1 PC111 1 2
1U_0603_10V6K
@EMI@ PC112
680P_0603_50V7K
+5VALW_S5
PG_1.2V 10
6
1
2
3
1
@ PR112
Rds(on):11mΩ~17.5mΩ 100K_0402_1% PR106
Cap. ESR=17m 2 2 1 6.04K_0402_1%
EN_0.6VSP
+3VALW_S5
TON_1.2V
EN_1.2VP
FB_1.2V 1 2
+1.2VP
PR107
887K_0402_1%
1
1 2
1.2V_B+
PR108
10K_0402_1%
Vout = Vfb*[1+(Rt/Rb)]
PR109 = 0.75*[1+(6.04K/10K)]
www.teknisi-indonesia.com
2
0_0402_5%
1 2 = 1.203V
(38,39,45) SYSON
1
PC113
0.1U_0402_10V7K
B B
2
@
+1.2VP PR110
Ipeak=5.3A ;Fsw=285KHz 0_0402_5%
1 2
Iocp=(Rcs1*Itrip)/(Rdson) (38,39) SUSP# PJ101
@
Rds : L/S --> typ:11mohm ; max: 17.5mohm
1
JUMP_43X118
PC114 +1.2VP 2 1 +1.2V_VDDQ_S3
Itrip=9~11 uA 0.1U_0402_25V6K 2 1
2
Iocp(set)=10.05A~12.3A @
Iin_ripple=1.38A
Output Cap. ESR=17mohm
@ PJ102
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=1.799A JUMP_43X39
LIR=Delta IL/Ipeak=0.339 +0.6VSP
1
1 2
2
+0.6VS_VTT_S0
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=533uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.37uF
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P49_PWR-DDR4/VTT(RT8129/RT9045)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 41 of 56
5 4 3 2 1
5 4 3 2 1
PR203
RT6576_B+ 20K_0402_1% PR204
EMI@ PL201 1 2 20K_0402_1%
4.7U_0603_10V6K
HCB2012KF-121T50_0805 1 2
+DC20V 1 2
RT6576_B+
10U_0805_25V6K
10U_0805_25V6K
+3VLP
2200P_0402_50V7K
1
2
D D
PC220
PC201
68P_0402_50V8J
0.1U_0402_25V6K
@RF@ PC202
@EMI@ PC203
EMI@ PC204
100K_0402_1%
118K_0402_1%
124K_0402_1%
2
1
2
1
PC205
(38,39) EC_5V_EN
PR219
PR207
PR208
10U_1206_25V6K
10U_1206_25V6K
1
1
PC207
PC208
3V_FB2
5V_FB1
1
CS22
CS12
PQ201 @ PC206
2
0.1U_0402_10V7K PQ202
2
PE606BA_PDFN8-5 1 2
5
PR218 PE606BA_PDFN8-5
1
3V_EN
0_0402_5%
3.3UH 21
CS2
FB2
LDO3
FB1
CS1
GND @ PC219
7X7X3 +3VLP
1
4 PR209 0.1U_0402_10V7K 4.7UH 7X7X3
IDC:6A 10K_0402_1% 6
EN2 EN1
20 5V_EN 1 2 4
Idc: 7A
Isat: 13.5A 1 2
Isat: 14A
DCR:30mΩ(Max) 7 19 DCR:PL203
40mΩ(Max)
(38,39,44,45,46) 3V5V_PG
1
2
3
PL202 PGOOD VCLK
3
2
1
3.3UH_MMD-06CZ-3R3M-V1_6A_20% 4.7UH_MMD-06CZ-4R7M-V1_5.5A_20%
1 2 LX_3V 8 18 LX_5V 1 2
+3VALWP PC209 PR210 PHASE2 PHASE1 PR211 PC210 +5VALWP
10U_0805_25V6K
10U_0805_25V6K
1 1 2 BST_3V_1 1 2 BST_3V 9 17 BST_5V 1 2 BST_5V_1 1 2
BOOT2 BOOT1
1
1
PC211 +
@ PC212
@EMI@ PR215
4.7_1206_5%
1
1
330U_6.3V_M UG_3V_1 1 2 UG_3V 10 16 UG_5V 1 2 UG_5V_1 + PC214
@ PC213
4.7_1206_5%
UGATE2 UGATE1
1
LGATE2
LGATE1
330U_6.3V_M
@EMI@ PR212
2
5
5
2
LDO5
BYP1
PR213 PR214
2
2
VIN
PQ203 0_0805_5% PU201 0_0805_5% PQ204
2
LX_3V_2 PE600BA_PDFN8-5 RT6576DGQW(2)_WQFN20_3X3 PE600BA_PDFN8-5
11
12
13
14
15
2
1
4 LG_3V LG_5V 4 LX_5V_2
680P_0603_50V7K
1
@EMI@ PC215
PC216
C
+3VALWP C
680P_0603_50V7K
2
RT6576_B+
2
Vin = 20V 1 2 RT6576_B+_1
+5VALWP +5VALWP
3
2
1
1
2
3
Rds(on):11mΩ~17.5mΩ
0.1U_0603_25V7K
Iin =3.3*6.4/20/0.85 Vin = 20V
@EMI@
Rds(on):11mΩ~17.5mΩ PR216
0_0603_5%
=1.24A
1
Iin = 5*7.8/0.85/20
PC217
+VL = 2.29A
2
main source :RT6576D Typ: 175mA
Min: 100mA
second srouce: TPS51275B-1
1
PC218
4.7U_0603_10V6K
www.teknisi-indonesia.com
2
soldering short
@ PJ201
1 2
+5VALWP 1 2
+5VALW_S5
JUMP_43X118
soldering short
@ PJ202
1 2
+3VALWP 1 2
+3V3_DSW
2
JUMP_43X118 PR220
@ 0_0603_5%
2 1
1
+3VLP +3VL_S5
PR221
0_0603_5%
B B
Vout = Vfb*[1+(Rt/Rb)]
Vout = Vfb*[1+(Rt/Rb)] = 2*[1+(30K/20K)]
= 2*[1+(13.3K/20K)] =5V
= 3.3V
+5VALWP
+3VALWP Ipeak =7.4A ;Itdc=5.2A; Fsw=300KHz
Ipeak=6.4A ;Itdc=4.48A;Fsw=355KHz Iocp=(Rcs1*Itrip)/(8*Rdson)
Iocp=(Rcs1*Itrip)/(8*Rdson) Rds : L/S --> typ:11mohm ; max: 17.5mohm
Rds : L/S --> typ:11mohm ; max: 17.5mohm Itrip=9~11 uA
Itrip=9~11 uA Iocp(set)=11A~13.5A
Iocp(set)=Iocp(set)=10.3A~12.7A Iin_ripple=2.36A
Iin_ripple=1.66A Output Cap. ESR=17mohm
Output Cap. ESR=17mohm Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.66A
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.352A LIR=Delta IL/Ipeak=0.34
LIR=Delta IL/Ipeak=0.36 Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2] =214uF
=240uF CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=1.7uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.87uF
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+3VALWP / +5VALWP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
Power dissapation: 0.2603W
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 42 of 56
5 4 3 2 1
5 4 3 2 1
EMI@ PL301
+12V_B+ 1 2
HCB1608KF-121T30_0603
+DC20V
D D
10U_1206_25V6K
2200P_0402_50V7K
1
1
68P_0402_50V8J
PC301
0.1U_0402_25V6K
@RF@ PC302
@EMI@ PC303
EMI@ PC304
PQ301
main source :RT8130B
2
5
PE606BA_PDFN8-5
second srouce: NCP1589A
0.01U_0402_25V7K
PD301
1
4
PC305
PR301 2 1 4.7UH 7X7X3
0.22U_0402_16V7K 158_0402_1%
PC306 PR302
Idc: 7A
2
3.3K_0402_1% RB751V-40_SOD323-2 PR303 PC308 Isat: 14A
3
2
1
2 1 FB_12V_3 2 1 PU301
2.2_0805_1% 0.22U_0603_25V7K DCR: 40mΩ(Max)
10 1 BST_12V 1 2 BST_12V-1 1 2 PL302
PGOOD BOOT 4.7UH_MMD-06CZ-4R7M-V1_5.5A_20%
PC307 1000P_0402_50V8J VORPM_12V 9 2 LX_12V 1 2
NC PHASE PR304 +12VALWP
10U_0805_25V6K
2 1 FB_12V 8 3 DH_12V 1 2 DH_12V_1
FB UGATE
1
0_0805_5%
5
EN_12V 7 4 DL_12V @EMI@ 1
COMP/EN LGATE
100U_16V_M
PR306 2.2_0603_1% PQ302 PR305
1
PC309
1 2 VCC_12V 6 5 4.7_1206_5% +
+5VALW_S5 VCC GND
PC310
PR307 PE600BA_PDFN8-5
2
1
1
1U_0402_6.3V6K 1U_0402_6.3V6K 11 13.7K_0402_1% LX_12V_2
2
PC314 TP 4 @ 2
1
PC311 @EMI@
1
2
RT8130BGQW_WDFN10_3X3
1
D PC312
2
C 2 PQ303 C
2
(38) HW_12V_EN# G 2N7002K_SOT23-3 1000P_0603_50V7K PR308
3
2
1
S Rds(on):11mΩ~17.5mΩ 10_0402_5%
3
FB_12V
1
PR309 2.21K_0402_1%
2 1
PR310 2.21K_0402_1%
+12VALWP
www.teknisi-indonesia.com
2 1 FB_12V_1 Vin = 20V
Iin = 12*1.88/0.85/20
2 1FB_12V_2 2 1
= 1.32A
2
@ PJ301
1 2
+12VALWP 1 2
+12VALW_S5
JUMP_43X118
B B
Vout = Vfb*[1+(Rt/Rb)]
= 0.8*[1+(2.21K/0.158K)] +12VALW
= 11.989V Ipeak=1.88A ;Fsw=300KHz
Iocp=(Rcs1*Itrip)/Rdson
Rds : L/S --> typ:11mohm ; max: 17.5mohm
Itrip=9.5~10.5uA
Iocp(set)=10.3A ~ 12.3A
Iin_ripple=0.35A
Output Cap. ESR=17mohm
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=3.404A
LIR=Delta IL/Ipeak=1.81
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=2.9uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.53uF
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+12VS
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 43 of 56
5 4 3 2 1
5 4 3 2 1
EMI@ PL401
+0.95V_B+ 1 2
+DC20V
HCB1608KF-121T30_0603
68P_0402_50V8J
10U_1206_25V6K
10U_1206_25V6K
0.1U_0402_25V6K
2200P_0402_50V7K
1
1
PC401
@RF@ PC402
@EMI@ PC403
@ PC1193
PQ401
EMI@ PC404
main source : TPS51212
2
5
PE606BA_PDFN8-5
D (38) PWR_0.95V_PG second srouce:RT8237 D
(38,45,46) EC_1.8V_EN 100K_0402_1%
2 1 PR402
@ PR411 +3VALW_S5 PR401 PR403 PC405 1 2DH_0.95V_1 4
0_0402_5% PU401 2.2_0805_1% 0.22U_0603_25V7K 0_0805_5%
1 2 PR404 1 10 BST_0.95V 1 2BST_0.95V_1 1 2
120K_0402_1% PGOOD VBST
PR405 1 2 TRIP_0.95V 2 9 DH_0.95V PL402
3
2
1
0_0402_5% TRIP DRVH 1.5UH_MMD-06CZ-1R5M-V1_9A_20%
1 2 EN_0.95V 3 8 LX_0.95V 1 2
9,42,45,46) 3V5V_PG EN SW PR406 +0.95V_+1.05VALWP
10U_0805_25V6K
FB_0.95V 4 7 VCC_0.95V 1 2 1.5uH 7X7X3
VFB V5IN +5VALW_S5
1
0_0603_5% 1
Idc:9A
1
@ PC407 TST_0.95V 5 6 DL_0.95V
TST DRVL
1
PC406 Isat: 18A + PC408
PC409
2
5
.1U_0402_16V7K 11 @EMI@ 390U_2.5V_M
1U_0603_6.3V6M DCR: 15mΩ(Max)
2
TP PQ402 PR408
2
PR407 TPS51212DSCR_SON10_3X3 4.7_1206_5% 2
470K_0402_1% PE600BA_PDFN8-5
2
LX_0.95V_1
2
4
1
@EMI@
PC410
+0.95V_+1.05VALWP
1000P_0603_50V7K Vin = 20V
2
3
2
1
Iin = 7.9*1.05/0.85/20
BR@ PR409 = 0.44A
6.98K_0402_1% Rds(on):11mΩ~17.5mΩ
2 1
C
Vout = Vfb*[1+(Rt/Rb)] C
2
PR410 = 0.7*[1+(5K/14K)]
14K_0402_1%
= 0.95V
1
Vout = Vfb*[1+(Rt/Rb)]
= 0.7*[1+(6.98K/14K)]
= 1.049V
www.teknisi-indonesia.com
@ PJ401
1 2
+0.95V_+1.05VALWP 1 2
+0.95V_+1.05VALW_S5
JUMP_43X118
B B
+0.95VALW +1.05VALW
Ipeak=7.9A ;Fsw=300KHz Ipeak=7.9A ;Fsw=300KHz
Iocp=(Rcs1*Itrip)/Rdson Iocp=(Rcs1*Itrip)/Rdson
Rds : L/S --> typ:11mohm ; max: 17.5mohm Rds : L/S --> typ:11mohm ; max: 17.5mohm
Itrip=9.5~10.5uA Itrip=9.5~10.5uA
Iocp(set)=10.35A ~ 12.41A Iocp(set)=10.45A ~ 12.52A
Iin_ripple=1.31A Iin_ripple=1.176A
Output Cap. ESR=17mohm Output Cap. ESR=17mohm
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.08A Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=2.28A
LIR=Delta IL/Ipeak=0.26 LIR=Delta IL/Ipeak=0.29
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2] Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=699uF =591uF
A
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.43uF CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.47uF A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.05VALW
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 44 of 56
5 4 3 2 1
5 4 3 2 1
@RF@ PC501
@EMI@ PC502
EMI@ PC503
2.2UH_MMD-04BZ-2R2M-X2_3A_20%
2200P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6K
9 2 LX_1.8V 1 2
PVIN LX
+1.8VALWP
1
PC504 8 3
22U_0805_6.3VAM SVIN LX
D 7 4 PG_1.8V @EMI@ PR501 D
2
NC PGOOD
100K_0402_1%
20K_0402_1%
22P_0402_50V8J
4.7_1206_5%
1
6 5
2
FB EN
22U_0805_6.3V6M
22U_0805_6.3V6M
PR502
1
PR503
PC505
LX_1.8V_2
PC506
PC507
PR504
2
RT8068AZQW_WDFN10_3X3
1
0_0402_5% @EMI@ PC508
2
1 2 EN_1.8V 680P_0603_50V7K
@
(38,39,42,44,46) 3V5V_PG
2
@
PR511
0_0402_5% +3VALW_S5
1 2 FB_1.8V
(38,44,46) EC_1.8V_EN
1
@
PC509
0.1U_0402_25V6K
1
10K_0402_1%
@ PJ501
Vout = Vfb*[1+(Rt/Rb)] JUMP_43X39
PR505
= 0.6*[1+(20K/10K)] +1.8VALWP 1
1 2
2
+1.8VALW_S5
+1.8VALWP = 1.8V
2
Vin =5V soldering short
Iin = 2*1.8/0.85/5
=0.84A +1.8VALWP
Ipeak=2A
Fsw=1MHz
C C
+1.8VALWP
Ipeak=2A ;Fsw=1MHz
ILimit=4A
Iin_ripple=0.69A
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=0.524A
www.teknisi-indonesia.com
LIR=Delta IL/Ipeak=0.26
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=18.3uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.65uF
main source : RT8068A
second srouce:UP1727P 2.2uH 4x4x2
Idc : 3A
Isat: 5A
PU502
EMI@ PL503 DCR: 58mΩ(Max)
HCB1608KF-121T30_0603 11
1 2 2.5V_VIN 10 TP 1 PL504
+5VALW_S5 PVIN LX
EMI@ PC513
@RF@ PC511
@EMI@ PC512
2.2UH_MMD-04BZ-2R2M-X2_3A_20%
2200P_0402_50V7K
68P_0402_50V8J
0.1U_0402_25V6K
9 2 LX_2.5V 1 2
PVIN LX +2.5VP
1
1
1
PC514 8 3
B 22U_0805_6.3VAM SVIN LX B
7 4 2.5VALW_PG @EMI@ PR507
2
2
2
NC PGOOD
100K_0402_1%
22P_0402_50V8J
9.53K_0402_1%
4.7_1206_5%
2
1
6 5 2 @ PJ502
FB EN
22U_0805_6.3V6M
22U_0805_6.3V6M
PR508
JUMP_43X39
1
PC515
PR509
LX_2.5V_2 1 2
+2.5VP 1 2 +2.5V_S3
PC516
PC517
PR510
2
RT8068AZQW_WDFN10_3X3
1
2
1 2 EN_2.5V 680P_0603_50V7K
(38,39,41) SYSON
2
+3VALW_S5
FB_2.5V
1
@ PC519
0.1U_0402_25V6K
2
1
3.01K_0402_1%
Vout = Vfb*[1+(Rt/Rb)]
+2.5VP
PR951
= 0.6*[1+(9.53K/3.01K)]
= 2.499V Ipeak=2.24A ;Fsw=1MHz
+2.5VP
2
ILimit=4A
Vin =5V Iin_ripple=0.75A
Iin = 2.5*2.24/0.85/5 +2.5VP Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=0.568A
=1.32A Ipeak=2.24A LIR=Delta IL/Ipeak=0.25
Fsw=1MHz Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
A =11.8uF A
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.78uF
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VSP
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 45 of 56
5 4 3 2 1
A B C D
1
0.6A PC601
PU601
2
1 1
10U_0805_10V6K
2
RT9045GSP_SO8
PR601 1 8
32.4K_0402_1% VIN NC
+3VALW_S5 2 7
1
GND NC
REFEN_0.775V 3 6
REFEN VCNTL +5VALW_S5 Vout = Vin*R2/(R1+R2)
GND
+0.775VALWP
4
VOUT NC
5 = 3.3*[10K/42.4K]
1
PR606 PC602
1
100K_0402_1% 1U_0402_6.3V6K = 0.7783V
10U_0805_6.3V6M
10U_0805_6.3V6M
9
PR602 PC604 @
2
1
1
10K_0402_1% 0.1U_0402_16V7K
2
6
PC603
PC605
@ PR608 D
1
0_0402_5% 2
REFEN_0.775V_1 PQ601A
2
1 2 REFEN_0.775V_2 G
(38,44,45) EC_1.8V_EN 2N7002KDW _SOT363-6 +0.775VS
3
PR607 0_0402_5% D S Imax=0.2A ;
1
3V5V_PG 1 2 5 PQ601B
G 2N7002KDW _SOT363-6
1
@ PC606 S RT9045:
.1U_0402_16V7K 4 Current Limit=1.8A(min)~3.5A(Max)
2
@ PJ602
JUMP_43X39
1 2
+0.775VALWP 1 2 +0.775VALW_S5
www.teknisi-indonesia.com
main source : RT9059GSP
second srouce: APL5933CKAI Soldering Short
@ PJ603
JUMP_43X39
+1.5VALWP 1 2 +1.5VALW_S5
1 2
+5VALW_S5 1
PC607
1U_0402_6.3V6K
Soldering Short
2
PU602
@ PJ604 RT9059GSP_SO8
JUMP_43X39 4 5
3
1 2 3 VDD NC 6
3
+3VALW_S5 1 2
1.5V_VIN 2 VIN VOUT 7 +1.5VALWP
GND
EN ADJ
1
1 8
20K_0402_1%
10U_0805_10V6K
PGOOD GND
1
1
0.365A
PC608
PR603
@ PC609
10U_0805_10V6K
9
1
0.01U_0402_25V7K
2
PC610
2
2
ADJ_1.5V
1
PR604 0_0402_5%
1 2 EN_1.5V
(38,39,42,44,45,46) 3V5V_PG PR609 PR605
0_0402_5% 22.6K_0402_1%
1 2
2
(38,44,45) EC_1.8V_EN
@
1
0.1U_0402_25V6K
PC611
2
Vout = Vfb*[1+(Rt/Rb)]
+1.5VS = 0.8*[1+(20K/22.6K)]
Ipeak=0.25A ; = 1.507V
Current Limit=3.1A(min)~3.6A(Typ)~4.2A(Max)
4 4
RT9059:
Quiescent Current (GND Current)
IQ(typ)=0.6mA,IQ(max)=1.2mA
PD =(Vin-Vout)*Iout + Vin*IQ =0.453W
θ JA= 33.7°C/W*0.903=15.29°C
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2014/12/26 Deciphered Date 2016/12/26 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P46 PWR-0.775V/1.5V RT9045/9059
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 46 of 56
A B C D
5 4 3 2 1
10K_0402_1%
10K_0402_1%
PR701 41.2K_0402_1%
2
2
1
PR702
PR703
1
1
DIS@ DIS@ DIS@
ISUM_NB_VGA
LG_NB_VGA
FB_NB_VGA
LX_NB_VGA
+5VS_S0
B+_VGA DIS@EMI@ PL701
HCB2012KF-121T50_0805
1 2
main source : ISL62771 +DC20V
5
second srouce: N/A
10U_0805_25V6K
10U_0805_25V6K
68P_0402_50V8J
2200P_0402_50V7K
0.1U_0402_25V6K
D D
41
40
39
38
37
36
35
34
33
32
31
1
DIS@ PU701 PR704
DIS@ PC701
DIS@ PC702
@DIS@RF@ PC703
@DIS@EMI@ PC704
UG1_VGA 1 2 UG1_VGA_1 4
DIS@EMI@ PC705
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
0_0805_5%
2
DIS@
DIS@ PQ701 0.22uH 7X7X3
DIS@ PR705 2
1100K_0402_1% NTC_NB_VGA 1 30 BST2_VGA PK616BA_PDFN8-5
Idc: 25A
3
2
1
NTC_NB BOOT2
DIS@ PR706 2
1100K_0402_1% IMON_NB_VGA 2 29 UG2_VGA DIS@ PR707 DIS@ PC706 Isat: 34A
IMON_NB UGATE2 2.2_0805_1% 0.22U_0603_25V7K
3 28 LX2_VGA 1
BST1_VGA 2BST1_VGA_R1 2 DCR:0.98mΩ(Max)
(15) VGA_SVC DIS@ PR752 0_0402_5% SVC PHASE2 S COIL 0.22UH 20% MMD-06DZNR22MEO1L 25A
+5VS_S0 PL702
1 2 GPU_VR_HOT#_R 4 27 LG2_VGA
(15) GPU_VR_HOT# VR_HOT_L LGATE2 1 4
LX1_VGA
+3VGS_S0
1 2
PR708 100K_0402_1%
(15) VGA_SVD
5
SVD ISL62771HRTZ-T_TQFN40_5X5 VDDP
26
2 3
+VGA_CORE_S0
1 2 VDDIO_VGA 6 25 VDD_VGA 1 PR710 2
@DIS@EMI@
+1.8VGS_S0 VDDIO VDD
1
PR712 DIS@ PR713
PC709
DIS@
1U_0603_10V6K
1
1
1 2 DIS@ 1K_0402_5% 3.65K_0603_1%
+3VGS_S0
5
1 2ENABLE_VGA 8 23 LX1_VGA
2
PC708
1U_0603_10V6K
2
2
0_0402_5% 0.1U_0402_25V6K DGPU_PWROK 9 22 UG1_VGA
(8) DGPU_PWROK PWROK UGATE1 SNB1_VGA ISEN1_VGA 1 2 ISUMP_VGA_LX1
1 2 IMON_VGA 10 21 BST1_VGA 10K_0402_1%
IMON BOOT1
1
PR715 DIS@ LG1_VGA 4
PGOOD
133K_0402_1% +3VS_S0 @DIS@EMI@
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
DIS@ DIS@ PC710 DIS@ PR717
NTC
RTN
2
1 2 PC711 DIS@ PQ702 680P_0603_50V7K ISUMN_VGA_R 1 2 ISUMP_VGA_VO1
FB
1
1000P_0402_50V7K PK632BA_PDFN8-5 1_0402_1%
3
2
1
DIS@ PR719 DIS@ PR720
11
12
13
14
15
16
17
18
19
20
1
27.4K_0402_1%
2 NTC_VGA_R
20K_0402_1%
1 2 NTC_VGA
DIS@ PR718
100K_0402_1%
+VGA_CORE_S0
2
ISUMN_VGA
COMP_VGA
ISEN2_VGA
ISEN1_VGA
DIS@ PH701 DGPU_PWROK
VSEN_VGA
FB_VGA
RTN_VGA
1 2
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
1 1 1
470K +-5% NCP15WM474J03RC 0402
DIS@ PC722
DIS@ PC712
DIS@ PC713
DIS@ PC721
DIS@ PC714
DIS@ PC715
DIS@ PC716
390U_2.5V_M
390U_2.5V_M
390U_2.5V_M
1
1
1
1
DIS@ PC720 + + +
PC718
DIS@ PC719
PC717
ISUMN_VGA_R 1 2
.22U_0402_6.3V6K
2
2
2
2 2 2
DIS@ PC723
DIS@
DIS@
1 2
.22U_0402_6.3V6K
DIS@ PC725
DIS@ PC724 DIS@ PR721 150P_0402_50V8J @ PR722
1000P_0402_50V7K 301_0402_1% 32.4K_0402_1%
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
ISUMP_VGA 1 1
2 VSEN_VGA_1 2 1 2 1 2
1 2ISUMP_VGA_NTC
C C
DIS@ PC729
DIS@ PC730
DIS@ PC733
DIS@ PC727
DIS@ PC728
DIS@ PC731
DIS@ PC732
1
1
330P_0402_50V7K
1
DIS@ PR723
PC726
1
1
PR724
137K_0402_1% 390P_0402_50V7K
2
2
2
0.022U_0402_16V7K
1
1 2 1 1 2
2 FB_VGA_1 B+_VGA
DIS@ PR726
DIS@ PC736
11K_0402_1%
2
@
1
1
DIS@ PC735
DIS@ 2.1K_0402_1%
DIS@ PR727 DIS@ PC737
10U_0805_25V6K
10U_0805_25V6K
2
2K_0402_1% 330P_0402_50V7K
2
5
DIS@ PH702 1 1 2
2 FB_VGA_2
68P_0402_50V8J
2200P_0402_50V7K
0.1U_0402_25V6K
1
1
1
1
1
10K_0402_1%_ERTJ0EG103FA DIS@
PC739
@DIS@RF@ PC740
PC738
@DIS@EMI@ PC741
PR728 DIS@ PR729
DIS@EMI@ PC742
2
2
2
2
2
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
ISUMN_VGA_R 1 2 1 2 UG2_VGA 1 2 UG2_VGA_1 4
+VGA_CORE_S0
0_0805_5%
DIS@ PC747
DIS@ PC745
DIS@ PC746
DIS@ PC748
DIS@ PC751
DIS@ PC744
DIS@ PC749
DIS@ PC750
DIS@
DIS@
0.22uH 7X7X3
1
1
1
DIS@ PR730
Idc: 25A
1
2
3
2
2
1
2
2
2
0.1U_0402_25V6 1 1 2
2 ISUMN_VGA_1 2.2_0805_1% 0.22U_0603_25V7K
DCR:0.98mΩ(Max)
2
10_0402_5% +VGA_CORE_S0
1
PC754
1 2 2 3
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
2.2U_0402_6.3V6K
5
@DIS@EMI@
1
DIS@ PR736 DIS@ PR737
DIS@ PC756
DIS@ PC761
DIS@ PC762
DIS@ PC757
DIS@ PC760
DIS@ PC758
DIS@ PC759
DIS@ PC763
DIS@
2
1
1
1
1
1
4.7_1206_5% 1
ISUMP_VGA 2
@ DIS@ 3.65K_0603_1%
PR734 0_0402_5%
2
2
2
2
2
ENABLE_VGA_Pull_low1 2 DGPU_PWR_EN LG2_VGA 4
2
DIS@ PR739
www.teknisi-indonesia.com
SNB2_VGA ISEN2_VGA 1 2 ISUMP_VGA_LX2
1
1
1
@ PR738 PK632BA_PDFN8-5
3
2
1
0.22U_0402_10V6K
2
2
680P_0603_50V7K ISUMN_VGA_R 1 2 ISUMP_VGA_VO2
2
@DIS@EMI@ 1_0402_1%
VGA_CORE
390uF*3 + 10uF*7 + 1uF*7 + 2.2uF*16
EN pin don't floating
1282.2uF
If have pull down resistor at HW side, pls delete PR702
B B
PL704
+VRAM_B+ 1
DIS@EMI@ 2
+DC20V +VRAM_1.5VP
HCB1608KF-121T30_0603 Vin = 20V
Iin = 15*3/0.85/20
= 0.26A
10U_1206_25V6K
2200P_0402_50V7K
10U_1206_25V6K
68P_0402_50V8J
0.1U_0402_25V6K
1
1
1
1
PC765
@DIS@EMI@ PC767
@ PC1194
@DIS@RF@ PC766
DIS@EMI@ PC768
2
2
2
2
5
TST DRVL PC771 + PC773 Rds H/S --> typ: 4.8mohm ; max: 7mohm
PC772
PC770
2
Iocp(set)=10.1A ~ 12.3A
@
@DIS@EMI@
PC774 LIR=Delta IL/Ipeak=0.32 =1973uF
1000P_0603_50V7K
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
2
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=1.77uF
3
2
1
=136uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.24uF
A A
DIS@
16K_0402_1%
PR750
2 1
@ PJ701
1 2
+VRAM_1.5VP 1 2
+1.5V_VRM_S0
1
= 0.7*[1+(16K/14K)]
= 1.5V
Security Classification
2014/12/26
Compal Secret Data
2016/12/26 Title
Compal Electronics, Inc.
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CPU_CORE/CPU_CORE_NB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS D 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 47 of 56
5 4 3 2 1
5 4 3 2 1
BR@
1
PR802 10K_0402_1%
BR@ 1
LGATE_GNB1 2
PR801
41.2K_0402_1% PHASE_GNB1
ISUM_GNB
BR@PR803 10K_0402_1%
2
1 2
FB_GNB
D D
41
40
39
38
37
36
35
34
33
32
31
PU801
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
BR@ PR805 100K_0402_1%
1 2 NTC_GNB 1 30
BR@ PR806 NTC_NB BOOT2
100K_0402_1%
1 2 IMON_GNB 2 29
IMON_NB UGATE2
3 28
(7) GFX_SVC SVC PHASE2
(38,49) VR_HOT# +5VS_S0
4 27
VR_HOT_L LGATE2
@ PR807 100K_0402_1%
1 2 5 26
+CPU_Vin
+3VS_S0 (7) GFX_SVD SVD VDDP
BR@PR808 0_0402_5% ISL62771HRTZ-T_TQFN40_5X5 PR809
+1.8VS_S0
1 2 VDDIO_GFX 6 25 VDD_GFX 1 2
VDDIO VDD
2200P_0402_50V7K
1U_0603_10V6K
10U_0805_25V6K
10U_0805_25V6K
BR@ PR810 0_0402_5% 1_0603_5%
1
@PR811
0.1U_0402_25V6K
0_0402_5% 1 2 GFX_SVT_1 7 24 LG1_GFX BR@
(7) GFX_SVT SVT LGATE1
68P_0402_50V8J
1U_0603_10V6K
+1.5VS_S0
1 2
PC802
PC801 EN_GFX 8 23 LX1_GFX BR@
2
1
ENABLE PHASE1
1
1
1
@BR@EMI@ PC807
BR@ PC803
BR@ PC804
BR@EMI@ PC806
BR@ PC805
@BR@RF@ PC808
0.1U_0402_25V6K
2
BR@ 1 2 GFX_PWRGD_1 9 22 UG1_GFX
(49,7) APU_PWRGD PWROK UGATE1
BR@ PR812 0_0402_5%
2
2
2
2
2
1 2 10 21 BST1_GFX
@ PR813 10K_0402_1% IMON BOOT1
1 2 IMON_GFX +3VS_S0
PGOOD
ISUMN
ISUMP
COMP
5
ISEN2
ISEN1
VSEN
PR814
NTC
RTN
PQ801 PQ805
FB
133K_0402_1%
1
C BR@ PC809 PR816 C
1 2 PR817 BR@
11
ISEN2_GFX 12
ISEN1_GFX 13
14
VSUM-_GFX_1 15
16
17
FB_GFX 18
19
20
1000P_0402_50V7K 27.4K_0402_1% 20K_0402_1% PR815
BR@ 1 2 NTC_GFX_11 2 NTC_GFX 100K_0402_1% 4 4
RTN_GFX
COMP_GFX
VSEN_GFX
2
BR@ BR@ BR@PR818
VGATE (38,49) UG1_GFX 1 2 UG1_GFX_1
1 2 0_0805_5% PK616BA_PDFN8-5 PK616BA_PDFN8-5
+APU_CORE_GFX_S0
3
2
1
3
2
1
PH801 LX1_GFX
BR@ 25W@
1 PR819 2
2
0_0402_5%
10K_0402_1%
470K +-5% NCP15WM474J03RC 0402 BR@PR821 PL801
PR820
BR@ 2.2_0805_1%
BST1_GFX 1 2 1
BST1_GFX_R 2 1 4
BR@PC810 2 3
1
5
+5VS_S0 0.22U_0603_25V7K
BR@
1
BR@ PQ802 PQ803
S COIL .22UH +-20% MMD-10DZ-R22MEX2L 35A
PK632BA_PDFN8-5
PK632BA_PDFN8-5
PR822 @BR@EMI@
4.7_1206_5% BR@
PC811 PR823 BR@ PC812 BR@ PR824
330P_0402_50V7K 301_0402_1% 150P_0402_50V8J 210K_0402_1% LG1_GFX 4 4
2
VSUM+_GFX 1 1
2 RTN_GFX_1 2 1 2 1 2 SNB_GFX
GFX_core
330P_0402_50V7K
1
PC813
BR@ BR@ PC814 @BR@EMI@ TDC 22A
1
1
PR827 BR@ BR@ PR828 BR@PC816 680P_0603_50V7K
3
2
1
3
2
1
0.022U_0402_25V7K
0.15U_0603_16V7K
2
1
BR@ PC815
2.1K_0402_1% 1 2 1 1
2 FB_GFX_12
@
BR@ PR826
2
BR@ PC817
2K_0402_1% 330P_0402_50V7K
FSW=400kHz
2
BR@ PH802 1 1 2
2 FB_GFX_2
10K_0402_1%_ERTJ0EG103FA
PR832
www.teknisi-indonesia.com
PR830 BR@ BR@ PR831 3.65K_0603_1%
2
PR836
BR@ PR835 0_0402_5% 1_0402_1%
1 2 VSUM-_GFX 1 2 VSUM-_GFX_VO
0.01U_0402_50V7K
2 1 1 2
(38,49) VR_ON
2
47K_0402_1%
EN_GFX
BR@
PR839
1
10K_0402_1% D
1 2 EN_GFX_1 2 PQ804 BR@
(8) GFX_VR_PD
G 2N7002K_SOT23-3 +APU_CORE_GFX_S0
1000P_0402_50V7K
BR@ S
3
TDC=22A,Ipeak=35A Fsw=400K,OCP>=45.5A
1
PC822
HCB2012KF-121T50_0805
EMI@ PL901
1 2
+DC20V HCB2012KF-121T50_0805
EMI@ PL902
1 2
+CPU_Vin
1000P_0402_50V7K
100P_0402_50V8J
100P_0402_50V8J
1000P_0402_50V7K
EMI@ PC901
EMI@ PC902
1
EMI@ PC903
EMI@ PC904
100U_25V_M
1
1
+
PC905
D D
2
2@
2200P_0402_50V7K
+CPU_Vin
10U_0805_25V6K
10U_0805_25V6K
0.1U_0402_25V6K
68P_0402_50V8J
5
1
PC906
EMI@ PC908
@EMI@ PC909
PC910
PQ901
PC911
PC907
PR901
330P_0402_50V7K 2K_0402_1%
2
1 2 FB_NB_1
1 2 PR902 @RF@
PR903 UGATE_NB1 1 2 UGATE_NB1_1
4 0.22uH 7X7X3
(7) APU_VDDR_NB_SEN
PR904 PR905 PC912 PR906 0_0805_5%
10_0402_5% 1.5K_0402_1% 137K_0402_1% 390P_0402_50V7K 34K_0402_1% Idc: 25A
1 2 1 2 1 1 2
2 COMP_NB_1 1 2 Isat: 34A
+APU_CORE_NB_S0 PK616BA_PDFN8-5
DCR:0.98mΩ(Max)
3
2
1
PL903
0_0402_5% PC913 PC914
PR907 330P_0402_50V7K 120P_0402_50V8 PHASE_NB1 1 4
VSUMP_NB
1 2 1 2 1VSEN_NB_1
PR908
2 1 2
PR910 PC915 2 3
+APU_CORE_NB_S0
1
1VSUM_NB_RTC
1 PC916 301_0402_1% 2.2_0805_1% 0.22U_0603_25V7K @EMI@
0.01U_0402_50V7K BOOT_NB1 1 2 BOOT_NB1_R
1 2 PR911
PR909 4.7_1206_5% S COIL 0.22UH 20% MMD-06DZNR22MEO1L 25A
0.022U_0402_25V7K
5
0.1U_0603_16V7K
2.1K_0402_1% 1 2
680P_0603_50V7K
PQ902
11K_0402_1%
PC917
1 2
1
NB_SNB PR913
PK632BA_PDFN8-5
2
PC918
1
1
3.65K_0603_1%
APU_CORE_NB
PR912
2
2
2
10K_0402_1%_ERTJ0EG103FA PR915
2
VSUMN_NB 1 2
3
2
1
Load line -4mV/A
1
@ PR916 @ PC921
100_0402_1%
1
220P_0402_50V7K
1
2ISUMN_NB_12
LGATE_NB1 FSW=400kHz
ISUMN_NB
PC920
COMP_NB
2
VSEN_NB
PHASE_NB1
0.1U_0603_50V7K
FB_NB
UGATE_NB1
PR917 BOOT_NB1
27.4K_0402_1% PR918
1 2
main source : ISL62771 20K_0402_1%
41
40
39
38
37
36
35
34
33
32
31
1 2 1
NTC_NB_1 2 NTC_NB PU901
second srouce: N/A
TP
ISUMP_NB
ISUMN_NB
VSEN_NB
FB_NB
COMP_NB
PGOOD_NB
LGATE_NB
PHASE_NB
UGATE_NB
BOOT_NB
PH902 470K +-5% NCP15WM474J03RC 0402
1 30
NTC_NB BOOT2
1 2 IMON_NB 2 29
PC922 1000P_0402_50V7K IMON_NB UGATE2
3 28
PR919 133K_0402_1% (7) APU_SVC SVC PHASE2
1 2
4 27 +5VS_S0
(38,48) VR_HOT# VR_HOT_L LGATE2
C C
PR920 100K_0402_1%
1 2 5 26
+3VS_S0 PR921 (7) APU_SVD SVD VDDP
0_0402_5% ISL62771HRTZ-T_TQFN40_5X5 PR922
1 2 VDDIO 6 25 APU_VDD 1 2
+1.8VS_S0 VDDIO VDD
1U_0603_10V6K
PR923 0_0402_5% 1_0603_5%
1
1
1 2 SVT LGATE1
1U_0603_10V6K
+1.5VS_S0 @ PR925 0_0402_5%
PC923
PC925
1 2 ENABLE_APU 8 23 PHASE1
2
PC924
0.1U_0402_25V6K
2
9 22 UGATE1 +CPU_Vin
(48,7) APU_PWRGD PWROK UGATE1
1 2 APU_IMON 10 21 BOOT1
IMON BOOT1 +3VS_S0
10U_0805_25V6K
10U_0805_25V6K
2200P_0402_50V7K
PR926
0.1U_0402_25V6K
UGATE1_1
PGOOD
133K_0402_1%
ISUMN
ISUMP
COMP
ISEN2
ISEN1
VSEN
68P_0402_50V8J
NTC
RTN
1 2 PC926
FB
1
1
1
1
@EMI@ PC931
@RF@ PC927
PC928
PC929
1000P_0402_50V7K
EMI@ PC930
PR928 PR929 PQ903 PQ906
11
12
13
14
15
16
17
18
19
20
27.4K_0402_1% 20K_0402_1% PR927
2
2
2
1 2APU_NTC_1 1 2 APU_NTC 100K_0402_1%
APU_ISUMN
APU_COMP
APU_VSEN
PR930
2
APU_RTN
UGATE1 1 2 4 4
APU_FB 0_0805_5%
1 2 VGATE (38,48)
PH903
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470K +-5% NCP15WM474J03RC 0402 PK616BA_PDFN8-5 PK616BA_PDFN8-5
3
2
1
3
2
1
PL904
25W@
+5VS_S0
PHASE1 1 4
PR931 PC932 2 3
+APU_CORE_S0
1 2 ISEN1 2.2_0805_1% 0.22U_0603_25V7K @EMI@
1
PR932 BOOT11 2 1
BOOT1_R 2 PR933
10K_0402_1% PC934 4.7_1206_5% PR936 S COIL .22UH +-20% MMD-10DZ-R22MEX2L 35A
PC933 PR934 100P_0402_50V8J PR935 3.65K_0603_1%
5
330P_0402_50V7K 301_0402_1% 210K_0402_1% VSUM+ 1 2 APU_VSUMP_LX
VSUM+ 1 2 APU_VSEN_1
1 2 1 2 1 2 PQ904 PQ905 @EMI@
1 2
PC936
APU_SNB
PK632BA_PDFN8-5
PK632BA_PDFN8-5
330P_0402_50V7K
1APU_VSUM_RTC
@ PC935
680P_0603_50V7K PR938
1
2
1
1 2
PC937
2.1K_0402_1% 1 2 1 2 APU_COMP_1
2
PC939
PR939
1
1
TDC 22A
2
3
2
1
3
2
1
2
2K_0402_1% 330P_0402_50V7K
OCP current > 45.5A
2
PH904 1 2 1 2
APU_FB_1
10K_0402_1%_ERTJ0EG103FA
Load line -2.1mV/A
PR943 PR944 FSW=400kHz
2
523_0402_1% 10_0402_5%
VSUM- 1 2 1 2
+APU_CORE_S0
@ PC942 0_0402_5%
1
0_0402_5%
PR947
1 2
B APU_VSS_SEN (48,7) B
0.01U_0402_50V7K
PC943
1
PR948
10_0402_5%
+APU_CORE_S0 +APU_CORE_NB_S0
2
1 2
TDC=22A,Ipeak=35A Fsw=450K,OCP>=45.5A TDC=12A,Ipeak=17A Fsw=450K,OCP>=22.1A
Inductor DCR=1.1mohm Inductor DCR=1mohm
Output Cap. ESR=10mohm Output Cap. ESR=10mohm
Rds H/S --> typ: 4.8mohm ; max: 7mohm Rds H/S --> typ: 4.8mohm ; max: 7mohm
L/S --> typ: 2.1mohm ; max: 3.3mohm L/S --> typ: 2.1mohm ; max: 3.3mohm
Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=8.565A Delta IL=[(Vin-Vo)/L]*[(Vout/Vin)*T]=12.54A
LIR=Delta IL/Ipeak=0.245 LIR=Delta IL/Ipeak=0.73
Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2] Cout=[L*(Iout+DeltaIL/2)^2]/[(Vout+Delta V)^2-Vout^2]
=1293uF =400.6uF
CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=1.89uF CINBULK=ILoad*Vout*(Vin-Vout)/(Fsw*Vin^2*VINPP)=0.82uF
A A
D
22uF*26
330uF*1
560uF*3
APU_CORE
+APU_CORE_S0
+APU_CORE_S0
5
5
PC1155
560U_2.5V_M PC1169 PC1130 PC1100
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 25W@ 2 1
1
+
+APU_CORE_S0
PC1156 PC1172 PC1131 PC1101
560U_2.5V_M 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
1
+
PC1173 PC1132 PC1102
PC1157 22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
180pF*1
0.22uF*8
22uF*9
APU_CORE(AMD SCL)
560U_2.5V_M 2 1 2 1 2 1
1
+
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
25W@ PC1162 2 1 2 1 2 1
330U_D1_2VM_R6M
PC1171 PC1134 PC1104
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
1
+
2 1 2 1 2 1
25W@ PC1163
330U_D1_2VM_R6M PC1167 PC1135 PC1105
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
1
+
PC1183
330U_D2_2.5VY_R9M PC1185 PC1136 PC1106
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1 2 1
2
1
+
PC1186 PC1137 PC1107
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
25W@ 2 1 2 1 2 1
4
PC1158
560U_2.5V_M
22uF*14
560uF*1
APU_CORENB
1
+
+APU_CORE_NB_S0
PC1140 PC1110
25W@ PC1164 22U_0603_6.3V6M 22U_0603_6.3V6M
330U_D1_2VM_R6M 2 1 2 1
PC1141 PC1111
2
1
+
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
PC1142 PC1112
22U_0603_6.3V6M 22U_0603_6.3V6M
+APU_CORE_NB_S0
2 1 2 1
PC1143 PC1113
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
180pF*1
0.22uF*8
22uF*4
APU_CORENB(AMD SCL)
PC1144 PC1114
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
PC1181 PC1115
22U_0603_6.3V6M 22U_0603_6.3V6M
@
2 1 2 1
PC1180 PC1116
22U_0603_6.3V6M 22U_0603_6.3V6M
2 1 2 1
PC1117
22U_0603_6.3V6M
2 1
3
3
@
PC1118
22U_0603_6.3V6M
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2 1
PC1119
22U_0603_6.3V6M
2 1
22uF*26
330uF*1
560uF*3
GFX_CORE
BR@ PC1159
+APU_CORE_GFX_S0
560U_2.5V_M
BR@ PC1175 BR@ PC1145 BR@ PC1120
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
+APU_CORE_GFX_S0
2 1 2 1 2 1
BR@ PC1160
+APU_CORE_GFX_S0
1
+
2
2 1 2 1 2 1
2
1
+
1
+
1
+
BR@ PC1184 2 1 2 1 2 1
330U_D2_2.5VY_R9M
BR@25W@ PC1189 BR@ PC1151 BR@ PC1126
22U_0603_6.3V6M 22U_0603_6.3V6M 22U_0603_6.3V6M
2
1
+
2 1 2 1 2 1
Size
Title
C
<Title>
1
Sheet
50
of
56
Rev
<RevCode>
D
5 4 3 2 1
D D
PCR10 @ PCC20 @
10_1206_1% 100P_0603_100V8J
Main : NIKOS / P06P03LVG 1 2SNB2 1 2
Main : Cooper / CC12H2.5A-TR 2nd : AOS/ AOD4459 Main : Maglayers / 47UH_MSCDRI-105R-470M
2nd : SART / 2.5A_32V S1206-S-2.5A PCQ1 2nd : Magic / WQPCRH1005R-470M-N
P06P03LVG_SO8 PCL1
+DC20V PCF1 47UH_MSCDRI-105R-470M_2A_20% PCD1
2.5A_63V_CC12H2.5A-TR 1 8 VL 1 2 Lx 2 1 Vout
47U_100V_M_EKY-101EBC470MJC51
10_1206_1%
2.2U_1206_25V7K
1 2 B+ 2 7
2.2U_1206_25V7K
1
2.2U_1206_25V7K
.1U_0402_16V7K
3 6 BX310_SMA2
10K_0402_1%
100P_0603_100V8J
1U_1206_100V7K
1
1U_1206_100V7K
PCC18 @
2.2U_1206_25V7K
PCC3
PCR9
5 Main : PANJIT / BX310 1
PCR7 @
PCC4
1
1
PCC1
PCC2
2nd : Vishay / VSSA310S 1
PCC8 @
1
1
PCC7
+
PCC5
PCC6
4
2
2
2
SNB1
1
2
2 2
100P_0603_100V8J
PCC19
SS B+
Main : NCC / EKY-101EBC470MJC5
2
10_0603_1%
PCR3 10K_0402_1% 2nd : TBD
1
1 2 PWM 2
(21,22) S_INVT_PWM
PCR5
0_0603_5%
100P_0402_50V8J
PCR8
Main : ACES / 50228-01071-P01
C PCU1 C
2nd : TBD
1
1M_0402_1%
1
1
PCC10
PCC14
JCVT1
2
PCR4
FLTB 2 1 VIN 11 13
VIN LX LED1 1
2
PWM 9 16 4 3
PWM VOUT LED3 5 4
5 8 VDC LED4 6 5
PCR1 GND VDC 6
7
1U_0805_25V7K
10K_0402_1% 7
1 2 ENA PCC16 FLTB 6 1 LED1 (22,38) PANEL_ID1 8
PCC15
(21,38) EC_BKOFF# FAULT CS1 1 8
0.047U_0603_25V7M (22,38) PANEL_ID2 9 11
(22,38) PANEL_ID3 9 G11
100P_0402_50V8J
2 2
1COMP2 1 COMP 7 2 LED2 10 12
COMP CS2 10 G12
1
100P_0402_50V8J
100P_0402_50V8J
PCR6
1M_0402_1%
100P_0402_50V8J
PCC9
33K_0402_1% 15 3 LED3
www.teknisi-indonesia.com
PCR2
1
1
PCC12
PCC13
PCC11
2 1 14 4 LED4
2
2
2
2
PCC17 @ 17
.1U_0402_16V7K PGND
RT8549GQW_WDFN16_5X5
A A
5V +1.8V
RT8068 +1.8VSP CPU,BIOS ROM,AUDIO
2A
D D
5V +2.5V
RT8068 +2.5VP RAM
2.24A
3.3V 3V +1.5V
+3VALWP RT9059 +1.5V AUDIO
6.4A 0.25A
3V +0.775V
RT9045 +0.775V FCH
0.2A
B+ 1.2V
Adaptor(20V) RT8207M +1.2VP CPU, RAM
5.31A
C C
0.6V
+0.6VSP RAM
0.75A
B+ 12V
RT8130B +12V HDD
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1.88A
B+ 0.95V/1.05V
TPS51212 +0.95V/+1.05V FCH
7.9A
B+ 1.5V
TPS51212 +VRAM_1.5V VRAM
B 3A B
B+ 1.15V
ISL62771 +VGA_CORE
42A
B+ 1.2V
ISL62771 +GFX_CORE
35A
B+ 1.5V
ISL62771 +APU_CORE
35A
A 1.33V A
+APU_CORE_NB
17A
C C
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B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PIR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.5
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. B555 VAA15 LA-A072P MB
Date: Friday, April 01, 2016 Sheet 53 of 56
5 4 3 2 1
5 4 3 2 1
D D
C C
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B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Sequence Timing
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 54 of 56
5 4 3 2 1
5 4 3 2 1
2.2K 2.2K
RC60 RC58
USC4
APU_SCLK0 RSC50
AG5 AGPIO19 0 SC@ SC_SMLCLK1 114
AG4 AGPIO20 APU_SDATA0
0 SC@ SC_SMLDATA1 115
RTD2506S-CG
RPC8 RSC51
APU 10K
BB10 APU_I2C0_SCL 10K
BB9 APU_I2C0_SDA 10K
BB7 APU_I2C1_SCL 10K
BC7 APU_I2C1_SDA
C +1.8VS_S0 C
RC25.3
RC25.1
1K
1K
APU_SIC EC_SMB_CK0
N-MOS
B18
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N-MOS EC_SMB_DA0
C17 APU_SID QC2
+3VS_S0
1K
EC_SMB_CK0
8 UTH1 thermal sensor
EC_SMB_DA0 SMBUS Address [ 0x9A ]
KBC 7
NCT6685D
REC41
RCV30 CIISCL
CVT@ 2.2K
13 UCV2 RTD2136N
REC40 RCV31
+3VS_S0 14 DP to VGA
CVT@ 2.2K CIISDA
EC_SMB_CK2
PCU1
77 14
EC_SMB_DA2 RT8549GQW
78 15
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D961P M/B
Date: Friday, April 01, 2016 Sheet 55 of 56
5 4 3 2 1
5 4 3 2 1
CQ PD uc ET
CQ e
aD aD aD aD aD aD aD aD aD aD aD aD aD aD aD aD aD
SC t
on PH mo 6
nu
su
de
/1 /1 /2 /1 /1 /2 /2 /2 /2 /2 /1 /1 /2 /1 /2 /2 /1 /1 /1
62 62 91 92 62 61 81 81 91 91 62 92 61 62 61 71 62 62 62
o
e
n
E ov qe T
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
2 _0 t
t D re _P
i
L ga t
, e S
3 ev
f l P n
r
t e
1 7 QC2 change to 2xBSS138 QC4/QC6 / Remove QC3
D D
l eu RE
t e
2 7 Remove UC12 , add RC20 on DP0_HPD
xV
ed no
ep g
ed s
hg O-
tn r
lu Dr
ih IM
e
n
-
r S
u u
i t
p o
s TS
s YS
i i
s cn
t e
3 7 Remove RC9/RC20 change to idepedent resistor
CN
TU
do
ne
ba
OE
D
e
p
m
3
/
i
s
f
e
i
t
f
H
t e
4 7 RC24 change to pop / RC26 change to non-pop
6O CS
6O
ID
MU
GA dA
dA WF
GA
@A
CR AL
UK
hg IP
up
up
wo
IP d
lu o
ih GA
IP
su
)h
iP
77 HS
@S
)S
se
le
ce
l
h
o
B
O
-
l
g
p
r 4O
s
9 _A
d F
l n
i
t
r
9
e
f
r
l
-
)
/
l
-
i
t
n
(
I
t e
5 8
UK
ln
cS
la
ra
oF
o
_
t e
6 8
t e
7 8 TPM_STSIRQ# change to AGPIO6 TPM Voltage level is S5
t e
8 10 +1.8VS_S0_Cap :Remove CC99 (AMD SCL check list updated)
t e
9 10 The VDDP_GFX Power Rail change to +VDDP_GFX_S0 Rename and VDDP_GFX power rail only use on Bristol
t e
10 10 Remove CC163 (+RTC_APU_S5 Cap) follow AMD SCH CKL
t e
11 22 Add RPSC1 for Panel ID pull-high
C C
t e
12 22 +3V_SCA_R use Power switch USC5 MOSFET switch have power leakage ,change to Load switch
t e
13 22 Add Panel_ID4 on Pin34 For C5/C4 panel detect
t e
14 22 Add HDMI_CABLE_DET# on Pin44 For HDMI-IN S5 Mode wake up , connect to SCALAR and EC .
t e
15 22 Add SCA_FW_FLASH on Pin43 For SCALAR FW FLASH to announce CPU
www.teknisi-indonesia.com
t e
16 22 Add RSC45 / RSV50 pull-high for SC_SML
t e
17 22 Remove RSC50/RSC51 ,add QSC4 for SC_SMLCLK/DATA1 Level shift
a D aD
18
t e
22 EDP_AUXP/N swap for error pin define
19
t
24 Add RHI16 for Customer requier
20
21
22
B B
23
24
25
26
27
28
29
30
31
32
A A
33
34
35 Security Classification Compal Secret Data Compal Electronics, Inc.
2015/01/23 2017/01/23 Title
36 Issued Date Deciphered Date
HW-PIR
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
37 AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D961P M/B 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Friday, April 01, 2016 Sheet 56 of 56
38 5 4 3 2 1