Notes on Make and Makefiles

Author’s Name
February 2, 2024

1 Introduction to make
The make command is a powerful tool used for automating the build process
in Unix-based systems. It utilizes a file, typically named Makefile, which con-
tains directives for building a software project. These directives include targets,
dependencies, and the shell commands to execute.

1.1 Features
• Efficiently recompiles only the necessary parts of a project by checking file
timestamps.
• Supports conditional execution for complex build processes.
• Highly customizable for a wide range of tasks beyond software compilation.

make is favored for its simplicity and effectiveness, especially in projects with
many components.

2 Overview of Makefiles
A Makefile is a key tool in automating the build process in software develop-
ment, particularly when using the make utility. It defines how software projects
are compiled and linked, specifying dependencies among source files to compile
only what’s necessary.

2.1 Structure of a Makefile

A Makefile contains:

• Rules: Specify targets, prerequisites, and recipes.

• Targets: Define the output files that the make utility should produce.
• Prerequisites: Files that must be present to generate a target.

1
 • Recipes: Commands executed by make to produce the target from the
prerequisites.
Makefiles streamline the development process, enabling developers to com-
pile and maintain projects efficiently across different environments.

3 Advantages of using make and Makefiles

1. Efficiency: make optimizes the build process by only recompiling parts of
the program that have been modified.
2. Modularity: Makefiles enable modular compilation, allowing independent
compilation of different modules.
3. Automation: The build process is automated, ensuring consistent use of
compilation commands.
4. Clarity: Makefiles serve as clear documentation for the build process,
aiding maintenance and collaboration.
5. Portability: Makefiles can be easily adjusted to compile the same source
code on different systems.
6. Dependency Tracking: make automatically tracks dependencies to ensure
files are compiled in the correct order.

4 Compiling a C Program with Make: Hello

World C Program
1 # include < stdio .h >
2
3 int main () {
4 printf ( " Hello , World !\ n " ) ;
5 return 0;
6 }

5 Makefile
1 hello : hello . c
2 gcc -o hello hello . c

To compile the program, run make in the terminal. This will use the gcc
command specified in the Makefile to compile hello.c into an executable
named hello.