Tutorial 02

Important

CPUs also have a clock which ticks. Each tick, the flip flops change from
the previous state, which they currently have at their outputs, to the
next state, which the logic sends to their inputs.
to know the size of an instruction, we can perform substraction on the
hex code of instruction n and instruction n-1 , that gives us 1 byte.
CIR contains the address of the current instruction that needs to be
decoded.

1. Basic CISC x86 Assembly and

Instruction Execution Cycle
Exercise 01:
1. The total number of logical cores can be calculated by multiplying the
number of CPU sockets, the number of cores per socket, and the number of
threads per core:

4 sockets 4 cores per socket 2 threads per core = 32 logical cores

2. Similarly, the total number of physical cores can be calculated:

2 sockets * 4 cores per socket = 8 physical cores

3. The feature of the CPU that has a direct impact on the maximum
addressable space is the address bus width. It determines the maximum
amount of memory that can be addressed by the CPU. For example, a CPU
with a 32-bit address bus can address up to 232 (4 GB) of memory. (here
Mr.Lasla said it's word-size but google says otherwise,something
like "word size impacts memory and the width of the address bus
controls ADDRESSABLE memory" so i don't really know...)
4. Yes, if the operating system has the time-sharing feature.
Exercise 02:
Assembly : low-level programming language , it was created as a means of
humans not wanting to write machine code (0s and 1s or binary) instructions to
a computer.

1. If the CIR contains the instruction stored in memory address 0x1540:

PC: 0x1541, next instruction to be executed
Ax: 5
2. Finished Decoding instruction at 0x1542:
PC: 0x1543 (pointing to the next instruction after decoding)
Ax: 15 (result of multiplication: 5 * 3)
Bx: 3 (unchanged)
3. PC Incremented after decoding:
after the CU finishes decoding the instruction and fetching the operands
, the CP gets incremented.

Not always:
1. Jump instructions: Jumps modify the PC directly, bypassing the
increment.
2. Subroutines: Calls push the current PC onto the stack before jumping,
allowing return.
Therefore, the PC increments after instruction fetch and before decoding, but
its value can change due to other instructions like jumps and calls.

Exercise 03:
// 1
int ax = 1;
do {}
while (ax == 1)
// 2
int i = 1;
while (ax == 1) {}

Exercise 4:
The program will crash when the ALU will start to execute the instruction at
address 0x330F, because the previous instruction in address 0x330E involves the
call of XOR AX with itself which makes Ax now hold the value 0, thus in the
address 0x330F the instruction Div Ax is actually executing a division by 0 which
will cause an exception.
this happens in the following way:

ALU faces a division by zero exception (software-based).

CPU triggers interrupt to handle this exception by executing its specific ISR.
The routine will handle the interrupt and then terminate the program by
returning an error message.

Exercise 5 :
a)

Mov Ax, [0X3F55] (encoded in 2 words) -> PC= 0xFBC0

Mov Bx, [0X3F56] (encoded in 2 words)-> PC= 0xFBC0 + 4 = 0xFBC4
Mul Cx, 0x0000 (encoded in 1 word)-> PC= 0xFBC4 + 4 = 0xFBC8
Xor Bx, Cx (encoded in 1 word) -> PC= 0xFBC8 + 2 = 0xFBCA
Inc Ax (encoded in 1 words)-> PC= 0xFBCA + 2 = 0xFBCC
Halt (encoded in 1 words)

explanation:

byte addressable memory + word size = 2byte CPU (16-bit CPU)

we increment using the size of instructions in bytes, so since the first
instruction is 2 words, and 1 word = 2 bytes , the increment value is 2 * 2 =
4, and so on.
b) The component responsible for pushing the PC value onto the stack is the
CPU. Specifically, this is done as part of the interrupt handling mechanism.
When an interrupt occurs, the CPU saves the current state of execution,
including the PC value, onto the stack before jumping to the interrupt
service routine.
c) The stack we are referring to here is the system stack or the interrupt
stack, which is a region of memory used by the CPU to store information
temporarily during interrupt service routines or subroutine calls. It's a part of
the computer's memory managed by the CPU.

Exercise 6 :
 section .data ; Data segment
msg db 'The National School of Artificial Intelligence!'

section .text ; Code segment

mov ah, 09h ; here we are indicating a function code (09h)
mov dx, OFFSET msg ; Grab the address of variable msg
int 21h ; Perform system call (user wants function 09h)
hlt

mov ah, 09h : This instruction moves the hexadecimal value 09h into the
AH register. In the context of DOS interrupts, AH often holds the function
code for various system calls. In this case, 09h typically represents the
function for printing a string to the console.
mov dx, OFFSET msg : This instruction loads the offset address of the
variable msg into the Dx register. This means Dx will contain the memory
address where the string message is stored.
int 21h : This is the software interrupt 21h, which is a DOS interrupt used
for various system services. In this context, it's typically used to invoke DOS
functions. The specific function to be executed is determined by the value in
the AH register, which in this case is 09h. When AH is set to 09h, it indicates
that the program intends to print a string to the console. The address of the
string to be printed is expected to be in the DX register
hlt : This instruction halts the processor. It's used to end the program
execution.

So, this code can be used to print the message "the national school of artificial
intelligent" to the console using DOS system calls.

2. Process Management
Exercise 01
Exercise 02
Exercise 03
Exercise 04
Exercise 05
Exercise 06