Msi Armor RX470-570 4GB Esquematico V341 - 20

(1) PCI-EXPRESS EDGE CONNECTOR
00 M
+3.3V_BUS
0
RD 17 SI +3.3V_BUS +3.3V_AUX +3.3V_BUS +12V_BUS +12V_BUS +3.3V_BUS +3.3V_BUS
(C 96 C
MPCIE1
Q100 B1 +12V PRSNT1_A1 A1 PRESENCE

1
1
R103 R104 R109 B2 +12V +12V A2 C158
45.3K 45.3K 2 3 10K B3 +12V +12V A3 0.1uF
1% 1% 5% 6.3V
BSH111 B4 GND GND A4 SYSTEM JTAG TDI AND
G_SMBCLK 1 2 5% SMCLK B5 A5
2
IN 8,24 R105 0R SMCLK JTAG2
1
TDO ARE HARD WIRED.
)2 7 ON
JTDIO_LOOP
G_SMBDAT 1 2 5% SMDAT B6 A6 R111
BI 8,24 R106 0R SMDAT JTAG3 C159
B7 GND JTAG4 A7 0.1uF 10K
6.3V 5% U100
2 3 B8 +3.3V JTAG5 A8
B9 A9 3 5
2
Q110 JTAG1 +3.3V 1.8V_EN
0R
A VCC
+3.3V_BUS
B10 A10 1 2 5% 1 42,21,23
IN OUT
PERSTB_BUF
BSH111 3.3Vaux +3.3V R102
20,21
UNNAMED_1_74AUP1G57_I255_B
B Y
WAKEB B11 WAKE_ PERST_ A11 PERSTB 6 GND 2
C
1
Mechanical Key
CLKREQB B12 A12
+12V_BUS IN 7 RSVD_B12 GND 74AUP1G57GM
B13 A13
F
OUT
PCIE_REFCLKP
GND REFCLK+ 2
0
1 2
0R 5% B14 A14 1 2 5%
OUT OUT
PETP0_GFXRP0 2 PCIE_REFCLKN
R110 PETp0 REFCLK- 2 R120 1K
B15 A15
OUT
PETN0_GFXRN0 2
PETn0 GND DNI
+3.3V_BUS
B16 A16
IN
PERP0
GND PERp0 2
+3.3V_BUS 1 2 UNNAMED_1_MOSN_I230_G B17 A17
石 17 jo ID
0R 5%
IN
PERN0
MR110 PRSNT2_B17 PERn0 2
B18 GND GND A18
B19 A19
OUT
PETP1_GFXRP1 2
PETp1 RSVD_A19
Q101
B20 A20
OUT
PETN1_GFXRN1 2
PETn1 GND
1
1
BSH111
B21 A21
IN
PERP1
R107 GND PERp1 2
2.2K 2 3 B22 A22
IN
PERN1
5% GND PERn1 2
B23 A23
OUT
PETP2_GFXRP2 2
PETp2 GND
G_WAKEB 1 2 5% B24 A24
2
OUT OUT
PETN2_GFXRN2 2
7 PETn2 GND
B25 A25
IN
PERP2
R108
阿 09 ne EN
0R GND PERp2 2
B26 A26
IN
PERN2
LIMITED TO OBFF GND PERn2 2
B27 A27
OUT
PETP3_GFXRP3 2
PETp3 GND
B28 A28
OUT
PETN3_GFXRN3 2
PETn3 GND
B29 A29
IN
PERP3
GND PERp3 2
B30 A30
IN
PERN3
RSVD_B30 PERn3 2
B31 PRSNT2_B31 GND A31
B32 GND RSVD_A32 A32
B33 A33
OUT
PETP4_GFXRP4 2
PETp4 RSVD_A33
鋒 19 pe TI
B34 A34
OUT
PETN4_GFXRN4 2
PETn4 GND
B35 A35
IN
PERP4
GND PERp4 2
PLACE THESE CAPS AS CLOSE TO B36 A36

IN
PERN4
GND PERn4 2
PCIE CONNECTOR AS POSSIBLE B37 A37

OUT
PETP5_GFXRP5 2
PETp5 GND
B38 A38
OUT
PETN5_GFXRN5 2
PETn5 GND
B39 A39
IN
PERP5
GND PERp5 2
B40 A40
IN
PERN5
GND PERn5 2
+12V_BUS
B41 A41
OUT
PETP6_GFXRP6 2
PETp6 GND
02 i( AL
B42 A42
OUT
PETN6_GFXRN6 2
PETn6 GND
B43 A43
IN
PERP6
GND PERp6 2
B44 A44
IN
PERN6
GND PERn6 2
B45 A45
OUT
PETP7_GFXRP7 2
C157 C151 C152 PETp7 GND
10uF 0.15uF 0.15uF B46 A46
OUT
PETN7_GFXRN7 2
16V 16V 16V PETn7 GND
B47 A47
IN
PERP7
GND PERp7 2
B48 A48
IN
PERN7
PRSNT2_B48 PERn7 2
B49 GND GND A49
B50 A50
OUT
PETP8_GFXRP8 2
PETp8 RSVD_A50
(0
B51 A51
OUT
PETN8_GFXRN8 2
PETn8 GND
B52 A52
IN
PERP8
裴
GND PERp8 2
B53 A53
IN
PERN8
GND PERn8 2
+3.3V_BUS +3.3V_BUS
B54 A54
OUT
PETP9_GFXRP9 2
PETp9 GND
B55 A55
OUT
PETN9_GFXRN9 2
PETn9 GND
B56 A56
IN
PERP9
GND PERp9 2
B57 A57
IN
PERN9
GND PERn9 2
B58 A58
OUT
PETP10_GFXRP10
C153 C154 C155 C156 C165 2 PETp10 GND
00 RM 亮
10uF 0.1uF 1uF 0.01uF 10uF B59 A59
OUT
PETN10_GFXRN10
6.3V 6.3V 6.3V 10V 6.3V
2 PETn10 GND
B60 A60
IN
PERP10
GND PERp10 2
B61 A61
IN
PERN10
GND PERn10 2
B62 A62
OUT
PETP11_GFXRP11
2 PETp11 GND
B63 A63
OUT
PETN11_GFXRN11
2 PETn11 GND
B64 A64
IN
PERP11
GND PERp11 2
B65 A65
IN
PERN11
GND PERn11 2
B66 A66
OUT
PETP12_GFXRP12
2 PETp12 GND
B67 A67
68 A工樂
OUT
PETN12_GFXRN12
2 PETn12 GND
B68 A68
IN
PERP12
GND PERp12 2
B69 A69
IN
PERN12
GND PERn12 2
B70 A70
OUT
PETP13_GFXRP13
2 PETp13 GND
B71 A71
OUT
PETN13_GFXRN13
2 PETn13 GND
B72 A72
IN
PERP13
GND PERp13 2
B73 A73
IN
PERN13
GND PERn13 2
B74 A74
OUT
PETP14_GFXRP14
2 PETp14 GND
B75 A75
OUT
PETN14_GFXRN14
2 PETn14 GND
76
B76 A76 SYMBOL LEGEND
IN
PERP14
GND PERp14 2
B77 A77
)
IN
PERN14
GND PERn14 2
B78 A78
OUT
PETP15_GFXRP15
2 PETp15 GND DNI DO NOT
B79 A79
OUT
PETN15_GFXRN15
程
2 PETn15 GND INSTALL
B80 A80
IN
PERP15
GND PERp15 2
PRESENCE B81 A81
IN
PERN15
1 PRSNT2_B81 PERn15 2 b or # ACTIVE
B82 RSVD_B82 GND A82 LOW
0)
x16 PCIe BUO BRING UP
ONLY
DIGITAL
課
GROUND
ANALOG
GROUND
MICRO-STAR INT'L CO.,LTD

MS-V341
MSI
Size Document Description Rev
Custom 0001 PCIE EDGE CONNECTOR 2.0
Date: Monday, June 27, 2016 Sheet 1 of 26

(2) ELLESMERE PCIE INTERFACE
00 M
0
RD 17 SI IN
IN
IN
TP101
1
1
TP102
1
PETP0_GFXRP0
PETN0_GFXRN0
PETP1_GFXRP1
AN42
AN43
AN41
AM41
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
U1B
PART 2 OF 18
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
AR38
AR39
AR37
AN37
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
C100
C101
C102
0.22uF
1
0.22uF
1
0.22uF
1
6.3V
6.3V
6.3V
PERP0
PERN0
PERP1
OUT
OUT
OUT
(C 96 C
IN OUT
PETN1_GFXRN1 PERN1
1 PCIE_RX1N PCIE_TX1N C103 0.22uF
1 6.3V
PCIE_TX2P
AM43 AN39
IN OUT
PETP2_GFXRP2 PERP2
1 PCIE_RX2P PCIE_TX2P PCIE_TX2N
C104 0.22uF
1 6.3V
AM42 AN38
IN OUT
PETN2_GFXRN2 PERN2
1 6.3V
PCIE_TX3P
AK43 AM39
IN OUT
PETP3_GFXRP3 PERP3
C106 0.22uF
1 6.3V
AK42 AM38
IN OUT
PETN3_GFXRN3 PERN3
1 6.3V
)2 7 ON
PCIE_TX4P
AJ42 AK38
IN OUT
PETP4_GFXRP4 PERP4
C108 0.22uF
1 6.3V
AJ43 AK39
IN OUT
PETN4_GFXRN4 PERN4
1 6.3V
PCIE_TX5P
AJ41 AK37
IN OUT
PETP5_GFXRP5 PERP5
C111 0.22uF
1 6.3V
AG41 AJ37
IN OUT
PETN5_GFXRN5 PERN5
1 6.3V
PCIE_TX6P
AG43 AJ39
IN OUT
PETP6_GFXRP6 PERP6
C112 0.22uF
1 6.3V
AG42 AJ38
IN OUT
PETN6_GFXRN6 PERN6
1 6.3V
0 F
PCIE_TX7P
AF43 AG39
IN OUT
PETP7_GFXRP7 PERP7
C114 0.22uF
1 6.3V
AF42 AG38
IN OUT
PETN7_GFXRN7 PERN7
1 6.3V
PCIE_TX8P
AE42 AF38
石 17 jo ID
IN OUT
PETP8_GFXRP8 PERP8
C116 0.22uF
1 6.3V
AE43 AF39
IN OUT
PETN8_GFXRN8 PERN8
1 6.3V
PCIE_TX9P
AE41 AF37
IN OUT
PETP9_GFXRP9 PERP9
C118 0.22uF
1 6.3V
AD41 AE37
IN OUT
PETN9_GFXRN9 PERN9
1 6.3V
P
PCIE_TX10P
AD43 AE39
IN OUT
PETP10_GFXRP10 PERP10
1 PCIE_RX10P PCIE_TX10P C120 0.22uF
1 6.3V
AD42 C AE38
PCIE_TX10N
IN OUT
PETN10_GFXRN10 PERN10
PCIE_RX10N
I PCIE_TX10N 0.22uF 6.3V
1 C121 1
阿 09 ne EN
PCIE_TX11P
X
TP117
AC43 AD39
IN OUT
1 PCIE_RX11P PCIE_TX11P C122 0.22uF
1 6.3V
P
PCIE_TX11N
AC42 AD38
IN OUT
1 6.3V
R
TP118 E PCIE_TX12P
AA42 S AC38
IN OUT
C124 0.22uF
1 6.3V
AA43 S AC39
IN OUT
1 6.3V
PCIE_TX13P
AA41 AC37
IN OUT
C126 0.22uF
1 6.3V
Y41 AA37
IN OUT
1 6.3V
鋒 19 pe TI
PCIE_TX14P
Y43 AA39
IN OUT
C128 0.22uF
1 6.3V
Y42 AA38
IN OUT
1 6.3V
PCIE_TX15P
W42 Y38
IN OUT
C130 0.22uF
1 6.3V
W43 Y39
IN OUT
1 6.3V
02 i( AL
AR42
IN
PCIE_REFCLKP 1 PCIE_REFCLKP
AR43
IN
PCIE_REFCLKN 1 PCIE_REFCLKN PCIE_ZVSS
PCIE_ZVSS AK30 R155 1 2 200R 1%
PX_EN
V40 R156 1 2 0R 5%
PX_EN 21,23,24 OUT
UNNAMED_2_ELLESMEREL4_I197_PXEN
(0 裴
R150
1K C258
5% 0.1uF
6.3V
AV42
DNI
IN
PERSTB_BUF 1,21,23 PERSTB
+1.8V +0.8V
00 RM 亮
AM25 VDD_18
AN25 VDD_18
C1700 C1701 C1702 C1738 C176 C177 C172 C173 AN26 VDD_18
1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF AP26 VDD_18
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
AP27 VDD_18
+1.8V
AR27 VDD_18
OVERLAP
C1703 C1704 C1705 C1719
0.1uF 0.1uF 0.1uF 0.1uF
68 A工樂
6.3V 6.3V 6.3V 6.3V
MC141 C141 C136 C139 C140
10uF 4.7uF 1uF 0.1uF 0.01uF
6.3V 6.3V 6.3V 6.3V 6.3V
+0.8V
C1706 MC1707 C1707 C1708 C1709
4.7uF 22uF 4.7uF 4.7uF 4.7uF
6.3V 4V 6.3V 6.3V 6.3V
C137 C138 C142 C30
1uF 1uF 1uF 1uF
VDD_08 AJ30
6.3V 6.3V 6.3V 6.3V
OVERLAP
76
+0.8V
)
R4301 0R
EVDDQ_G
AJ29 1 2 5% EVDDQ
VSS 24 IN
AA34 AK29
程
VDD_08 VSS
AA35 VDD_08
1
+0.8V
C133 C145 C146 AD36 VDD_08 R4302
1uF 1uF 1uF AE35 VDD_08
1K
6.3V 6.3V 6.3V 5%
AF35 VDD_08
0)
AG36
2
VDD_08
C1711 AJ35 VDD_08
1uF
C147 C150 C1284 C1319 AK35 VDD_08
6.3V
1uF 1uF 1uF 1uF AM36 VDD_08
課
6.3V 6.3V 6.3V 6.3V
AN35 VDD_08
10u
C1713 C1714
0.1uF 0.1uF
6.3V 6.3V C161 C162 C160 C148 MC148
0.1uF 0.1uF 10uF 4.7uF 22uF REV 0.90
6.3V 6.3V 4V 6.3V 4V
ellesmere_l4
MC1717 C1717
22uF 4.7uF
4V 6.3V
OVERLAP
Check BOM for more detail

MS-V341
MSI
Custom 0002 ELLESMERE PCIE INTERFACE 2.0

(3) ELLESMERE MEM INTERFACE CH A/B
00 M
0
U1C U1D
RD 17 SI
PART 3 OF 18 PART 4 OF 18
DQA0_<0> U43 A41 DQA1_<0> DQB0_<0> K26 G18 DQB1_<0>

DQA0_<0> DQA0_<1> 5 5 DQA1_<1> DQA1_<0> DQB0_<0> 5
DQB0_<1> 5
DQB1_<1> DQB1_<0>
DQA0_0 DQA1_0 DQB0_0 DQB1_0
U41 B40 E25 H18
DQB0_<2> 5
DQB1_<2> DQB1_<1>
U40 A39 F25 F17
DQB0_<3> 5
DQB1_<3> DQB1_<2>
R42 C38 H25 G17
DQB0_<4> 5
DQB1_<4> DQB1_<3>
P42 C36 J24 F15
DQB0_<5> 5
DQB1_<5> DQB1_<4>
M43 A36 D23 H15
DQB0_<6> 5
DQB1_<6> DQB1_<5>
M41 B35 E23 D14
DQA0_<6> DQA0_<7> 5 5 DQA1_<6> DQB0_<6> 5 5 DQB1_<6>
(C 96 C
DQA1_<7> DQB0_<7> DQB1_<7>
M40 A35 G23 E14
DQB0_<8> 5
DQB1_<8> DQB1_<7>
J43 A32 E21 J12
DQB0_<9> 5
DQB1_<9> DQB1_<8>
J42 C32 J20 E11
DQA0_<9> DQA0_<10>5 5 DQA1_<10> DQA1_<9> DQB0_<9> 5
DQB0_<10> 5
DQB1_<10> DQB1_<9>
H43 D32 G20 F11
DQB0_<11> 5
DQB1_<11> DQB1_<10>
DQA0_10 DQA1_10 DQB0_10 DQB1_10
H41 B30 F20 H11
DQB0_<12> 5
DQB1_<12> DQB1_<11>
DQA0_11 DQA1_11 DQB0_11 DQB1_11
F41 B29 E19 E9
DQB0_<13> 5
DQB1_<13> DQB1_<12>
DQA0_12 DQA1_12 DQB0_12 DQB1_12
E43 D27 F19 G9
DQB0_<14> 5
DQB1_<14> DQB1_<13>
DQA0_13 DQA1_13 DQB0_13 DQB1_13
)2 7 ON
C43 C27 E18 H9
DQB0_<15> 5
DQB1_<15> DQB1_<14>
DQA0_14 DQA1_14 DQB0_14 DQB1_14
D42 A27 D18 F8
DQB0_<16> 5
DQB1_<16> DQB1_<15>
DQA0_15 DQA1_15 DQB0_15 DQB1_15
U38 E38 C20 B15
DQB0_<17> 5
DQB1_<17> DQB1_<16>
DQA0_16 DQA1_16 DQB0_16 DQB1_16
U37 H36 A20 C15
DQB0_<18> 5
DQB1_<18> DQB1_<17>
DQA0_17 DQA1_17 DQB0_17 DQB1_17
R38 F36 D20 A14
DQB0_<19> 5
DQB1_<19> DQB1_<18>
DQA0_18 DQA1_18 DQB0_18 DQB1_18
R36 G35 B19 B14
DQB0_<20> 5
DQB1_<20> DQB1_<19>
DQA0_19 DQA1_19 DQB0_19 DQB1_19
P39 E33 B18 D12
DQB0_<21> 5
DQB1_<21> DQB1_<20>
DQA0_20 DQA1_20 DQB0_20 DQB1_20
P37 F33 A17 B11
DQB0_<22> 5
DQB1_<22> DQB1_<21>
DQA0_21 DQA1_21 DQB0_21 DQB1_21
M38 F32 C17 C11
F
DQB0_<23> 5
DQB1_<23> DQB1_<22>
DQA0_22 DQA1_22 DQB0_22 DQB1_22
0
M37 G32 D17 A9
DQB0_<24> 5
DQB1_<24> DQB1_<23>
DQA0_23 DQA1_23 DQB0_23 DQB1_23
L36 G30 A26 C8
DQB0_<25> 5
DQB1_<25> DQB1_<24>
DQA0_24 DQA1_24 DQB0_24 DQB1_24
J40 J29 B26 D8
DQB0_<26> 5
DQB1_<26> DQB1_<25>
DQA0_25 DQA1_25 DQB0_25 DQB1_25
J39 E29 C25 C6
DQA0_<27>5 5 5 5
石 17 jo ID
DQA0_<26> J37
DQA0_26 DQA1_26
F29 DQA1_<27> DQA1_<26> DQB0_<26> DQB0_<27> B25
DQB0_26 DQB1_26
B6 DQB1_<27> DQB1_<26>
DQB0_<28> 5
DQB1_<28> DQB1_<27>
DQA0_27 DQA1_27 DQB0_27 DQB1_27
E40 F27 A24 D5
DQB0_<29> 5
DQB1_<29> DQB1_<28>
DQA0_28 DQA1_28 DQB0_28 DQB1_28
E41 D26 A23 C4
DQB0_<30> 5
DQB1_<30> DQB1_<29>
DQA0_29 DQA1_29 DQB0_29 DQB1_29
D39 E26 B23 B4
DQB0_<31> 5
DQB1_<31> DQB1_<30>
DQA0_30 DQA1_30 DQB0_30 DQB1_30
C39 G26 D21 A3
DQA0_<31> 5 DQA0_31 DQA1_31 5 DQA1_<31> DQB0_<31> 5 DQB0_31 DQB1_31 5 DQB1_<31>
MAA0_<0> U32 H33 MAA1_<0> MAB0_<0> H23 N18 MAB1_<0>

MAA0_<0> MAA0_<1> 5 5 MAA1_<1> MAA1_<0> MAB0_<0> 5
MAB0_<1> 5
MAB1_<1> MAB1_<0>
阿 09 ne EN
MAA0_0 MAA1_0 MAB0_0 MAB1_0
U34 M32 N24 K17
MAA0_<1> MAA0_<2> 5 MAA0_1 MAA1_1 5 MAA1_<2> MAA1_<1> MAB0_<1> 5
MAB0_<2>
MAB0_1 MAB1_1 5
MAB1_<2> MAB1_<1>
V31 J32 K24 N17
MAA0_<2> MAA0_<3> 5 MAA0_2 M MAA1_2 5 MAA1_<3> MAA1_<2> MAB0_<2> 5
MAB0_<3>
MAB0_2 M MAB1_2 5
MAB1_<3> MAB1_<2>
U35 E K32 M24 E M17
MAA0_<3> MAA0_<4> 5 MAA0_3
M
MAA1_3 5 MAA1_<4> MAA1_<3> MAB0_<3> 5
MAB0_<4>
MAB0_3
M
MAB1_3 5
MAB1_<4> MAB1_<3>
V36 K30 L25 L15
MAA0_<4> MAA0_<5> 5 MAA0_4
O
MAA1_4 5 MAA1_<5> MAA1_<4> MAB0_<4> 5
MAB0_<5>
MAB0_4
O
MAB1_4 5
MAB1_<5> MAB1_<4>
V33 L30 M25 J15
MAA0_<5> MAA0_<6> 5 MAA0_5
R MAA1_5 5 MAA1_<6> MAA1_<5> MAB0_<5> 5
MAB0_<6>
MAB0_5
R MAB1_5 5
MAB1_<6> MAB1_<5>
R33 H35 N23 P19
MAA0_<6> MAA0_<7> 5 MAA0_6 Y MAA1_6 5 MAA1_<7> MAA1_<6> MAB0_<6> 5
MAB0_<7>
MAB0_6 Y MAB1_6 5
MAB1_<7> MAB1_<6>
R35 L33 L23 K18
MAA0_<7> MAA0_<8> 5 MAA0_7
I
MAA1_7 5 MAA1_<8> MAA1_<7> MAB0_<7> 5
MAB0_<8>
MAB0_7
I
MAB1_7 5
MAB1_<8> MAB1_<7>
U31 J33 K23 L18
MAA0_<8> 5 MAA0_8
N
MAA1_8 5 MAA1_<8> MAB0_<8> 5 MAB0_8
N
MAB1_8 5 MAB1_<8>
鋒 19 pe TI
W35 N27 J27 K14
MAA0_9
T MAA1_9 MAB0_9
T MAB1_9
E E
BI
WCKA0_0 5 L42 WCKA0_0 R WCKA1_0
5 B33 WCKA1_0
BI BI
WCKB0_0 5 G21 WCKB0_0 R WCKB1_0
5 F12 WCKB1_0
BI
WCKA0B_0 L41 F C33 WCKA1B_0 WCKB0B_0 H21 F G12 WCKB1B_0
BI 5 WCKA0B_0
A
WCKA1B_0
5
BI BI 5 WCKB0B_0
A
WCKB1B_0
5
BI
C C
WCKA0_1 L39 E D30 WCKA1_1 WCKB0_1 A21 E A8 WCKB1_1
BI 5 WCKA0_1 WCKA1_1
5
BI BI 5 WCKB0_1 WCKB1_1
5
BI
WCKA0B_1 L38 E30 WCKA1B_1 WCKB0B_1 B21 B9 WCKB1B_1
BI 5 WCKA0B_1 WCKA1B_1
5
BI BI 5 WCKB0B_1 WCKB1B_1
5
BI
02 i( AL
EDCA0_0 R41 B38 EDCA1_0 EDCB0_0 F24 E15 EDCB1_0
BI 5 EDCA0_0 EDCA1_0
5
BI BI 5 EDCB0_0 EDCB1_0
5
BI
EDCA0_1 F42 C29 EDCA1_1 EDCB0_1 J19 D9 EDCB1_1
5
5
BI
EDCA0_2 R39 D35 EDCA1_2 EDCB0_2 A18 A12 EDCB1_2
5
5
BI
EDCA0_3 H38 G27 EDCA1_3 EDCB0_3 D24 B5 EDCB1_3
5
5
BI
DDBIA0_0 P43 D36 DDBIA1_0 DDBIB0_0 G24 J17 DDBIB1_0
BI 5 DDBIA0_0 DDBIA1_0
5
BI BI 5 DDBIB0_0 DDBIB1_0
5
BI
DDBIA0_1 H40 B A30 DDBIA1_1 DDBIB0_1 H19 B J11 DDBIB1_1
BI 5 DDBIA0_1
A
DDBIA1_1
5
BI BI 5 DDBIB0_1
A
DDBIB1_1
5
BI
DDBIA0_2 P40 E35 DDBIA1_2 DDBIB0_2 C19 C12 DDBIB1_2
BI 5 DDBIA0_2
N DDBIA1_2
5
BI BI 5 DDBIB0_2
N DDBIB1_2
5
BI
(0
DDBIA0_3 F39 K H29 DDBIA1_3 DDBIB0_3 C24 K A5 DDBIB1_3
BI 5 DDBIA0_3 DDBIA1_3
5
BI BI 5 DDBIB0_3 DDBIB1_3
5
BI
裴
ADBIA0 P36 A J36 ADBIA1 ADBIB0 L21 B L19 ADBIB1
BI 5 ADBIA0 ADBIA1
5
BI BI 5 ADBIB0 ADBIB1
5
BI
Y34 M27 L26 K12

OUT OUT OUT OUT
CSA0B_0 CSA1B_0 CSB0B_0 CSB1B_0
5 CSA0B_0 CSA1B_0
5 5 CSB0B_0 CSB1B_0
5
00 RM 亮
R32 L35 K21 M19
OUT OUT OUT OUT
CASA0B CASA1B CASB0B CASB1B
5 CASA0B CASA1B
5 5 CASB0B CASB1B
5
P33 M35 K20 M20
OUT OUT OUT OUT
RASA0B RASA1B RASB0B RASB1B
5 RASA0B RASA1B
5 5 RASB0B RASB1B
5
V34 H30 J25 M15
OUT OUT OUT OUT
WEA0B WEA1B WEB0B WEB1B
5 WEA0B WEA1B
5 5 WEB0B WEB1B
5
P34 M34 N21 N20

OUT OUT OUT OUT
CKEA0 CKEA1 CKEB0 CKEB1
5 CKEA0 CKEA1
5 5 CKEB0 CKEB1
5
W32 M29 P26 H14

OUT OUT OUT OUT
CLKA0 CLKA1 CLKB0 CLKB1
5 CLKA0 CLKA1
5 5 CLKB0 CLKB1
5
W33 L29 N26 G14
OUT OUT OUT OUT
CLKA0B CLKA1B CLKB0B CLKB1B
5 CLKA0B CLKA1B
5 5 CLKB0B CLKB1B
5
68 A工樂
+MVDD +MVDD
1%
MEM_CALRA MEM_CALRB
120R 2 1 R3610 Y31 MEM_CALRA 2
R3601 1 120R 1% P15 MEM_CALRB
1
1
R3602 R3603
40.2R 40.2R
1% 1%
MVREF_A MVREF_B
P25 P20
2
2
MVREFDA MVREFDB
76 )
1
1
C3602 R3606 C3603 R3607
1uF 100R 1uF 100R
程
6.3V 1% 6.3V 1%
2
2
0)
W30 M14
OUT
DRAM_RSTA 21 DRAM_RSTA DRAM_RSTB
DRAM_RST1_RR DRAM_RST1_R
2
5 R3630 1 49.9R 1% 2
R3615 1 10R 1%
OUT
DRAM_RST1
課
MVREFD/S = 0.7 * VDDR1
REV 0.90 REV 0.90
1
MVREFD/S = 0.7 * VDDR1
ellesmere_l4 C3607 R3612 ellesmere_l4

120pF 5.1K
50V 1%
2
MS-V341
MSI
Custom 0003 ELLESMERE MEM CH AB 2.0

(4) ELLESMERE MEM INTERFACE CH C/D
00 M
0
U1E U1F
RD 17 SI
DQC0_<0> C1 AA4 DQC1_<0> DQD0_<0> AF7 AW3 DQD1_<0>

DQC0_<0> 6
DQC0_<1>
DQC0_0 DQC1_0 6 DQC1_<1> DQC1_<0> DQD0_<0> DQD0_<1> 6
DQD0_0 DQD1_0 6 DQD1_<1> DQD1_<0>
D2 AC2 AF5 AW4
DQC0_<1> 6
DQC0_<2>
DQD0_1 DQD1_1 6 DQD1_<2> DQD1_<1>
D3 AC1 AF4 BA5
DQC0_<2> 6
DQC0_<3>
DQD0_2 DQD1_2 6 DQD1_<3> DQD1_<2>
E4 AD1 AG6 AY5
DQC0_<3> 6
DQC0_<4>
DQD0_3 DQD1_3 6 DQD1_<4> DQD1_<3>
F2 AE3 AJ6 AU9
DQC0_<4> 6
DQC0_<5>
DQD0_4 DQD1_4 6 DQD1_<5> DQD1_<4>
F3 AE2 AJ5 AW9
DQC0_<5> 6
DQC0_<6>
DQD0_5 DQD1_5 6 DQD1_<6> DQD1_<5>
H4 AF2 AJ9 AY9
DQC0_<6> 6 6 DQC1_<6> DQD0_<6> DQD0_<7> 6 6 DQD1_<6>
(C 96 C
DQC0_<7> DQC1_<7> DQD1_<7>
DQC0_6 DQC1_6 DQD0_6 DQD1_6
H3 AF1 AK7 AT11
DQC0_<7> 6
DQC0_<8>
DQD0_7 DQD1_7 6 DQD1_<8> DQD1_<7>
J1 U4 AM7 AU12
DQC0_<8> 6
DQC0_<9>
DQD0_8 DQD1_8 6 DQD1_<9> DQD1_<8>
L3 U3 AM6 AV12
DQC0_<9> 6
DQC0_<10>
DQC0_9 DQC1_9 6 DQC1_<10> DQC1_<9> DQD0_<9> DQD0_<10>6
DQD0_9 DQD1_9 6 DQD1_<10> DQD1_<9>
L2 U1 AN6 AU14
DQC0_<10> 6
DQC0_<11>
DQD0_10 DQD1_10 6 DQD1_<11> DQD1_<10>
M4 V2 AN5 AW14
DQC0_<11> 6
DQC0_<12>
DQD0_11 DQD1_11 6 DQD1_<12> DQD1_<11>
P2 W2 AR7 AT15
DQC0_<12> 6
DQC0_<13>
DQD0_12 DQD1_12 6 DQD1_<13> DQD1_<12>
P1 Y4 AT6 AV15
DQC0_<13> 6
DQC0_<14>
DQD0_13 DQD1_13 6 DQD1_<14> DQD1_<13>
)2 7 ON
R3 Y1 AT8 AU17
DQC0_<14> 6
DQC0_<15>
DQD0_14 DQD1_14 6 DQD1_<15> DQD1_<14>
R2 Y3 AV5 AV17
DQC0_<15> 6
DQC0_<16>
DQD0_15 DQD1_15 6 DQD1_<16> DQD1_<15>
H6 V4 AG1 BB4
DQC0_<16> 6
DQC0_<17>
DQD0_16 DQD1_16 6 DQD1_<17> DQD1_<16>
J8 V5 AG3 BC3
DQC0_<17> 6
DQC0_<18>
DQD0_17 DQD1_17 6 DQD1_<18> DQD1_<17>
J7 W6 AG4 BC5
DQC0_<18> 6
DQC0_<19>
DQD0_18 DQD1_18 6 DQD1_<19> DQD1_<18>
J5 W5 AJ2 BA6
DQC0_<19> 6
DQC0_<20>
DQD0_19 DQD1_19 6 DQD1_<20> DQD1_<19>
L8 Y6 AK2 BA8
DQC0_<20> 6
DQC0_<21>
DQD0_20 DQD1_20 6 DQD1_<21> DQD1_<20>
L6 Y7 AM4 BC8
DQC0_<21> 6
DQC0_<22>
DQD0_21 DQD1_21 6 DQD1_<22> DQD1_<21>
L5 Y9 AM3 BB9
F
DQC0_<22> 6
DQC0_<23>
DQD0_22 DQD1_22 6 DQD1_<23> DQD1_<22>
0
M9 AA5 AM1 BC9
DQC0_<23> 6
DQC0_<24>
DQD0_23 DQD1_23 6 DQD1_<24> DQD1_<23>
P5 AC7 AR1 AY12
DQC0_<24> 6
DQC0_<25>
DQD0_24 DQD1_24 6 DQD1_<25> DQD1_<24>
P4 AC5 AR2 BA12
DQC0_<25> 6
DQC0_<26>
DQD0_25 DQD1_25 6 DQD1_<26> DQD1_<25>
R8 AC4 AT1 BC12
6 6 DQD0_<27>6 6
石 17 jo ID
DQC0_<26> DQC0_<27> R6
DQC0_26 DQC1_26
AD9 DQC1_<27> DQC1_<26> DQD0_<26> AT3
DQD0_26 DQD1_26
BB14 DQD1_<27> DQD1_<26>
DQC0_<27> 6
DQC0_<28>
DQD0_27 DQD1_27 6 DQD1_<28> DQD1_<27>
U7 AE8 AV3 BB15
DQC0_<28> 6
DQC0_<29>
DQD0_28 DQD1_28 6 DQD1_<29> DQD1_<28>
U6 AE6 AW1 AY17
DQC0_<29> 6
DQC0_<30>
DQD0_29 DQD1_29 6 DQD1_<30> DQD1_<29>
V8 AE5 AY2 BA17
DQC0_<30> 6
DQC0_<31>
DQD0_30 DQD1_30 6 DQD1_<31> DQD1_<30>
V7 AF10 BA1 BC17
DQC0_<31> 6 DQC0_31 DQC1_31 6 DQC1_<31> DQD0_<31> 6 DQD0_31 DQD1_31 6 DQD1_<31>
MAC0_<0> V13 AC8 MAC1_<0> MAD0_<0> AN8 AM17 MAD1_<0>

MAC0_<0> 6
MAC0_<1> 6 MAC1_<1> MAC1_<0> MAD0_<0> MAD0_<1> 6 6 MAD1_<1> MAD1_<0>
阿 09 ne EN
MAC0_0 MAC1_0 MAD0_0 MAD1_0
U10 AD13 AM12 AP17
MAC0_<1> 6
MAC0_<2>
MAC0_1 MAC1_1 6 MAC1_<2> MAC1_<1> MAD0_<1> MAD0_<2> 6
MAD0_1 MAD1_1 6 MAD1_<2> MAD1_<1>
U13 AD10 AM9 AL18
MAC0_<2> 6
MAC0_<3>
MAC0_2 M MAC1_2 6 MAC1_<3> MAC1_<2> MAD0_<2> MAD0_<3> 6
MAD0_2 M MAD1_2 6 MAD1_<3> MAD1_<2>
U12 E AD12 AM10 E AR17
MAC0_<3> 6
MAC0_<4>
MAC0_3
M
MAC1_3 6 MAC1_<4> MAC1_<3> MAD0_<3> MAD0_<4> 6
MAD0_3
M
MAD1_3 6 MAD1_<4> MAD1_<3>
R11 AE11 AK10 AT18
MAC0_<4> 6
MAC0_<5>
MAC0_4
O
MAD0_4
O
MAD1_4 6 MAD1_<5> MAD1_<4>
R9 AE12 AK11 AN18
MAC0_<5> 6
MAC0_<6>
MAC0_5
R MAC1_5 6 MAC1_<6> MAC1_<5> MAD0_<5> MAD0_<6> 6
MAD0_5
R MAD1_5 6 MAD1_<6> MAD1_<5>
W14 AC13 AR8 AN15
MAC0_<6> 6
MAC0_<7>
MAC0_6 Y MAC1_6 6 MAC1_<7> MAC1_<6> MAD0_<6> MAD0_<7> 6
MAD0_6 Y MAD1_6 6 MAD1_<7> MAD1_<6>
V10 AC11 AN11 AR15
MAC0_<7> 6
MAC0_<8>
MAC0_7
I
MAD0_7
I
MAD1_7 6 MAD1_<8> MAD1_<7>
V11 AC10 AN9 AL17
MAC0_<8> 6 MAC0_8
N
MAC1_8 6 MAC1_<8> MAD0_<8> 6 MAD0_8
N
MAD1_8 6 MAD1_<8>
鋒 19 pe TI
P10 AG9 AG13 AR19
MAC0_9
T MAC1_9 MAD0_9
T MAD1_9
E E
BI
WCKC0_0 6 H1 WCKC0_0 R WCKC1_0
6 AA1 WCKC1_0
BI BI
WCKD0_0 6 AK4 WCKD0_0 R WCKD1_0
6 AW11 WCKD1_0
BI
WCKC0B_0 J2 F AA2 WCKC1B_0 WCKD0B_0 AK5 F AV11 WCKD1B_0
BI 6 WCKC0B_0
A
WCKC1B_0
6
BI BI 6 WCKD0B_0
A
WCKD1B_0
6
BI
C C
WCKC0_1 M6 E AA7 WCKC1_1 WCKD0_1 AN2 E BB11 WCKD1_1
BI 6 WCKC0_1 WCKC1_1
6
BI BI 6 WCKD0_1 WCKD1_1
6
BI
WCKC0B_1 M7 AA8 WCKC1B_1 WCKD0B_1 AN3 BA11 WCKD1B_1
BI 6 WCKC0B_1 WCKC1B_1
6
BI BI 6 WCKD0B_1 WCKD1B_1
6
BI
02 i( AL
EDCC0_0 E2 AD4 EDCC1_0 EDCD0_0 AG7 AV8 EDCD1_0
BI 6 EDCC0_0 EDCC1_0
6
BI BI 6 EDCD0_0 EDCD1_0
6
BI
EDCC0_1 M1 V1 EDCC1_1 EDCD0_1 AR4 AW15 EDCD1_1
6
6
BI
EDCC0_2 J4 W9 EDCC1_2 EDCD0_2 AJ3 BB6 EDCD1_2
6
6
BI
EDCC0_3 R5 AD6 EDCC1_3 EDCD0_3 AV2 BA15 EDCD1_3
6
6
BI
DDBIC0_0 E1 AD3 DDBIC1_0 DDBID0_0 AJ8 AW6 DDBID1_0
BI 6 DDBIC0_0 DDBIC1_0
6
BI BI 6 DDBID0_0 DDBID1_0
6
BI
DDBIC0_1 M3 B W3 DDBIC1_1 DDBID0_1 AR5 B AY14 DDBID1_1
BI 6 DDBIC0_1
A
DDBIC1_1
6
BI BI 6 DDBID0_1
A
DDBID1_1
6
BI
DDBIC0_2 L9 W8 DDBIC1_2 DDBID0_2 AK1 AY8 DDBID1_2
BI 6 DDBIC0_2
N DDBIC1_2
6
BI BI 6 DDBID0_2
N DDBID1_2
6
BI
(0
DDBIC0_3 U9 K AD7 DDBIC1_3 DDBID0_3 AT4 K BC14 DDBID1_3
BI 6 DDBIC0_3 DDBIC1_3
6
BI BI 6 DDBID0_3 DDBID1_3
6
BI
裴
ADBIC0 W11 C AA11 ADBIC1 ADBID0 AT9 D AT14 ADBID1
BI 6 ADBIC0 ADBIC1
6
BI BI 6 ADBID0 ADBID1
6
BI
M10 AF11 AG12 AP20

OUT OUT OUT OUT
CSC0B_0 CSC1B_0 CSD0B_0 CSD1B_0
6 CSC0B_0 CSC1B_0
6 6 CSD0B_0 CSD1B_0
6
00 RM 亮
W12 AA10 AR11 AM15
OUT OUT OUT OUT
CASC0B CASC1B CASD0B CASD1B
6 CASC0B CASC1B
6 6 CASD0B CASD1B
6
Y12 Y10 AR12 AN14
OUT OUT OUT OUT
RASC0B RASC1B RASD0B RASD1B
6 RASC0B RASC1B
6 6 RASD0B RASD1B
6
R12 AE9 AK8 AP18
OUT OUT OUT OUT
WEC0B WEC1B WED0B WED1B
6 WEC0B WEC1B
6 6 WED0B WED1B
6
Y13 AA13 AP12 AP14

OUT OUT OUT OUT
CKEC0 CKEC1 CKED0 CKED1
6 CKEC0 CKEC1
6 6 CKED0 CKED1
6
P8 AF14 AJ12 AM19

OUT OUT OUT OUT
CLKC0 CLKC1 CLKD0 CLKD1
6 CLKC0 CLKC1
6 6 CLKD0 CLKD1
6
P7 AF13 AJ11 AN19
OUT OUT OUT OUT
CLKC0B CLKC1B CLKD0B CLKD1B
6 CLKC0B CLKC1B
6 6 CLKD0B CLKD1B
6
68 A工樂
+MVDD +MVDD
1
1
R3618 R3619
40.2R 1% 40.2R
1% 1%
MEM_CALRC MVREF_C MEM_CALRD MVREF_D
2
R3614 1 120R 1% R14 Y14 2120R 1 R3639 AL20 AE14
2
2
MEM_CALRC MVREFDC VVVV34120 MEM_CALRD MVREFDD VVVV34120
76
R11-402AT12-W08 R11-402AT12-W08
VVVV34120 VVVV34120
)
1
1
R11-0121T12-W08 C3612 R3621
R11-0121T12-W08 C3611 R3620
1uF 100R 1uF 100R
程
6.3V 1% 6.3V 1%
VVVV34120 VVVV34120
2
2
C11-105A312-M09
VVVV34120 C11-105A312-M09
VVVV34120
R11-0101T12-W08 R11-0101T12-W08
0)
P12 DRAM_RSTC AK19 DRAM_RSTD
DRAM_RST2_RR DRAM_RST2_R
2
R3629 1 49.9R 1% 2
R3616 1 10R 1%
OUT
DRAM_RST2 6
課
REV 0.90 MVREFD/S = 0.7 * VDDR1 MVREFD/S = 0.7 * VDDR1
VVVV34120 VVVV34120 REV 0.90
1
R11-499AT12-W08 C3617
R11-0100T12-W08 R3627
ellesmere_l4 ellesmere_l4
VVVV34120 120pF 5.1K VVVV34120
50V 1%
B03-0876105-A08 B03-0876105-A08
VVVV34120
2
C11-1211012-S02 VVVV34120
R11-0512T12-W08

MS-V341
MSI
Custom 0004 ELLESMERE MEM CH CD 2.0

(5) GDDR5 MEMORY CH A/B
00
GDDR 5
+MVDD +MVDD +MVDD +MVDD
23CNOPN001 23CNOPN001 23CNOPN001 23CNOPN001
U2000 U2100 U2200 U2300
DQA0_<0> DQA0_<28> M2 B1 DQA1_<0> DQA1_<5> M2 B1 DQB0_<0> DQB0_<13> M2 B1 DQB1_<0> DQB1_<21> M2 B1
DQA0_<0> 3 DQA1_<0> 3 DQB0_<0> 3 DQB1_<0> 3
28 5 13 21
DQA0_<1> 3 1DQA0_<31> M4 DQA1_<1> DQA1_<6> DQB0_<1> DQB0_<15> DQB1_<1> DQB1_<22>
M
DQ31__DQ7 VDDQ_B1 DQ31__DQ7 VDDQ_B1 DQ31__DQ7 VDDQ_B1 DQ31__DQ7 VDDQ_B1
B3 M4 B3 M4 B3 M4 B3
DQA0_<1> 3 DQA1_<1> 3 DQB0_<1> 3 DQB1_<1> 3
6 15 22
DQA0_<2> 2 9DQA0_<29> N2 DQA1_<2> DQA1_<4> DQB0_<2> DQB0_<12> DQB1_<2> DQB1_<20>
B12 N2 B12 N2 B12 N2 B12

DQA0_<2> 3 DQA1_<2> 3 DQB0_<2> 3 DQB1_<2> 3
4 12 20
DQA0_<3> 3 0DQA0_<30> N4 DQA1_<3> DQA1_<7> DQB0_<3> DQB0_<14> DQB1_<3> DQB1_<23>
0
B14 N4 B14 N4 B14 N4 B14
DQA0_<3> 3 DQA1_<3> 3 DQB0_<3> 3 DQB1_<3> 3
7 14 23
DQA0_<4> 2 7DQA0_<27> T2 DQA1_<4> DQA1_<3> DQB0_<4> DQB0_<11> DQB1_<4> DQB1_<19>
D1 T2 D1 T2 D1 T2 D1
DQA0_<4> 3 DQA1_<4> 3 DQB0_<4> 3 DQB1_<4> 3
3 11 19
DQA0_<5> 2 6DQA0_<26> T4 DQA1_<5> DQA1_<2> DQB0_<5> DQB0_<8> DQB1_<5> DQB1_<18>
DQ27__DQ3 VDDQ_D1 DQ27__DQ3 VDDQ_D1 DQ27__DQ3 VDDQ_D1 DQ27__DQ3 VDDQ_D1
RD 17 SI
D3 T4 D3 T4 D3 T4 D3
DQA0_<5> 3 DQA1_<5> 3 DQB0_<5> 3 DQB1_<5> 3
2 8 18
DQA0_<6> 2 4DQA0_<24> V2 DQA1_<6> DQA1_<1> DQB0_<6> DQB0_<10> DQB1_<6> DQB1_<17>
D12 V2 D12 V2 D12 V2 D12

DQA0_<6> 3 DQA1_<6> 3 DQB0_<6> 3 DQB1_<6> 3
1 10 17
DQA0_<7> 2 5DQA0_<25> V4 DQA1_<7> DQA1_<0> DQB0_<7> DQB0_<9> DQB1_<7> DQB1_<16>
D14 V4 D14 V4 D14 V4 D14

DQA0_<7> 3 DQA1_<7> 3 DQB0_<7> 3 DQB1_<7> 3
0 9 16
DQA0_<8> 1 7DQA0_<17> DQA1_<8> DQA1_<11> DQB0_<8> DQB0_<0> DQB1_<8> DQB1_<26>
M13 E5 M13 E5 M13 E5 M13 E5

DQA0_<8> 3 DQA1_<8> 3 DQB0_<8> 3 DQB1_<8> 3
11 0 26
DQA0_<9> 2 3DQA0_<23> DQA1_<9> DQA1_<8> DQB0_<9> DQB0_<7> DQB1_<9> DQB1_<27>
DQ23__DQ15 VDDQ_E5 DQ23__DQ15 VDDQ_E5 DQ23__DQ15 VDDQ_E5 DQ23__DQ15 VDDQ_E5
M11 E10 M11 E10 M11 E10 M11 E10

DQA0_<9> 3 DQA1_<9> 3 DQB0_<9> 3 DQB1_<9> 3
8 7 27
DQA0_<10> 1 6DQA0_<16>N13 DQA1_<10> DQA1_<10> DQB0_<10> DQB0_<1> DQB1_<10> DQB1_<24>
F1 N13 F1 N13 F1 N13 F1

DQA0_<10> 3 DQA1_<10> 3 DQB0_<10> 3 DQB1_<10> 3
10 1 24
DQA0_<11> 2 2DQA0_<22>N11 DQA1_<11> DQA1_<9> DQB0_<11> DQB0_<6> DQB1_<11> DQB1_<25>
DQ21__DQ13 VDDQ_F1 DQ21__DQ13 VDDQ_F1 DQ21__DQ13 VDDQ_F1 DQ21__DQ13 VDDQ_F1
F3 N11 F3 N11 F3 N11 F3

DQA0_<11> 3 DQA1_<11> 3 DQB0_<11> 3 DQB1_<11> 3
9 6 25
DQA0_<12> 1 8DQA0_<18>T13 DQA1_<12> DQA1_<12> DQB0_<12> DQB0_<3> DQB1_<12> DQB1_<28>
F12 T13 F12 T13 F12 T13 F12

DQA0_<12> 3 DQA1_<12> 3 DQB0_<12> 3 DQB1_<12> 3
12 3 28
DQA0_<13> 2 1DQA0_<21>T11 DQA1_<13> DQA1_<13> DQB0_<13> DQB0_<5> DQB1_<13> DQB1_<30>
F14 T11 F14 T11 F14 T11 F14

DQA0_<13> 3 DQA1_<13> 3 DQB0_<13> 3 DQB1_<13> 3
(C 96 C
13 5 30
DQA0_<14> 1 9DQA0_<19>V13 DQA1_<14> DQA1_<14> DQB0_<14> DQB0_<2> DQB1_<14> DQB1_<31>
G2 V13 G2 V13 G2 V13 G2

DQA0_<14> 3 DQA1_<14> 3 DQB0_<14> 3 DQB1_<14> 3
14 2 31
DQA0_<15> 2 0DQA0_<20>V11 DQA1_<15> DQA1_<15> DQB0_<15> DQB0_<4> DQB1_<15> DQB1_<29>
DQ17__DQ9 VDDQ_G2 DQ17__DQ9 VDDQ_G2 DQ17__DQ9 VDDQ_G2 DQ17__DQ9 VDDQ_G2
G13 V11 G13 V11 G13 V11 G13

DQA0_<15> 3 DQA1_<15> 3 DQB0_<15> 3 DQB1_<15> 3
15 4 29
DQA0_<16> 5 DQA0_<5> F13 DQA1_<16> DQA1_<31> DQB0_<16> DQB0_<30> DQB1_<16> DQB1_<15>
H3 F13 H3 F13 H3 F13 H3

DQA0_<16> 3 DQA1_<16> 3 DQB0_<16> 3 DQB1_<16> 3
31 30 15
DQA0_<17> 6 DQA0_<6> F11 DQA1_<17> DQA1_<24> DQB0_<17> DQB0_<29> DQB1_<17> DQB1_<8>
DQ15__DQ23 VDDQ_H3 DQ15__DQ23 VDDQ_H3 DQ15__DQ23 VDDQ_H3 DQ15__DQ23 VDDQ_H3
H12 F11 H12 F11 H12 F11 H12

DQA0_<17> 3 DQA1_<17> 3 DQB0_<17> 3 DQB1_<17> 3
24 29 8
DQA0_<18> 4 DQA0_<4> E13 DQA1_<18> DQA1_<29> DQB0_<18> DQB0_<28> DQB1_<18> DQB1_<14>
K3 E13 K3 E13 K3 E13 K3

DQA0_<18> 3 DQA1_<18> 3 DQB0_<18> 3 DQB1_<18> 3
29 28 14
DQ13__DQ21 VDDQ_K3 DQ13__DQ21 VDDQ_K3 DQ13__DQ21 VDDQ_K3 DQ13__DQ21 VDDQ_K3
K12 E11 K12 E11 K12 E11 K12

DQA0_<19> 3 DQA1_<19> 3 DQB0_<19> 3 DQB1_<19> 3
25 31 10
DQA0_<20> 3 DQA0_<3> B13 DQA1_<20> DQA1_<28> DQB0_<20> DQB0_<27> DQB1_<20> DQB1_<12>
L2 B13 L2 B13 L2 B13 L2

DQA0_<20> 3 DQA1_<20> 3 DQB0_<20> 3 DQB1_<20> 3
28 27 12
DQA0_<21> 2 DQA0_<2> B11 DQA1_<21> DQA1_<26> DQB0_<21> DQB0_<26> DQB1_<21> DQB1_<9>
DQ11__DQ19 VDDQ_L2 DQ11__DQ19 VDDQ_L2 DQ11__DQ19 VDDQ_L2 DQ11__DQ19 VDDQ_L2
)2 7 ON
L13 B11 L13 B11 L13 B11 L13
DQA0_<21> 3 DQA1_<21> 3 DQB0_<21> 3 DQB1_<21> 3
26 26 9
DQA0_<22> 1 DQA0_<1> A13 DQA1_<22> DQA1_<30> DQB0_<22> DQB0_<24> DQB1_<22> DQB1_<13>
M1 A13 M1 A13 M1 A13 M1

DQA0_<22> 3 DQA1_<22> 3 DQB0_<22> 3 DQB1_<22> 3
30 24 13
DQA0_<23> 0 DQA0_<0> A11 DQA1_<23> DQA1_<27> DQB0_<23> DQB0_<25> DQB1_<23> DQB1_<11>
DQ9__DQ17 VDDQ_M1 DQ9__DQ17 VDDQ_M1 DQ9__DQ17 VDDQ_M1 DQ9__DQ17 VDDQ_M1
M3 A11 M3 A11 M3 A11 M3

DQA0_<23> 3 DQA1_<23> 3 DQB0_<23> 3 DQB1_<23> 3
27 25 11
DQA0_<24> 1 1DQA0_<11> F2 DQA1_<24> DQA1_<18> DQB0_<24> DQB0_<19> DQB1_<24> DQB1_<2>
M12 F2 M12 F2 M12 F2 M12

DQA0_<24> 3 DQA1_<24> 3 DQB0_<24> 3 DQB1_<24> 3
18 19 2
DQA0_<25> 1 0DQA0_<10> F4 DQA1_<25> DQA1_<17> DQB0_<25> DQB0_<18> DQB1_<25> DQB1_<0>
M14 F4 M14 F4 M14 F4 M14

DQA0_<25> 3 DQA1_<25> 3 DQB0_<25> 3 DQB1_<25> 3
17 18 0
N5 E2 N5 E2 N5 E2 N5
DQA0_<26> 3 DQA1_<26> 3 DQB0_<26> 3 DQB1_<26> 3
19 17 3
DQ5__DQ29 VDDQ_N5 DQ5__DQ29 VDDQ_N5 DQ5__DQ29 VDDQ_N5 DQ5__DQ29 VDDQ_N5
N10 E4 N10 E4 N10 E4 N10

DQA0_<27> 3 DQA1_<27> 3 DQB0_<27> 3 DQB1_<27> 3
16 16 1
DQA0_<28> 1 2DQA0_<12> B2 DQA1_<28> DQA1_<21> DQB0_<28> DQB0_<20> DQB1_<28> DQB1_<4>
P1 B2 P1 B2 P1 B2 P1
DQA0_<28> 3 DQA1_<28> 3 DQB0_<28> 3 DQB1_<28> 3
21 20 4
DQA0_<29> 1 3DQA0_<13> B4 DQA1_<29> DQA1_<23> DQB0_<29> DQB0_<21> DQB1_<29> DQB1_<7>
DQ3__DQ27 VDDQ_P1 DQ3__DQ27 VDDQ_P1 DQ3__DQ27 VDDQ_P1 DQ3__DQ27 VDDQ_P1
P3 B4 P3 B4 P3 B4 P3
F
DQA0_<29> 3 DQA1_<29> 3 DQB0_<29> 3 DQB1_<29> 3
23 21 7
DQA0_<30> 1 5DQA0_<15> A2 DQA1_<30> DQA1_<20> DQB0_<30> DQB0_<22> DQB1_<30> DQB1_<5>
0
P12 A2 P12 A2 P12 A2 P12
DQA0_<30> 3 DQA1_<30> 3 DQB0_<30> 3 DQB1_<30> 3
20 22 5
DQA0_<31> 1 4DQA0_<14> A4 DQA1_<31> DQA1_<22> DQB0_<31> DQB0_<23> DQB1_<31> DQB1_<6>
P14 A4 P14 A4 P14 A4 P14

DQA0_<31> 3 DQA1_<31> 3 DQB0_<31> 3 DQB1_<31> 3
22 23 6
VDDQ_T1 T1 VDDQ_T1 T1 VDDQ_T1 T1 VDDQ_T1 T1

T3 T3 T3 T3
石 17 jo ID
VDDQ_T3 VDDQ_T3 VDDQ_T3 VDDQ_T3
+MVDD +MVDD +MVDD
MAA0_<0> MAA0_<8> J5 MAA1_<0> MAA1_<8> J5 +MVDD MAB0_<0> MAB0_<8> J5 MAB1_<0> MAB1_<8> J5
MAA0_<0> MAA0_<1> 3 MAA0_<7>
RFU_A12_NC
MAA1_<0> MAA1_<1> 3 MAA1_<0>
RFU_A12_NC
MAB0_<0> MAB0_<1> 3 MAB0_<7>
RFU_A12_NC
MAB1_<0> MAB1_<1> 3MAB1_<0> RFU_A12_NC
K4 C5 K4 C5 K4 C5 K4 C5
8 8 8 8
MAA0_<1> MAA0_<2> 3 MAA0_<6>

A7_A8__A0_A10 VDD_C5
MAA1_<1> MAA1_<2> 3 MAA1_<1>
MAB0_<1> MAB0_<2> 3 MAB0_<6>
MAB1_<1> MAB1_<2> 3MAB1_<1> A7_A8__A0_A10 VDD_C5
K5 C10 K5 C10 K5 C10 K5 C10
7 0 7 0
MAA0_<2> MAA0_<3> 3 MAA0_<5>

A6_A11__A1_A9 VDD_C10
MAA1_<2> MAA1_<3> 3 MAA1_<3>
A6_A11__A1_A9 VDD_C10
MAB0_<2> MAB0_<3> 3 MAB0_<5>
A6_A11__A1_A9 VDD_C10
MAB1_<2> MAB1_<3> 3MAB1_<3> A6_A11__A1_A9 VDD_C10
K10 D11 K10 D11 K10 D11 K10 D11
6 1 6 1
MAA0_<3> MAA0_<4> 3 MAA0_<4>

A5_BA1__A3_BA3 VDD_D11
MAA1_<3> MAA1_<4> 3 MAA1_<2>
MAB0_<3> MAB0_<4> 3 MAB0_<4>
MAB1_<3> MAB1_<4> 3MAB1_<2> A5_BA1__A3_BA3 VDD_D11
K11 G1 K11 G1 K11 G1 K11 G1
5 3 5 3
MAA0_<4> MAA0_<5> 3 MAA0_<3> MAA1_<4> MAA1_<5> 3 MAA1_<5> MAB0_<4> MAB0_<5> 3 MAB0_<3> MAB1_<4> MAB1_<5> 3MAB1_<5>
阿 09 ne EN
A4_BA2__A2_BA0 VDD_G1 A4_BA2__A2_BA0 VDD_G1 A4_BA2__A2_BA0 VDD_G1 A4_BA2__A2_BA0 VDD_G1
H10 G4 H10 G4 H10 G4 H10 G4
4 2 4 2
MAA0_<5> MAA0_<6> 3 MAA0_<2>

A3_BA3__A5_BA1 VDD_G4
MAA1_<5> MAA1_<6> 3 MAA1_<4>
MAB0_<5> MAB0_<6> 3 MAB0_<2>
MAB1_<5> MAB1_<6> 3MAB1_<4> A3_BA3__A5_BA1 VDD_G4
H11 G11 H11 G11 H11 G11 H11 G11
3 5 3 5
MAA0_<6> MAA0_<7> 3 MAA0_<1>

MAA1_<6> MAA1_<7> 3 MAA1_<6>
MAB0_<6> MAB0_<7> 3 MAB0_<1>
MAB1_<6> MAB1_<7> 3MAB1_<6> A2_BA0__A4_BA2 VDD_G11
H5 G14 H5 G14 H5 G14 H5 G14
2 4 2 4
MAA0_<7> MAA0_<8> 3 MAA0_<0>

A1_A9__A6_A11 VDD_G14
MAA1_<7> MAA1_<8> 3 MAA1_<7>
A1_A9__A6_A11 VDD_G14
MAB0_<7> MAB0_<8> 3 MAB0_<0>
A1_A9__A6_A11 VDD_G14
MAB1_<7> MAB1_<8> 3MAB1_<7> A1_A9__A6_A11 VDD_G14
H4 L1 H4 L1 H4 L1 H4 L1
1 6 1 6
MAA0_<8> 3 A0_A10__A7_A8 VDD_L1

MAA1_<8> 3 A0_A10__A7_A8 VDD_L1
MAB0_<8> 3 A0_A10__A7_A8 VDD_L1
MAB1_<8> 3 A0_A10__A7_A8 VDD_L1
L4 L4 L4 L4
0 7 0 7
VDD_L4 VDD_L4 VDD_L4 VDD_L4

VDD_L11 L11 VDD_L11 L11 VDD_L11 L11 VDD_L11 L11
D4 P11 D4 P11 D4 P11 D4 P11
IN IN IN IN
WCKA0_0 WCKA1_1 WCKB0_1 WCKB1_0
3 WCK01__WCK23 VDD_P11 3 WCK01__WCK23 VDD_P11 3 WCK01__WCK23 VDD_P11 3 WCK01__WCK23 VDD_P11
鋒 19 pe TI
D5 R5 D5 R5 D5 R5 D5 R5
IN IN IN IN
WCKA0B_0 WCKA1B_1 WCKB0B_1 WCKB1B_0
3 WCK01#__WCK23# VDD_R5 3 WCK01#__WCK23# VDD_R5 3 WCK01#__WCK23# VDD_R5 3 WCK01#__WCK23# VDD_R5
VDD_R10 R10 VDD_R10 R10 VDD_R10 R10 VDD_R10 R10
P4 P4 P4 P4
IN IN IN IN
WCKA0_1 WCKA1_0 WCKB0_0 WCKB1_1
3 WCK23__WCK01 3 WCK23__WCK01 3 WCK23__WCK01 3 WCK23__WCK01
P5 P5 P5 P5
IN IN IN IN
WCKA0B_1 WCKA1B_0 WCKB0B_0 WCKB1B_1
3 WCK23#__WCK01# 3 WCK23#__WCK01# 3 WCK23#__WCK01# 3 WCK23#__WCK01#
VSSQ_A1 A1 VSSQ_A1 A1 VSSQ_A1 A1 VSSQ_A1 A1
R2 A3 R2 A3 R2 A3 R2 A3
OUT OUT OUT OUT
EDCA0_3 EDCA1_0 EDCB0_1 EDCB1_2
3 EDC3__EDC0 VSSQ_A3 3 EDC3__EDC0 VSSQ_A3 3 EDC3__EDC0 VSSQ_A3 3 EDC3__EDC0 VSSQ_A3
R13 A12 R13 A12 R13 A12 R13 A12
OUT OUT OUT OUT
C13 A14 C13 A14 C13 A14 C13 A14
OUT OUT OUT OUT
02 i( AL
C2 C1 C2 C1 C2 C1 C2 C1
OUT OUT OUT OUT
3 EDC0__EDC3 VSSQ_C1 3 EDC0__EDC3 VSSQ_C1 3 EDC0__EDC3 VSSQ_C1 3 EDC0__EDC3 VSSQ_C1
VSSQ_C3 C3 VSSQ_C3 C3 VSSQ_C3 C3 VSSQ_C3 C3
DDBIA0_3 P2 C4 DDBIA1_0 P2 C4 DDBIB0_1 P2 C4 DDBIB1_2 P2 C4
BI 3 DBI3#__DBI0# VSSQ_C4 BI 3 DBI3#__DBI0# VSSQ_C4 BI 3 DBI3#__DBI0# VSSQ_C4 BI 3 DBI3#__DBI0# VSSQ_C4
DDBIA0_2 P13 C11 DDBIA1_1 P13 C11 DDBIB0_0 P13 C11 DDBIB1_3 P13 C11
DDBIA0_0 D13 C12 DDBIA1_3 D13 C12 DDBIB0_3 D13 C12 DDBIB1_1 D13 C12
DDBIA0_1 D2 C14 DDBIA1_2 D2 C14 DDBIB0_2 D2 C14 DDBIB1_0 D2 C14
VSSQ_E1 E1 VSSQ_E1 E1 VSSQ_E1 E1 VSSQ_E1 E1
(0
G3 E14 G3 E14 G3 E14 G3 E14
IN IN IN IN
RASA0B CASA1B RASB0B CASB1B
3 RAS#__CAS# VSSQ_E14 3 RAS#__CAS# VSSQ_E14 3 RAS#__CAS# VSSQ_E14 3 RAS#__CAS# VSSQ_E14
L3 F5 L3 F5 L3 F5 L3 F5
IN IN IN IN
CASA0B RASA1B CASB0B RASB1B
裴
3 CAS#__RAS# VSSQ_F5 3 CAS#__RAS# VSSQ_F5 3 CAS#__RAS# VSSQ_F5 3 CAS#__RAS# VSSQ_F5
2
R2001 1 60.4R 1% VSSQ_F10 F10 2
R2101 1 60.4R 1% VSSQ_F10 F10 2
R2201 1 60.4R 1% VSSQ_F10 F10 2
R2301 1 60.4R 1% VSSQ_F10 F10
2
R2000 1 60.4R 1% VSSQ_H2 H2 2
R2100 1 60.4R 1% VSSQ_H2 H2 2
R2200 1 60.4R 1% VSSQ_H2 H2 2
R2300 1 60.4R 1% VSSQ_H2 H2
VVVV34110S J3 H13 VVVV34110S J3 H13 VVVV34110S J3 H13 VVVV34110S J3 H13
IN IN IN IN
CKEA0 CKEA1 CKEB0 CKEB1
3 CKE# VSSQ_H13 3 CKE# VSSQ_H13 3 CKE# VSSQ_H13 3 CKE# VSSQ_H13
R11-604AT12-W08
VVVV34110S J11 K2 R11-604AT12-W08
VVVV34110S J11 K2 R11-604AT12-W08
VVVV34110S J11 K2 R11-604AT12-W08
VVVV34110S J11 K2
IN IN IN IN
CLKA0B CLKA1B CLKB0B CLKB1B
3 CK# VSSQ_K2 3 CK# VSSQ_K2 3 CK# VSSQ_K2 3 CK# VSSQ_K2
R11-604AT12-W08 J12 K13 R11-604AT12-W08 J12 K13 R11-604AT12-W08 J12 K13 R11-604AT12-W08 J12 K13
IN IN IN IN
CLKA0 CLKA1 CLKB0 CLKB1
3 CK VSSQ_K13 3 CK VSSQ_K13 3 CK VSSQ_K13 3 CK VSSQ_K13
VSSQ_M5 M5 VSSQ_M5 M5 VSSQ_M5 M5 VSSQ_M5 M5
00 RM 亮
G12 N1 G12 N1 G12 N1 G12 N1
IN IN IN IN
CSA0B_0 WEA1B CSB0B_0 WEB1B
3 CS#__WE# VSSQ_N1 3 CS#__WE# VSSQ_N1 3 CS#__WE# VSSQ_N1 3 CS#__WE# VSSQ_N1
L12 N3 L12 N3 L12 N3 L12 N3
IN IN IN IN
WEA0B CSA1B_0 WEB0B CSB1B_0
3 WE#__CS# VSSQ_N3 3 WE#__CS# VSSQ_N3 3 WE#__CS# VSSQ_N3 3 WE#__CS# VSSQ_N3
VSSQ_N12 N12 VSSQ_N12 N12 VSSQ_N12 N12 VSSQ_N12 N12
ZQ_A0 ZQ_A1 ZQ_B0 ZQ_B1
2
R2002 1 120R 1% J13 ZQ VSSQ_R1 R1 R21021 2
120R 1% J13 ZQ VSSQ_R1 R1 2
R2202 1 120R 1% J13 ZQ VSSQ_R1 R1 R2302 1 2
120R 1% J13 ZQ VSSQ_R1 R1
SEN_A0 SEN_A1 SEN_B0 SEN_B1
R20031 2
1K 5% J10 SEN VSSQ_R3 R3 R21031 2
1K 5% J10 SEN VSSQ_R3 R3 R2203 1 2
1K 5% J10 SEN VSSQ_R3 R3 R2303 1 2
1K 5% J10 SEN VSSQ_R3 R3
VVVV34110S VSSQ_R4 R4 VVVV34110S VSSQ_R4 R4 VVVV34110S VSSQ_R4 R4 VVVV34110S VSSQ_R4 R4
R11-0121T12-W08
VVVV34110S R11 R11-0121T12-W08
VVVV34110S R11 R11-0121T12-W08
VVVV34110S R11 R11-0121T12-W08
VVVV34110S R11
68 A工樂
IN IN 3,5 IN IN
DRAM_RST1 DRAM_RST1 DRAM_RST1
3,5 VSSQ_R11 VSSQ_R11 3,5 VSSQ_R11 3,5 VSSQ_R11
R11-0102032-W08 R11-0102032-W08 R11-0102032-W08 R11-0102032-W08
DRAM_RST1
J2 RESET# VSSQ_R12 R12 J2 RESET# VSSQ_R12 R12 J2 RESET# VSSQ_R12 R12 J2 RESET# VSSQ_R12 R12
MF_A0 MF_A1 MF_B0 MF_B1
R20041 2
1K 5% J1 MF VSSQ_R14 R14 +MVDD R21041 2
1K 5% J1 MF VSSQ_R14 R14 R2204 1 2
1K 5% J1 MF VSSQ_R14 R14 +MVDD R2304 1 2
1K 5% J1 MF VSSQ_R14 R14
VSSQ_V1 V1 VSSQ_V1 V1 VSSQ_V1 V1 VSSQ_V1 V1
VVVV34110S VSSQ_V3 V3 VVVV34110S VSSQ_V3 V3 VVVV34110S VSSQ_V3 V3 VVVV34110S VSSQ_V3 V3
R11-0102032-W08 VSSQ_V12 V12 R11-0102032-W08 VSSQ_V12 V12 R11-0102032-W08 VSSQ_V12 V12 R11-0102032-W08 VSSQ_V12 V12
A5 Vpp_NC A5 Vpp_NC A5 Vpp_NC A5 Vpp_NC
V5 Vpp_NC1 V5 Vpp_NC1 V5 Vpp_NC1 V5 Vpp_NC1
76
VSS_B5 B5 VSS_B5 B5 VSS_B5 B5 VSS_B5 B5
A10 B10 A10 B10 A10 B10 A10 B10
)
VREFD1 VSS_B10 VREFD1 VSS_B10 VREFD1 VSS_B10 VREFD1 VSS_B10
V10 VREFD2 VSS_D10 D10 V10 VREFD2 VSS_D10 D10 V10 VREFD2 VSS_D10 D10 V10 VREFD2 VSS_D10 D10
G5 G5 G5 G5
程
VSS_G5 VSS_G5 VSS_G5 VSS_G5
VSS_G10 G10 VSS_G10 G10 VSS_G10 G10 VSS_G10 G10
VSS_H1 H1 VSS_H1 H1 VSS_H1 H1 VSS_H1 H1
+MVDD 2
R2009 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2109 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2209 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2309 1 2.37K 1% VSS_K1 K1
0)
2
R2010 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2110 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2210 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2310 1 5.49K 1% J14 VREFC VSS_K14 K14
VREFC_A0 VREFC_A1 VREFC_B0 VREFC_B1
VVVV34110S
C2005 1uF 6.3V VSS_L5 L5 VVVV34110S
C2305 1uF 6.3V VSS_L5 L5
R11-2371T12-W08
VVVV34110S VSS_L10 L10 R11-2371T12-W08
VVVV34110S VSS_L10 L10 R11-2371T12-W08
VVVV34110S VSS_L10 L10 R11-2371T12-W08
VVVV34110S VSS_L10 L10
R11-5491T22-W08
VVVV34110S VSS_P10 P10 R11-5491T22-W08
VVVV34110S VSS_P10 P10 R11-5491T22-W08
VVVV34110S VSS_P10 P10 R11-5491T22-W08
VVVV34110S VSS_P10 P10
課
C11-105A312-M09 J4 T5 C11-105A312-M09 J4 T5 C11-105A312-M09 J4 T5 C11-105A312-M09 J4 T5
IN IN IN IN
ADBIA0 ADBIA1 ADBIB0 ADBIB1
3 ABI# VSS_T5 3 ABI# VSS_T5 3 ABI# VSS_T5 3 ABI# VSS_T5
VSS_T10 T10 VSS_T10 T10 VSS_T10 T10 VSS_T10 T10
VVVV34110S VVVV34110S VVVV34110S VVVV34110S

M12-5GC4HC5-H2A M12-5GC4HC5-H2A M12-5GC4HC5-H2A M12-5GC4HC5-H2A
+MVDD
Reserved. detail please check BOM
1
1
+ + + +
C2218
C2361 C2362 C2363 C2364

C2117
C2317
470uF 470uF 470uF 470uF

2V 2V 2V 2V
C2007
C2008
C2009
C2010
C2012
C2013
C2014
C2015
C2107
C2108
C2109
C2110
C2112
C2115
C2116
C2206
C2208
C2209
C2211
C2212
C2213
C2214
C2306
C2308
C2309
C2311
C2312
C2314
C2316
XXXV34110SXXXV34110S XXXV34110S XXXV34110S

2
2
<New PN> <New PN> <New PN> <New PN>
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09 C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-1042312-M09 C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09 C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09

MS-V341
1
1
C2019
C2020
C2023
C2024
C2025
C2026
C2028
C2029
C2040
C2041
C2118
C2119
C2120
C2121
C2122
C2126
C2127
C2129
C2140
C2141
C2219
C2220
C2223
C2226
C2227
C2228
C2229
C2230
C2240
C2241
C2319
C2321
C2322
C2323
C2324
C2325
C2326
C2328
C2340
C2341
MSI
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V 4V 4V 4V
VVVV34110S
VVVV34110S XXXV34110S
VVVV34110S VVVV34110SXXXV34110S VVVV34110S
XXXV34110S Size Document Description Rev
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
0005 GDDR5 MEM CH AB

VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
VVVV34110S
2
C11-226A224-M09
C11-226A224-M09 <New PN>C11-226A224-M09 C11-226A224-M09
<New PN> C11-226A224-M09
<New PN>
C11-1042312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09 C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09 C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09 C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09
C11-1042312-M09
C11-105A312-M09
C11-105A312-M09
C11-105A312-M09 Custom 2.0
Date: Tuesday, June 28, 2016 Sheet 5 of 26

(6) GDDR5 MEMORY CH C/D
00
23CNOPN001 23CNOPN001 23CNOPN001 23CNOPN001
U2400 U2500 U2600 U2700
DQC0_<0> DQC0_<29> M2 B1 DQC1_<0> DQC1_<12> M2 B1 DQD0_<0> DQD0_<13> M2 B1 DQD1_<0> DQD1_<20> M2 B1
DQC0_<0> 4 DQC1_<0> 4 DQD0_<0> 4 DQD1_<0> 4
29 12 13 20
DQC0_<1> DQC0_<31> DQC1_<1> DQC1_<13> DQD0_<1> DQD0_<15> DQD1_<1> DQD1_<21>
DQC0_29 DQC1_12 DQD0_13 DQD1_20
M4 B3 M4 B3 M4 B3 M4 B3
DQC0_<1> 4 DQC1_<1> 4 DQD0_<1> 4 DQD1_<1> 4
31 13 15 21
M
DQC0_31 DQC1_13 DQD0_15 DQD1_21
N2 B12 N2 B12 N2 B12 N2 B12

DQC0_<2> 4 DQC1_<2> 4 DQD0_<2> 4 DQD1_<2> 4
28 14 12 23
DQC0_28 DQC1_14 DQD0_12 DQD1_23
N4 B14 N4 B14 N4 B14 N4 B14

DQC0_<3> 4 DQC1_<3> 4 DQD0_<3> 4 DQD1_<3> 4
30 15 14 22
DQC0_30 DQC1_15 DQD0_14 DQD1_22
0
T2 D1 T2 D1 T2 D1 T2 D1
DQC0_<4> 4 DQC1_<4> 4 DQD0_<4> 4 DQD1_<4> 4
27 11 10 19
DQC0_27 DQC1_11 DQD0_10 DQD1_19
T4 D3 T4 D3 T4 D3 T4 D3
DQC0_<5> 4 DQC1_<5> 4 DQD0_<5> 4 DQD1_<5> 4
24 10 8 18
RD 17 SI
V2 D12 V2 D12 V2 D12 V2 D12

DQC0_<6> 4 DQC1_<6> 4 DQD0_<6> 4 DQD1_<6> 4
26 9 11 16
V4 D14 V4 D14 V4 D14 V4 D14

DQC0_<7> 4 DQC1_<7> 4 DQD0_<7> 4 DQD1_<7> 4
25 8 9 17
M13 E5 M13 E5 M13 E5 M13 E5

DQC0_<8> 4 DQC1_<8> 4 DQD0_<8> 4 DQD1_<8> 4
16 1 0 26
M11 E10 M11 E10 M11 E10 M11 E10

DQC0_<9> 4 DQC1_<9> 4 DQD0_<9> 4 DQD1_<9> 4
23 2 7 25
N13 F1 N13 F1 N13 F1 N13 F1

DQC0_<10> 4 DQC1_<10> 4 DQD0_<10> 4 DQD1_<10> 4
17 3 2 27
N11 F3 N11 F3 N11 F3 N11 F3

DQC0_<11> 4 DQC1_<11> 4 DQD0_<11> 4 DQD1_<11> 4
21 0 6 24
T13 F12 T13 F12 T13 F12 T13 F12

DQC0_<12> 4 DQC1_<12> 4 DQD0_<12> 4 DQD1_<12> 4
19 5 3 28
T11 F14 T11 F14 T11 F14 T11 F14

DQC0_<13> 4 DQC1_<13> 4 DQD0_<13> 4 DQD1_<13> 4
22 4 5 29
V13 G2 V13 G2 V13 G2 V13 G2

DQC0_<14> 4 DQC1_<14> 4 DQD0_<14> 4 DQD1_<14> 4
(C 96 C
18 7 1 30
V11 G13 V11 G13 V11 G13 V11 G13

DQC0_<15> 4 DQC1_<15> 4 DQD0_<15> 4 DQD1_<15> 4
20 6 4 31
F13 H3 F13 H3 F13 H3 F13 H3

DQC0_<16> 4 DQC1_<16> 4 DQD0_<16> 4 DQD1_<16> 4
5 31 20 14
F11 H12 F11 H12 F11 H12 F11 H12

DQC0_<17> 4 DQC1_<17> 4 DQD0_<17> 4 DQD1_<17> 4
4 24 23 8
E13 K3 E13 K3 E13 K3 E13 K3

DQC0_<18> 4 DQC1_<18> 4 DQD0_<18> 4 DQD1_<18> 4
7 30 21 15
E11 K12 E11 K12 E11 K12 E11 K12

DQC0_<19> 4 DQC1_<19> 4 DQD0_<19> 4 DQD1_<19> 4
6 25 22 9
B13 L2 B13 L2 B13 L2 B13 L2

DQC0_<20> 4 DQC1_<20> 4 DQD0_<20> 4 DQD1_<20> 4
3 28 19 13
B11 L13 B11 L13 B11 L13 B11 L13

DQC0_<21> 4 DQC1_<21> 4 DQD0_<21> 4 DQD1_<21> 4
1 26 18 10
)2 7 ON
A13 M1 A13 M1 A13 M1 A13 M1
DQC0_<22> 4 DQC1_<22> 4 DQD0_<22> 4 DQD1_<22> 4
0 29 17 12
A11 M3 A11 M3 A11 M3 A11 M3

DQC0_<23> 4 DQC1_<23> 4 DQD0_<23> 4 DQD1_<23> 4
2 27 16 11
F2 M12 F2 M12 F2 M12 F2 M12

DQC0_<24> 4 DQC1_<24> 4 DQD0_<24> 4 DQD1_<24> 4
10 18 26 3
F4 M14 F4 M14 F4 M14 F4 M14

DQC0_<25> 4 DQC1_<25> 4 DQD0_<25> 4 DQD1_<25> 4
9 16 25 0
E2 N5 E2 N5 E2 N5 E2 N5
DQC0_<26> 4 DQC1_<26> 4 DQD0_<26> 4 DQD1_<26> 4
11 19 27 2
E4 N10 E4 N10 E4 N10 E4 N10

DQC0_<27> 4 DQC1_<27> 4 DQD0_<27> 4 DQD1_<27> 4
8 17 24 1
B2 P1 B2 P1 B2 P1 B2 P1
DQC0_<28> 4 DQC1_<28> 4 DQD0_<28> 4 DQD1_<28> 4
12 20 28 4
B4 P3 B4 P3 B4 P3 B4 P3
DQC0_<29> 4 DQC1_<29> 4 DQD0_<29> 4 DQD1_<29> 4
13 22 29 5
A2 P12 A2 P12 A2 P12 A2 P12
F
DQC0_<30> 4 DQC1_<30> 4 DQD0_<30> 4 DQD1_<30> 4
14 21 30 7
0
A4 P14 A4 P14 A4 P14 A4 P14
DQC0_<31> 4 DQC1_<31> 4 DQD0_<31> 4 DQD1_<31> 4
15 23 31 6

T12 T12 T12 T12
石 17 jo ID
VDDQ_T12 VDDQ_T12 VDDQ_T12 VDDQ_T12
MAC0_<0> MAC0_<8> J5 MAC1_<0> MAC1_<8> J5 MAD0_<0> 8
MAD0_<8> J5 MAD1_<0> 8
MAD1_<8> J5
MAC0_<0> MAC0_<1> 48 MAC0_<7>
RFU_A12_NC
MAC1_<0> MAC1_<1>
8
4 MAC1_<0>
RFU_A12_NC
MAD0_<0> MAD0_<1> 4 MAD0_<7>
RFU_A12_NC
MAD1_<0> MAD1_<1> 4 MAD1_<0>
RFU_A12_NC
K4 C5 K4 C5 K4 C5 K4 C5
7 0
MAC0_<1> MAC0_<2> 47 MAC0_<6>

MAC1_<1> MAC1_<2>
0
4 MAC1_<1>
MAD0_<1> MAD0_<2> 4 MAD0_<6>
MAD1_<1> MAD1_<2> 4 MAD1_<1>
K5 C10 K5 C10 K5 C10 K5 C10
6 1
MAC0_<2> MAC0_<3> 46 MAC0_<5>

A6_A11__A1_A9 VDD_C10
MAC1_<2> MAC1_<3>
1
4 MAC1_<3>
A6_A11__A1_A9 VDD_C10
MAD0_<2> MAD0_<3> 4 MAD0_<5>
A6_A11__A1_A9 VDD_C10
MAD1_<2> MAD1_<3> 4 MAD1_<3>
A6_A11__A1_A9 VDD_C10
K10 D11 K10 D11 K10 D11 K10 D11
5 3
MAC0_<3> MAC0_<4> 45 MAC0_<4>

MAC1_<3> MAC1_<4>
3
4 MAC1_<2>
MAD0_<3> MAD0_<4> 4 MAD0_<4>
MAD1_<3> MAD1_<4> 4 MAD1_<2>
K11 G1 K11 G1 K11 G1 K11 G1
4 2
MAC0_<4> MAC0_<5> 44 MAC0_<3>

MAC1_<4> MAC1_<5>
2
4 MAC1_<5>
MAD0_<4> MAD0_<5> 4 MAD0_<3>
MAD1_<4> MAD1_<5> 4 MAD1_<5>
H10 G4 H10 G4 H10 G4 H10 G4
3 5
MAC0_<5> MAC0_<6> 43 MAC0_<2> MAC1_<5> MAC1_<6> 4 MAC1_<4> MAD0_<5> MAD0_<6> 4 MAD0_<2> MAD1_<5> MAD1_<6> 4 MAD1_<4>
阿 09 ne EN
A3_BA3__A5_BA1 VDD_G4 5 A3_BA3__A5_BA1 VDD_G4 A3_BA3__A5_BA1 VDD_G4 A3_BA3__A5_BA1 VDD_G4
H11 G11 H11 G11 H11 G11 H11 G11
2 4
MAC0_<6> MAC0_<7> 42 MAC0_<1>

MAC1_<6> MAC1_<7>
4
4 MAC1_<6>
MAD0_<6> MAD0_<7> 4 MAD0_<1>
MAD1_<6> MAD1_<7> 4 MAD1_<6>
H5 G14 H5 G14 H5 G14 H5 G14
1 6
MAC0_<7> MAC0_<8> 41 MAC0_<0>

A1_A9__A6_A11 VDD_G14
MAC1_<7> MAC1_<8>
6
4 MAC1_<7>
A1_A9__A6_A11 VDD_G14
MAD0_<7> MAD0_<8> 4 MAD0_<0>
A1_A9__A6_A11 VDD_G14
MAD1_<7> MAD1_<8> 4 MAD1_<7>
A1_A9__A6_A11 VDD_G14
H4 L1 H4 L1 H4 L1 H4 L1
0 7
MAC0_<8> 40 A0_A10__A7_A8 VDD_L1

MAC1_<8>
7
4 A0_A10__A7_A8 VDD_L1
MAD0_<8> 4 A0_A10__A7_A8 VDD_L1
MAD1_<8> 4 A0_A10__A7_A8 VDD_L1
D4 P11 D4 P11 D4 P11 D4 P11
IN IN IN IN
WCKC0_0 WCKC1_1 WCKD0_1 WCKD1_0
4 WCK01__WCK23 VDD_P11 4 WCK01__WCK23 VDD_P11 4 WCK01__WCK23 VDD_P11 4 WCK01__WCK23 VDD_P11
D5 R5 D5 R5 D5 R5 D5 R5
IN IN IN IN
WCKC0B_0 WCKC1B_1 WCKD0B_1 WCKD1B_0
4 WCK01#__WCK23# VDD_R5 4 WCK01#__WCK23# VDD_R5 4 WCK01#__WCK23# VDD_R5 4 WCK01#__WCK23# VDD_R5
鋒 19 pe TI
VDD_R10 R10 VDD_R10 R10 VDD_R10 R10 VDD_R10 R10
P4 P4 P4 P4
IN IN IN IN
WCKC0_1 WCKC1_0 WCKD0_0 WCKD1_1
4 WCK23__WCK01 4 WCK23__WCK01 4 WCK23__WCK01 4 WCK23__WCK01
P5 P5 P5 P5
IN IN IN IN
WCKC0B_1 WCKC1B_0 WCKD0B_0 WCKD1B_1
4 WCK23#__WCK01# 4 WCK23#__WCK01# 4 WCK23#__WCK01# 4 WCK23#__WCK01#
VSSQ_A1 A1 VSSQ_A1 A1 VSSQ_A1 A1 VSSQ_A1 A1
R2 A3 R2 A3 R2 A3 R2 A3
OUT OUT OUT OUT
EDCC0_3 EDCC1_1 EDCD0_1 EDCD1_2
R13 A12 R13 A12 R13 A12 R13 A12
OUT OUT OUT OUT
C13 A14 C13 A14 C13 A14 C13 A14
OUT OUT OUT OUT
C2 C1 C2 C1 C2 C1 C2 C1
OUT OUT OUT OUT
4 EDC0__EDC3 VSSQ_C1 4 EDC0__EDC3 VSSQ_C1 4 EDC0__EDC3 VSSQ_C1 4 EDC0__EDC3 VSSQ_C1
02 i( AL
VSSQ_C3 C3 VSSQ_C3 C3 VSSQ_C3 C3 VSSQ_C3 C3
DDBIC0_3 P2 C4 DDBIC1_1 P2 C4 DDBID0_1 P2 C4 DDBID1_2 P2 C4
DDBIC0_2 P13 C11 DDBIC1_0 P13 C11 DDBID0_0 P13 C11 DDBID1_3 P13 C11
DDBIC0_0 D13 C12 DDBIC1_3 D13 C12 DDBID0_2 D13 C12 DDBID1_1 D13 C12
DDBIC0_1 D2 C14 DDBIC1_2 D2 C14 DDBID0_3 D2 C14 DDBID1_0 D2 C14
+MVDD G3 E14 +MVDD G3 E14 +MVDD G3 E14 +MVDD G3 E14
IN IN IN IN
RASC0B CASC1B RASD0B CASD1B
4 RAS#__CAS# VSSQ_E14 4 RAS#__CAS# VSSQ_E14 4 RAS#__CAS# VSSQ_E14 4 RAS#__CAS# VSSQ_E14
(0
L3 F5 L3 F5 L3 F5 L3 F5
IN IN IN IN
CASC0B RASC1B CASD0B RASD1B
4 CAS#__RAS# VSSQ_F5 4 CAS#__RAS# VSSQ_F5 4 CAS#__RAS# VSSQ_F5 4 CAS#__RAS# VSSQ_F5
2
R2401 1 60.4R 1% F10 2
R2501 1 60.4R 1% F10 2
R2601 1 60.4R 1% F10 2
R2701 1 60.4R 1% F10
裴
VSSQ_F10 VSSQ_F10 VSSQ_F10 VSSQ_F10
2
R2400 1 60.4R 1% VSSQ_H2 H2 2
R2500 1 60.4R 1% VSSQ_H2 H2 2
R2600 1 60.4R 1% VSSQ_H2 H2 2
R2700 1 60.4R 1% VSSQ_H2 H2
J3 H13 J3 H13 J3 H13 J3 H13
IN IN IN IN
CKEC0 CKEC1 CKED0 CKED1
4 CKE# VSSQ_H13 4 CKE# VSSQ_H13 4 CKE# VSSQ_H13 4 CKE# VSSQ_H13
J11 K2 J11 K2 J11 K2 J11 K2
IN IN IN IN
CLKC0B CLKC1B CLKD0B CLKD1B
4 CK# VSSQ_K2 4 CK# VSSQ_K2 4 CK# VSSQ_K2 4 CK# VSSQ_K2
J12 K13 J12 K13 J12 K13 J12 K13
IN IN IN IN
CLKC0 CLKC1 CLKD0 CLKD1
4 CK VSSQ_K13 4 CK VSSQ_K13 4 CK VSSQ_K13 4 CK VSSQ_K13
00 RM 亮
G12 N1 G12 N1 G12 N1 G12 N1
IN IN IN IN
CSC0B_0 WEC1B CSD0B_0 WED1B
4 CS#__WE# VSSQ_N1 4 CS#__WE# VSSQ_N1 4 CS#__WE# VSSQ_N1 4 CS#__WE# VSSQ_N1
L12 N3 L12 N3 L12 N3 L12 N3
IN IN IN IN
WEC0B CSC1B_0 WED0B CSD1B_0
4 WE#__CS# VSSQ_N3 4 WE#__CS# VSSQ_N3 4 WE#__CS# VSSQ_N3 4 WE#__CS# VSSQ_N3
ZQ_C0 ZQ_C1 ZQ_D0 ZQ_D1
2
R2402 1 120R 1% J13 ZQ VSSQ_R1 R1 2
R2502 1 120R 1% J13 ZQ VSSQ_R1 R1 2
R2602 1 120R 1% J13 ZQ VSSQ_R1 R1 2
R2702 1 120R 1% J13 ZQ VSSQ_R1 R1
SEN_C0 SEN_C1 SEN_D0 SEN_D1
R24031 2
1K 5% J10 SEN VSSQ_R3 R3 R25031 2
1K 5% J10 SEN VSSQ_R3 R3 R26031 2
1K 5% J10 SEN VSSQ_R3 R3 R27031 2
1K 5% J10 SEN VSSQ_R3 R3
VSSQ_R4 R4 VSSQ_R4 R4 VSSQ_R4 R4 VSSQ_R4 R4
R11 R11 R11 R11
IN IN IN IN
DRAM_RST2 DRAM_RST2 DRAM_RST2 DRAM_RST2
4,6 VSSQ_R11 4,6 VSSQ_R11 4,6 VSSQ_R11 4,6 VSSQ_R11
J2 R12 J2 R12 J2 R12 J2 R12
68 A工樂
MF_C0
RESET# VSSQ_R12 MF_C1
RESET# VSSQ_R12 MF_D0
RESET# VSSQ_R12 MF_D1
RESET# VSSQ_R12
R24041 2
1K 5% J1 MF VSSQ_R14 R14 R26041 2
1K 5% J1 MF VSSQ_R14 R14
A5 Vpp_NC A5 Vpp_NC A5 Vpp_NC A5 Vpp_NC
V5 Vpp_NC1 V5 Vpp_NC1 V5 Vpp_NC1 V5 Vpp_NC1
VSS_B5 B5 VSS_B5 B5 VSS_B5 B5 VSS_B5 B5
76
A10 VREFD1 VSS_B10 B10 A10 VREFD1 VSS_B10 B10 A10 VREFD1 VSS_B10 B10 A10 VREFD1 VSS_B10 B10
V10 D10 V10 D10 V10 D10 V10 D10
)
VREFD2 VSS_D10 VREFD2 VSS_D10 VREFD2 VSS_D10 VREFD2 VSS_D10
VSS_G5 G5 VSS_G5 G5 VSS_G5 G5 VSS_G5 G5
G10 G10 G10 G10
程
VSS_G10 VSS_G10 VSS_G10 VSS_G10
+MVDD 2
R2409 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2509 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2609 1 2.37K 1% VSS_K1 K1 +MVDD 2
R2709 1 2.37K 1% VSS_K1 K1
2
R2410 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2510 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2610 1 5.49K 1% J14 VREFC VSS_K14 K14 2
R2710 1 5.49K 1% J14 VREFC VSS_K14 K14
0)
VREFC_C0 VREFC_C1 VREFC_D0 VREFC_D1
C2405 1uF 6.3V VSS_L5 L5 C2505 1uF 6.3V VSS_L5 L5 C2605 1uF 6.3V VSS_L5 L5 C2705 1uF 6.3V VSS_L5 L5
VSS_L10 L10 VSS_L10 L10 VSS_L10 L10 VSS_L10 L10
VSS_P10 P10 VSS_P10 P10 VSS_P10 P10 VSS_P10 P10
J4 T5 J4 T5 J4 T5 J4 T5
IN IN IN IN
ADBIC0 ADBIC1 ADBID0 ADBID1
4 ABI# VSS_T5 4 ABI# VSS_T5 4 ABI# VSS_T5 4 ABI# VSS_T5
課
VSS_T10 T10 VSS_T10 T10 VSS_T10 T10 VSS_T10 T10
+MVDD
C2750 C2751 C2755

22uF 22uF 22uF
4V 4V 4V
C2752 C2753
C2519
10uF 10uF
4V 4V
C2407
C2408
C2409
C2410
C2411
C2413
C2414
C2415
C2506
C2507
C2508
C2509
C2512
C2513
C2515
C2607
C2608
C2609
C2610
C2611
C2612
C2613
C2614
C2707
C2708
C2710
C2711
C2712
C2714
C2715
C2716
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
C2764 C2760 C2761 C2762 C2763

0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF 10uF 10uF 10uF 10uF

4V 4V 4V 4V 4V
Reserved. detail please check BOM


1
1
C2417
C2418
C2419
C2420
C2421
C2422
C2423
C2425
C2440
C2441
C2521
C2522
C2523
C2524
C2525
C2526
C2527
C2528
C2540
C2541
C2617
C2619
C2620
C2621
C2622
C2623
C2624
C2625
C2640
C2641
C2717
C2718
C2719
C2720
C2721
C2722
C2723
C2724
C2740
C2741
MS-V341
22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
4V 4V 4V 4V 4V 4V 4V 4V
MSI
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
2
2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF

Custom 0006 GDDR5 MEM CH CD 2.0

(7) ELLESMERE GPIO STRAP CF XTAL
00
U1G
+3.3V_BUS PART 7 OF 18
GPIO_0
V39
M
SCL/SDA BUS: GPIO_0 7
GPIO_1
AL24 VDD_33 GPIO_1 V38 7 22
GPIO_2
I2C ADDRESS FUNCTION DEVICE C18 C1 AM24 VDD_33 GPIO_2 W37 7
0
1uF 1uF VIDEO BIOS
6.3V 6.3V
RD 17 SI
FIRMWARE
+3.3V_BUS +3.3V_BUS
GPIO_5_REG_HOT_AC_BATT AJ34 GPIO_5_REG_HOTB 14
AE34 U11
IN
GPIO_6_TACH
GPIO_6_TACH 23,24 14
3 WP VDD 8
GPIO_8_ROMSO GPIO_8_R
GPIO_8_ROMSO AN30 RP1A 1 8 33R
7 2 SO HOLD
7
GPIO_9_ROMSI GPIO_9_R
GPIO_9_ROMSI AP32 RP1C 3 6 33R
7 5 SI C4
GPIO_10_ROMSCK GPIO_10_R
GPIO_10_ROMSCK AM30 2 7 6
33R 0.1uF
GPIO_11
RP1B
GPIO_22_R
SCK 6.3V
DDCVGA BUS: GPIO_11 V43 7 1 CE GND 4
V42
OUT
GPIO_12_MVDD_VID
GPIO_12 GPIO_13
22
V41 PM25LV010A-100SC
(C 96 C
I2C ADDRESS FUNCTION DEVICE GPIO_13 7
GPIO_14_HPD2 AR29
+3.3V_BUS
GPIO_15 22 AJ31 OUT
0x98 LM96063 GPIO_15
EXT TEMP SENSOR
GPIO_16_8P_DETECT AJ33
GPIO_17_THERMAL_INT AE33
PIN BASED STRAPS
IN
24 GPIO_17_THERM_INT
+3.3V_BUS
GPIO_18_HPD3 9 AT29 IN
HPD3
1
GPIO_19_CTF 23 AC31 OUT
GPIO_19_CTF
GPIO_20
R35 R1 GPIO_0
G GPIO_20 AK33 7 22
2.2K 2 1 7 PINSTRAP_BIF_TX_HALF_SWING
5%
GPIO_0
)2 7 ON
GPIO_21 21 AK34 IN
2 MR1 1
GPIO_21
5% 10K
+3.3V_BUS +1.8V I GPIO_22_ROMCSB
GPIO_22_ROMCSB AN32 4 5 33R DNI
2
5% 10K
O
RP1D
PINSTRAP_SMBUS_ADDR
+3.3V_BUS GPIO_1
AG31 2 R2 1
OUT
GPIO_29 22
GPIO_29 MR2 7 0: 0x40
+VDDC +MVDD
AG30 2 1
OUT 22
GPIO_30
GPIO_30 5% 10K
1
24 1: 0x41
DNI
R79 5% 10K 1
10K
GENERICA AW40
1
GPIO(2) - BIF_GEN3_EN_A
5% GPIO_2
R89 GENERICB AT24 MR3 2 R3 1 7
1
0 : DRIVER CONTROLLED GEN3
GPIO_2
GENERICC AT30 2 1
1K
F
DNI
2
5% R32 5% 10K 1 : STRAP CONTROLLED GEN3
0
UNNAMED_7_NPN_I611_C
GENERICD AR30
10K DNI
5% 5% 10K
GENERICE_HPD4 11 AU29
PG
2
IN
HPD4 PINSTRAP_SMS_EN_HARD
3
GPIO_9_R
1 25.1K 5% 5 GENERICF_HPD5 10 AU30 1 217 5% PCC 2 1
2
IN IN
HPD5
R66 Q31B R5 7
GPIO_9_R
GENERICG_HPD6 11 AU32 2 MR5 1

MMDT3904-7 DNI
石 17 jo ID
IN
HPD6 0
0R 5% 10K
R48 DNI
5% 10K
6
1
MR66 25.1K 5% 2 HPD1 10 AT32
4
IN
HPD1
C69 Q31A GPIO(13,12,11) - CONFIG[2..0]
UNNAMED_7_CAP_I609_A
GPIO_13
1uF MMDT3904-7
MR6 2 R6 1 7
1
CONFIG[2] 100 - 512KBIT (ST) M25P05A

6.3V
GPIO_13
MR89 2 1 5% 10K 101 - 1MBIT (ST) M25P10A

1K DNI 2 1 GPIO_12_MVDD_VID
1
5% 5% 10K R7 7 22 CONFIG[1] 101 - 2MBIT (ST) M25P20

GPIO_12_MVDD_VID
+3.3V_BUS
AA31 TEST_PG HSYNC AP24 HSYNC
7 2 MR7 1 5% 10K
DNI
101 - 4MBIT (ST) M25P40
GPIO_11
AR24 VSYNC DNI 2 1
2
VSYNC 7 5% 10K R8 7 CONFIG[0] 101 - 8MBIT (ST) M25P80

GPIO_11
Y32 2 MR8 1
阿 09 ne EN
TEST_PG_BACO 5% 10K 100 - 512KBIT (CHINGIS) PM25LV512
+3.3V_BUS +1.8V DNI
5% 10K 101 101 - 1MBIT (CHINGIS) PM25LV010
R36
10K
+0.8V 5%
IN R10 HSYNC = AUD[1], VSYNC = AUD[0]
2 1 VSYNC
7
1
AUD[0] 00 - NO AUDIO FUNCTION
R68 R49 0R 2 MR10 1 5% 10K DNI

1
01 - AUDIO FOR DP ONLY

G_CLKREQB
0.8V_PGOOD 10K AV41 11 2 5% CLKREQB 2 R11 1
HSYNC
OUT
DNI
MR69 CLKREQB 5% 10K 7
1
AUD[1] 10 - AUDIO FOR DP AND HDMI IF DONGLE IS DETECTED

5%
1K AV43 1 G_WAKEB 2 MR11 1
HSYNC
IN
DNI
R69 5% WAKEB 5% 10K 11 - AUDIO FOR BOTH DP AND HDMI
1K
2
DNI 11
5% 5% 10K HDMI MUST ONLY BE ENABLED ON SYSTMES THAT ARE LEGALLY
鋒 19 pe TI
J2 J3
2
ENTITLED. IT IS THE RESPONSIBILITY OF THE SYSTEM DESIGNER

PG_BACO DVPDATA_0
1 1
2
7
3
TO SUPPORT THIS FEATURE.

DVPDATA_1
1
R67 2
20K 5% 5 Q30B DIGON AK25 2 7 2
DVPDATA_2
MMDT3904-7
BL_ENABLE AK26 3 3 7 R13 GPIO(8) - BIF_CLK_PM_EN
DVPDATA_3 GPIO_8_R
1 2 UNNAMED_7_CAP_I578_A
5% BL_PWM_DIM AL26 4 7 4 2 1 7
1
0 - DISABLE CLKREQb POWER MANAGEMENT CAPABILITY

DVPDATA_4
GPIO_8_R
2 5 5 2 MR13 1
4
DNI 0 1 - ENABLE CLKREQb POWER MANAGEMENT CAPABILITY

MR67 1K R62 C68 Q30A 7 5% 10K
UNNAMED_7_NPN_I580_B
DVPDATA_5
1K 1uF MMDT3904-7 6 7 6 5%
DNI
10K ENSURE THAT NO LOGIC CONFLICTS WITH THIS SIGNAL DURING RESET.
5% 6.3V REV 0.90 DVPDATA_6
7 7 7
DVPDATA_7
02 i( AL
8 8
2
ellesmere_l4 7 DVPDATA_8
9 9 2 1 GPIO_28_TS_FDO
U1H DVPDATA_9
7 R15
23
OUT
10 7 10 2
MR15 1 5% 10K
DNI
DVPDATA_10
11 11 7 5% DNI
10K
PART 8 OF 18 DVPDATA_11
12 7 12
DVPDATA_12 GENLK_VSYNC
13 13 7 2 R16 1 7
DVPDATA_0 DVPDATA_13
DBGDATA_0 AV18 7 14 7 14 2 MR16 1 5% 10K
DBGDATA_1 AW18 7 15 15 7 5% DNI
10K
DBGDATA_2 AT19 7 16 7 16
DVPDATA_3
(0
DBGDATA_3 AV19 7
DVPDATA_4
AW19 HEADER_2X8 HEADER_2X8
裴
DBGDATA_4 DVPDATA_5
7
DBGDATA_5 AR20 7
DVPDATA_6 +1.8V
AT25 SWAPLOCKA DBGDATA_6 AT20 7
DVPDATA_7
AR25 SWAPLOCKB DBGDATA_7 AY20 7
TP60 DVPDATA_0
MR18 2 1 R18 7
AM27 GENLK_CLK D 2 1 5% 10K
DNI
00 RM 亮
GENLK_VSYNC
7 AL27 GENLK_VSYNC V DVPDATA_8 5%
DNI
10K
P DBGDATA_8 AW20 7
DVPDATA_9 DVPDATA_1
DBGDATA_9 AU20 7 2 1 R19 7
DVPDATA_10
DBGDATA_10 AN21 7 2 1
MR19 5% 10K PINSTRAP_AUD_PORT_CONN[2:0] -DVPDATA[2:0]
DVPDATA_11
DBGDATA_11 AP21 7 5% DNI 10K
DVPDATA_12
DBGDATA_12 AW21 7
DBGDATA_13 AV21 7 2 1 R20 7
DVPDATA_14
DBGDATA_14 AU21 7 2 MR20 1 5%
DNI
10K
DVPDATA_15
AR21
68 A工樂
DNI
DBGDATA_15 7 5% 10K
GPIO_20
MR21 2 1 R21 7 22 PINSTRAP_TX_DEEMPH_E N
2 1
22
DNI
5% 10K
DNI
5% 10K
REV 0.90 GPIO_29

MR22 2 1 R22 7 GPIO(29) - BIF_VGA_DIS
ellesmere_l4 2 1 5% 10K 0 0 : VGA CONTROLLER CAPACITIY ENABLED (NORMAL OPERATION)
5% DNI 10K 1 : THE DEVICE WILL NOT BE RECOGNIZED AS THE SYSTEM'S VGA CONTROLLER
76
GPIO_30
2 1
)
R23 7 24
U1I 2 MR23 1 5%
DNI
10K
NR30
1 2 DNI
程
5% 10K
UNNAMED_7_RES_I670_A
PART 9 OF 18
0R 5%
+1.8V GPIO_15
C12 2 1 R26 7 22 PINSTRAP_EFUSE_RD_DISABLE
XIN_OSC R30 XIN_OSC_1
XTALIN BA43 1 2 18pF 50V 2 1 MR26 5% 10K 0
0)
0R 5% 5% 10K
DVPDATA_3
1 1M
MR80 2 1 R80 7
2 1 5% 10K
DNI
3
4
27.000MHz
DNI
5% 10K
課
Y1
DVPDATA_4
2 1 R81
1
2
7 PINSTRAP_BOARD_CONFIG [2:0]
1
2 MR81 1
2
R37
5% 10K
R33
R75
XOUT_OSC XOUT_OSC_1
XTALOUT AY42 1 2 C11 18pF 5% DNI 10K
0R 5% 50V
+1.8V DVPDATA_5
2 1 R82
2
7
20R
2 1 DNI
1%
B35 MR82 5% 10K

VDD18_U22
P 1 2 5% 10K 000
1%
L 120R
L +1.8V
C65
S 1uF
6.3V C66
X 0.1uF
6.3V
T
A R73
L 5.1K
U22
5%
5 SSON VDD 1
PLLCHARZ_H AM29 C26
18pF 50V 2 XIN CLKOUT1 4 UNNAMED_7_RES_I670_B
PLL_CHARZ_H
PLLCHARZ_L AN29 TP31
R72
PLL_CHARZ_L 5.1K
TP32 5%
3
4
27.000MHz
Y5
C27
1
2
3 6

18pF 50V XOUT VSS
ANALOGIO AW42 ANALOGIO TP30
MS-V341
Si51214-A1EAGM
REV 0.90
MSI
ellesmere_l4

Custom 0007 ELLESMERE GPIO STRAP CF XT 2.0

(8) ELLESMERE DAC1 LOCK
00 M
0
RD 17 SI
(C 96 C U1J
PART 10 OF 18
)2 7 ON
G_SMBCLK AM34
OUT 1,24 SMBCLK
G_SMBDAT AM33
BI 1,24 SMBDAT
BI
OUT
0
SCL_S
石 17 jo ID
SDA_S
F AF34
AF33
SCL
SDA
SVI2&I2C
AD34
OUT
DDCVGACLK 24 DDCVGACLK
DDCVGADATA AD33
BI 24 DDCVGADATA
AM23 VDDC_VDDCI_SVC
OUT
阿 09 ne EN
GPIO_SVC 14,22
AP23 VDDC_VDDCI_SVD
GPIO_SVD 14,22 BI
AN23 1 2 14 5% VDDC_VDDCI_SVT
GPIO_SVT BI
UNNAMED_8_ELLESMEREL4_I360_GPIOSVT
PR9 0R
+1.8V
鋒 19 pe TI
REV 0.90
1
R1111 ellesmere_l4
10K
1
SCL_S
02 i( AL
3 SCL
2
8 22 24
MQ1103 22,24
BSH111BK
2
1
R1113 2 0R
+1.8V
(0 裴
1
R1112
10K
1
00 RM 亮
MQ1105
SDA_S
3 SDA
2
8 22 24
22,24
BSH111BK
2
1
R1114 2 0R
68 A工樂
76 程 )
0) 課
MS-V341
MSI
Custom 0008 ELLESMERE SVI2&I2C 2.0

(9) ELLESMERE TMDP A/B
U1K
00 M
0
PART 11 OF 18
RD 17 SI
DPB_TX2P
TX2P_DPB0P AY36 C1954 0.1uF 6.3V EFTX2P
9
R19511 2 499R
EFTX2P
1%
DPB_TX2N
TX2M_DPB0N AY35 VVVV341200.1uF
C1955 6.3V EFTX2M
9
C11-1042042-Y01 R19531EFTX2MVVVV34120
2 499R 1%
R11-4990T12-Y01
DPB_TX1P
TX1P_DPB1P BC35 VVVV341200.1uF
C1956 6.3V EFTX1P
9
C11-1042042-Y01 R19521 VVVV34120
2 499R 1%
R11-4990T12-Y01
DPB_TX1N
TX1M_DPB1N BB35 VVVV341200.1uF
C1957 6.3V EFTX1M
9
C11-1042042-Y01 R19551EFTX1MVVVV34120
2 499R 1%
R11-4990T12-Y01
DPB_TX0P
BB33 VVVV341200.1uF
C1958 6.3V EFTX0P
(C 96 C
TX0P_DPB2P 9
C11-1042042-Y01 R19541 VVVV34120
2 499R
EFTX0P
1%
R11-4990T12-Y01
DPB_TX0N
TX0M_DPB2N BC33 VVVV341200.1uF
C1959 6.3V EFTX0M
9
C11-1042042-Y01 R19571EFTX0MVVVV34120
2 499R 1%
R11-4990T12-Y01
DPB_TXCAP
TXCBP_DPB3P AY33 VVVV341200.1uF
C1960 6.3V EFTXCP
9
C11-1042042-Y01 R19561EFTXCPVVVV34120
2 499R 1%
R11-4990T12-Y01
DPB_TXCAN
TXCBM_DPB3N AY32 VVVV341200.1uF
C1961 6.3V EFTXCM
9
C11-1042042-Y01 R19581 VVVV34120
2 499R 1%
R11-4990T12-Y01
)2 7 ON
VVVV34120 EFTX5P
9
C11-1042042-Y01 R19591 VVVV34120
2 499R 1%
R11-4990T12-Y01 EFTX5M
9
AU33 10 DDC4CLK_HDMI R19111 VVVV34120
2 499R 1%
DDCAUX4P OUT
R11-4990T12-Y01 EFTX4P
9
AT33 10 DDC4DAT_HDMI R19101EFTX4PVVVV34120
2 499R 1%
DDCAUX4N BI
R11-4990T12-Y01 EFTX4M
9
R19131 VVVV34120
2 499R 1%
R11-4990T12-Y01
F
EFTX3P
9
0
R19121 VVVV34120
2 499R 1%
R11-4990T12-Y01 EFTX3M
9
R19141 VVVV34120
2 499R
T 1%
M R11-4990T12-Y01
石 17 jo ID
DPBA_GND
D VVVV34120
P R11-4990T12-Y01
A
/
B
Q1820B
6
2
IN
DVI_EN 10 2N7002DW
阿 09 ne EN
DPA_TX5P
BB39 C1920 0.1uF 6.3V
TX5P_DPA0P EFTX5P
VVVV34120
J1950
1
DPA_TX5N D03-7002D59-D07
TX5M_DPA0N BC39 VVVV341200.1uF
C1921 6.3V
C11-1042042-Y01
EFTX5M
DPA_TX4P
TX4P_DPA1P AY39 VVVV341200.1uF
C1922 6.3V 9
EFTX2M 1 TMDS_Data2-
C11-1042042-Y01 9
EFTX2P 2 TMDS_Data2+ G1 G1
DPA_TX4N
TX4M_DPA1N AY38 VVVV341200.1uF
C1923 6.3V 3 TMDS_Data2/4_Shield G2 G2
DDC6CLK_DVI_C
C11-1042042-Y01 EFTX4M 4 G3
EFTX4M
9 9 TMDS_Data4- G3
鋒 19 pe TI
DPA_TX3P
TX3P_DPA2P BC38 VVVV341200.1uF
C1924 6.3V 9
EFTX4P 5 TMDS_Data4+ G4 G4
C11-1042042-Y01 6 DDC_Clock
DPA_TX3N DDC6DATA_DVI_C
TX3M_DPA2N BB38 VVVV341200.1uF
C1925 6.3V 9 7 DDC_Data
C11-1042042-Y01 +5V_VESA 8
EFTX3M
Analog_VSYNC
VVVV34120 +5V_VESA
TXCAP_DPA3P BB36 9
+3.3V_BUS C11-1042042-Y01 9
EFTX1P 10 TMDS_Data1+
TXCAM_DPA3N BC36 C1926 11 TMDS_Data1/3_Shield
1uF
9
16V
02 i( AL
+3.3V_BUS EFTX3P 13
VVVV34120 9 TMDS_Data3+
1
+5V_VESA
R1940 R1985 R1986 C11-1057023-W08 14 +5V_Power
Q1980B
10K 2.2K 2.2K 15 GND_(for_+5V)
3
5% 2N7002DWDDC6CLK_DVI_L5% 5% HPD_EF_DVI
Q1951B 5 2
R1915 1 10K 5% 16 Hot_Plug_Detect
DDC6CLK_DVI
BC41 1 6 1
R1990 233R 5% EFTX0M 17 SCREW1950
2
DDCAUX6P VVVV34120 VVVV34120 VVVV34120 MMDT3904-7 9 TMDS_Data0-
R11-0103012-W08 R11-0222012-W08
R11-0222012-W08 2
R1916 XXXV34120
1 10K 5% EFTX0P 18
OUT
HPD3 7
VVVV34120 9 TMDS_Data0+
<New PN>
DDC6DATA_DVI
BB40 VVVV34120 VVVV34120 19
4
DDCAUX6N D02-03904G9-D07 TMDS_Data0/5_Shield
D03-7002D59-D07 R11-0330032-W08 XXXV34120 9
+3.3V_BUS <New PN> 9
EFTX5P 21 TMDS_Data5+
(0
22 TMDS_Clock_Shield XXXV34120
EFTXCP 23 <New PN>
SCREW1951
裴
9 TMDS_Clock+
1
R1941 9
EFTXCM 24 TMDS_Clock-
10K Q1980A
5
5% 2N7002DW DDC6DAT_DVI_L
4 3 1
R1991 233R 5%
2
VVVV34120
DDC6DATA_DVI_C
+0.8V XXXV34120
R11-0103012-W08
VVVV34120 VVVV34120 M1 M1 <New PN>
DP_ZVDD_08
00 RM 亮
R1718 1 2 200R 1% AT36 DP_ZVDD_08
D03-7002D59-D07 R11-0330032-W08 M2 M2
M3 M3
DP_ZVSS AUX_ZVSS
R1700 1 VVVV34120
2 200R 1% AV36 DP_ZVSS AUX_ZVSS AY24 R19001 2
150R 1%
R11-0201T12-W08
VVVV34120 VVVV34120
R11-0201T12-W08 R11-0151T12-W08 DVI-D
VVVV34120
N5B-24F0711-C67
REV 0.90
68 A工樂
6140168000G
ellesmere_l4
VVVV34120
B03-0876105-A08
OPTIONAL ESD PROTECTION DIODES
76
D1950 2 1 ESD5V3U1U-02LRH EFTX2P
9
)
D1901 2 XXXV34120
1 ESD5V3U1U-02LRH EFTX2M
9
<New PN>
程
D1952 2 XXXV34120
1 ESD5V3U1U-02LRH EFTX1P
9
<New PN>
D1903 2 XXXV34120
9
<New PN>
0)
D1904 2 XXXV34120
9
<New PN>
D1905 2 XXXV34120
9
<New PN>
課
D1906 2 XXXV34120
1 ESD5V3U1U-02LRH EFTXCP
9
<New PN>
D1967 2 XXXV34120
1 ESD5V3U1U-02LRH EFTXCM
9
<New PN>
D1968 2 XXXV34120
9
<New PN>
D1969 2 XXXV34120
9
<New PN>
D1910 2 XXXV34120
9
<New PN>
D1911 2 XXXV34120
9
<New PN>
D1912 2 XXXV34120
9
<New PN>
D1913 2 XXXV34120
9
<New PN> DDC6DATA_DVI_C
D15032 XXXV34120
1 ESD8V0R1B-02LRH
9
<New PN>
DDC6CLK_DVI_C
D15042 XXXV34120
1 ESD8V0R1B-02LRH
9
<New PN>
XXXV34120
<New PN>

MS-V341
MSI
Custom 0009 ELLESMERE TMDPAB dDVI 2.0

(10) ELLESMERE TMDP C/D
00U1L
M
+3.3V_DPDC
0
J1700
PART 12 OF 18
RD 17 SI
DPD_C0P DPD_0P
TX2P_DPD0P BB27 C1720 0.1uF 6.3V 10 1 ML_Lane_0p DP_PWR 20
DPD_C0N DPD_0N
TX2M_DPD0N BC27 VVVV341200.1uF
C1721 6.3V 10 3 ML_Lane_0n C1828
22uF
DPD_C1P DPD_1P 6.3V
AY27 VVVV341200.1uF
C1722 6.3V 10 4
TX1P_DPD1P ML_Lane_1p VVVV34120
DPD_C1N DPD_1N
TX1M_DPD1N AY26 VVVV341200.1uF
C1723 6.3V 10 6 ML_Lane_1n
DPD_C2P DPD_2P
BC26 VVVV341200.1uF
C1724 6.3V 10 7
(C 96 C
TX0P_DPD2P ML_Lane_2p
DPD_C2N DPD_2N
TX0M_DPD2N BB26 VVVV341200.1uF
C1725 6.3V 10 9 ML_Lane_2n
DPD_C3P DPD_3P
TXCDP_DPD3P BB25 VVVV341200.1uF
C1726 6.3V 10 10 ML_Lane_3p
SCREW1700
DPD_C3N DPD_3N SCREW

TXCDM_DPD3N BC25 VVVV341200.1uF
C1727 6.3V 10 12 ML_Lane_3n
XXXV34120
)2 7 ON
AUX2P_DPA
VVVV34120 10 15 AUX_CHp
2
R1702 1 100K 5%
AUX2N_DPA
10 17 AUX_CHn
AUX2P C1731 0.1uF 6.3V 2
R1703 VVVV34120
1 100K 5% +3.3V_DPDC
+12V_BUS +12V_BUS +3.3V_BUS
AUX2P AV25
AUX2N VVVV341200.1uF
C1732 6.3V VVVV34120
AUX2N AW25 Q1701B
PWR_RTN 19
DDC2CLK 12N7002DW 6 VVVV34120 G1 G1
6
AUX2P_DPA
HPD_DPA
AU26 Q1700A 2 1 2 18 G2
F
DDC2CLK R1704 R1705 R1707N28404577 10K 5% Hot_Det G2
0
10K 10K
MMDT3904-7 G3 G3
5% 5%
AV26 DDC2DATA 4 3 R17081 VVVV34120
2
10K 5% G4
OUT
HPD1
DDC2DATA VVVV34120 7
VVVV34120 G4
AUX2N_DPA
T
Q1701A 2
1
VVVV34120 VVVV34120 GND_0
M 2N7002DW VVVV34120 5
石 17 jo ID
GND_1
3
D
AUX2_BYPSS_EN DPA_DONGLE_DET
1 10 13 8
VVVV34120 CONFIG 1 GND_2
P 11
5
GND_3
3
Q1700B 5 Q1704 2 11M R17061 5.1M
2 5% 14 UNNAMED_10_DISPLAYPORT_I237_PIN14 16
C R1701 5% CONFIG 2 GND_6
UNNAMED_10_MOSN_I197_D
2
MMDT3904-7 2N7002E
D VVVV34120 VVVV34120 VVVV34120
VVVV34120
DP_W/GASKET
4
VVVV34120
6140073700G
阿 09 ne EN
TX5P_DPC0P BC32
J2501 +5V_VESA
DPC_TX2P
TX5M_DPC0N BB32 C1829 0.1uF 6.3V L1880 1
R1880 23.3R 1% 10 DTX2P 1 TMDS Data 2+
1 2
100nH 2
R1825 1 499R 1% +5V Pwr 18
UNNAMED_10_IND_I341_B
DPC_TX2N
TX4P_DPC1P BB30 VVVV341200.1uF
C1830 6.3V L1881 1 VVVV34120
R1881 23.3R 1% 10 DTX2N 3 TMDS Data 2-
1 VVVV34120
2
100nH 2
R1824 VVVV34120
1 499R 1% C1737
DPC_TX1P
TX4M_DPC1N BC30 VVVV341200.1uF
C1831 6.3V L1882 1 VVVV34120
R1882 23.3R 1% 10 DTX1P 4 TMDS Data 1+
1uF
6.3V
1 VVVV34120 2 2
R1823 VVVV34120
1 499R 1%
100nH VVVV34120
鋒 19 pe TI
DPC_TX1N
TX3P_DPC2P AY30 VVVV341200.1uF
C1832 6.3V L1883 1 VVVV34120
R1883 23.3R 1% 10 DTX1N 6 TMDS Data 1-
1 VVVV34120 2
100nH 2
R1822 VVVV34120
1 499R 1%
DPC_TX0P
TX3M_DPC2N AY29 VVVV341200.1uF
C1833 6.3V L1884 1 VVVV34120
R1884 23.3R 1% 10 DTX0P 7 TMDS Data 0+
1 VVVV34120 2
100nH 2
R1821 VVVV34120
1 499R 1%
DPC_TX0N
TXCCP_DPC3P BC29 VVVV341200.1uF
C1834 6.3V L1885 1 VVVV34120
R1885 23.3R 1% 10 DTX0N 9 TMDS Data 0-
1 VVVV34120 2
100nH 2
R1820 VVVV34120
1 499R 1%
DPC_TXCP
TXCCM_DPC3N BB29 VVVV341200.1uF
C1835 6.3V L1886 1 VVVV34120
R1886 23.3R 1% 10 DTXCAP 10 TMDS Clock+
1 VVVV34120 2
100nH 2
R1819 VVVV34120
1 499R 1%
DPC_TXCN
02 i( AL
VVVV341200.1uF
C1836 6.3V L1887 1 VVVV34120
R1887 23.3R 1% 10 DTXCAN 12 TMDS Clock-
1 VVVV34120 2
100nH 2
R1818 VVVV34120
1 499R 1%
VVVV34120 VVVV34120
+12V_BUS OUT 9 DPE_GND
VVVV34120 VVVV34120
DDCAUX5P AU35 100K DVI_EN
Q1820A
3
+5V_VESA 1 2 5 2N7002DW
DDCAUX5N AV35 R1817 5%
+3.3V_BUS VVVV34120 C1827 VVVV34120
0.1uF
4
16V DDC4CLK_HDMI_C
(0
15
VVVV34120 10 DDC Clock
1
裴
R1830 R1831
1
DDC4DAT_HDMI_C
R1840
2.2K 2.2K
10 16 DDC Data D0 Shld 8
Q1810B 5% 5%
10K
D1 Shld 5
2
5% DDC4CLK_HDMI_L
2N7002DW +3.3V_BUS 2
2
VVVV34120 VVVV34120 D2 Shld
DDC4CLK_HDMI 1 6 1
R1810 233R 5% 11
2
REV 0.90 IN 9 VVVV34120 Clk Shld
GND (+5V) 17
3
HPD_HDMI
ellesmere_l4
VVVV34120 VVVV34120 Q1823 1 2
R1829 1 10K 5% 19 Hot Plog Detect
00 RM 亮
+3.3V_BUS
N62218298
VVVV34120 MMBT3904 CASE 20

2 VVVV34120
R1828 1 10K 5% 14 21
OUT
HPD5
VVVV34120
7 NC CASE
22
2
CASE
VVVV34120 13 CEC CASE 23
1
R1841 HDMI_W/TAB
Q1810A
10K VVVV34120
5
5% 2N7002DW DDC4DAT_HDMI_L
4 3 1 233R
68 A工樂
9 DDC4DAT_HDMI R1811 5%
2
BI VVVV34120
VVVV34120 VVVV34120
76 )
D1700 D1850
DPD_0P DPD_0P
5 6 DTX2P 5 6 DTX2P
程
10 10 10 10
DPD_0N DPD_0N
10 4 D Y4 7 10 10
DTX2N 4 D Y4 7 DTX2N
10
3 C Y3 8 3 C Y3 8
DPD_1P DPD_1P
10 2 GND GND1 9 10 10
DTX1P 2 GND GND1 9 DTX1P
10
DPD_1N DPD_1N
10 1 B Y2 10 10 10
DTX1N 1 B Y2 10 DTX1N
10
0)
A Y1 A Y1
RCLAMP0524P RCLAMP0524P DNI

XXXV34120 XXXV34120
課
D1702 D1851
DPD_3N DPD_3N
10 5 6 10 10
DTXCAN 5 6 DTXCAN
10
DPD_3P DPD_3P
10 4 D Y4 7 10 10
DTXCAP 4 D Y4 7 DTXCAP
10
3 C Y3 8 3 C Y3 8
DPD_2N DPD_2N
10 2 GND GND1 9 10 10
DTX0N 2 GND GND1 9 DTX0N
10
DPD_2P DPD_2P
10 1 B Y2 10 10 10
DTX0P 1 B Y2 10 DTX0P 10
A Y1 A Y1
RCLAMP0524P RCLAMP0524P DNI

XXXV34120 XXXV34120
AUX2P_DPA DDC4CLK_HDMI_C
D1709 2 1 ESD5V3U1U-02LRH 10
D1862 2 1 ESD5V3U1U-02LRH DNI 10
AUX2N_DPA
D1708 2 XXXV34120
1 ESD5V3U1U-02LRH 10
DDC4DAT_HDMI_C
D1863 2 XXXV34120
1 ESD5V3U1U-02LRH DNI 10
XXXV34120
DPA_DONGLE_DET
D1707 2 1 ESD5V3U1U-02LRH 10 XXXV34120
XXXV34120

MS-V341
MSI
Custom 0010 ELLESMERE TMDPCD DP HDMI 2.0

(11) ELLESMERE LVTMDP E/F
00
U1M
M
0
PART 13 OF 18 +3.3V_DPF
RD 17 SI
J1800
+3.3V_BUS
F1800
DPF_C0P DPF_0P
TX2P_DPF0P BC21 C1801 0.1uF 6.3V 11 1 ML_Lane_0p DP_PWR 20 2 1
1.5A
DPF_C0N DPF_0N
TX2M_DPF0N BB21 C1802 0.1uF 6.3V 11 3 ML_Lane_0n C1817 C1840
22uF 100uF
DPF_C1P DPF_1P 6.3V 6.3V
TX1P_DPF1P BB20 C1805 0.1uF 6.3V 11 4 ML_Lane_1p
DPF_C1N DPF_1N
BC20 C1806 0.1uF 6.3V 11 6
(C 96 C
TX1M_DPF1N ML_Lane_1n
DPF_C2P DPF_2P
TX0P_DPF2P BA20 C1807 0.1uF 6.3V 11 7 ML_Lane_2p
DPF_C2N DPF_2N
TX0M_DPF2N BA19 C1808 0.1uF 6.3V 11 9 ML_Lane_2n
DPF_C3P DPF_3P
TXCFP_DPF3P BC19 C1809 0.1uF 6.3V 11 10 ML_Lane_3p
SCREW1800
SCREW
)2 7 ON
DPF_C3N DPF_3N
TXCFM_DPF3N BB19 C1810 0.1uF 6.3V 11 12 ML_Lane_3n
DDCCLK_AUX1P AUX1P_DPC
C1811 0.1uF 6.3V AUX1P_DPC
11 15 AUX_CHp
2
R1802 1 100K 5%
DDCDATA_AUX1N AUX1N_DPC
C1812 0.1uF 6.3V AUX1N_DPC
11 17 AUX_CHn
AUX1P AV23 2
R1803 1 100K 5% +3.3V_DPF
AUX1N AW23 Q1801B

12N7002DW 6 19
F
PWR_RTN
0
DDC1CLK AT23 G1 G1
6
UNNAMED_11_ELLESMEREL4_I94_DDC1CLK
HPD_DPF
R1804 R1805
Q1800A 2 R18071 2
10K 5% 18 Hot_Det G2 G2
DDC1DATA AR23 4 3 10K 10K

MMDT3904-7 G3 G3
UNNAMED_11_ELLESMEREL4_I94_DDC1DATA
5% 5%
Q1801A R18081 2 G4
石 17 jo ID
10K 5%
2
OUT
HPD6 7 G4
2N7002DW 2
1
GND_0
TMDP
GND_1 5
3
AUX1_BYPSS_EN DPF_DONGLE_DET
1 13 8
5
CONFIG 1 GND_2
GND_3 11
E
3
Q1800B 5 Q1804 2
R1801 11M 5% R18061 5.1M
2 5% 14 UNNAMED_11_DISPLAYPORT_I195_PIN14 16
/ CONFIG 2 GND_6
2
MMDT3904-7 2N7002E
DP_W/GASKET
4
阿 09 ne EN TX5P_DPE0P BA25
J1900
+3.3V_DPDC
鋒 19 pe TI
+3.3V_BUS
TX5M_DPE0N BA24 F1900
DPE_C0P DPE_0P
C1901 0.1uF 6.3V 11 1 ML_Lane_0p DP_PWR 20 2 1
TX4P_DPE1P BC24 1.5A
DPE_C0N DPE_0N
C1902 0.1uF 6.3V 11 3 ML_Lane_0n C1917
TX4M_DPE1N BB24 22uF
DPE_C1P DPE_1P 6.3V
C1905 0.1uF 6.3V 11 4 ML_Lane_1p
TX3P_DPE2P BB23
DPE_C1N DPE_1N
C1906 0.1uF 6.3V 11 6 ML_Lane_1n
02 i( AL
TX3M_DPE2N BC23
DPE_C2P DPE_2P
C1907 0.1uF 6.3V 11 7 ML_Lane_2p
TXCEP_DPE3P AY23
DPE_C2N DPE_2N
C1908 0.1uF 6.3V 11 9 ML_Lane_2n
TXCEM_DPE3N AY21
DPE_3P
DPE_C3P
C1909 0.1uF 6.3V 11 10 ML_Lane_3p
SCREW1900
DPE_3N SCREW
DPE_C3N
C1910 0.1uF 6.3V 11 12 ML_Lane_3n
DDCAUX3P AU27
DDCCLK_AUX3P AUX3P_DPC
(0
C1911 0.1uF 6.3V 11 15 AUX_CHp
AV27 2
R1902 1 100K 5%
裴
DDCAUX3N DDCDATA_AUX3N AUX3N_DPC
C1912 0.1uF 6.3V AUX3N_DPC
11 17 AUX_CHn
2
R1903 1 100K 5% +3.3V_DPDC
Q1901B Q1902B
REV 0.90 12N7002DW 6 6 1
2N7002DW
PWR_RTN 19
G1 G1
6
ellesmere_l4
00 RM 亮
HPD_DPE
4 3 3 4 R1904 R1905
Q1900A 2 R19071 2
10K 5% 18 Hot_Det G2 G2
UNNAMED_11_MOSN_I219_D UNNAMED_11_NPN_I241_B
Q1901A Q1902A 10K 10K

MMDT3904-7 G3 G3
5% 5%
2N7002DW 2N7002DW R19081 2
10K 5% G4
2
2
OUT
HPD4 7 G4
AUX3_BYPSS_EN
2
1
GND_0
5
5
GND_1
3
DPE_DONGLE_DET
1 11 13 CONFIG 1 GND_2 8
GND_3 11
3
R1906 5.1M 5%
Q1900B 5 Q1904 2
R1901 11M 5% 1 2 14 CONFIG 2 GND_6 16
UNNAMED_11_DISPLAYPORT_I255_PIN14
68 A工樂
2
MMDT3904-7 2N7002E
DP_W/GASKET
4
6140073700G

j1800
11
76 程
DPE_0P
) 5
D1900
6
DPE_0P
11
0)
DPE_0N DPE_0N
11 4 D Y4 7 11
D1800
3 C Y3 8
DPF_0P DPF_0P DPE_1P DPE_1P
11 5 6 11 11 2 GND GND1 9 11
DPF_0N DPF_0N DPE_1N DPE_1N
11 4 D Y4 7 11 11 1 B Y2 10 11
課
3 C Y3 8 A Y1
DPF_1P DPF_1P
11 2 GND GND1 9 11 RCLAMP0524P
DPF_1N DPF_1N
11 1 B Y2 10 11
A Y1
D1902
RCLAMP0524P
DPE_2P DPE_2P
11 5 6 11
DPE_2N DPE_2N
11 4 D Y4 7 11
D1802
3 C Y3 8
DPF_2P DPF_2P DPE_3P DPE_3P
11 5 6 11 11 2 GND GND1 9 11
DPF_2N DPF_2N DPE_3N DPE_3N
11 4 D Y4 7 11 11 1 B Y2 10 11
3 C Y3 8 A Y1
DPF_3P DPF_3P
11 2 GND GND1 9 11 RCLAMP0524P
DPF_3N DPF_3N
11 1 B Y2 10 11
A Y1
RCLAMP0524P
AUX3P_DPC
D1909 2 1 ESD5V3U1U-02LRH
11
AUX3N_DPC
11
D1852 2
2
1
1
ESD5V3U1U-02LRH DNI
AUX1P_DPC
AUX1N_DPC
11
DPE_DONGLE_DET
11 17ci203
D1853 ESD5V3U1U-02LRH DNI 11
MS-V341
MSI
Custom 0011 ELLESMERE TMDPEF DP DP 2.0

(12) ELLESMERE POWER
00 M
+VDDC
T16
T17
T20
0
RD 17 SI
VDDC
VDDC
U1N
PART 14 OF 18
VDDC
VDDC
AE20
AE21
AE24
+VDDC +MVDD
E6
E12
E17
VMEMIO
VMEMIO
U1O
PART 15 OF 18
VDDCI
VDDCI
P21
P23
R16
+VDDCI
(C 96 C
VDDC VDDC VMEMIO VDDCI
T21 AD17 E20 R18
C1204
C1205
C1206
C1207
C1208
C1209
C1210
C1211
C1408
C1305
C1308
C1212
C1216
C1201
C1217
C1218
C1219
T24 VDDC VDDC AE25 E27 VMEMIO VDDCI R19
1
T25 VDDC VDDC AD20 E32 VMEMIO VDDCI R20
U16 VDDC VDDC AE28 47uF 47uF 47uF 47uF 47uF 47uF F5 VMEMIO VDDCI R24
4V 4V 4V 4V 4V 4V
U17 VDDC VDDC AD21 G11 VMEMIO VDDCI R25
U20 AE29 G15 R26
2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
U21 AD24 G19 R28
1uF
1uF
1uF
)2 7 ON
U24 VDDC VDDC AF16 G25 VMEMIO VDDCI T15
U25 VDDC VDDC AD25 G29 VMEMIO VDDCI T27
V16 VDDC VDDC AD28 G33 VMEMIO VDDCI T29
V17 VDDC VDDC AD29 J14 VMEMIO VDDCI U28
V20 VDDC VDDC AE16 J18 VMEMIO VDDCI V15
V21 VDDC VDDC AE17 J23 VMEMIO VDDCI V29
V24 AF17 J26 W15
C1222
C1223
C1224
C1225
C1226
C1227
C1228
C1412
C1230
C1231
C1232
C1233
C1235
C1236
C1279
V25 VDDC VDDC AF20 J30 VMEMIO VDDCI Y15
1
V28 AF21 L17 AA14
F
0
W16 VDDC VDDC AF24 47uF 47uF 47uF 47uF 47uF 47uF 47uF L20 VMEMIO VDDCI AC14
4V 4V 4V 4V 4V 4V 4V
W17 VDDC VDDC AF25 L24 VMEMIO VDDCI AD15
W20 AF28 L27 AE15
2
1uF
1uF
1uF
1uF
1uF
1uF
1uF
W21 AF29 L37 AF15
石 17 jo ID
1uF
W24 VDDC VDDC AG17 M5 VMEMIO VDDCI AG16
W25 VDDC VDDC AG20 M12 VMEMIO VDDCI AH15
W28 VDDC VDDC AG21 M39 VMEMIO VDDCI AH17
W29 VDDC VDDC AG24 N15 VMEMIO VDDCI AJ16
Y16 VDDC VDDC AG25 N19 VMEMIO VDDCI AJ18
Y17 VDDC VDDC AG28 N25 VMEMIO
Y20 VDDC VDDC AG29 N29 VMEMIO
C1239
C1240
C1243
C1244
C1246
C1282
C1330
C1332
C1420
C1421
C1427
C1429
C1320
C1325
C1326
C1329
Y21 AH18 P14
阿 09 ne EN
VDDC VDDC VMEMIO
1
Y24 VDDC P VDDC AH20 P30 VMEMIO P
Y25 O AH21 47uF 47uF 47uF P35 O
VDDC W VDDC VMEMIO W
4V 4V 4V
Y28 VDDC E VDDC AH22 R7 VMEMIO E
Y29 R AH23 R13 R
2
VDDC VDDC VMEMIO
1uF
1uF
1uF
1uF
1uF
AA16 AH24 R31
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
VDDC VDDC VMEMIO
AA17 VDDC VDDC AH25 R37 VMEMIO
AA20 VDDC VDDC AH26 U5 VMEMIO
鋒 19 pe TI
AA28 VDDC VDDC AJ19 V9 VMEMIO
AA29 VDDC VDDC AJ21 V35 VMEMIO
C1250
C1252
C1253
C1254
C1431
C1432
C1433
C1435
C1436
C1437
C1438
C1439
C1339
C1340
C1321
AB16 VDDC VDDC AJ22 W7 VMEMIO
AB21 VDDC VDDC AJ25 Y11 VMEMIO
02 i( AL
AB24 VDDC VDDC AJ26 Y33 VMEMIO
1uF
1uF
1uF
1uF
AB25 AJ27 AC9
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
1uF
VDDC VDDC VMEMIO
AB28 VDDC VDDC AJ28 AD11 VMEMIO
AB29 VDDC VDDC AH19 AE7 VMEMIO
AC16 VDDC VDDC AJ20 AE13 VMEMIO
AC17 VDDC AF9 VMEMIO
AC20 VDDC AG5 VMEMIO
AC21 VDDC AG11 VMEMIO
AC24 AJ7
C1259
C1260
C1263
C1442
VDDC VMEMIO
C1331
C1333
C1334
C1335
(0
AC25 VDDC AJ13 VMEMIO
AC28 AK9
裴
VDDC VMEMIO C1336
AC29 VDDC AK14 VMEMIO
10uF
4V
AD16 VDDC AL15 VMEMIO
AL19
22uF
22uF
22uF
22uF
VMEMIO
AM5
1uF
1uF
1uF
1uF
VMEMIO
AN7 VMEMIO
AN17 VMEMIO
00 RM 亮
AN20 VMEMIO
AR14 VMEMIO
AR18 VMEMIO
AU11
FB_VDDCI
VMEMIO
AU15 AK23
C1272
C1276
C1454
C1457
VMEMIO FB_VDDCI 16,24 OUT
AW12 VMEMIO
AW17 VMEMIO
68 A工樂
1uF
1uF
1uF
1uF
FB_VDDC_VR
76
C1468
C1469
C1278
REV 0.90
AL21
)
FB_VSSC 14,17,24 OUT
FB_VDDC
AK21
FB_VSS
14,24 OUT ellesmere_l4
程
REV 0.90
ellesmere_l4
1uF
1uF
1uF
0) 課
MS-V341
MSI
Custom 0012 ELLESMERE POWER 2.0

(13) ELLESMERE GROUND
U1Q
00
U1P
A2 VSS AE22 VSS VSS AV40

A6 R23 AE23 AW2
M
VSS VSS VSS VSS
A11 VSS VSS R27 AE26 VSS VSS AW5
0
A19 VSS VSS R30 AE32 VSS
RD 17 SI
A33 VSS VSS R43 AF3 VSS VSS AW30
A38 VSS VSS T18 AF6 VSS VSS AW32
A42 VSS VSS T19 AF8 VSS VSS AW33
B1 VSS VSS T22 AF12 VSS VSS AW35
B17 U2 AF23 AW41
(C 96 C
VSS VSS VSS VSS
B20 VSS VSS U8 AF26 VSS VSS AW43
B24 VSS VSS U14 AF27 VSS VSS AY3
B36 VSS VSS U19 AF40 VSS VSS R22
B39 VSS VSS U22 AF41 VSS VSS AG15
B42 VSS VSS U23 AG2 VSS VSS AV6
)2 7 ON
B43 VSS VSS U26 AG8 VSS VSS AV29
C5 VSS VSS U27 AG10 VSS VSS AW26
C9 VSS VSS U29 AG14 VSS
C14 VSS VSS U30
C23 VSS VSS V3 AG22 VSS
C30 V12 AG26
F
VSS VSS VSS
0
D6 VSS VSS V22 AG35 VSS
D11 V23 AG37
石 17 jo ID
VSS VSS VSS
D15 VSS VSS V26 AG40 VSS
D19 VSS VSS V27 AH16 VSS
D25 VSS VSS V30 AJ1 VSS
D29 VSS G VSS V32 AJ4 VSS
D33 VSS N VSS V37 AJ10 VSS
D38 VSS D VSS W1 AJ14 VSS
D41 VSS VSS W4 AJ15 VSS
E3 W10 AJ17 G
阿 09 ne EN
VSS VSS VSS
E5 VSS VSS W18 AJ32 VSS N
E8 VSS VSS W19 AJ36 VSS D
E24 VSS VSS W22 AJ40 VSS
E36 VSS VSS W23 AK3 VSS
F1 VSS VSS W34 AK15 VSS
鋒 19 pe TI
F21 VSS VSS Y2 AK32 VSS
02 i( AL
F35 VSS VSS Y19 AL23 VSS
F43 VSS VSS Y26 AM2 VSS
H2 VSS VSS Y27 AM8 VSS
(0
H24 AA3 AM35
裴
VSS VSS VSS
H26 VSS VSS AA6 AM37 VSS
H27 VSS VSS AA9 AM40 VSS
H32 VSS VSS AA12 AN1 VSS
J3 VSS VSS AA19 AN24 VSS
00 RM 亮
J6 VSS VSS AA22 AN27 VSS
J9 VSS VSS AA23 AN33 VSS VSS AY15
J38 VSS VSS AA32 AP15 VSS VSS AY25
J41 VSS VSS AA33 AP19 VSS VSS AY41
K15 VSS VSS AA36 AP25 VSS VSS BA4
K19 VSS VSS AA40 AP29 VSS VSS BA9
K25 AB15 AP30 BA14
68 A工樂
VSS VSS VSS VSS
K27 VSS VSS AB18 AR3 VSS VSS BA18
K29 VSS VSS AB19 AR6 VSS VSS BA21
L1 VSS VSS AB22 AR9 VSS VSS BA23
L12 VSS VSS AC3 AR36 VSS VSS BA30
76
L40 AC15 AT2 BA35
)
VSS VSS VSS VSS
L43 VSS VSS AC18 AT5 VSS VSS BA36
M2 AC19 AT12 BA38
程
VSS VSS VSS VSS
M8 VSS VSS AC22 AT17 VSS VSS BA39
M11 VSS VSS AC23 AT21 VSS VSS BA40
M18 VSS VSS AC26 AT26 VSS VSS BB1
0)
課
M42 VSS VSS AD2 AT42 VSS VSS BB42
P3 VSS VSS AD5 AT43 VSS VSS BB43
P6 VSS VSS AD8 AU18 VSS VSS BC2
P24 VSS VSS AD23 AV1 VSS VSS BC42
P27 VSS VSS AD26 AV4 VSS
R1 VSS VSS AD40 AV32 VSS
R4 VSS VSS AE1 AV33 VSS
R17 VSS VSS AE18
R21 VSS VSS AE19
REV 0.90

ellesmere_l4
REV 0.90
ellesmere_l4
MS-V341
MSI
Custom 0013 ELLESMERE GND 2.0

VDDC_PWM1
15 OUT
+3.3V_BUS VDDC_PWM2
00
15 OUT
VDDC_PWM3
15 OUT
C500 C501
VDDC_PWM4
15
1uF 0.1uF
10V 16V OUT
VDDC_PWM5
M
15 OUT
VDDC_PWM6
VDDCGND
0
15 OUT
RD 17 SI
15
VDDC_RCS_P 15
1
(C 96 C
715R
R587
1%
2
1
)2 7 ON
R581 C655
5.9K 82pF
VDDC_RCS_N 1% 50V U500
39
R588
1 2
2
15
VCC
15
10K
1 2 41 RCSP_L2 29
1%
PR526
715R 1% PWM1
UNNAMED_43_CHL8338_I101_RCSPL2
40 RSCM_L2
UNNAMED_43_CHL8338_I101_RSCML2
PR561
PWM2 30 1 2DNI
38
F
VSEN_L2 0R
0
37 VRTN_L2 PWM3 31 VDDCGND
VDDCGND
IR3567B_RCSP PR564
2 32 1 2DNI
IR3567B_RCSM RCSP PWM4
3
石 17 jo ID
VDDC_LOC_P R577 IR3567B_VSEN RCSM
PR563
0R
1 2 33 1 2DNI
IN 15 PWM5
6
FB_VDDC_VR R560
100R IR3567B_VRTN VSEN
PR562
0R
1 2 7 34 1 2DNI
IN FB_VSSC 12,17,24 R561
C651
IR3567B_ISEN1 VRTN PWM6
1 2 0.0033uF VDDCGND
IN 12,24 0R 50V PR519 PR557
0R
1 2 54 36 1 2DNI VDDCGND
VDDC_LOC_N
0R IR3567B_IRNT1 ISEN1 PWM1_L2
UNNAMED_43_CHL8338_I101_PWM1L2
R578
1 2 55 VDDCGND VDDCGND
IN 15 IR3567B_ISEN2 0R IRTN1 0R
PR558
52 35 1 2DNI
VDDC_I1_P 100R IR3567B_IRTN2 ISEN2 PWM2_L2
UNNAMED_43_CHL8338_I101_PWM2L2
R514
1 2 53
IN 15 IR3567B_ISEN3
阿 09 ne EN
IRTN2 0R
50 VDDCGND
VDDC_I1_N 301R 1%
1
R519
2
IR3567B_IRTN3
51
ISEN3
IN 15 IR3567B_ISEN4
48
IRTN3
28
VDDC_I2_P 1
R553
2
301R 1% IR3567B_IRTN4
49
ISEN4 VARGATE
IN 15 IR3567B_ISEN5
46
IRTN4
VDDC_I2_N 301R 1%
1
R558
2
IR3567B_IRTN5
47
ISEN5
IN 15 IR3567B_ISEN6
1
IRTN5
11
VDDC_I3_P 301R 1%
IR3567B_IRTN6 ISEN6 VRDY1
UNNAMED_43_CHL8338_I101_VRDY1
R545
1 2 56
IN 15 IRTN6
鋒 19 pe TI
PR567 PR565 PR520
1 2 1 2 1 2 4
VDDC_I3_N 301R 1%
1
R562
2 1
PR525
2 42 ISEN1_L2
VRDY2
IN 15 0R 0R 0R
IR3567B_CFP
UNNAMED_43_CHL8338_I101_ISEN1L2
43 IRTN1_L2 5
VDDC_I4_P 301R 1% 0R CFP TP506
UNNAMED_43_CHL8338_I101_IRTN1L2
R546 R520
1 2 1 2 44 ISEN2_L2
IN 15 NOPN
1
UNNAMED_43_CHL8338_I101_ISEN2L2
45 IRTN2_L2
VDDC_I4_N 301R 1% 0R R526 R555
UNNAMED_43_CHL8338_I101_IRTN2L2
R563
1 2 4.99K 4.99K
IN 15 9
1% 1%
VDDC_I5_P R547
301R 1% TSEN1
PR538
1 2
15
2
IN
1
02 i( AL
10K
1 2 27 13
1%
VDDC_I5_N 301R 1% TSEN2 NC R557
VDDC_PWR_GOOD
UNNAMED_43_CHL8338_I101_TSEN2
R564 R531
1 2 VDDCGND 15 75R 1 2
IN 15 IR3567B_VINSEN
14
NC
26
1% 21 OUT
VDDC_I6_P 1
R559
2
301R 1% VINSEN NC 0R
15
2
IN
24
VDDC_I6_N 301R 1%
1
R565
2 25
SM_DIO
IN 15 SM_CLK
10
IR3567B_V18A
301R 1%
IR3567B_VDDIO V18A
16 VDDIO
18 SV_CLK C507 C510
(0
19 4.7uF 0.47uF
SV_DIO IR3567B_SM_ALERT#
1
6.3V 6.3V
23
裴
SM_ALERT# R599 R535
21 4.7K 4.7K
VDDC_TSEN_P R567 IR3567B_ADDR_PROT EN
1 2 UNNAMED_43_CAP_I51_A 22 VDDCGND
IN 15 IR3567B_PWROK ADDR_PROT
12
2
0R PWROK
1
R536
IR3567B_SVT
13K
C511 SVT 17
1%
00 RM 亮
0.1uF
VDDC_TSEN_N IR3567B_VTHOT_ICRIT#
1
R537 16V R539
1 2 20 1 2
15
2
IN R538 C512 VTHOT_ICRIT#

R598 VDDC_VDDCI_SVT
VDDCGND 845R 0.01uF 1 2 8
0R 1% 16V 0R OUT
THMPAD 58 DNI 0R
59
2
THMPAD C521
THMPAD 60 0.1uF
16V
THMPAD 61
VDDCGND
THMPAD 62
63
68 A工樂
THMPAD
THMPAD 64 VDDCGND
GND 57
RRES
IR3567B GPIO_5_REG_HOTB
VDDCGND
8
7 OUT
DNI
+12V_EXT_A_F
C513
1
R511
1000pF 1 2 VDDC_VDDCI_OCP_L
C514 R540 17 OUT
76
50V
1
R548 213K 1% R541 0.01uF 7.5K
0R
1K 16V 0.1%
)
1%
1
2
R584 R589
4.7K 4.7K
程
VDDCGND VDDCGND
2
REGLTR_SDA
IN 17,22,24
0)
REGLTR_SCL
IN 17,22,24
DNI DNI
C633 C635
47pF 47pF
課
50V 50V
+1.8V
VDDCGND
R542
1 2
0R
C515
0.1uF
DNI DNI
1
16V
R515 R517
VDDCGND 10K 10K
1% 1%
VDDC_VDDCI_SVC R568
8,22
2
IN
VDDC_VDDCI_SVD 0R
R571
8,22
IN
0R NS500
DNI DNI DNI DNI 2 1
1
R516 R518 C519 C520 NS501

10K 10K 0.1uF 0.1uF
DNI DNI 2 1
1
1% 1% 16V 16V
R543 C518 NS502
1
100K 1000pF 2 1
2
50V R594
VDDCGND 10K
1% NS503
VDDCGND VDDCGND 2 1
2
DNI
VDDC_VDDCI_OE_VR
VDDCGND

2
NS504
21
2 1
IN
MS-V341
R590
1 2 NS505
0R 2 1
MSI
C656
0.01uF VDDCGND
16V
VDDC_VDDCI_PWROK
IN 21
VDDCGND
Custom 0014 VDDC CONTROL 2.0

VDDC
00 M
0
RD 17 SI VDDC_TSEN_P
14 OUT
1
VDDC_TSEN_N
PLACE NEXT TO PHASE 3 HALF BRIDGE
R624
14
47K
1% OUT
(C 96 C
2
+12V_EXT_A_F VDDC_I2_P
VDDC_I1_P +12V_EXT_A_F 14 OUT
14 OUT VDDC_I2_N
VDDC_I1_N 14 OUT
14 OUT
C696 C601
1
5
6
7
8
9
+ + 1uF 0.1uF 66.3A
C667 C517 C673 PC517 PC521 C687 C584 C691
5
6
7
8
9
16V 16V
66.3A
)2 7 ON
270uF 10uF 10uF 1uF 0.1uF 270uF 10uF 10uF
16V 16V 16V 16V 16V VDDC_PHS1_UG 16V 16V 16V R632
Q511 C698
Q505 C682 1 2 4 MDU1514U
NS514 1
R634 22.05K 11% 2
UNNAMED_44_MOSN4D3STH_I496_G4 UNNAMED_44_NETSHORT_I497_N2
+12V_EXT_A_F
R617
1 2 4 MDU1514U 1
R621 22.05K 11% 2
2
2
0R 5% NS517
2
UNNAMED_44_NETSHORT_I443_N2
0.22uF 25V
R29
1 2
10K
5%
0R 5% NS506 NS509 +12V_EXT_A_F VDDC_PHS2_BOOT
2
R608
R528
R626
R53
2.2R
2.2R
0.22uF 25V
1 2 1 2 1 2 1 2
10K
5%
5%
5%
VDDC_PHS1_BOOT VDDC_PHS2_SWNODE L1
UNNAMED_44_CAP_I384_A UNNAMED_44_CAP_I454_A UNNAMED_44_CAP_I491_A
R504
1 2 1 2
1
2
3
1
VDDC_PHS1_SWNODE L502 1R C599
1 2 0.22uF
1
2
3
1
PC518 1R C545 PC694 25V 0.22uH
1uF 0.22uF 1uF
0.22uH
1
16V 25V 16V
1 BOOT HI_GATE 10 R42 C603
UNNAMED_44_CHL8510_I463_HIGATE
VDDC_PWM2
1 10 4 9 2.2R 0.1uF
VPVCC_EXT VDDC_PHS2_LG
BOOT HI_GATE C569 VCC SWITCH
F
R508 16V
VDDC_PWM1
4 9
14
0.1uF 1 2 3 6
VPVCC_EXT
0
VCC SWITCH VDDC_PHS1_LG IN PWM LO_GATE
5
6
7
8
9
UNNAMED_44_CHL8510_I463_PWM
R501 16V
14
1 2 3 6
2
IN PWM LO_GATE R12 0R
5
6
7
8
9
0R
2.2R 2 HVCC MODE 8 Q509
UNNAMED_44_CHL8510_I463_MODE
2 8 5
U506 7 4 MDU1517
HVCC MODE Q502 LVCC GND
5
U502 7 4 11
MDU1517
2
石 17 jo ID
LVCC GND GND
1
GND 11 C694 C589 CHL8510CR R628
1
4.7uF 0.1uF 0R
C676 C524 CHL8510CR R611 16V 16V C642
4.7uF 0.1uF 0R 1000pF
1
2
3
16V 16V C638 50V
1000pF
1
2
3
2
50V
阿 09 ne EN
VDDC_RCS_P
PLACE BETWEEN PHASE 1 AND 2 INDUCTORS 14
VDDC_RCS_N OUT
1
R620
+12V_EXT_A_F 14
10K
1% OUT
+12V_BUS_F
VDDC_I3_P VDDC_I4_P
2
14 OUT 14 OUT
VDDC_I3_N VDDC_I4_N
14 OUT 14 OUT
鋒 19 pe TI
C680 C549 VDDC_PHS3_UG
1
5
6
7
8
9
1
+ 1uF 0.1uF 66.3A +
C668 C8 C672 C688 C585 C692 PC600 C600
5
6
7
8
9
16V 16V
270uF 10uF 10uF 270uF 10uF 10uF 1uF 0.1uF 66.3A
16V 16V 16V Q506 16V 16V 16V 16V 16V VDDC_PHS4_UG
4 MDU1514U
C683 Q510 C697
+12V_EXT_A_F
R618 R631
1 2 1
R622 22.05K 11% 2 1 2 4 MDU1514U 1
R633 22.05K 11% 2
2
2
UNNAMED_44_NETSHORT_I411_N2 UNNAMED_44_NETSHORT_I480_N2
+12V_BUS_F
0R 5% NS507 NS510 0R 5% NS513 NS516
2
R609
R529
R625
2.2R
2.2R
0.22uF 25V 0.22uF 25V
1 2 1 2 1 2 1
R28
2
10K
10K
5%
5%
5%
5%
VDDC_PHS3_BOOT VDDC_PHS4_BOOT
R50 R52
1 2 1 2
1
2
3
L503 VDDC_PHS4_SWNODE L505
UNNAMED_44_CAP_I374_A UNNAMED_44_CAP_I464_A
1 2 1 2
1
2
3
1
PC677 1R C546 PC693 1R C598
02 i( AL
1uF 0.22uF 1uF 0.22uF
16V 25V VDDC_PHS3_SWNODE 0.22uH 16V 25V 0.22uH
1 BOOT HI_GATE 10 C570 1 BOOT HI_GATE 10 C602

UNNAMED_44_CHL8510_I373_HIGATE UNNAMED_44_CHL8510_I460_HIGATE
VDDC_PWM3
4 9
VDDC_PWM4
0.1uF 4 9 0.1uF
VPVCC_EXT VDDC_PHS3_LG VPVCC_BUS VDDC_PHS4_LG
VCC SWITCH 1
16V VCC SWITCH 16V
R4 R507
14
1 2 3 6
14
1 2 3 6
IN PWM LO_GATE R14 IN PWM LO_GATE
5
6
7
8
9
5
6
7
8
9
1
UNNAMED_44_CHL8510_I373_PWM UNNAMED_44_CHL8510_I460_PWM
100A 2.2R
0R 0R R41
2 HVCC MODE 8 Q503 2 HVCC MODE 8 Q508
2.2R
UNNAMED_44_CHL8510_I373_MODE UNNAMED_44_CHL8510_I460_MODE
5
U503 7 4 5
U505 7 4
MDU1517 MDU1517
2
LVCC GND LVCC GND

11 11
2
GND GND
1
C677 C525 CHL8510CR R612 C693 C588 CHL8510CR R627
4.7uF 0.1uF 0R 4.7uF 0.1uF 0R
C639 C641
(0
16V 16V 16V 16V
1000pF 1000pF
1
2
3
1
2
3
50V 50V
裴
2
2
+12V_BUS_F VDDC_I5_P +VDDC
14 OUT
VDDC_I5_N
14 OUT
00 RM 亮
VDDC_PHS5_UG
5
6
7
8
9
66.3A
C529 C681 C550
1
1
+ 10uF 1uF 0.1uF
C669 C522 16V 16V 16V Q507 R54
270uF 10uF 4 MDU1514U
C684
100R
16V 16V R619
1 2 NS508 1
R623 22.05K 11% 2
2
2
0R 5%
2
R530
+12V_BUS_F 0.22uF 25V

1 2
10K
5%
VDDC_PHS5_BOOT NS511
2
R610
R506
2.2R
1 2 1 2 VDDC_PHS5_SWNODE
5%
1
2
3
L504
1 2
1
1R C547
0.22uF
1
68 A工樂
PC678 0.22uH NS512 NS515
2
25V
1uF
16V
VDDC_PWM5
1 BOOT HI_GATE 10 C571
1
4 9 0.1uF
VPVCC_BUS
1
VCC SWITCH VDDC_PHS5_LG R533 16V
VDDC_LOC_P
R46
14
1 2 3 6 2.2R
IN PWM LO_GATE
5
6
7
8
9
0R
2 8 14 OUT
VDDC_LOC_N
2
HVCC MODE Q504

U504
14
5 7 4 MDU1517
LVCC GND
OUT
GND 11 C640
1
1000pF
C678 C526 CHL8510CR R613 50V
4.7uF 0.1uF 0R
76
16V 16V
1
2
3
)
2
程
C533 C539 C543 C551 C906 C555 C557 C559 C561 C3 C5 C6 C572 C574 C576 C578
1
+ + + + + 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
C504 C506 C16 C516 C25 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
820uF 820uF 820uF 820uF 820uF
2.5V 2.5V 2.5V 2.5V 2.5V
0)
+12V_BUS_F
VDDC_I6_P 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm
14
2
2
OUT
VDDC_I6_N
14 OUT
課
1
5
6
7
8
9
+ 66.3A
C685 C537 C542 C10 C14
270uF 10uF 10uF 1uF 0.1uF Q515
16V 16V 16V 16V 16V VDDC_PHS6_UG
4 MDU1514U
C582
R522
1 2 1
R51 22.05K 11% 2
2
C534 C540 C544 C905 C554 C927 C558 C560 C562 C2 C913 C29 C31 C575 C577 C579
1
1
+12V_BUS_F + + 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF
0R 5% C15 C17
2
2
R652
4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V 4V
2.2R
R47
0.22uF 25V
1 2 1 2 560uF 560uF
10K
5%
5%
VDDC_PHS6_BOOT
R655 2.5V 2.5V
NS1
NS2
1 2
1
2
3
VDDC_PHS6_SWNODE L506 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm
1 2
1
PC643 1R
1uF U508 0.22uF
16V 25V 0.22uH
C13
1 BOOT HI_GATE 10 C580
VDDC_PWM6
4 9 0.1uF
VPVCC_BUS VDDC_PHS6_LG
VCC SWITCH
1
R502 16V
14
1 2 3 6
IN PWM LO_GATE R689
5
6
7
8
9
2.2R
0R
2 HVCC MODE 8 Q516
5 7 4 MDU1517
2
LVCC GND
GND 11
1
C643 C657 CHL8510CR R656

4.7uF 0.1uF 0R
16V 16V C7
1000pF
1
2
3
50V
2
17ci203
MS-V341
MSI
Custom 0015 VDDC 2.0

+VDDCI_IN
00 M
PLACE NEAR HALF BRIDGE
0
1
+
C699 C605 C607 C503A
RD 17 SI
270uF 10uF 10uF 1uF
16V 16V 16V 16V C613
0.1uF
16V
2
5
6
7
8
9
66.3A
(C 96 C
VDDCI_PHS_UG R57
Q513
16 1 2 4 MDU1514U
0R 5% +VDDCI
R58
10K
1 2 UNNAMED_45_MOSN4D3STH_I70_G4
5%
L500
VDDCI_PHS_SWNODE 1 2
1
2
3
16
1.0uH
1
+
C616 C618 C619 C620 C621 C622 C623
1
+
)2 7 ON
560uF 22uF 22uF 22uF 22uF 22uF 22uF
C617 2.5V 4V 4V 4V 4V 4V 4V R59
820uF 100R
2.5V
2
C615 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm 1.4 mm
5
6
7
8
9
0.1uF
2
1
100A 16V
VDDCI_PHS_LG R44
16 4 MDU1517 2.2R
Q512
2
F
C645
0
1000pF
1
2
3
50V
石 17 jo ID PLACE NEXT TO VDDCI PHASE INDUCTOR
阿 09 ne EN
+VDDCI
5%
R5006
NS100
0R
1 2 1 2
NS_VIA
FB_VDDCI
12,24
鋒 19 pe TI
IN
U2
VDDCI_PHS_SWNODE C5001
16
+VDDCI_B
1 BOOT PHASE 8 16
560pF
25V
02 i( AL
VDDCI_PHS_UG
UNNAMED_45_CAP_I59_B
16 2 UGATE COMP/EN 7 +VDDCI_COMP
R636
1 2 3 6 +VDDCI_FB
OCSET FB 16
22
24
21
UNNAMED_45_GS7253_I44_OCSET
0R 5%
1
PR636
1 2 4
VDDCI_PHS_LG
LGATE VCC 5 +VDDCI_VCC
16 R5001 R5002
10K 0R
3.48K 1% 1% 5%
10 GND GND 12 C610
9 11 0.1uF
2
VDDCI_PHS_LG GND GND 16V
(0
+VDDCI_FB
16
GS7256-ASO
OUT 22,24
裴
Place R1 and R4 close to
PWM and routed with
separate 20mil trace to
the ASIC
00 RM 亮
COMPENSATION CIRCUIT FILTERED SMPS VCC BOOT CIRCUIT
+VDDCI_COMP
+VDDCI_IN
+VDDCI_COMP
21 16
68 A工樂
+VDDCI_B
C5003 C5004
0.01uF 0.1uF
16
1
10V
C5002 PR637
1 +VDDCI_B
15pF 2.2R
1
50V 5%
R5003
34K +VDDCI_VCC
2
1% R56
0R
R5005
+VDDCI_FB
16 5%
1 2
2
16 22
0R 5% 24
2
PC610
76
0.1uF
1
)
R5004
0R
5%
程
C614
0.1uF
2
share pad of R3002,R3004

VDDCI_PHS_SWNODE 16
+12V_EXT_A_F +12V_BUS
REGULATOR FOR VPVCC RAILS
IOUT MAX = 500mA
0) 課 VPVCC_EXT
VPVCC_BUS
1
PR590
R1101 R1102
0R 0R 1 2
5%
0R
5% 5%
PR59
1 2
5%
2
0R
PR1105
UNNAMED_45_CAP_I2_A
1 2
5%
0R
MC78M08CDT
R1103
U1001
1 3 1 2
5%
0R
IN OUT
GND
TAB
C1000 C1001
22uF 1uF
17ci203
16V 16V C1002 C1003 C1004 C1005 C1006 C1007
1uF 0.1uF 47uF 22uF 22uF 22uF

2
16V 16V 16V 16V 16V 16V
MS-V341
MSI
Custom 0016 VDDCI 2.0

+3.3V_BUS +3.3V_BUS
00
1
U551
C1615 R1594
0.1uF 1 VCC VID0 8 13.3K
16V 1%
2 7
M
GND VID1 +1.8V_DAC R1596
3 6 1 2 UNNAMED_46_CAP_I53_A
2
SCL VREF
4 SDA R1 5 0R 5%
REGLTR_SCL
IN 14,22,24 C1621
1
RD 17 SI
GS8601-ATD
0.033uF +1.8V
R1595 16V
REGLTR_SDA 120K
IN 14,22,24 1%
1.8V REFERENCE DAC
2
INITIAL VOLTAGE = 1.8V
I2C ADDRESS 0XA6
1
R1616
11.3K
1%
2
(C 96 C
R1597
1 2
0R 5%
C1618
1
1000pF
R1617 50V
88.7K
1%
)2 7 ON
2
0
石 17 jo ID F U4500
LMV331
阿 09 ne EN
R4528
1 2
+5V_AUX
+5V
127K 1%
R4535
1 2
0R 5%
1
R4532
49.9K
1%
2
鋒 19 pe TI
+VDDC
R4531
1 2 1
2
MMBT3906T
Q4500
49.9K 1%
5
dni
2
NS4502
1
VDDC_OUT_A1 1
R4511
2 1 1
C4505
2
3
C4500 C4513
R4513
0R 1 2 1 2 0.1uF
16V
10pF 50V
4
V+
100R 1% C4504 PCC
1
1000pF 50V
VDDC_OUT_A2
10pF
FB_VDDC_VR
NS4503 R4533
1
R4501 50V
2 1 1 2 3 33.2K
R4516 C4506 7 OUT
V-
UNNAMED_46_RES_I26_B
1%
02 i( AL
1.5K 220pF
IN 12,14,24 0R 1% 50V
2
install
2
2
IN-
IN+
+12V_BUS
install
1
R4536
R4515 R4527 NC#5 5 TP4500
UNNAMED_46_LMP8640_I36_NC
0R R4526
VDDC_OUT_B1
5% NS4500
4.99K 10K 1 2 UNNAMED_46_CAP_I40_A
R34 1% 1%
2 1 1 2 V+ 6 100R 1%
2
0R
R64
(0
1 2
1
1
VDDC_OUT_B2
1
裴
R4507 R4508 NS4501 100R 1% VOUT R4506 C4502
UNNAMED_46_LMP8640_I36_VOUT
R4512
698R 698R 2 1 1 2 C4510
49.9K 0.1uF
1% 1% 1% 16V
0.1uF
0R dni 16V
V-
2
2
2
Gain 20
+5V_D
U4502
00 RM 亮
1
LMP8640MK
R4509
10K
REG4500
3
0.1%
TL431ACDBV
4
2
1.1mm
C4507 C4508
2.2uF 2.2uF
1
16V 16V
R4510
10K
68 A工樂
5
0.1%
2
VDDC_VDDCI_OCP_L
IN 14
+3.3V_BUS
76 程 )
0) 課
MS-V341
MSI
Custom 0017 PCC VDDC 2.0

(16) MVDD
00 M
0
RD 17 SI +MVDD_SOURCE
(C 96 C C718
1
0.15uF + +
C720 C721 PC720 PC721 C731 PC731
10uF 10uF 10uF 10uF 270uF 100uF
60 3
16V 16V
)2 7 ON
120 6 120 6
2
Input Bulk CAPs
Q701
5
6
7
F
+PW_MVDD_UGATE
0
1 R721 2 4
18 060 3
UNNAMED_31_MOSN2D3STH_I50_G4
0R 5%
NTMFS4C10N
石 17 jo ID
1
2
3
PL701
+MVDD
1 2
1.0uH
L701
+PW_MVDD_PHASE
18 1 2
1uH
阿 09 ne EN
1
+ +
C723 C724 C729 C730 C726 C732
0.1uF 0.015uF 22uF 22uF 820uF 470uF
1
4V 4V 2.5V 2V
R719 40 2 40 2 0805 6.3V 0805 6.3V
2.2R
2
5%
Q703 PQ703 C708
5
6
5
6
2
R722
+PW_MVDD_LGATE 50V
1000pF
鋒 19 pe TI
+PW_MVDD_LGATE_R +PW_MVDD_LGATE_R
1 2 4 4
5%
18
0R
18 18
NTMFS4C05N NTMFS4C05N Output MLCC Output Bulk CAPs

60 3
1
2
3
1
2
3
Place Rs and Cs across QL
02 i( AL
+MVDD
5%
NS703
1 R700 0R
2 1 2
NS_VIA
U701 +PW_MVDD_PHASE
+MVDD_B C713
18 1 BOOT PHASE 8 18
560pF
25V
+PW_MVDD_UGATE +MVDD_COMP
18 2 UGATE COMP/EN 7
(0
+MVDD_FB
R705
1 2 3 6
21 24
裴
OCSET FB 18
UNNAMED_31_GS7253_I30_OCSET
+MVDD_VCC 22
0R 5%
1
R715
1 2 4
+PW_MVDD_LGATE
LGATE VCC 5 18 R711 R713
10K 0R
3.48K 1% 1% 5%
10 GND GND 12 C703
+PW_MVDD_LGATE 9 11 1uF
2
GND GND 16V +MVDD_FB
18
00 RM 亮
GS7256-ASO
OUT 22,24
Place R1 and R4 close to
PWM and routed with
separate 20mil trace to
the ASIC
68 A工樂
COMPENSATION CIRCUIT FILTERED SMPS VCC BOOT CIRCUIT
+MVDD_COMP
+12V_EXT_A_F
+MVDD_COMP
21 18
C711 TC712 +MVDD_B

0.01uF 0.1uF
2.2R 18
1
76
10V
C712 R707
15pF 1 +MVDD_B
)
1
50V 5%
R712
34K +MVDD_VCC
2
程
1% R716
+MVDD_FB 0R
18 5%
R714
1 2
2
18 22
0R 5% 24
2
C707
0.1uF
1
0)
R709
0R
5%
C705
0.1uF
2
+PW_MVDD_PHASE
課
18

MS-V341
MSI
Custom 0018 MVDD 2.0

(17) 0.95V
00 M
0
RD 17 SI
(C 96 C
)2 7 ON
+12V_BUS
VDDC5V_08
1 22.2R
F
R905 5%
0
C931 C943
1
C960 1uF 0.1uF
C959
1
16V 16V
1uF
石 17 jo ID
4.7uF R900
16V 16V 2.2K
1
5%
2
R944
10K
2
5%
0.8V_PGOOD
2
7,21 OUT
C900
1 2
+0.8V
阿 09 ne EN
0.1uF 25V
L900
2.2uH
1 2
U900
DNI
C909
23
22
21
20
19
18
0.01uF
1
+
PR900 C938 C915 C916 C917 C910 C912 C919 PC919
ML900
PGND
VIN
VCC
LX
BOOT
SS
1 2.2R
2.2uH
0.1uF 22uF 22uF 22uF 22uF 22uF 22uF 470uF
POK 5% 2V
2 17 1 2
IN 0.8V_EN 21
2
EN LX
鋒 19 pe TI
3 16
NS900
PFM LX PC900
UNNAMED_32_GS9238_I21_PFM
4 AGND 15 50V C901
PGND R901 DNI DNI
5 FB 14 1 2 1 2
DNI PGND 1000pF
6 TON 13
1
68.1K 1%
1
PGND
UNNAMED_32_GS9238_I21_TON
0.0033uF 50V
R902 12
10K
PGND
1000pF
TC901
5%
AIN
VIN
VIN
50V
DNI
LX
LX
GS9238-ATQ-R
2
02 i( AL
7
8
9
10
11
PR903
R903
1 2 1 2
5%
0R
+0.8V_VIN R904
100K 1K 0.1%
1%
+0.8V_REG_FB
22 IN
C939 C914 C902 C903
(0
10uF 10uF 1uF 0.1uF
16V 16V 16V 16V
裴
00 RM 亮
68 A工樂
76 程 )
0) 課
MS-V341
MSI
Custom 0019 0.8V REG 2.0

(18) SMALL RAIL REGULATORS
00 M
LDO #1: VIN = 3.0V TO 3.6V MAX
PCB: 50 TO 70mm SQ. COPPER AREA FOR COOLING

0
RD 17 SI VOUT = +1.8V +/- 2% IOUT = 1.3A RMS MAX REGULATOR FOR +5V RAILS
IOUT MAX = 150mA
(C 96 C
+5V
+12V_EXT_A_F +12V_BUS
C404
22uF
16V
)2 7 ON
+3.3V_BUS +5V_VESA
1
R406
MR401 R401 0R
MU300 0R 0R MC78M05CDT 5%
1.8V_POK 5% 5%
21 20 1 POK GND 8 REG1
F400
1.8V_EN LDO1_FB
2
R307 1 1.8R 1% 2 7 1 3 1 2
2
20 1 21 EN FB 20 IN OUT
LDO1_VIN
20 3 VIN VOUT 6 +1.8V
20
200mA
2
R306 1 1.8R 1% 20
+5V 4 CNTL NC 5 24V
9
GND
TAB
GND C400 C425 C401 C403
2 1 1uF 1uF 1uF 22uF
F
R305 1.8R 1% C426
16V 16V 6.3V 16V
0
+1.8V 10uF
4
UP0104PDC8 6.3V
2
R304 1 1.8R 1%
Use 3x1.8R OVERLAP U300 AND MU300
石 17 jo ID
1206 1/2W +5V
0.5A per R
1
R302 C304 C301 C300 C303
U300 12.7K 33pF 10uF 10uF 0.1uF
1% 50V 6.3V 6.3V 6.3V
1 8
OUT
1.8V_POK 21 POK GND LDO1_FB
2 7
R5
20 FB
2
IN
1.8V_EN 1,21
LDO1_VIN
EN
20 3 VIN 20
VOUT 6 +1.8V
20 +5V 4 VDD NC 5
9
阿 09 ne EN
THMPAD
1
C312 C305 C306 R301
0.1uF 10uF 1uF 10K
6.3V 6.3V 10V GS7103-A 1%
DNI
R4
2
VOUT = Vref x (1 + R5/R4)
鋒 19 pe TI
02 i( AL
(0 裴
00 RM 亮
68 A工樂
76 程 )
0) 課
MS-V341
MSI
Custom 0020 SMALL RAIL REGULATORS 2.0

(19) POWER MANAGEMENT
+3.3V_BUS
optinal
00
+12V_BUS
1
R1023
10K
EN POK
1
5%
Gate : 1.88V ~ 2.29V R1009
+3.3V_BUS +3.3V_BUS 0.8V_EN
10K
19
2
OUT
M
NAND +1.8V: >1.4V
5%
2V +0.935V:>2.5V OD
2
0.7VDDC
3
BUS 12V and AUX A POWER UP SEQ
+3.3V_BUS
0.9v R10101 2
5.1K 5 Q1013B
1
+VDDC: 2.1Vh, 0.8VL
5% MMDT3904-7
R1008 R1006 C1111
RD 17 SI
+VDDCI: FLOAT
10K 10K 1uF
+MVDD: 2.0V
+12V_BUS 1% 5% 6.3V
4
1
6
R10071 2
5.1K 5% 2
2
OUT IN
1.8V_EN 1.8V_POK
R1031 1,20 Gate: 2V 20 Q1013A
5.11K MMDT3904-7
1%
1
3
5
1
R1002 Q210B C1011
N36200648
11.3K MMDT3904-7 1uF

1% 6.3V
C1009
6
12V_BUS_UP
2 0.1uF
4
(C 96 C
Q1010A 16V
PLACE CLOSE POWER UP SEQUENCE
MMDT3904-7 TO ITS CTLR
+12V_EXT_A
1
BUS RAILS (3.3V/12V UP) -> +1.8V -> 0.935V
1
R1004 BIF_VDDC
N32204028
1K VDDC -> VDDCI +VDDCI_COMP
1%
OUT
1
MVDD 16
2
R1030
11.3K
1%
)2 7 ON
3
6
12V_EXTA_UP
5 R10121 2
5.1K 2
5%
2
Q1010B Q1016A
MMDT3904-7 MMDT3904-7
1
+3.3V_BUS +12V_BUS
+0.8V
1
R1040
1K
1%
C1012
1uF
1
6.3V
R10221 2 0R
F
MR1011 R1011 R1016 5%
0
10K 10K
1K 5% 5%
5% 0.8V_PGOOD
R10251 2 0R 5%
2
7,19,21 OUT
石 17 jo ID
0.8V_PGOOD
3
1 7,19,21
R2777 2 0R 5% 1
R1017 25.1K 5% 1 Q1024
IN
+12V_EXT_A
DNI MMBT3904
+12V_BUS
C1021
J13 1uF
optinal
2
6.3V
4 R1014
3
+12V-1 5 22,21,23,24 1 10K 1% 5
IN
PX_EN
Q1016B
1
+12V-2 6 +3.3V_BUS MMDT3904-7

C5006 R1042 1.8V_POK 0.8V_EN
+12V-3 47pF 10K R17 1 2 0R 5%
阿 09 ne EN
50V 1% 21 20 21 19
MEC1 MEC1 R1015
4
C5005 0.8V_PGOOD VDDC_VDDCI_OE_VR 10K
MEC2 MEC2 10uF R12221 2 0R 5% 5%
2
IN 7,19,21 21 14
1
6
16V
R1019 2 Q1951A DNI
1
1 2.32K MMDT3904-7
C1015 R1115
1%
N32204141
GND-1 3 1uF 10K
0.3vddc C1010
3
PLACE CLOSE
3.3V_BUS_UP 6.3V 5%
GND-2 1 Q1009 0.1uF
2
1
TO ITS CTLR
16V
2
MMBT3904
2
1
鋒 19 pe TI
SENSE
2
DRAM_RSTA
R1020 R1088
3
1K 2 3,211 10K 1% 1 Q1077
IN
1%
PWRCONN6P_BLACK-RH-9 MMBT3904
COMMON
2
R1077
VVVV34120
2
10K
N93-06M0431-W06 +12V_BUS 5%
6 PIN
02 i( AL
1
反向
DNI R1635
MR2231 2 0R 5% +3.3V_BUS +VDDCI 10K
5%
2
R223 1 2 0R 5%
R911
10K R1627
0.8V_PGOOD 10K
INTERNAL CTF LATCH - 1.8V VDDCT REQUIRED +MVDD_COMP
6
6
(0
1 2 2.2K 5% 2 1 25.1K 2
7,19,21
R221 R1693 5%
IN IN
CTF_OUT 23,24 Q210A Q1604A
UNNAMED_42_RES_I564_B UNNAMED_42_CAP_I19_A
MMDT3904-7 MMDT3904-7
OUT
裴
R1628 10K 18
1
1
C1632
3
1uF 5 Q1604B
6.3V
+12V_BUS +3.3V_BUS MMDT3904-7
4
R4658
00 RM 亮
10K
R4657
UNNAMED_42_MOSP_I747_S
2
10K
1
UNNAMED_42_MOSP_I747_G
AO3415L
Q4600
+12V_BUS +3.3V_BUS
6
12,21,23,24 2 1K 2 Q4602A
68 A工樂
PX_EN R4627 5%
IN
3
GPIO_21
MMDT3904-7
OUT
1
7
31
R2635
1
1
R4629 2 1K 5% 5 Q4602B R4670 +MVDD 10K
IN
DRAM_RSTA 3,21 R2655
10K R4628 5%
10K
MMDT3904-7 10K VDDC_VDDCI_OE_VR 5%
2
14
2
OUT
76
R2627
+3.3V_BUS
10K
3
1
R2693 25.1K 5%
N54311143
2 Q2604A 5 Q2604B
MMDT3904-7 MMDT3904-7
4
C2632
1uF
6.3V
U1000B
5
0)
C4006
0.1uF
6.3V
3
課
NC7SZ08P5X PX_EN 1
2,21,23,24 R2666 210K 5% 1 Q2626
IN
3
MMBT3904
R2667
2
10K
5%
PERSTB_BUF
NC7SZ08P5X
2 VDDC_VDDCI_PWROK
IN 1,2,23
4 14 OUT
VDDC_PWR_GOOD 1
IN 14
U1000A

MS-V341
MSI
Custom 0021 POWER MANAGEMENT1 2.0

00 M
0
RD 17 SI
(C 96 C
)2 7 ON
+1.8V
SVI2 BOOT UP VOLTAGE

(VDDC/VDDCI)
F
R65 R1052 SVC SVD VOLTAGE
0
10K 10K
5% 5%
DNI 0 0 1.1V
8,14,22
VDDC_VDDCI_SVC
2
2
IN 8,14,22 OUT 0 1 1.0V
8,14,22
石 17 jo ID
VDDC_VDDCI_SVD
BI 8,14,22 BI 1 0 0.9V
1 1 0.8V
1
R1051 R1053
10K 10K
5% 5%
DNI
+12V_BUS INPUT +12V_EXT_A INPUT
2
+3.3V_BUS
阿 09 ne EN
+12V_BUS_F
+12V_BUS +12V_EXT_A +12V_EXT_A_F
DUAL
1
R1060 2 0R 5% REGLTR_SCL
14,17,24 OUT FOOTPRINT
1 14,17,24 2 0R
R1061 5% REGLTR_SDA
BI
1
R1058 R1059 R10941 2 0R 5%

10K 10K R10901 2
0R 5% DNI
5% 5%
R10911 2
0R 5% DNI R10951 2 0R 5%
8,22,248,22,24
SCL
2
IN OUT
鋒 19 pe TI
BI
SDA
8,22,24 8,22,24 BI L1080 1 2
0.47uH L1082 1 2
0.47uH
ML1082 +12V_BUS +MVDD_SOURCE
Irms=7A Idc=9.5A
1 2
+VDDCI_IN
0.47uH L1083 1 2
0.47uH
+12V_EXT_A_F
R10961 2 0R 5%
R10851 2 0R 5% R10971 DNI 2 0R 5%
ML1083
02 i( AL
R10861 2 0R 5% 1 2
0.47uH
MVDD OPTIONAL1
+12V_BUS_F
+12V_EXT_A
1
MR1085 2 0R 5% +MVDD_SOURCE
1
MR1086 2 0R 5% 1
MR1096 2 0R 5%
1
MR1097 2 0R 5%
(0
+VDDCI_FB
OUT
裴
16,24 MVDD OPTIONAL2
3
5 Q811A
1
2N7002DW R813
86.6K
1%
4
DNI
1
2
R812
86.6K
6
1%
00 RM 亮
2 Q811B
IN
GPIO_1 7 DNI R811
32.4K
2
2N7002DW 1%
1
1
R810
6
RFB2
GPIO_15 2 Q810B 32.4K

IN 7 1%
2N7002DW
2
3
GPIO_20 5 Q810A
1
IN 7
68 A工樂
2N7002DW
4
76 程 )
0) 課
18,24 +MVDD_FB
OUT
+12V_BUS
+3.3V_BUS
1
R450
MR4501
MR4511
2 0R
2 0R
2 0R
5%
5%
5%
+0.8V_VIN
1
R799 PR714
86.6K 32.4K
RFB2
1% 1%
+0.8V_REG_FB
DNI IN 19
2
2
GPIO_12_MVDD_VID 0.8V
3
1 Q1070
IN 7 R950
17.4K
2N7002 1%
DNI
1
R1057
10K
5%
DNI

+MVDD OUTPUT VOLTAGE
2
VOUT = VREFx(1+RFB/RFB2)
MS-V341
RFB2 = (RFBxVREF)/(VOUT-VREF)
MSI
Custom 0022 POWER MANAGEMENT2 2.0

(20) MECHANICAL AND THERMAL MANAGEMENT
00 M
+12V_BUS +12V_EXT_A
1
0
NR200
1
0R
OVERLAP 5% MB200 B200 MR200
RD 17 SI
220R 220R 0R
5%
2
12V_FAN
OVERLAP
2
1
R256
10K
5%
2
MC209
1
+1.8V
1 R253
10uF
UNNAMED_35_MOSP_I156_G
Q252 16V
B202 1 2 +TSVDD U1R
AO3415L
0R
08 0 5
5%
(C 96 C
120R
1
PART 18 OF 18 DNI
2
C200 C213 R255
1uF 0.1uF AR26 AC35 GPU_DPLUS 10K
6.3V 6.3V TSVDD DPLUS 24
IN 5%
2
C203 MMDT3904-7
D+ 0.0022uF
3
50V FAN_EN CTF_BACO CTF_OUT
AC34 GPU_DMINUS 2 Q251B 5 R264 1 2
2.2K
DMINUS 24
IN +3.3V_BUS +3.3V_BUS
23 21 24
AG33 PWM_B 5%
TEMPIN0
OUT
3
24
1 Q216 C216 C251 MMDT3904-7
T
)2 7 ON
MMBT3904 390pF 0.1uF Q251A
4
50V S 10V
1
R215 2 0R 5% D- AG34 TEMPINRETURN S
1
2
R200 R4502
F 20K 20K
D 5% 5%
O DNI
R220 1 2 0R 5% DIECRACKMON V14
2
TEST6
6
GPIO_28_TS_FDO R2482 1 20K 5% PWM 2 Q203A
TS_A +3.3V_BUS
TP62 AA30 TS_A GPIO_28_FDO AF31 MMDT3904-7
6
REV 0.90 PX_EN 1
R257 2
20K 5% 2
IN 2,21,24 Q250A
1
Q_OUT_R
MMDT3904-7
1
ellesmere_l4 R247
3
F
20K
TO PREVENT 1 2 5
0
R260 20K 5% Q250B
2
5%
D201 MMDT3904-7
FAN RUNNING
1
C252
FULL SPEED AT
DNI
BAT54KFILM 0.1uF
2
OUT OUT7 24
POWER UP
6.3V
4
DNI
R218 1 2 0R 5%
石 17 jo ID
PERSTB_BUF
IN 1,2,21,23
U200
IN CASE OF
+3.3V_BUS
INTERNAL PU 1 A VCC 8
2 B Rext/Cext 7
UNNAMED_35_74VC1G123_I137_REXT
PERSTB_BUF
1,2,21,23MR218 1 2 0R 5% 3 6
IN CLR Cext C253
UNNAMED_35_74VC1G123_I137_CLRN
Q2_OUT
4 GND Q 5 1 2 1
R261 2
1M 5%
10uF 6.3V
SN74LVC1G123DCT
BAV99
阿 09 ne EN
3
+3.3V_BUS +12V_EXT_A
1 2 HEADER IS 2MM
IT DOES NOT FOLLOW
2.54MM SPACING AS 4-PIN

+3.3V_BUS D222
1
PWM FAN SPECIFICATION
R228 R229
10K 10K
5% 5%
1
FAN_PWM
J4305
DNI
1
2
R244
5.1K GPIO_6_TACH 27,24
R232 11K TACH 2
OUT
鋒 19 pe TI
5% FANOUT_P MALE
1% 3 2.0MM
3
+3.3V_BUS
R2342 11K 5% 5 4 N/A
2
Q203B
1
MMDT3904-7 TOWS_TIN_BHEAD1X4_2MM
R235 COMMON
3.83K
1%
VVVV34120
4
N32-1040AA1-H06
2
1
FOR 4-WIRE FAN
R241
20K
5%
托錫點
2
02 i( AL
1
2
DNI
Q209
N65064848
MMBT3906
3
3
CTF_FAN
R213 1 2
2.2K 5% 1 Q206
MMBT3904
1
2
R240 R233 R242
20K 20K 1K
5% 5% 5%
2
CTF_THERM
IN
(0
24
裴
3
CTF_TRIP
R2362 1 4.7K 5% R2392 1 47K 5% 1
IN
GPIO_19_CTF
Q215
7
MMBT3904
1
C256 R214 C210

1uF 100K 1uF
6.3V 5% 6.3V
D200 C255
1 2 1uF
2
PERSTB_BUF
IN 1,2,21,23
6.3V
00 RM 亮
BAT54KFILM
CTF_OUT
1 2
21,24
R222 0R 5%
OUT
CTF BYPASS
68 A工樂 GP1
SK1
GP3
76
GND GND
GP2 GP4
GND GND
HEATSINKS
程 ) MT215 GP5 GND GP6
0)
GND
MT202 MT203 MT204 MT205 MT206 MT207
課
1 8 ASSY202
ELLESMERE_L4_SLT_SOCKET
1 81 81 81 81 8 1 8 NA SC R EW
2
3
4
5
6
7
SHROUD HOLE NA NA NA NA NA NA
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
7020003300G
SCREW203
SC R EW
MT208 MT209 MT211 MT212 MT213 MT214
ASSY201
BRACKET MT HOLES
BRACKET
1 81 81 81 81 8 1 8 DUAL
NA NA NA NA NA NA
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
2
3
4
5
6
7
8020056000G FM1 FM2 FM3 FM4
DP, HDMI, Stacked-DVI
CYPRESS_PRO_HEATSINK
HS2A
Curacao_fansinks
HS1A
OPT OPT OPT OPT
F_PAD_X F_PAD_X F_PAD_X F_PAD_X
CYPRESS_PRO_HEATSINK CYPRESS_PRO_HEATSINK CYPRESS_PRO_HEATSINK Curacao_fansinks Curacao_fansinks Curacao_fansinks
HS2B HS2C HS2D HS1B HS1C HS1D
7123B00100G
FM5 FM6 FM7
ASSY203 BKT1
BRACKET BRACKET
DUAL DUAL
OPT OPT OPT
9 17
16 25
24 32 9 17
16 25
24 32 F_PAD_X F_PAD_X F_PAD_X
SHROUD HOLE 8020056100G 802005610AG

1
2
3
4
5
6
7
8
10
11
12
13
14
15
18
19
20
21
22
23
26
27
28
29
30
31
1
2
3
4
5
6
7
8
10
11
12
13
14
15
18
19
20
21
22
23
26
27
28
29
30
31
DP, HDMI, Stacked-DVI W TAB
7120E87000G 83W
Barts Pro Channel Fansink

MS-V341
MSI
Custom 0023 MECHANICAL AND THERMAL 2.0

(21) DEBUG CIRCUITS
00 M
+1.8V
JTAG
0
RD 17 SI LM96163 FOR BACKUP THERMAL CONTROL
1
(C 96 C
R4017 R4007
10K 10K U1A
5% 5% +3.3V_BUS +3.3V_BUS +3.3V_BUS
PART 1 OF 18
J4003 +3.3V_BUS
2
BP_0 JTAG_TDO J4004

1 1
R4008 233R 5% AW24 BP_0 JTAG_TDO AD31
UNNAMED_36_CON03_I463_P1
BP_1 HEADER_RECEPT_2X4
2 1
R4009 233R 5% AV24 BP_1
1
JTAG_TDI
3 JTAG_TDI AD30 7 8 R4001 C4007
5 6 1K 1uF
1
5% 6.3V
)2 7 ON
JTAG_TMS
HEADER_1X3
JTAG_TMS AE31 3 4 R45 R39 R40
J 1 2
DNI 4.7K 4.7K 10K
2
5% 5% 5%
T
JTAG_TCK
JTAG_TCK AF30
A U4003
2
G +3.3V_BUS
AE30 TESTEN 10 1 TCRITB 223
R4016 10R 5%
IN OUT
DDCVGACLK CTF_THERM
TESTEN
1
8 SMBCLK TCRIT
GATE AM21 GATE R4002
JTAG_TRSTB
DRAIN AM20 AC30 R40031 2
1K 5% 1K DDCVGADATA 9 2
TP80
DRAIN JTAG_TRSTB DNI
5% BI 8 SMBDAT VDD
R40001 2
1K 5%
TP81
8 3
2
IN IN
REV 0.90 GPIO_6_TACH 7,23 TACH D_P 23 GPU_DPLUS
0
ellesmere_l4 THERM_INTB
2
R43 10R 5% 7 4
OUT IN
GPIO_17_THERM_INT 7 ALERT D_N 23 GPU_DMINUS
LM_PWM
6 5 223 1 33R
石 17 jo ID
R4015 5%
OUT
GND PWM PWM
DNI
TP4003
C4009 EPAD 11
0.01uF
TP4004 10V
DNI
LM96063
+3.3V_BUS
U4400
阿 09 ne EN
185V_OUT
1 VDD TACH CONNECTION IS FOR TESTING
5 EVDDQ
VOUT 2 OUT AND RPM MEASUREMENT ONLY
2 GND
1
4
E-FUSE CAPABILITY
R4488 10K NC C4317 C4318
1 2 3 EN 10uF 1uF
UNNAMED_36_GS7108_I558_EN
6.3V 6.3V
5% C4499
DEFAULT = GPIO-CONTROLLED 0.47uF
2
C4488
(MANUAL OPTION AS BACK-UP)
6.3V
0.47uF
6.3V GS7108-AST-185
鋒 19 pe TI
LED LIGHTS LED RED "ON" INDICATES CTF FAULT
+3.3V_BUS
D4000
CTF_LED CTF_LED_PWR
1 2 1
R4024 2100R 5%
3
2
1
RED
6
CTF_LED_ON
CTF_OUT 121,23,24
R4023 2 1K 5% 2 Q4000A
IN
J4304 MMDT3904-7
02 i( AL
HEADER_1X3
1
DIGITAL POTS
+3.3V_BUS
+3.3V_BUS
D4001
BACO_LED BACO_LED_PWR
1 2 1
R4026 251R 5%
GREEN
3
+3.3V_BUS BACO_LED_ON
(0
PX_EN 12,21,23,24
R4025 2 1K 5% 24 5 Q4000B
I2C ADDRESS = 0x5C
C4150
0.1uF
C4151
10uF
IN
LED GREEN "ON" INDICATES BACO MODE
裴
U4150 6.3V 6.3V MMDT3904-7
7 RESET_N VDD 1
+MVDD
1
R4150 210K 5%
4
DNI
3
1
R4151 210K 5% DNI 10 ADDR 1
R9 2 1K 5% 5 Q4001B
UNNAMED_36_AD5274_I576_ADDR UNNAMED_36_NPN_I578_B
R4156 0R +VDDCI_FB MMDT3904-7

3 1 216,22 5%
W OUT
6
UNNAMED_36_AD5274_I576_W
SCL_VDDCI
SCL 1
R4152 2 0R 5% 9 2 Q4001A
4
IN 8,22,24 SDA_VDDCI SCL
00 RM 亮
+3.3V_BUS
SDA 1
R4153 2 0R 5% 8 2
BI 8,22,24 SDA A MMDT3904-7
UNNAMED_36_AD5274_I576_A
D4002
MACO_LED MACO_LED_PWR
6 1 2 1
R4028 251R 5%
1
GND
1
11 THM EXT_CAP 5 1
C4152 2
1uF 6.3V R4154
UNNAMED_36_AD5274_I576_EXTCAP
ORANGE
12 THM VSS 4 7.5K
6
1% MACO_LED_ON
PX_EN 12,21,23,24
R4027 2 1K 5% 24 2 Q4002A
IN
LED ORANGE "ON" INDICATES MACO MODE
2
20K MMDT3904-7
UNNAMED_36_NPN_I588_E
+MVDD
68 A工樂
31
DIGITAL POTS
1
R4029 2 1K 5% 5 Q4002B
+3.3V_BUS
MMDT3904-7
4
+3.3V_BUS
C4050 C4051
I2C ADDRESS = 0x5C 0.1uF 10uF
U4050 6.3V 6.3V
7 RESET_N VDD 1
76
VTMM - TEST CONNECTOR FOR VOLTAGE MEASUREMENTS
1
R4050 210K 5% DNI
+3.3V_BUS +3.3V_BUS
1 210K 10
)
R4051 5%
+3.3V_BUS
DNI ADDR
UNNAMED_36_AD5274_I530_ADDR
R4157 0R
3 1 2 5% +MVDD_FB
OUT
程
W 18,22
UNNAMED_36_AD5274_I530_W
SCL_MVDD
SCL 1
R4052 2 0R 5% 9
IN 8,22,24 SDA_MVDD SCL
SDA 1
R4053 2 0R 5% 8 2
BI 8,22,24 SDA A
1
UNNAMED_36_AD5274_I530_A
R4082 J4005
1
6 GND R4081
10K 1
1
5%
0)
11 THM EXT_CAP 5 1
C4052 2
1uF 6.3V R4054
10K 2
UNNAMED_36_AD5274_I530_EXTCAP
5%
12 4 7.5K 3 R40101 2 0R 12,14,17
5% FB_VDDC_VR
2
IN
GPIO_30
THM VSS R4083 0R
1%
1 2 5% 4 R40111 2 0R 12,14
5% FB_VSSC
2
7
OUT IN
5 R40121 2 0R 12,16
5% FB_VDDCI
2
20K IN
課
7
IN
REGLTR_SCL
TP4080 R4080 1K
3
14,17,22
5% 2 5 8 REGLTR_SDA
Q4080A Q4080B 14,17,22
BI
MMDT3904-7 MMDT3904-7 9
C4080 10
To PLL_CHARZ 1uF
4
6.3V
SOCKET_2X5
J4001 J4002
G_SMBCLK 1 PX_EN R40041 2
33R 5% 1
OUT 1,8 OUT 2,21,23,24
G_SMBDAT 2 2
BI 1,8
3
HEADER_1X2
HEADER_1X3
SW4001A
CTF_OUT 1 4 BYPASS/DISABLE CTF
IN 21,23,24
SWITCHES Slide
SW4001B

PWM_B 2 3 MAXIMIZE FAN
IN 23
MS-V341
Slide
MSI
Custom 0024DEBUG CIRCUITS/ E-FUSE 2.0

00 M
0
MEMORY CHANNEL A&B MEMORY CHANNEL C&D
RD 17 SI
GDDR5 4pcs 64M/128M/256Mx32 GDDR5 4pcs 64M/128M/256Mx32
(C 96 C
EXTERNAL CONNECTOR
+12V_EXT_A
+12V_EXT_B
)2 7 ON
CH A/B/C/D
DP
TMDPF AC COUPLING CAPS
JTAG/I2C JTAG
CONNECTOR
DEBUG
F
DDC1 AUX1
0
CROSSFIRE
HPD6 +3.3V_DP
DVO
石 17 jo ID
DEBUG HEADER
POWER REGULATORS DP
DVPDATA_[15:0] TMDPE AC COUPLING CAPS
DVPCNTL_0
TERMINATIONS CONNECTOR
FROM +12V_BUS, +12V_EXT_A, DDCAUX3
阿 09 ne EN
+3.3V_DP
+12V_EXT_B, GPIO HPD4
STRAPS
+VDDC, +VDDCI, +MVDD, +5V, +0.8V, FAN DVPDATA_0,1,2
AC COUPLING CAPS
TMDPD
TERMINATIONS DP
From +3.3V_BUS ROM
+1.8V, +3.3V_DP, VDDR3 VBIOS
鋒 19 pe TI
CONNECTOR
DDC2 AUX2
From +VDDC (SMPS) HPD1 +3.3V_DP

VDDC THERM
DDCVGA
SPEED CONTROL
02 i( AL
From +VDDCI (SMPS)
INTERRUPT GPIO17
TEMPERATURE AC COUPLING CAPS
VDDCI
GPIO6_TACH
TMDPC
SENSE
TEMP SENSING
GPU_DPLUS TERMINATIONS HDMI
FAN GPU_DMINUS
CONNECTOR
BUILT-IN PWM
TS_FDO DDCAUX4
+5V_VESA
From +MVDD (SMPS) HPD5
(0 裴
VDDR1, MVDDQ/C PCC
GPIO30
REGULATOR HOT
GPIO5
From +1.8V (LDO) (SVI2, GPIO, I2C)

DYNAMIC POWER MANAGEMENT
SVC/D/T
00 RM 亮
SCL/SDA
VDD_1.8, TSVDD, MVDD GPIO11

AC COUPLING CAPS DVI-D BOTTOM
TMDPAB TERMINAT IONS
CONNECTOR
From +0.8V (SMPS)

POWER DELIVERY
VDD_08, BIF_VDDC, EVDDC DL-DVI
68 A工樂
DDCAUX6
HPD3 +5V_VESA
ELLESMERE
L4
76
CLOCK
)
100MHz
CHIP
BACO
程
PX_EN
POWER SEQUENCING
27MHz CLOCK
CIRCUIT
CRITICAL TEMPERATURE
GPIO19_CTF XTALIN CRYSTAL
XTALOUT
0)
PCI-EXPRESS
PCI-E Ellesmere GDDR5 8pcs x32
+12V_BUS
+3.3V_BUS
課 PCI-EXPRESS BUS
DP HDMI DP DP DVI FH 6L

MS-V341
MSI
Custom 0025BLOCK DIAGRAM 2.0

23: 00
反向 6 P IN
M
26: 1*4 托
錫
點
0
RD 17 SI
(C 96 C
)2 7 ON
0
石 17 jo ID F
阿 09 ne EN
鋒 19 pe TI
02 i( AL
(0 裴
00 RM 亮
68 A工樂
76 程 )
0) 課
MS-V341
MSI
Custom 0026 REVISION HISTORY 2.0

Msi Armor RX470-570 4GB Esquematico V341 - 20

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Msi Armor RX470-570 4GB Esquematico V341 - 20

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Copyright:

Available Formats

(1) PCI-EXPRESS EDGE CONNECTOR

Q100 B1 +12V PRSNT1_A1 A1 PRESENCE

PLACE THESE CAPS AS CLOSE TO B36 A36

PCIE CONNECTOR AS POSSIBLE B37 A37

MICRO-STAR INT'L CO.,LTD

Date: Monday, June 27, 2016 Sheet 1 of 26

Check BOM for more detail

MICRO-STAR INT'L CO.,LTD

Date: Monday, June 27, 2016 Sheet 2 of 26

DQA0_<0> U43 A41 DQA1_<0> DQB0_<0> K26 G18 DQB1_<0>

MAA0_<0> U32 H33 MAA1_<0> MAB0_<0> H23 N18 MAB1_<0>

Y34 M27 L26 K12

P34 M34 N21 N20

W32 M29 P26 H14

ellesmere_l4 C3607 R3612 ellesmere_l4

Date: Monday, June 27, 2016 Sheet 3 of 26

DQC0_<0> C1 AA4 DQC1_<0> DQD0_<0> AF7 AW3 DQD1_<0>

MAC0_<0> V13 AC8 MAC1_<0> MAD0_<0> AN8 AM17 MAD1_<0>

M10 AF11 AG12 AP20

Y13 AA13 AP12 AP14

P8 AF14 AJ12 AM19

MICRO-STAR INT'L CO.,LTD

Date: Monday, June 27, 2016 Sheet 4 of 26

B12 N2 B12 N2 B12 N2 B12

D12 V2 D12 V2 D12 V2 D12

D14 V4 D14 V4 D14 V4 D14

M13 E5 M13 E5 M13 E5 M13 E5

M11 E10 M11 E10 M11 E10 M11 E10

F1 N13 F1 N13 F1 N13 F1

F3 N11 F3 N11 F3 N11 F3

F12 T13 F12 T13 F12 T13 F12

F14 T11 F14 T11 F14 T11 F14

G2 V13 G2 V13 G2 V13 G2

G13 V11 G13 V11 G13 V11 G13

H3 F13 H3 F13 H3 F13 H3

H12 F11 H12 F11 H12 F11 H12

K3 E13 K3 E13 K3 E13 K3

K12 E11 K12 E11 K12 E11 K12

L2 B13 L2 B13 L2 B13 L2

M1 A13 M1 A13 M1 A13 M1

M3 A11 M3 A11 M3 A11 M3

M12 F2 M12 F2 M12 F2 M12

M14 F4 M14 F4 M14 F4 M14

N10 E4 N10 E4 N10 E4 N10

P14 A4 P14 A4 P14 A4 P14

VDDQ_T1 T1 VDDQ_T1 T1 VDDQ_T1 T1 VDDQ_T1 T1

MAA0_<1> MAA0_<2> 3 MAA0_<6>

MAA0_<2> MAA0_<3> 3 MAA0_<5>

MAA0_<3> MAA0_<4> 3 MAA0_<4>

MAA0_<5> MAA0_<6> 3 MAA0_<2>

MAA0_<6> MAA0_<7> 3 MAA0_<1>

MAA0_<7> MAA0_<8> 3 MAA0_<0>

MAA0_<8> 3 A0_A10__A7_A8 VDD_L1

VDD_L4 VDD_L4 VDD_L4 VDD_L4

VVVV34110S VVVV34110S VVVV34110S VVVV34110S

C2361 C2362 C2363 C2364

470uF 470uF 470uF 470uF

XXXV34110SXXXV34110S XXXV34110S XXXV34110S

+MVDD +MVDD +MVDD +MVDD

MICRO-STAR INT'L CO.,LTD

0005 GDDR5 MEM CH AB

Date: Tuesday, June 28, 2016 Sheet 5 of 26

N2 B12 N2 B12 N2 B12 N2 B12