LA-D781P Aventador MB 20161116

A B C D E
MODEL NAME : Aventador

PCB NO : LA-D781P
BOM P/N : TBD
ZZZ R1 R3 R3 R3
MB_PCB
1 1
CPN DAA000CE010 DAA000CE011 DAA000CE012 DAA000CE013
DAA000CE000
Vinafix.com
Dell/Compal Confidential
2 2
Schematic Document
Aventador (Kabylake Y)
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2016-08-31
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Security Classification Compal Secret Data Compal Electronics, Inc.

2041/09/08 2013/10/28 Title
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re
Re v
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D781P
Date: Wednesday, November 16, 2016 Sheet 1 of 57
A B C D E
A B C D E
4/8/16 GB Memory Down

eDP Panel with Cam LPDDR3 - ChA
13.3" FHD, QHD+ eDP 1.3, 4 lane
Memory Bus On Board RAM *2
JEDP1 P23 (LPDDR3)
USB2.0 Port 1
Intel P20,P21
SLG55594 Dual Channel LPDDR3 - ChB
( Power Share) Touch Screen I2C Kaby Lake Y 1866MHz On Board RAM *2
P28
P30 iSPI (4.5W) P20,P21
1 1
USB Type C VBUS1

TBT DP1.2, 4 lanes M.2 Socket3 M-Key
JUSBC1 P29
TBT
20Gbx2 Alpine Ridge SP
Thunderbolt
Port 1~2
PCIE3 x4
Port 1~4
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Port 5, 6, 7 & 8 SSD
P31
P26,P27
PD Controller
TPS65982 USB 2.0 Port 5 Camera + IR Camera
P28 DP1.2, 4 lanes
P23
USB Type C VBUS2 DP Switch

USB3.0/DP USB3.0 Port 1 USB2.0 Port 3 WLAN/BT
PS8743B 1216 Solder down
JUSBC2 P29
P25
PCIEx1 Port 10 Intel 8265 P32
PD Controller USB2.0 MUX USB2.0 Port 4

CYPD4125 SLG55594 TS3DS10224 USB2.0 Port 6 Sensor HUB
P24 ( Power Share) P26 STM32L151CBU6TR
2
P30 2
uSD Conn. CardReader PCIE2x1

Port 9 I2C
JCR1 RTS5242
P37
Headphone Jack I2C

JHP1 Audio Codec HDA e-Compass
Int. Speaker Audio AMP I2S ALC3271 LIS3MDLTR
P34
JSPK1 ALC1309P35 I I2C 2nd Accelerometer
S LNG2DMTR Gyro+ Accelerometer
P30 LSM6DS3TR
H
Daugher
USB2.0 Port 2 Board LS-D781P
Fingerprint
P39
I2C
SPI SPI ROM
3 256Mb 3
TouchPAD LPC Bus Nuvoton TPM1.2/2.0

JTP1 P40
NPC650JB P33
SMB
SIO + EC GPIO
PS/2 SMSC MEC5085 P38
BCBUS
KSIO Keyboard Controller LED FPC Conn.

Int.KBD
ECE1117C JLED1
ECE23017 P39
4 4

Issued Date 2041/09/08 Deciphered Date 2013/10/28 Title
Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re v
A B C D E
A B C D E
Main
Board
LA-D781P
USB2.0 Port 5 Sensor HUB
1 1
STM32L151CBU6TR
Vinafix.com I2C
I2C
e-Compass
LIS3MDLTR
I I2C 2nd Accelerometer
S LNG2DMTR Gyro+ Accelerometer
H LSM6DS3TR
2 I2C 2
Daugher
Board LS-D781P
Power BTN FPC

EC GPIO Power BTN
3 3
SMSC MEC 5085 Front Side LED FPC

EC GPIO
Front Side LED
4 4

DaughterB block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
A B C D E
A
POWER STATES / WKZdη ^d/Ed/KE h^ϯ͘Ϭ WKZdη ^d/Ed/KE

^K
Signal SLP SLP SLP SLP ALWAYS M SUS RUN CLOCKS / WŽƌƚ ϭ ůƉŝŶĞZŝĚŐĞ ϭ h^WDhy
State S3# S4# S5# A# PLANE PLANE PLANE PLANE DĂƉƉŝŶŐ
Ϯ ůƉŝŶĞZŝĚŐĞ Ϯ h^ĞďƵŐ
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH ON ON ON ON ON
ϯ
S3 (Suspend to RAM) / M3 LOW HIGH HIGH HIGH ON ON ON OFF OFF W/ yWZ^^ ^d/Ed/KE
ϰ
S4 (Suspend to DISK) / M3 LOW LOW HIGH HIGH ON ON OFF OFF OFF >ĂŶĞ ϭ
S5 (SOFT OFF) / M3 LOW LOW LOW HIGH ON ON OFF OFF OFF >ĂŶĞ Ϯ
h^Ϯ͘Ϭ WKZdη ^d/Ed/KE
ůƉŝŶĞZŝĚŐĞ h^dǇƉĞ
^K ϭ ;ŶZͿ
S3 (Suspend to RAM) / M-OFF
S4 (Suspend to DISK) / M-OFF

LOW
LOW
HIGH
LOW
HIGH
HIGH
LOW
LOW
ON
ON
OFF
OFF
ON
OFF
OFF
OFF
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OFF
OFF
W/ WŽƌƚ
DĂƉƉŝŶŐ
>ĂŶĞ ϯ
>ĂŶĞ ϰ
ϱ ^ĞŶƐŽƌ,Ƶď
ϳ &ŝŶŐĞƌƉƌŝŶƚ
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW ON OFF OFF OFF OFF >ĂŶĞ ϱ
ϯ dŽƵĐŚ WĂŶĞů
PM TABLE >ĂŶĞ ϲ
E'&&;^^Ϳ
+5VS ϵ DΘ/ZD
Power +3VS >ĂŶĞ ϳ
+3VALW_DSW +3V_PCH +1.2V_DDR +1.8VS
plane +5VALW +1.8V_PRIM +3.3V_CV2 +1.0V_VCCSTG Ϯ E'&&;t>EͿ
+3VALW +1.0V_PRIM +1.8V_MEM +0.85VS_VCCIO >ĂŶĞ ϴͬ ^d ϭ
+1.8VALW +1.0VA_GATE +1.0V_VCCST +0.6VS_VTT
State +3VLP +VCC_PRIM +VCC_SA
+VCC_GT >ĂŶĞ ϵ ĂƌĚƌĞĂĚĞƌ
+VCC_CORE
>ĂŶĞ ϭϬ t>E
S0 ON ON ON ON
S3 /AC ON ON ON OFF
/&&ZEd/> ^d/Ed/KE &>y >K<^ ^d/Ed/KE
><KhdͺW/ϭ ůƉŝŶĞZŝĚŐĞ ><Khdͺ>WͺϬ >W
DS3 ON OFF ON OFF
><KhdͺW/Ϯ t>E ><Khdͺ>Wͺϭ >W ĞďƵŐ
S5 S4/AC ON OFF OFF OFF ><
><KhdͺW/ϯ ^
S5 S4/AC doesn't exist OFF OFF OFF OFF
><KhdͺW/ϰ ĂƌĚ ZĞĂĚĞƌ
1 ŽŶƚƌŽů dĂďůĞ 1
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ŽĂƌĚ / dĂďůĞ

Λ ͗ ŵĞĂŶƐ ĚĞͲƉŽƉ
sĐĐ ϯ͘ϯsнͬͲϱй
ŽĂƌĚ / Z W ZĞǀŝƐŝŽŶ Zs ͗ ŵĞĂŶƐ ŝŐŝƚĂů 'ƌŽƵŶĚ
Ϭ ϮϰϬ<нͬͲϱй ϰϳϬϬƉ 0.1 sdϭ͘Ϭ
ϭ ϭϯϬ<нͬͲϱй ϰϳϬϬƉ 0.2 sdϭ͘Ϭͬsdϭ͘ϭ
͗ ŵĞĂŶƐ ŶĂůŽŐ 'ƌŽƵŶĚ
Ϯ ϲϮ<нͬͲϱй ϰϳϬϬƉ
ϯ ϯϯ<нͬͲϱй ϰϳϬϬƉ
ϰ ϴ͘Ϯ<нͬͲϱй ϰϳϬϬƉ Security Classification Compal Secret Data Compal Electronics, Inc.
ϱ ϰ͘ϯ<нͬͲϱй ϰϳϬϬƉ Issued Date 2041/09/08 Deciphered Date 2013/10/28 Title
ϲ Ϯ<нͬͲϱй ϰϳϬϬƉ THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
ϳ E MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D781P
A
5 4 3 2 1
+3VS
RC6 1 @ 2 2.2K_0201_5% PCH_DDI1_CLK

PCH_DDI1_DAT
PDG_Processor strap CFG[4] should be pulled
RC16 1 2 2.2K_0201_5% low to enable embedded DisplayPort*
PCH_DDI2_CLK SKYLAKE_ULX
RC32 1 @ 2 2.2K_0201_5% @ UC1A
RC33 1 2 2.2K_0201_5% PCH_DDI2_DAT Rev0.87
DISPLAY
A46 H45
<26> DDI1_PTX_TBRX_N0 DDI1_TXN[0] EDP_TXN[0] eDP_TXN_P0 <23>
C46 F45
PCH_DDI2_HPD <26> DDI1_PTX_TBRX_P0 DDI1_TXP[0] EDP_TXP[0] eDP_TXP_P0 <23>
RH1 1 2 100K_0201_5%
<26>
C48 J44
<23>
EDP_HPD DDI1_PTX_TBRX_N1 DDI1_TXN[1] EDP_TXN[1] eDP_TXN_P1
RC3 1 2 100K_0201_5% <26> A48 G44 <23>
RC30 1 2 100K_0201_5% PCH_DDI1_HPD DDI1_PTX_TBRX_P1 B45 DDI1_TXP[1] EDP_TXP[1] J46 eDP_TXP_P1
D45 G46 <eDP>
<26> DDI1_PTX_TBRX_P2 DDI1_TXP[2] EDP_TXP[2] eDP_TXP_P2 <23>
B47 H43
D47 eDP F43
<26> DDI1_PTX_TBRX_P3 DDI1_TXP[3] EDP_TXP[3] eDP_TXP_P3 <23>
D
Functional Strap Definitions ůƉŝŶĞ ZŝĚŐĞ <26> DDI2_PTX_TBRX_N0
A42
DDI2_TXN[0]
DDI
EDP_AUXN
J42
eDP_AUXN <23> D
C42 G42
<26> DDI2_PTX_TBRX_P0 DDI2_TXP[0] EDP_AUXP eDP_AUXP <23>
A44
<26> DDI2_PTX_TBRX_N1 DDI2_TXN[1] EDP_DISP
GPP_E19 (Internal Pull Down): DDPB_CTRLDATA C44 A40 RC2 2 @ 1
<26> DDI2_PTX_TBRX_P1 DDI2_TXP[1] EDP_DISP_UTIL
<26> B41 0_0201_5%
DDI2_PTX_TBRX_N2 D41 DDI2_TXN[2] H41
<26> DDI2_PTX_TBRX_P2 DDI2_TXP[2] <DDI1> DDI1_AUXN CPU_DDI1_AUXN <26>
0 = Port B is not detected. <26>
B43
DDI2_TXN[3] DDI1_AUXP
F41
CPU_DDI1_AUXP <26>
DDI2_PTX_TBRX_N3
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<26> D43 J40 TBT
DDI2_PTX_TBRX_P3 DDI2_TXP[3] DDI2_AUXN CPU_DDI2_AUXN <26>
<DDI2> G40
1 = Port B is detected. PCH_DDI1_CLK L6 DDI2_AUXP CPU_DDI2_AUXP <26>
PCH_DDI1_DAT H6 GPP_E18/DDPB_CTRLCLK C11 PCH_DDI1_HPD
GPP_E19/DDPB_CTRLDATA <DDI1> <DDI1> GPP_E13/DDPB_HPD0 PCH_DDI2_HPD PCH_DDI1_HPD <26>
<DDI2> L10
PCH_DDI2_CLK GPP_E14/DDPC_HPD1 PCH_DDI2_HPD <26>
H4 M7
PCH_DDI2_DAT GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 I2C0_IRQ_TS_R TPM_PIRQ# <33>
GPP_E21 (Internal Pull Down): DDPC_CTRLDATA F4 <DDI2> F6 RH22 1 2 22_0201_5%
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 EDP_HPD I2C0_IRQ_TS <30>
A7 <23>
GPP_E17/EDP_HPD EDP_HPD
M5
0 = Port C is not detected. +0.85VS_VCCIO L4 GPP_E22 D4
GPP_E23 EDP_BKLEN ENBKL <23>
B6
+EDP_COM EDP_BKLCTL PCH_INV_PWM <23>
RC4 2 1 A50 DISPLAY SIDEBANDS D3
1 = Port C is detected. 24.9_0402_1% EDP_RCOMP EDP_VDDEN ENVDD_PCH <42>
1 OF 20
ZϰtŝĚƚŚϮϬŵŝůƐ͕^ƉĂĐŝŶŐϮϱŵŝůƐ͕ KBL-Y_BGA1515
>ĞŶŐƚŚфϭϬϬŵŝů
+1.0V_VCCST SKYLAKE_ULX
@ UC1D
Rev0.87
H_THERMTRIP#_R H_CATERR# CPU_XDP_TCK
RC95 1 2 1K_0402_1% H49 D53
F49 CATERR# PROC_TCK C54 CPU_XDP_TDI
C H_CATERR# <38> H_PECI H_PROCHOT# H_PROCHOT#_R PECI PROC_TDI CPU_XDP_TDO C
@ RC80 1 2 49.9_0402_1%
<38,48,49,51,55> H_PROCHOT# RC8 1 2 499_0402_1% J48 G48
RC89 1 2 60.4_0402_1% H_THERMTRIP#_R H47 PROCHOT# PROC_TDO C59 CPU_XDP_TMS
<38> H_THERMTRIP# THERMTRIP# PROC_TMS CPU_XDP_TRST#
2 @ 1 SKTOCC# B62 F47
+1.0VS_VCCSTG RC67 0_0402_5% SKTOCC# PROC_TRST#
XDP_BPM#0 H51 J TAG
B53 PCH_JTAG_TCK
H_PROCHOT# XDP_BPM#1 BPM#[0] PCH_JTAG_TCK PCH_JTAG_TDI
RC13 1 2 1K_0402_1% J50 C50
TC6 @ XDP_BPM#2_R F51 BPM#[1] PCH_JTAG_TDI B51 PCH_JTAG_TDO
TC7 @ XDP_BPM#3_R G50 BPM#[2] PCH_JTAG_TDO A52 PCH_JTAG_TMS
+3V_PCH BPM#[3] PCH_JTAG_TMS C52 PCH_JTAG_TRST#
SIO_EXT_SMI# E11 PCH_TRST# B49 PCH_JTAGX
SIO_EXT_SMI# <38> SIO_EXT_SMI# TOUCH_SCREEN_PD# GPP_E3/CPU_GP0 JTAGX
RH148 1 2 10K_0201_5%
<30> TOUCH_SCREEN_PD#
M9
BD8 GPP_E7/CPU_GP1
<38,40> PTP_INT#_EC GPP_B3/CPU_GP2
BC11
+3VS <38> EC_SLP_S0IX# GPP_B4/CPU_GP3
@ RC14 2 1 49.9_0402_1% CPU_POPIRCOMP BN17
TOUCH_SCREEN_PD# PCH_OPIRCOMP PROC_POPIRCOMP
RH209 1 2 10K_0201_5% RC15 2 1 49.9_0402_1% BP16
PCH_OPIRCOMP
CPU MISC
+3VS 4 OF 20
KBL-Y_BGA1515
RH216 1 2 100K_0402_5% I2C0_IRQ_TS_R
+3VALW_DSW
XDP CONN
1 XDP@ 2 1K_0402_5% XDP_HOOK3
RC9
+1.0V_XDP
+3V_PCH +1.0V_PRIM +1.0V_XDP

RC154 1 1
XDP_PRSENT#
RC278 1 XDP@ 2 100K_0201_5% 1 XDP@ 2 CC163 CC164
CPU_XDP_TDO RC5 1 XDP@ 2 0_0201_5% XDP_TDO 0_0402_5% XDP@ XDP@
CPU_XDP_TCK RC27 1 XDP@ 2 0_0201_5% XDP_TCK0 0.1U_0201_10V6K 0.1U_0201_10V6K
+1.0V_XDP CPU_XDP_TDI 1 2 XDP_TDI 2 2
<To CPU JTAG> CPU_XDP_TMS
RC43 XDP@ 0_0201_5%
XDP_TMS
RC44 1 XDP@ 2 0_0201_5%
XDP_RST# CPU_XDP_TRST# XDP_TRST#
B RC279 1 XDP@ 2 1K_0402_5% RC12 1 XDP@ 2 0_0201_5% B
+1.0V_XDP +1.0V_XDP
+1.0VS_VCCSTG PCH_JTAG_TDO 1 2 XDP_TDO
RC49 XDP@ 0_0201_5% RC31 JXDP1
PCH_JTAG_TDI RC51 1 XDP@ 2 0_0201_5% XDP_TDI CFG3 1 XDP@ 2 XDP_PIN1 1 2
XDP_PREQ# PCH_JTAG_TMS XDP_TMS XDP_PREQ# 1 2
@ RC28 2 1 51_0402_5% <To PCH JTAG> RC52 1 XDP@ 2 0_0201_5% <11> XDP_PREQ# 1K_0402_1% 3 4
<17>
PCH_JTAG_TRST# RC62 1 XDP@ 2 0_0201_5% XDP_TRST# 5 3 4 6 CFG17
PCH_JTAGX XDP_TCK0 <11> XDP_PRDY# 5 6 CFG16 <17>
RC63 1 XDP@ 2 0_0201_5% RC277 7 8
PCH_JTAG_TCK 1 2 XDP_TCK1 1 XDP@ 2 9 7 8 10
RC22 XDP@ 0_0201_5% <17> <17>
CFG0 1K_0402_1% 11 9 10 12 CFG8
<17> CFG1 11 12 CFG9 <17>
PU/PD for CPU JTAG signals 13 14
15 13 14 16
Closed to CPU <17> CFG2 15 16 CFG10 <17>
CFG3 17 18
+1.0VS_VCCSTG XDP_HOOK3 <17> CFG3 17 18 CFG11 <17>
<7> PCH_SPI_SI RC235 1 XDP@ 2 1K_0201_5% 19 20
RC26 1 XDP@ 2 1K_0201_5% XDP_PRSENT# XDP_OBS0 21 19 20 22
CPU_XDP_TMS <7> PCH_SPI_IO2 XDP_OBS1 21 22 CFG19 <17>
@ RC20 2 1 51_0402_5% 23 24
<17>
25 23 24 26 CFG18
@ RC25 2 1 51_0402_5% CPU_XDP_TDI 27 25 26 28
XDP_BPM#0 XDP_OBS0 <17> CFG4 27 28 CFG12 <17>
RC68 1 XDP@ 2 0_0201_5%
<17>
29 30
<17>
RC18 1 2 100_0402_1% CPU_XDP_TDO XDP_BPM#1 RC65 1 XDP@ 2 0_0201_5% XDP_OBS1 CFG5 31 29 30 32 CFG13
R1 33 31 32 34
<17> CFG6 33 34 CFG14 <17>
R03_0714 PDG REV2.0 change 51ohm to 100 ohm <XDP Misc.> 35 36
CPU_XDP_TCK XDP_PWRBTN# <17> CFG7 35 36 CFG15 <17>
R2 RC23 2 1 51_0402_5%
<9,19,38> SIO_PWRBTN# RC66 1 XDP@ 2 0_0201_5% 37 38
XDP_DBRESET# PWRGD_XDP 37 38
<9,19> PM_SYS_RESET# RC36 1 XDP@ 2 0_0201_5% 39 40
<9>
CPU_XDP_TRST# XDP_RST# XDP_PWRBTN# 39 40 CK_XDP
@ RC24 2 1 51_0402_5%
<17> XDP_ITP_PMODE RC39 2 XDP@ 1 0_0402_5% 41 42 <9> <XDP CLK>
PWRGD_XDP 41 42 CK_XDP#
<9,38> PCH_RSMRST# RC29 1 XDP@ 2 1K_0402_5% 43 44 &ƌŽŵWh
45 43 44 46 XDP_RST#
XDP_HOOK3 47 45 46 48 XDP_DBRESET#
49 47 48 50
+3V_PCH 51 49 50 52 XDP_TDO
<7> SMBDATA 51 52 XDP_TRST#
<XDP SMBUS> 53 54
<7> SMBCLK XDP_TCK1 53 54 XDP_TDI
PU/PD for PCH JTAG signals >ŝŶŬƚŽW,^D 55 56
XDP_TCK0 57 55 56 58 XDP_TMS
Connect to XDP Conn. 59 57 58 60 XDP_PRSENT#
59 60
5
+1.0VS_VCCSTG (Option w/ CPU JTAG) UC10 61

1 XDP@ 61
A A
P
RC37 2 1 51_0402_5% PCH_JTAG_TMS XDP_PRSENT# 2 NC 4 62 63

R5 A Y XDP_PRSENT <22> GND GND
PCH_JTAG_TDI
G
R4 RC34 2 1 51_0402_5% NL17SZ14DFT2G_SOT353-5 E-T_6601K-Y61N-04L

XDP_DBRESET# XDP_PWRBTN# CONN@
PCH_JTAG_TDO
3
R3 RC38 1 2 100_0402_1%
0.1U_0201_10V6K
CC161
0.1U_0201_10V6K
CC162
WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϴ WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϭ

R03_0714 PDG REV2.0 change 51ohm to 100 ohm
PCH_JTAGX 1 1
RC41 2 @ 1 51_0402_5%
PCH_JTAG_TCK Security Classification Compal Secret Data Compal Electronics, Inc.
XDP@
XDP@
R6 RC35 2 @ 1 51_0402_5%
2 2
SKL Y(1/13) DDI,MSIC,XDP
5 4 3 2 1
5 4 3 2 1
EŽŶͲ/ŶƚĞƌůĞĂǀĞDĞŵŽƌǇ
D D
SKYLAKE_ULX SKYLAKE_ULX
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@ UC1B @ UC1C
AG61 Rev0.87 Rev0.87
<20> DDR_A_D0 DDR0_DQ[0]
AH60 BC62 BC41 interleave / Non-lnterleaved BK36
<20> DDR_A_D1 DDR0_DQ[1] DDR0_CKN[0] DDR_A_CLK#0 <20> <21> DDR_B_D0 DDR_B_CLK#0 <21>
AK62 BC60 BC39 DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0] BM36
<20> DDR_A_D2 DDR0_DQ[2] DDR0_CKP[0] DDR_A_CLK0 <20> <21> DDR_B_D1 DDR_B_CLK0 <21>
AK60 BA60 BG41 DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKP[0] BD32
<20> DDR_A_D3 DDR0_DQ[3] DDR0_CKN[1] DDR_A_CLK#1 <20> <21> DDR_B_D2 DDR_B_CLK#1 <21>
AH62 BA62 BE39 DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKN[1] BF32
<20> DDR_A_D4 DDR0_DQ[4] DDR0_CKP[1] DDR_A_CLK1 <20> <21> DDR_B_D3 DDR_B_CLK1 <21>
AG63 BF42 DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1]
<20> DDR_A_D5 DDR0_DQ[5] <21> DDR_B_D4
<20> AL61 BB57 DDR_A_CKE0 <20> <21> BD42 DDR0_DQ[36]/DDR1_DQ[4] BN33 DDR_B_CKE0 <21>
DDR_A_D6 DDR0_DQ[6] DDR0_CKE[0] DDR_B_D5
AL63 BC58 BG39 DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] BK32
<20> DDR_A_D7 DDR0_DQ[7] DDR0_CKE[1] DDR_A_CKE1 <20> <21> DDR_B_D6 DDR_B_CKE1 <21>
AM60 BE57 BE41 DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] BG33
AM62 AW61 BC43 DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2] BH30
<20> AT60 <21> BD46 DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3]
DDR_A_D10 DDR0_DQ[10] DDR_B_D9
AR61 AW63 BG43 DDR0_DQ[41]/DDR1_DQ[9] BM30
<20> DDR_A_D11 DDR0_DQ[11] DDR0_CS#[0] DDR_A_CS#0 <20> <21> DDR_B_D10 DDR_B_CS#0 <21>
AN61 BJ57 BG45 DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] BJ33
<20> DDR_A_D12 DDR0_DQ[12] DDR0_CS#[1] DDR_A_CS#1 <20> <21> DDR_B_D11 DDR_B_CS#1 <21>
AN63 BN61 BC45 DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] BC35
<20> DDR_A_D13 DDR0_DQ[13] DDR0_ODT[0] DDR_A_ODT0 <20> <21> DDR_B_D12 DDR_B_ODT0 <21>
AR63 BE43 DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0]
<20> DDR_A_D14 DDR0_DQ[14] <21> DDR_B_D13
AT62 BE45 DDR0_DQ[45]/DDR1_DQ[13]
<20> DDR_A_D15 DDR0_DQ[15] DDR3L / LPDDR3 / DDR4 <21> DDR_B_D14
AW59 BF46 DDR0_DQ[46]/DDR1_DQ[14]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR_A_CAA0 <20> <21> DDR_B_D15 DDR3L / LPDDR3 / DDR4
AW55 BM28 DDR0_DQ[47]/DDR1_DQ[15] BK30
Interleave/Non-lnterleaved DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR_A_CAA1 <20> <21> DDR_B_D16 DDR_B_CAA0 <21>
AT56 BF62 BN27 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] BN31
<20> DDR_A_D16 DDR1_DQ[0]/DDR0_DQ[16] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR_A_CAA2 <20> <21> DDR_B_D17 DDR_B_CAA1 <21>
AR55 AV56 BK28 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BM32
<20> AN57 AW57 DDR_A_CAA4 <20> <21> BL25 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BL37 DDR_B_CAA3 <21>
DDR_A_D18 DDR1_DQ[2]/DDR0_DQ[18] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR_B_D19
AN55 AV58 BN25 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] BG31
<20> DDR_A_D19 DDR1_DQ[3]/DDR0_DQ[19] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_CAA5 <20> <21> DDR_B_D20 DDR_B_CAA4 <21>
AR57 BA56 BL27 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] BN37
AT58 BD59 BJ25 DDR1_DQ[37]/DDR1_DQ[21] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] BJ37
AM58 BD61 BJ27 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] BJ35
<20> DDR_A_D22 DDR1_DQ[6]/DDR0_DQ[22] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_A_CAA8 <20> <21> DDR_B_D23 DDR_B_CAA7 <21>
AM56 BG61 BM24 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] BM34
<20> DDR_A_D23 DDR1_DQ[7]/DDR0_DQ[23] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_CAA9 <20> <21> DDR_B_D24 DDR_B_CAA8 <21>
AL55 BK59 BK24 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# BN35
<20> DDR_A_D24 DDR1_DQ[8]/DDR0_DQ[24] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR_A_CAB0 <20> <21> DDR_B_D25 DDR_B_CAA9 <21>
AL57 BL62 BN21 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] BG37
<20> DDR_A_D25 DDR1_DQ[9]/DDR0_DQ[25] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_CAB1 <20> <21> DDR_B_D26 DDR_B_CAB0 <21>
C AH58 BJ61 BJ23 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] BE37 C
<20> DDR_A_D26 DDR1_DQ[10]/DDR0_DQ[26] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR_A_CAB2 <20> <21> DDR_B_D27 DDR_B_CAB1 <21>
AH56 AV60 BL23 DDR1_DQ[43]/DDR1_DQ[27] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] BC37
<20> DDR_A_D27 DDR1_DQ[11]/DDR0_DQ[27] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_CAB3 <20> <21> DDR_B_D28 DDR_B_CAB2 <21>
<20> AK58 BN62 DDR_A_CAB4 <20> <21> BN23 DDR1_DQ[44]/DDR1_DQ[28] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] BF34 DDR_B_CAB3 <21>
DDR_A_D28 DDR1_DQ[12]/DDR0_DQ[28] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_B_D29
AK56 BB61 BJ21 DDR1_DQ[45]/DDR1_DQ[29] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BC33
<20> DDR_A_D29 DDR1_DQ[13]/DDR0_DQ[29] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR_A_CAB5 <20> <21> DDR_B_D30 DDR_B_CAB4 <21>
AG55 BL61 BL21 DDR1_DQ[46]/DDR1_DQ[30] DDR1_BA[0] /DDR1_CAB[4]/DDR1_BA[0] BF30
<20> DDR_A_D30 DDR1_DQ[14]/DDR0_DQ[30] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_CAB6 <20> <21> DDR_B_D31 DDR_B_CAB5 <21>
AG57 BM59 BN45 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BD36
<20> DDR_A_D31 DDR1_DQ[15]/DDR0_DQ[31] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR_A_CAB7 <20> <21> DDR_B_D32 DDR_B_CAB6 <21>
<20> BE55 BN58 DDR_A_CAB8 <20> <21> BM46 DDR0_DQ[48]/DDR1_DQ[32] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] BG35 DDR_B_CAB7 <21>
DDR_A_D32 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR_B_D33
<20> BC55 AV62 DDR_A_CAB9 <20> <21> BL43 DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] BC31 DDR_B_CAB8 <21>
DDR_A_D33 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR_B_D34
BG53 BK46 DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BF36
<20> DDR_A_D34 DDR0_DQ[18]/DDR0_DQ[34] <21> DDR_B_D35 DDR_B_CAB9 <21>
BE53 BB63 BN43 DDR0_DQ[51]/DDR1_DQ[35] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
<20> DDR_A_D35 DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[3] <21> DDR_B_D36
BC53 BL57 BL45 DDR0_DQ[52]/DDR1_DQ[36] BJ31
<20> DDR_A_D36 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[4] <21> DDR_B_D37
BG55 AJ61 BJ45 DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[3] BK34
<20> DDR_A_D37 DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQSN[0] DDR_A_DQS#0 <20> <21> DDR_B_D38
BD52 AJ63 BJ43 DDR0_DQ[54]/DDR1_DQ[38] DDR1_MA[4]
<20> DDR_A_D38 DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQSP[0] DDR_A_DQS0 <20> <21> DDR_B_D39
BF52 AP62 BM42 DDR0_DQ[55]/DDR1_DQ[39]
<20> DDR_A_D39 DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSN[1] DDR_A_DQS#1 <20> <21> DDR_B_D40 BN41 DDR0_DQ[56]/DDR1_DQ[40]
interleave / Non-lnterleaved
BC51 AP60 BD40
<20> DDR_A_D40 DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSP[1] DDR_A_DQS1 <20> <21> DDR_B_D41 DDR_B_DQS#0 <21>
BE51 BJ41 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[4]/DDR1_DQSN[0] BF40
<20> DDR_A_D41 DDR0_DQ[25]/DDR0_DQ[41] <21> DDR_B_D42 DDR_B_DQS0 <21>
BC49 BN39 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[4]/DDR1_DQSP[0] BD44
<20> DDR_A_D42 DDR0_DQ[26]/DDR0_DQ[42] Interleave/Non-lnterleaved <21> DDR_B_D43 DDR_B_DQS#1 <21>
<20> BE49 AP56 DDR_A_DQS#2 <20> <21> BK42 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSN[5]/DDR1_DQSN[1] BF44 DDR_B_DQS1 <21>
DDR_A_D43 DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSN[0]/DDR0_DQSN[2] DDR_B_D44
BG51 AP58 BL41 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[5]/DDR1_DQSP[1] BK26
<20> DDR_A_D44 DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSP[0]/DDR0_DQSP[2] DDR_A_DQS2 <20> <21> DDR_B_D45 DDR_B_DQS#2 <21>
BG49 AJ57 BL39 DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[4]/DDR1_DQSN[2] BM26
<20> DDR_A_D45 DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSN[1]/DDR0_DQSN[3] DDR_A_DQS#3 <20> <21> DDR_B_D46 DDR_B_DQS2 <21>
BF48 AJ55 BJ39 DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[4]/DDR1_DQSP[2] BM22
<20> DDR_A_D46 DDR0_DQ[30]/DDR0_DQ[46] DDR1_DQSP[1]/DDR0_DQSP[3] DDR_A_DQS3 <20> <21> DDR_B_D47 DDR0_DQ[63]/DDR1_DQ[47] DDR1_DQSN[5]/DDR1_DQSN[3] DDR_B_DQS#3 <21>
BD48 BD54 BK22
<20> DDR_A_D47 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSN[2]/DDR0_DQSN[4] DDR_A_DQS#4 <20> DDR1_DQSP[5]/DDR1_DQSP[3] DDR_B_DQS3 <21>
BJ55 BF54 BK44
<20> DDR_A_D48 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSP[2]/DDR0_DQSP[4] DDR_A_DQS4 <20> DDR0_DQSN[6]/DDR1_DQSN[4] DDR_B_DQS#4 <21>
BL55 BF50 BF28 BM44
<20> DDR_A_D49 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSN[3]/DDR0_DQSN[5] DDR_A_DQS#5 <20> <21> DDR_B_D48 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] DDR_B_DQS4 <21>
BJ53 BD50 BD28 BM40
<20> DDR_A_D50 DDR1_DQ[18]/DDR0_DQ[50] DDR0_DQSP[3]/DDR0_DQSP[5] DDR_A_DQS5 <20> <21> DDR_B_D49 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5] DDR_B_DQS#5 <21>
BL53 BM54 BG25 BK40
<20> DDR_A_D51 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSN[2]/DDR0_DQSN[6] DDR_A_DQS#6 <20> <21> DDR_B_D50 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_DQS5 <21>
BN55 BK54 BC27
<20> DDR_A_D52 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSP[2]/DDR0_DQSP[6] DDR_A_DQS6 <20> <21> DDR_B_D51 DDR1_DQ[51]
<20> BN53 BK50 DDR_A_DQS#7 <20> <21> BG27
DDR_A_D53 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSN[3]/DDR0_DQSN[7] DDR_B_D52 DDR1_DQ[52]
BM52 BM50 BE27 BD26
<20> DDR_A_D54 DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQSP[3]/DDR0_DQSP[7] DDR_A_DQS7 <20> <21> DDR_B_D53 DDR1_DQ[53] DDR1_DQSN[6] DDR_B_DQS#6 <21>
BK52 BE25 BF26
<20> DDR_A_D55 DDR1_DQ[23]/DDR0_DQ[55] <21> DDR_B_D54 DDR1_DQ[54] DDR1_DQSP[6] DDR_B_DQS6 <21>
BL51 BG57 BC25 BF22
<20> DDR_A_D56 DDR1_DQ[24]/DDR0_DQ[56] DDR0_ALERT# <21> DDR_B_D55 DDR1_DQ[55] DDR1_DQSN[7] DDR_B_DQS#7 <21>
BJ51 BM56 BF24 BD22
<20> DDR_A_D57 DDR1_DQ[25]/DDR0_DQ[57] DDR0_PAR <21> DDR_B_D56 DDR1_DQ[56] DDR1_DQSP[7] DDR_B_DQS7 <21>
BL49 BD24 BD34
<20> DDR_A_D58 DDR1_DQ[26]/DDR0_DQ[58] <21> DDR_B_D57 DDR1_DQ[57] DDR1_ALERT#
BJ49 AR53 BG21 BD30
<20> DDR_A_D59 DDR1_DQ[27]/DDR0_DQ[59] DDR_VREF_CA +0.6V_VREFCA <21> DDR_B_D58 DDR1_DQ[58] DDR1_PAR
BN49 AN53 BC23 BP20 TP_DDR3_DRAMRST#
<20> DDR_A_D60 DDR1_DQ[28]/DDR0_DQ[60] DDR0_VREF_DQ +0.6V_A_VREFDQ <21> DDR_B_D59 DDR1_DQ[59] DRAM_RESET# SM_RCOMP0 @ TC34
B BN51 AW53 BE23 BF64 RC45 1 2 200_0402_1% B
<20> DDR_A_D61 DDR1_DQ[29]/DDR0_DQ[61] DDR1_VREF_DQ +0.6V_B_VREFDQ <21> DDR_B_D60 DDR1_DQ[60] DDR_RCOMP[0]
BK48 DDR CH-A BG23 DDR CH-B BJ64 SM_RCOMP1 RC46 1 2 80.6_0402_1%
<20> DDR_A_D62 DDR1_DQ[30]/DDR0_DQ[62] DDR_VTT_CNTL <21> DDR_B_D61 DDR1_DQ[61] DDR_RCOMP[1]
BM48 BN47 Trace width/Spacing >= 20mils BC21 BC64 SM_RCOMP2 RC47 1 2 162_0402_1%
<20> DDR_A_D63 DDR1_DQ[31]/DDR0_DQ[63] DDR_VTT_CNTL <21> DDR_B_D62 DDR1_DQ[62] DDR_RCOMP[2]
2 OF 20 BE21 3 OF 20
<21> DDR_B_D63 DDR1_DQ[63]
KBL-Y_BGA1515 KBL-Y_BGA1515
DDR_VTT_CNTL RC48 1 2 0_0402_5%

SM_PG_CTRL <51>
A A

SKL Y(2/13) DDRIII
5 4 3 2 1
5 4 3 2 1
SKYLAKE_ULX
@ UC1E
Rev0.87
PCH_SPI_CLK AU10 AC12 SMBCLK
PCH_SPI_SO SPI0_CLK GPP_C0/SMBCLK SMBCLK <5>
AU12 W6 SMBDATA Connect XDP
PCH_SPI_SI SPI0_MISO GPP_C1/SMBDATA SMBDATA <5>
AT3 W8 SMBALERT#
<5> PCH_SPI_SI PCH_SPI_IO2 SPI0_MOSI GPP_C2/SMBALERT#
AV11
<5> PCH_SPI_IO2 PCH_SPI_IO3 SPI0_IO2 SPI - FLASH SMBUS, SMLINK
AV13 W4 SML0CLK
PCH_SPI_CS0# AU4 SPI0_IO3 GPP_C3/SML0CLK AC10 SML0DATA
PCH_SPI_CS1# AU6 SPI0_CS0# GPP_C4/SML0DATA AA6 GPP_C5
AU8 SPI0_CS1# GPP_C5/SML0ALERT#
D <33>PCH_SPI_CS2# D
SPI0_CS2# AA4 SML1_SMBCLK
SPI - TOUCH GPP_C6/SML1CLK SML1_SMBDAT SML1_SMBCLK <38>
W10 Connect EC
PCH_SPI_CLK_TS GPP_C7/SML1DATA SML1_SMBDAT <38>
P9 BB6 SML1ALERT#
PCH_SPI_SO_TS N8 GPP_D1 GPP_B23/SML1ALERT#/PCHHOT#
PCH_SPI_SI_TS P3 GPP_D2/SPI1_MISO BK11
Vinafix.com
GPP_D3 GPP_A1/LAD0/ESPI_IO0 LPC_AD0 <38>
W12 BJ8
GPP_D21 LPC GPP_A2/LAD1/ESPI_IO1 LPC_AD1 <38>
V7 BG10
PCH_SPI_CS#_TS GPP_D22 GPP_A3/LAD2/ESPI_IO2 LPC_AD2 <38>
N6 BP5 LPC_AD3 <38>
GPP_D0 GPP_A4/LAD3/ESPI_IO3 BP7
F12 GPP_A5/LFRAME#/ESPI_CS# BJ6 LPC_FRAME# <38>
<32> CL_CLK C LINK
D12 CL_CLK GPP_A14/SUS_STAT#/ESPI_RESET#
<32> CL_DAT CL_DATA CLKOUT_LPC0 CLK_PCI_MEC
B12 BJ10 RH20 1 2 22_0201_5%
<32> CL_RST# CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLKOUT_LPC1 CLK_LPC_DEBUG CLK_PCI_MEC <38>
BF5 RH21 1 2 22_0201_5%
GPP_A10/CLKOUT_LPC1 CLK_LPC_DEBUG <38>
BH11 CLKRUN#
SIO_RCIN# GPP_A8/CLKRUN# CLKRUN# <38>
BL10
<38> SIO_RCIN# IRQ_SERIRQ GPP_A0/RCIN#
BN8
<38> IRQ_SERIRQ GPP_A6/SERIRQ 5 OF 20
KBL-Y_BGA1515
RP9
1 8 PCH_SPI_CLK_TS
<30> TS_SPI_CLK PCH_SPI_SO_TS
2 7 Closed to ROM
<30> TS_SPI_SO PCH_SPI_SI_TS
3 6
<30> TS_SPI_SI PCH_SPI_CS#_TS +3V_PCH +3.3V_SPI
4 5
<30> TS_SPI_CS# SPI_SI_VROM0 PCH_SPI_SI
RH23 1 2 33_0201_1% RC59
15_0804_8P4R_5% SPI_CLK_VROM0 RH24 1 2 33_0201_1% PCH_SPI_CLK 2 @ 1
SPI_SO_VROM0 RH25 1 2 33_0201_1% PCH_SPI_SO
C SPI_IO2_VROM0 RH26 1 2 33_0201_1% PCH_SPI_IO2 0_0402_1% C
SPI_IO3_VROM0 RH27 1 2 33_0201_1% PCH_SPI_IO3 +3VS
JSPI1
PCH_SPI_CS1# 1 IRQ_SERIRQ RH15 1 2 10K_0201_5%
2 1 CLKRUN# RH13 1 2 8.2K_0201_5%
PCH_SPI_SI 3 2 SIO_RCIN# RH14 1 2 10K_0201_5%
4 3
PCH_SPI_SO 5 4
6 5
PCH_SPI_CLK 7 6
RP7 8 7
8
!"#$%&#'#()&*+,-#.
1 8 PCH_SPI_CLK PCH_SPI_CS0# 9
<33> PCH_SPI_CLK_TPM PCH_SPI_SI 9
R03_0706 Enable DCI+BSSB
2 7 10 +3V_PCH
<33> PCH_SPI_SI_TPM 10
$%&#/0#1234# !"
3 6 PCH_SPI_SO PCH_SPI_IO2 11
<33> PCH_SPI_SO_TPM 11
4 5 12 SML1ALERT# RH102 1 2 4.7K_0402_5%
+3.3V_SPI PCH_SPI_IO3 13 12
UH8 33_8P4R_5% 14 13 SML1_SMBCLK RH96 1 2 1K_0201_5%
PCH_SPI_CS0# 1 8 15 14 SML1_SMBDAT RH97 1 2 1K_0201_5%
SPI_SO_VROM0 CS# VCC SPI_IO3_VROM0 +3.3V_SPI 15
2 7 1 Serial Peripheral Interface (SPI) Topology Guidelines 16
SPI_IO2_VROM0 3 SO/SIO1 RESET#/SIO3 6 SPI_CLK_VROM0 CH35 17 16 SML0CLK RH99 1 2 1K_0201_5%
4 WP#/SIO2 SCLK 5 SPI_SI_VROM0 18 17 SML0DATA RH100 1 2 1K_0201_5%
GND SI/SIO0 0.1U_0201_10V6K 19 18
9 2 20 19
PAD PCH SPI 20
W25Q256FVEIG_WSON8_8X6 SMBCLK RH94 1 2 1K_0201_5%
21 SMBDATA RH95 1 2 1K_0201_5%
22 GND_1
TPM Follow Dino MLK GND_2
B B
ACES_50696-0200M-P01
CONN@
JSPI
Functional Strap Definitions Functional Strap Definitions
GPP_C2 (Internal Pull Down): SMBALERT# GPP_C5 (Internal Pull Down): SML0ALERT#
0 = Disable Intel ME Crypto Transport Layer Security 0 = LPC Is selected for EC.
(TLS) cipher suite (no confidentiality).
1 = eSPI Is selected for EC.
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
pulled up to support Intel AMT with TLS and Intel
SBA (Small Business Advantage) with TLS.
+3V_PCH +3V_PCH
A
RH101 @ RH98 A
2 1 SMBALERT# 2 1 GPP_C5
2.2K_0201_5% 10K_0201_5%

SKL Y(3/13) SPI,SMB
5 4 3 2 1
5 4 3 2 1
SKYLAKE_ULX
@ UC1G
A00_0906: EMI Request RH109 33chnage 56ohm Rev0.87
CAM_CBL_DET#
AH9 low active
1 2 33_0201_1% HDA_SYNC BJ19 GPP_G0/SD_CMD AH11 CAM_CBL_DET# <23>
<34> RH111
HDA_SYNC_AUDIO RH109 1 2 56_0201_1% HDA_BIT_CLK BK18 HDA_SYNC/I2S0_SFRM GPP_G1/SD_DATA0 AG12
<34> HDA_BITCLK_AUDIO HDA_SDOUT HDA_BLK/I2S0_SCLK GPP_G2/SD_DATA1
RH112 1 2 33_0201_1% BK16 AF9
<34> HDA_SDOUT_AUDIO HDA_SDIN0 HDA_SDO/I2S0_TXD GPP_G3/SD_DATA2 SD_PWR_EN <42>
BL15 AF11
<34> HDA_SDIN0 HDA_SDI0/I2S0_RXD GPP_G4/SD_DATA3 +3VS
BL17 AG8
TC37 @ HDA_RST# BL19 HDA_SDI1/I2S1_RXD GPP_G5/SD_CD# AG10
V5 HDA_RST#/I2S1_SCLK SDIO/SDXC GPP_G6/SD_CLK AE12
<26> PCH_RTD3_USB_PWR_EN GPP_D23/I2S_MCLK GPP_G7/SD_WP SPK_ID# <35,38> CAM_CBL_DET#
D BL12 RH207 1 2 10K_0201_5% D
BK14 I2S1_SFRM BL4
AUDIO
I2S1_TXD GPP_A17/SD_PWR_EN#/ISH_GP7 BN4
GPP_A16/SD_1P8_SEL
AT13 BF1 SDIO_RCOMP RC60 2 1 200_0402_1%
AT11 GPP_F1/I2S2_SFRM SD_RCOMP
<26> TBT_CIO_PLUG_EVENT#
AP11
AT5
V3
V11
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0
Vinafix.com
<+3V_1.8V_PGPPD>
GPP_F23
AJ8
<26> TBT_FORCE_PWR GPP_D20/DMIC_DATA0

U12
<26> TBT_BATLOW# GPP_D17/DMIC_CLK1
U8
<26> RTD3_CIO_PWR_EN GPP_D18/DMIC_DATA1
SPKR AV3
<34> SPKR GPP_B14/SPKR
7 OF 20
KBL-Y_BGA1515
^ĞƌǀŝĐĞ DŽĚĞ ^ǁŝƚĐŚ͗
ĚĚ Ă ƐǁŝƚĐŚ ƚŽ Dͺ&tW ƐŝŐŶĂů ƚŽ ƵŶůŽĐŬ ƚŚĞ D ƌĞŐŝŽŶ ĂŶĚ
ĂůůŽǁ ƚŚĞ ĞŶƚ ŝ ƌ Ğ ƌ ĞŐŝ ŽŶ ŽĨ ƚ ŚĞ ^W/ Ĩ ů ĂƐŚ ƚŽ ďĞ ƵƉĚĂƚ ĞĚ ƵƐ ŝ ŶŐ &W͘d
Functional Strap Definitions +3VS_AUDIO
GPP_B14 (Internal Pull Down): SPKR
1
TOP Swap Override RC11
0 = Disable TOP Swap mode.---> AAU30 Use 1K_0402_5%
C
1 = Enable TOP Swap Mode. C
@ SW1
2
+3V_PCH 1
RC83 HDA_SDOUT 1K_0402_5%~D 2 1 R1196 ME_EN 2
1 @ 2 SPKR 3
100K_0201_5% +3V_PCH 0_0402_5%~D 2 1 R1191
4
G
5
<38> ME_FWP_EC G
SSAL120100_3P
PCH_SPI_IRQ_TS RH426 1 2 10K_0201_5%
SKYLAKE_ULX Dͺ&tW W, ŚĂƐ ŝŶƚĞƌŶĂů ϮϬ< W͘
@ UC1I
Rev0.87
H29 H31
&>^,^Z/WdKZ^hZ/dz KsZZ/
F29 CSI2_DN0 CSI2_CLKN0 F31
F33 CSI2_DP0 CSI2_CLKP0 D31
ŝƐĂďůĞ D WƌŽƚĞĐƚ ;D ĐĂŶ ďĞ ƵƉĚĂƚĞĚͿ ͲͲͲͲх WŝŶϭ Θ WŝŶϮ ƐŚŽƌƚ
H33 CSI2_DN1 CSI2_CLKN1 B31 ŶĂďůĞ D WƌŽƚĞĐƚ ;D ĐĂŶŶŽƚ ďĞ ƵƉĚĂƚĞĚͿͲͲхWŝŶϯ Θ WŝŶϮ ƐŚŽƌƚ;ĞĨĂƵůƚ ƉŽƐŝƚ ŝ ŽŶͿ
J30 CSI2_DP1 CSI2_CLKP1 C34
G30 CSI2_DN2 CSI2_CLKN2 A34
CSI2_DP2 CSI-2 CSI2_CLKP2
J32 D39
G32 CSI2_DN3 CSI2_CLKN3 B39
CSI2_DP3 CSI2_CLKP3 A11 CSI2_COMP RC64 2 1 100_0201_1%
D29 CSI2_COMP N4 PCH_SPI_IRQ_TS RH130 1 2 0_0402_5%
B29 CSI2_DN4 GPP_D4/FLASHTRIG TS_SPI_IRQ <30>
C32 CSI2_DP4 eMMC
A32 CSI2_DN5 AN12 MEM_CONFIG0 +1.8V_PRIM
C30 CSI2_DP5 GPP_F13/EMMC_DATA0 AP9 MEM_CONFIG1 RH150 RH139
A30 CSI2_DN6 GPP_F14/EMMC_DATA1 AN10 MEM_CONFIG2 2 @ 1 MEM_CONFIG0 2 @ 1
B D33 CSI2_DP6 GPP_F15/EMMC_DATA2 AJ10 MEM_CONFIG3 10K_0402_5% 10K_0402_5% B
B33 CSI2_DN7 GPP_F16/EMMC_DATA3 AM9 MEM_CONFIG4 RH149 RH145
CSI2_DP7 GPP_F17/EMMC_DATA4 AL12 2 @ 1 MEM_CONFIG1 2 @ 1
D35 GPP_F18/EMMC_DATA5 AJ12 10K_0402_5% 10K_0402_5%
B35 CSI2_DN8 GPP_F19/EMMC_DATA6 AN8 RH144 RH129
C36 CSI2_DP8 GPP_F20/EMMC_DATA7 2 @ 1 MEM_CONFIG2 2 @ 1
A36 CSI2_DN9 AL10 10K_0402_5% 10K_0402_5%
D37 CSI2_DP9 GPP_F21/EMMC_RCLK AL8 RH206 RH205
B37 CSI2_DN10 GPP_F22/EMMC_CLK AM11 2 @ 1 MEM_CONFIG3 2 @ 1
C38 CSI2_DP10 GPP_F12/EMMC_CMD 10K_0402_5% 10K_0402_5%
A38 CSI2_DN11 BC1 EMMC_RCOMP RC61 2 1 200_0402_1% RH211 RH212
CSI2_DP11 EMMC_RCOMP 2 @ 1 MEM_CONFIG4 2 @ 1
9 OF 20 10K_0402_5% 10K_0402_5%
KBL-Y_BGA1515
Pin Name Micron 4GB

SA00008PF0L
Micron 8GB
SA00008Q10L
Micron 16GB
SA00008QW0L
Hynix 4GB
SA00008G60L
Hynix 8GB
SA00008FJ0L
Hynix 16GB
SA00008YT0L
Samsung 4GB
SA00008PQ1L
Samsung 8GB
SA00008QV1L
Samsung 16GB
SA00008X11L
MEM_CONFIG0 0 1 0 1 0 1 0 1 0
MEM_CONFIG1 0 0 1 1 0 0 1 1 0
MEM_CONFIG2 0 0 0 0 1 1 1 1 0
MEM_CONFIG3 0 0 0 0 0 0 0 0 1
A MEM_CONFIG4 0 0 0 0 0 0 0 0 0 A

SKL Y(4/13) HDA,EMMC,SDIO
5 4 3 2 1
5 4 3 2 1
SKYLAKE_ULX
@ UC1J
Rev0.87
CLOCK SIGNALS
H35 J34
<26> CLK_PCIE_TBT# CLKOUT_PCIE_N1 CLKOUT_ITPXDP_N CK_XDP# <5>
ůƉŝŶĞZŝĚŐĞͲͲͲх F35 G34
<26> CLK_PCIE_TBT CLKOUT_PCIE_P1 CLKOUT_ITPXDP_P CK_XDP <5>
AV9
<26> CLKREQ_PCIE#1 GPP_B6/SRCCLKREQ1# SUSCLK_S
RC73 1 2 10K_0201_5% BA15 RH76 1 2 SUSCLK
+3VS GPD8/SUSCLK SUSCLK <31,32>
D J36 0_0402_5% D
<32> CLK_PCIE_WLAN# CLKOUT_PCIE_N2 XTAL24_IN
t>EͲͲͲх G36 M1 CH46 1
<32> CLK_PCIE_WLAN CLKOUT_PCIE_P2 XTAL24_IN XTAL24_OUT
BD10 L2 @EMI@
<32> CLKREQ_PCIE#2 GPP_B7/SRCCLKREQ2# XTAL24_OUT
0.1U_0201_10V6K
RC69 1 2 10K_0201_5% RH78
+3VS XCLK_BIASREF
J38 P1 1 2
<31> CLK_PCIE_SSD# CLKOUT_PCIE_N3 XCLK_BIASREF +1.0V_VCCCLK 2
G38
Vinafix.com
^^ͲͲͲх <31> 2.7K_0201_1%
CLK_PCIE_SSD AV5 CLKOUT_PCIE_P3 BN19 PCH_RTCX1
<31> CLKREQ_PCIE#3 GPP_B8/SRCCLKREQ3# RTCX1 PCH_RTCX2
RC70 1 2 10K_0201_5% BP18
+3VS RTCX2
<37>
H37
CLK_PCIE_MMI# F37 CLKOUT_PCIE_N4 BH18 PCH_SRTCRST#
ĂƌĚZĞĂĚĞƌͲͲͲх <37> CLK_PCIE_MMI AV7 CLKOUT_PCIE_P4 SRTCRST# BN12 RTC_RST#
<37> CLKREQ_PCIE#4 GPP_B9/SRCCLKREQ4# RTCRST# RTC_RST# <19,39>
RC71 1 2 10K_0201_5%
+3VS
H39
F39 CLKOUT_PCIE_N5 RTC_RST# by PWR BTN
RC72 1 @ 2 10K_0201_5% BC5 CLKOUT_PCIE_P5
+3VS GPP_B10/SRCCLKREQ5#
RC75 1 @ 2 10K_0201_5% BB10 1 CMOS
+3VS GPP_B5/SRCCLKREQ0#
1
CH5 CLRP3
SLP_S0 issue(intel request) 11/16 10 OF 20 @
KBL-Y_BGA1515 +RTCVCC 1U_0402_6.3V6K SHORT PADS
2
2
RH42 1 2 RTC_RST#
+3V_PCH 20K_0201_5%
TC7SH08FU_SSOP5 RH45 1 2 PCH_SRTCRST#
5
+3V_PCH UH1 20K_0201_5%
PCH_PLTRST# 1
1 CH6 W'ͺŶ Z ĚĞůĂǇ ĐŝƌĐƵŝƚ ǁŝƚŚ Ă ƚ ŝ ŵĞ ĚĞů ĂǇŝ Ŷ ƚ ŚĞ
P
@ RH114 1 2 10K_0201_5% SUSWARN# 4 B
<26,30,31,32,33,37,38> PCH_PLTRST#_EC O ƌĂŶŐĞ ŽĨ ϭϴʹ Ϯϱ ŵƐ Ɛ ŚŽƵů Ě ďĞ Ɖƌ Žǀŝ ĚĞĚ͘ dŚĞ Đŝ ƌĐƵŝ ƚ
RH208 1 2 10K_0201_5% VRALERT# 2 1U_0402_6.3V6K ƐŚŽƵůĚ ďĞ ĐŽŶŶĞĐƚĞĚ ƚŽ sZd͘
A
G
C RH132 1 2 10K_0201_5% SYS_RESET# 2 C
RH46
3
XTAL24_IN RH131 1 2 33_0201_1%
RH44 1 2 100K_0201_5% PCH_PWROK 100K_0201_5%
RH39 2 1 PCH_RTCX1
CH7
2
XTAL24_OUT RH128 1 2 33_0201_1% 1 2
15P_0402_50V8J
1
+3VALW_DSW 1M_0201_5%
YH1 YH2 RH48
RH115 1 2 10K_0201_5% AC_PRESENT_R 24MHZ_12PF_7V24000020 ESR must <50
RH210 1 2 10K_0201_5% PCH_GPD11 1 3 32.768KHZ_12.5PF_9H03200042 10M_0402_5%
2
RH117 1 2 10K_0201_5% BATLOW# 1 2 4 1
2
RH82 1 2 10K_0201_5% LAN_WAKE#_L CH8 2 1 PCH_RTCX2
RH83 1 @ 2 1K_0201_5% PCH_PCIE_WAKE# CH3 CH4
RH68 1 2 2.2K_0201_5% PBTN_OUT#_R 15P_0402_50V8J
15P_0402_50V8J 15P_0402_50V8J
2 2 ĨĂƌĂǁĂǇŚŽƚ ƐƉŽƚ
RH49 1 2 10K_0201_5% PCH_RSMRST#
RH50 1 2 100K_0201_5% PCH_DPWROK_R A00_0909: RF issue for IPHONE5S
@ C1 1 2 0.01U_0402_16V7K R03_0622 RF ISSUE on SKL/KBL platform
SKYLAKE_ULX
@ UC1K
Rev0.87
SYSTEM POWER MANAGEMENT
PCH_PLTRST# BB8 BC9 SIO_SLP_S0#_S RH51 2 @ 1 0_0402_1% SIO_SLP_S0#
SYS_RESET# GPP_B13/PLTRST# GPP_B12/SLP_S0# SIO_SLP_S0# <19,22,33,52>
<5,19> PM_SYS_RESET# RH52 2 @ 1 0_0402_1% H2 AY14
<19,22,26,38>
PCH_RSMRST# PCH_RSMRST#_R BJ12 SYS_RESET# GPD4/SLP_S3# SIO_SLP_S3#
<5,38> PCH_RSMRST# RH53 2 @ 1 0_0402_1% BF16
<19,22,38>
RSMRST# GPD5/SLP_S4# BH14 SIO_SLP_S5# SIO_SLP_S4#
H_CPUPWRGD_R GPD10/SLP_S5# SIO_SLP_S5# <19,38>
TC67 @ A62
VCCST_PWRGD B61 PROCPWRGD BN10 SIO_SLP_SUS#_L RH55 2 @ 1 0_0402_1%
VCCST_PWRGD SLP_SUS# BP11 SIO_SLP_SUS# <38,42>
B
RH70 2 @ 1 0_0402_1% RESET_OUT#_R J1 SLP_LAN# BH16 SIO_SLP_WLAN# B
<38> RESET_OUT# PCH_PWROK SYS_PWROK GPD9/SLP_WLAN# SIO_SLP_A# SIO_SLP_WLAN# <38> W'ͺ ŝŶƚĞƌŶĂů ƉƵůůͲƵƉ ƌĞƐŝƐƚŽƌ͕ ŶƚĞƌŶĂ
BP14 BE17 ϭϲ ŵƐ ĚĞͲďŽƵŶĐĞ ŽŶ ƚŚĞ ŝŶƉƵƚ͘
PCH_DPWROK_R BN15 PCH_PWROK GPD6/SLP_A# SIO_SLP_A# <19,38>
<38> PCH_DPWROK RH56 2 @ 1 0_0402_1%
DSW_PWROK BF14 PBTN_OUT#_R RH57 1 @ 2 0_0201_5% SIO_PWRBTN#
2 1 BL6 GPD3/PWRBTN# BD14 AC_PRESENT_R AC_PRESENT SIO_PWRBTN# <5,19,38>
<38> ME_SUS_PWR_ACK RH59 @ 0_0402_1% SUSWARN# RH58 1 @ 2 0_0201_5%
1 2 SUSACK#_R BF9 GPP_A13/SUSWARN#/SUSPWRDNACK GPD1/ACPRESENT BD16 AC_PRESENT <38>
<38> SUSACK# RH60 0_0402_5% BATLOW#
SUSWARN# RH62 1 @ 2 0_0402_5% GPP_A15/SUSACK# GPD0/BATLOW#
PCH_PCIE_WAKE# RH63 2 @ 1 0_0402_1% WAKE# BP9 BF7 @ TC63
<39> PCH_PCIE_WAKE# LAN_WAKE#_L WAKE# GPP_A11/PME# SM_INTRUDER#
RH77 2 @ 1 0_0402_1% BE15 BG19 RH64 2 1 1M_0402_5%
<38> LAN_WAKE# PCH_GPD11 GPD2/LAN_WAKE# INTRUDER# +RTCVCC
BC15
BB16 GPD11/LANPHYPC BC7 RH71 1 @ 2 0_0201_5%
<42> EN_CAM# GPD7/RSVD GPP_B11/EXT_PWR_GATE# BD6 VRALERT#
GPP_B2/VRALERT#
11 OF 20
+3VS KBL-Y_BGA1515
PCH_RSMRST#_R RH67 1 @ 2 0_0402_5% PCH_DPWROK_R

5
UH3 SIO_SLP_S5# @ TC2

VR_ON
W'ͺWtZK< ĐŽŶŶĞĐƚ ƚŽ sĐĐ^tϯͺϯ ƉŽǁĞƌ ƌĂŝů ŵŽŶŝƚŽƌŝŶŐ ĐŝƌĐƵŝƚ ƚŽ SIO_SLP_A#
1 ƐƵƉƉŽƌƚ ĞĞƉ ^ǆ ƐƚĂƚĞ͘dŚŝƐ ƐŝŐŶĂů ĐĂŶ ďĞ ƚ ŝ ĞĚ ƚ Ž Z^ DZ^dηĨ Žƌ Ɖů Ăƚ ĨŽ ƌŵ
Ɛ @ TC10
P
<22,55> VR_ON B PCH_PWROK SIO_SLP_WLAN#

4 ƚŚĂƚ ĚŽ ŶŽƚ ƐƵƉƉŽƌƚ ƚŚĞ ĞĞƉ ^ǆ ƐƚĂƚĞ͘dŚĞ ^t ƌĂŝůƐ ŵƵƐƚ ďĞ ƐƚĂďůĞ @ TC11
2 O
<55> VCORE_PG A ĨŽƌ Ăƚ ůĞĂƐƚ ϭϬ ŵƐ ďĞĨŽƌĞ WtZK< ŝƐ ĂƐƐĞƌƚĞĚ ƚŽ W,͘
G
TC7SH08FU_SSOP5
3
W'ͺ^>Wͺη͕ dŚŝƐ ƐŝŐŶĂů ŝƐ ƵƐĞĚ ƚŽ ĐŽŶƚƌŽů ƉŽǁĞƌ ƚŽ ĚĞǀŝĐĞƐ ŽŶ ƚŚĞ ƉůĂƚ Ĩ Žƌ ŵŝ Ŷ
W'ͺ^h^<η͕ ƚŚŝƐ ƐŝŐŶĂů ŝƐ ĚƌŝǀĞŶ ĨƌŽŵ ƚŚĞ ƉůĂƚ Ĩ Žƌ ŵ ƚ Ž W , ƚ Ž ĂĐŬŶŽ ǁůĞĚŐĞ ĐŽŶũƵŶĐƚ ŝ ŽŶ ǁŝƚ Ś ƚ ŚĞ/ Ŷƚ Ğů Z D Ɛ ƵďͲƐǇƐƚ Ğ ŵ ͘ dŚŝ Ɛ Ɛŝ ŐŶĂů ǁŝůů ďĞ ĂƐƐĞƌƚ ĞĚŝ Ŷ
ƚŚĂƚ ŚĂƐ ƌĞĐĞŝǀĞĚ ƚŚĞ ^h^tZEη ƐŝŐŶĂůƐ ĂŶĚ ŝƚ ŝƐ ƉƌĞƉĂƌŝŶŐ ƚŽ ŐŽ ŝŶƚŽ ĞĞƉ^ǆ DͲŽĨ Ĩ Ɛƚ Ăƚ Ğ͘/Ĩ Dϯŝ Ɛ ŶŽƚ Ɛ ƵƉƉŽƌƚ ĞĚ ƚ ŚĞŶ ^>Wͺη ǁŝůů ŚĂǀĞ ƚ ŚĞ ƐĂ ŵĞ ƚ ŝŵŝ ŶŐƐ
@ RH69 +1.0V_VCCST
ŵŽĚĞ͘ĨŽƌ Ăƚ ůĞĂƐƚ ϭϬ ŵƐ ďĞĨŽƌĞ WtZK< ŝƐ ĂƐƐĞƌƚĞĚ ƚŽ W,͘ ĂƐ ^>Wͺ^ϯη͘
1 2
A
0_0402_5% A
1
W'ͺ^>Wͺ^h^η͕ Ă ůŽǁ ŽŶ ƚŚŝƐ ƐŝŐŶĂů ŝŶĚŝĐĂƚĞƐ ƚŚĂƚ W, ŝƐ ŝŶ ĞĞƉ ^ǆ ƐƚĂƚĞ ĂŶĚ ƚŚĂƚ
RH66 ͬƉůĂƚ Ĩ Žƌ ŵů ŽŐŝ Đ ĚŽĞƐ ŶŽƚ ŶĞĞĚ ƚ Ž ŬĞĞƉ ƚ ŚĞ Wƌŝ ŵĂƌ Ǉ ZĂŝů Ɛ KE͘
1K_0201_5%
2
RC79
1 2 VCCST_PWRGD Security Classification Compal Secret Data Compal Electronics, Inc.
60.4_0402_1% 2041/09/08 2013/10/28 Title
R03_0629 For Thermal diode placement del UH2 RH4 SKL Y(5/13) CLK,GPIO
<22> H_VCCST_PWRGD_P
5 4 3 2 1
5 4 3 2 1
SKYLAKE_ULX
@ UC1F R03_0629 ID pin is on PCH for BC or CSMB selector
Rev0.87
LPSS ISH
R03_0706 Support BSSB DCI
BC3
<30> TS_I2C_RST# GPP_B15/GSPI0_CS#
AW10 P11
AW6 GPP_B16/GSPI0_CLK GPP_D9 T7
<23> CABC_EN GPP_B18 GPP_B17/GSPI0_MISO GPP_D10
Strap Pin BB4 T5
GPP_B18/GSPI0_MOSI GPP_D11 T11 DCI_CLK <25>
BB2 GPP_D12 DCI_DATA <25>
D D
SIO_EXT_SCI# AW12 GPP_B19/GSPI1_CS# P7 ISH_I2C0_SDA ISH@ RR33 1 2 0_0201_5%
<38> SIO_EXT_SCI# GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA ISH_I2C0_SCK ISH_I2C0_SDA_R <30> +3V_PCH
AW4 P5 ISH@ RR32 1 2 0_0201_5%
<42> TS_PWR_EN GPP_B22 Strap Pin AW8 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL ISH_I2C0_SCK_R <30> $&&(/
GPP_B22/GSPI1_MOSI T9
GPP_D7/ISH_I2C1_SDA @ TC41
2
AC8 T3
Vinafix.com
GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL @ TC42
AA8 RH142 BC@
<38> DEBUG_UART_TX GPP_C9/UART0_TXD
AA10 AM7 100K_0201_5%
HOST_SD_WP# AA12 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AT9
<37> HOST_SD_WP# GPP_C11/UART0_CTS# 1.8V GPP_F11/I2C5_SCL/ISH_I2C2_SCL
1
UART2_RXD AD5 U10 DDR_CHB_EN BID_BC
<24,38> UART2_RXD UART2_TXD GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA DDR_CHA_EN
AD7 U4
<24,38> UART2_TXD SIO_EXT_WAKE# GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK BID_BC
AD3 U6
<38> SIO_EXT_WAKE# GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS#
2
AD9 V9
<37> MEDIACARD_IRQ# GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT# RH143 CSMB@
I2C0_SDA_TS AD11 AC6 KB_DET#
<30> I2C0_SDA_TS I2C0_SCK_TS GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD KB_DET# <39> 100K_0201_5%
AB3 AC4
<30> I2C0_SCK_TS GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD AUDIO_PWR_EN <42,43>
AB7
<34>
1
AB9 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB5 PCH_MUTE#
<40> I2C1_SDA_TP GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
AB11
<40> I2C1_SCK_TP GPP_C19/I2C1_SCL PCH_ACC1_INT1 ISH@ RR29 1
BF11 2 0_0201_5%
AP3 GPP_A18/ISH_GP0 BD2 PCH_ACC1_INT1_R <30>
AP7 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BJ1 PCH_ACC2_INT1 ISH@ RR30 1 2 0_0201_5%
GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 NB_MODE_R PCH_ACC2_INT1_R <30>
BL3 RR44 1 2 0_0201_5%
GPP_A21/ISH_GP3 ISH_GP4_R NB_MODE# <30,38>
AP5 1.8V BJ3 @ RR45 1 2 0_0201_5%
GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 NB_LID#_R ISH_GP4 <38>
AT7 BD4 @ RR43 1 2 0_0201_5%
GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 TAB_LID#_R NB_LID# <38,41>
BJ4 @ RR31 1 2 0_0201_5%
Sx_EXIT_HOLDOFF# / GPP_A12 / BM_BUSY#/ISH_GP6 TAB_LID# <38,41>
AN4
AN6 GPP_F8/I2C4_SDA
C GPP_F9/I2C4_SCL R03_0707 Reserved for ISH behavior C
6 OF 20
+3VS
KBL-Y_BGA1515
R03_0622 Del RC286,RC287 change power rail to +3V_TS

HOST_SD_WP# RH134 1 2 10K_0201_5%
DDR_CHA_EN RH140 1 2 100K_0402_5%
DDR_CHB_EN RH141 1 2 100K_0402_5%
DDR_CHA_EN @ RH61 1 2 SHORT PADS

DDR_CHB_EN @ RH65 1 2 SHORT PADS
NB_MODE_R ISH@ RH468 1 2 10K_0201_5%
+3V_PCH PCH_ACC1_INT1 RH464 1 2 10K_0201_5%
PCH_ACC2_INT1 RH465 1 2 10K_0201_5%
RC202 1 2 49.9K_0201_1% SIO_EXT_WAKE#
RC200 1 2 49.9K_0201_1% UART2_RXD

RC201 1 2 49.9K_0201_1% UART2_TXD
RC7 1 2 10K_0201_5% SIO_EXT_SCI# +3V_PCH
KB_DET# RC273 1 2 10K_0201_5%

NB_LID#_R @ RH466 1 2 10K_0201_5%
B TAB_LID#_R @ RH467 1 2 10K_0201_5% B
+3VS
RH47 1 @ 2 0_0201_5%
Functional Strap Definitions Functional Strap Definitions

+3V_PCH
GPP_B18 (Internal Pull Down): GSSPIO_MOSI GPP_B22 (Internal Pull Down): GSSPI1_MOSI RH54 1 2 0_0201_5%
No Reboot Boot BIOS Strap Bit
0 = Disable No Reboot mode. --> AAU30 Use 0 = SPI Mode --> AAU30 Use R03_0707 +3VS leakage change +3V_PCH
1 = Enable No Reboot Mode. (PCH will disable the TCO 1 = LPC Mode
Timer system reboot feature). This function is useful ISH_I2C0_SDA RC291 1 2 2.2K_0201_5%
when running ITP/XDP. ISH_I2C0_SCK RC290 1 2 2.2K_0201_5%
+3V_PCH +3V_PCH
RC84 RC85
1 @ 2 GPP_B18 1 @ 2 GPP_B22
150K_0402_5% 150K_0402_5%
A A

SKL Y(6/13) GPIO,LPIO,I2C
5 4 3 2 1
5 4 3 2 1
SKYLAKE_ULX
@ UC1H
Rev0.87
C20 C16
<26> PCIE_PRX_TBTX_N1 PCIE1_RXN/USB3_5_RXN USB3_1_RXN USB3RN1 <25>
A20 A16 USB DP
<26> PCIE_PRX_TBTX_P1 PCIE1_RXP/USB3_5_RXP USB3_1_RXP USB3RP1 <25>
D G20 G16 D
<26> PCIE_PTX_TBRX_N1
J20 PCIE1_TXN/USB3_5_TXN USB3_1_TXN J16
USB3TN1 <25> MUX
<26> PCIE_PTX_TBRX_P1 PCIE1_TXP/USB3_5_TXP SSIC / USB3 USB3_1_TXP USB3TP1 <25>
B19 B15
<26> PCIE_PRX_TBTX_N2 PCIE2_RXN/USB3_6_RXN USB3_2_RXN/SSIC_1_RXN
D19 D15
<26> PCIE_PRX_TBTX_P2 PCIE2_RXP/USB3_6_RXP USB3_2_RXP/SSIC_RXP
F19 F15
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<26> PCIE_PTX_TBRX_N2 PCIE2_TXN/USB3_6_TXN USB3_2_TXN/SSIC_TXN
H19 H15
<26> PCIE_PTX_TBRX_P2 PCIE2_TXP/USB3_6_TXP USB3_2_TXP/SSIC_TXP
ůƉŝŶĞZŝĚŐĞ C22 C18
W/Ğ'ĞŶϯǆϰ <26> PCIE_PRX_TBTX_N3
A22 PCIE3_RXN USB3_3_RXN A18
<26> PCIE_PRX_TBTX_P3 PCIE3_RXP USB3_3_RXP/SSIC_2_RXP
G22 G18
<26> PCIE_PTX_TBRX_N3 PCIE3_TXN USB3_3_TXN
J22 J18
<26> PCIE_PTX_TBRX_P3 PCIE3_TXP USB3_3_TXP
B21 B17
<26> PCIE_PRX_TBTX_N4 PCIE4_RXN USB3_4_RXN
D21 D17
<26> PCIE_PRX_TBTX_P4 PCIE4_RXP USB3_4_RXP
F21 F17
<26> PCIE_PTX_TBRX_N4 PCIE4_TXN USB3_4_TXN
H21 H17
<26> PCIE_PTX_TBRX_P4 PCIE4_TXP USB3_4_TXP
C24 AJ6 USB Type C
<31> PCIE_PRX_SSDTX_N5 PCIE5_RXN USB2N_1 USB20_N1 <24>
A24 AJ4
<31> PCIE_PRX_SSDTX_P5
CH33 1 2 0.22U_0201_6.3V6M PCIE_PTX_SSDRX_N5_C G24 PCIE5_RXP USB2P_1 USB20_P1 <24> (nAR)
<31> PCIE_PTX_SSDRX_N5 PCIE_PTX_SSDRX_P5_C PCIE5_TXN
CH34 1 2 0.22U_0201_6.3V6M J24 AH5
<31> PCIE_PTX_SSDRX_P5 PCIE5_TXP USB2N_5 USB20_N5 <30>
AH3 Sensor Hub
USB2P_5 USB20_P5 <30>
B23
<31> PCIE_PRX_SSDTX_N6 PCIE6_RXN PCIE/USB3/SATA
D23 AF5
<31> PCIE_PRX_SSDTX_P6 PCIE_PTX_SSDRX_N6_C PCIE6_RXP USB2N_7 USB20_N7 <39>
CH31 1 2 0.22U_0201_6.3V6M F23 AF3 Fingerprint
<31> PCIE_PTX_SSDRX_N6 PCIE_PTX_SSDRX_P6_C PCIE6_TXN USB2 USB2P_7 USB20_P7 <39>
D͘Ϯ^^ CH32 1 2 0.22U_0201_6.3V6M H23
<31> PCIE_PTX_SSDRX_P6 PCIE6_TXP AL6 Touch Panel
W/Ğ'ĞŶϯǆϰ C26 USB2N_3 AL4
USB20_N3 <30>
<31> PCIE_PRX_SSDTX_N7 PCIE7_RXN/SATA0_RXN USB2P_3 USB20_P3 <30>
C A26 C
<31> PCIE_PRX_SSDTX_P7 PCIE_PTX_SSDRX_N7_C PCIE7_RXP/SATA0_RXP
CH23 1 2 0.22U_0201_6.3V6M G26 AG6
<31> PCIE_PTX_SSDRX_N7 PCIE_PTX_SSDRX_P7_C PCIE7_TXN/SATA0_TXN USB2N_9 USB20_N9 <23>
CH24 1 2 0.22U_0201_6.3V6M J26 AG4 CAM & IR CAM
<31> PCIE_PTX_SSDRX_P7 PCIE7_TXP/SATA0_TXP USB2P_9 USB20_P9 <23>
RH185 1 @ 2 0_0201_5% SATA_PRX_SSDTX_N8_R B25 AM3
<31> SATA_PRX_SSDTX_N8 SATA_PRX_SSDTX_P8_R PCIE8_RXN/SATA1A_RXN USB2N_2 USB20_N2 <32>
<31> SATA_PRX_SSDTX_P8 RH186 1 @ 2 0_0201_5% D25 AM5
USB20_P2 <32> NGFF(WLAN)
CH25 1 2 0.22U_0201_6.3V6M SATA_PTX_SSDRX_N8_C F25 PCIE8_RXP/SATA1A_RXP USB2P_2
^d ^^ <31> SATA_PTX_SSDRX_N8
1 2 0.22U_0201_6.3V6M SATA_PTX_SSDRX_P8_C H25 PCIE8_TXN/SATA1A_TXN N2 USB2_COMP
<31> SATA_PTX_SSDRX_P8 CH26 RC87 1 2 113_0402_1%
PCIE8_TXP/SATA1A_TXP USB2_COMP AF7 USB_ID
C28 USB2_ID AE6 USB2_VBUSSENSE
<37> PCIE_PRX_CARDTX_N9 PCIE9_RXN USB2_VBUSSENSE
ĂƌĚƌĞĂĚĞƌ A28
<37> PCIE_PRX_CARDTX_P9 PCIE_PTX_CARDRX_N9_C PCIE9_RXP USB_OC0#
CH27 1 2 0.1U_0201_10V6K G28 N12
W/Ğ'ĞŶϮǆϭ <37> PCIE_PTX_CARDRX_P9
CH28 1 2 0.1U_0201_10V6K PCIE_PTX_CARDRX_P9_C J28 PCIE9_TXN GPP_E9/USB2_OC0# M11 USB_OC1# USB_OC0# <28>
<37>PCIE_PTX_CARDRX_N9 PCIE9_TXP GPP_E10/USB2_OC1# USB_OC2# USB_OC1# <24>
F8
B27 GPP_E11/USB2_OC2# B8 USB_OC3#
<32> PCIE_PRX_WLANTX_N10 PCIE10_RXN GPP_E12/USB2_OC3#
D27
t>E <32> PCIE_PRX_WLANTX_P10
CH30 1 2 0.1U_0201_10V6K PCIE_PTX_WLANRX_N10_C F27 PCIE10_RXP F10
W/Ğ'ĞŶϮǆϭ <32> PCIE_PTX_WLANRX_N10
CH29 1 2 0.1U_0201_10V6K PCIE_PTX_WLANRX_P10_C H27 PCIE10_TXN GPP_E4/DEVSLP0 H10
<32> PCIE_PTX_WLANRX_P10 PCIE10_TXP GPP_E5/DEVSLP1 SSD_DEVSLP <31>
L8
RC88 1 2 100_0201_1% PCIE_RCOMPN A9 GPP_E6/DEVSLP2
PCIE_RCOMPP B10 PCIE_RCOMPN G11 GPP_E0 1 @ 2
PCIE_RCOMPP GPP_E0/SATAXPCIE0/SATAGP0 J11 SSD_IFDET RH213 0_0201_5%
XDP_PRDY# GPP_E1/SATAXPCIE1/SATAGP1 SSD_IFDET <31>
D51 N10
<5> XDP_PRDY# XDP_PREQ# PROC_PRDY# GPP_E2/SATAXPCIE2/SATAGP2
B55 SLP_S0 issue(intel request) 11/16
<5> XDP_PREQ# PCH_GPIOA7 PROC_PREQ# PCH_GPP_E8
BF3 H8
GPP_A7/PIRQA# GPP_E8/SATALED#
8 OF 20
KBL-Y_BGA1515
B B
closed MCP 1000 mils
TC1 @ XDP_PRDY#
TC54 @ XDP_PREQ# +3V_PCH
USB_OC0# RH122 1 2 10K_0201_5%

USB_OC1# RH123 1 2 10K_0201_5%
USB_OC2# RH124 1 2 10K_0201_5%
USB_OC3# RH125 1 2 10K_0201_5%
SSD_IFDET RH155 1 2 10K_0201_5%
+3VS
PCH_GPP_E8 RH135 1 2 10K_0201_5%

PCH_GPIOA7 RC90 1 2 10K_0201_5%
USB_ID RH153 1 2 1K_0201_5%

USB2_VBUSSENSE RH154 1 2 1K_0201_5%
A A

SKL Y(7/13) PCIE,USB
5 4 3 2 1
5 4 3 2 1
D D
+1.2V_DDR SKYLAKE_ULX +0.85VS_VCCIO

@ UC1N
Rev0.87
AH64 AC23
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BA27
BA37
BA49
BP32
BP50
VDDQ
VDDQ
VDDQ 1.2V@
VDDQ
VDDQ
2A
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
AF24
AN26
AC24
AF26
AR26
AK64 VDDQ VCCIO AE23
BA29 VDDQ VCCIO AH26
BA41 VDDQ VCCIO AT26
BA51 VDDQ VCCIO AE24
VDDQ 0.85V@3A VCCIO
BP34 AK26
VDDQC trace BP56 VDDQ VCCIO AE26
filter width = 6mm AT64 VDDQ VCCIO AL26
BA31 VDDQ VCCIO
Total etch length BA43 VDDQ AV26
VDDQ VCCIO_DDR
= 186.94mils BN64
BP40 VDDQ VCCIO_DDR
AV36
AV46
PDG P597 BP58 VDDQ VCCIO_DDR AW31
AV64 VDDQ VCCIO_DDR AW41
BA33 VDDQ VCCIO_DDR AW51
+1.2V_DDR +VDDQ_CPU_CLK BA45 VDDQ VCCIO_DDR AV28
LC1 BP24 VDDQ VCCIO_DDR AV38
1 2 BP42 VDDQ VCCIO_DDR AV48
1NH_LQG15HN1N0S02D_0.3NH BP64 VDDQ VCCIO_DDR AW33
C BA25 VDDQ VCCIO_DDR AW43 C
1 VDDQ VCCIO_DDR
CC9 BA35 AV30
BA47 VDDQ VCCIO_DDR AV40
0.1U_0201_10V6K BP26 VDDQ VCCIO_DDR AV50
VDDQ VCCIO_DDR
Backside cap 2 BP48 AW35
BA39 VDDQ VCCIO_DDR AW45
VDDQC VCCIO_DDR AV32
V26 VCCIO_DDR AV42
s^d ͗ ^ƵƐƚĂŝŶ ǀŽůƚĂŐĞ ĨŽƌ ƉƌŽĐĞƐƐŽƌ ƐƚĂŶĚďǇ +1.0V_VCCST
Y26 VCCST VCCIO_DDR AW27
ŵŽĚĞƐ VCCST ϭ͘ϬsΛϭϬϬŵ ;ϲϬŵͿ VCCIO_DDR AW37 +0.85VS_VCCIO
R26 VCCIO_DDR AW47
s^d' ͗ 'ĂƚĞĚ ƐƵƐƚĂŝŶ ǀŽůƚĂŐĞ ĨŽƌ ƉƌŽĐĞƐƐŽƌ ƐƚĂŶĚďǇ +1.0VS_VCCSTG
T26 VCCSTG VCCIO_DDR AV34
ŵŽĚĞƐ VCCSTG ϭ͘ϬsΛϮϬŵ VCCIO_DDR
1
AV44
AE27 VCCIO_DDR AW29 RC97
+1.2V_VCCPLL_OC VCCPLL_OC VCCIO_DDR
AF27 ϭ͘ϮsΛϭϬϬŵ AW39 @
VCCPLL_OC VCCIO_DDR AW49 100_0201_1%
R27 VCCIO_DDR
+1.0V_VCCPLL
2
T27 VCCPLL AT24 VCCIO_SENSE
VCCPLL ϭ͘ϬsΛϭϬϬŵ VCCIO_SENSE AR24 VSSIO_SENSE VCCIO_SENSE <52>
VSSIO_SENSE
1
CPU POWER 3 OF 4
RC98
14 OF 20 0_0201_5%
KBL-Y_BGA1515
2
B B
+1.2V_VCCPLL_OC +1.0V_VCCST +1.0V_VCCPLL +1.0VS_VCCSTG

RC106
1 2
BSC Side BSC Side 1 0_0402_5% BSC Side
1 CC165 1 1
CC56 CC17 CC18
0.1U_0201_10V6K
0.1U_0201_10V6K 2 0.1U_0201_10V6K 0.1U_0201_10V6K
2 2 2
A A

SKL Y(8/13) Power
5 4 3 2 1
5 4 3 2 1
+1.0V_PRIM RC160
0_0603_5%
1 @ 2 +VCCPRIM_1P0
1 1 1 1 Zd>ŽŐŝĐWƌŝŵĂƌǇtĞůůϯ͘ϯs͘dŚŝƐƉŽǁĞƌƐƵƉƉůŝĞƐƚŚĞZdŝŶƚĞƌŶĂůsZD͘/ƚǁŝůů
1
CC32 CC48 CC34 CC35 CC36 ďĞŽĨ Ĩ ĚƵƌŝ ŶŐ ĞĞƉ ^ǆ ŵŽĚĞ͘
SKYLAKE_ULX
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0402_25V6 @ UC1P
2
2 2 2 2 WƌŝŵĂƌǇtĞůůϭ͘Ϭs͗&Žƌ/ͬKďůŽĐŬƐ͕ƵŶŐĂƚĞĚ Rev0.87
+VCCPRIM_1P0 AH18 /^,^ZDƉŽǁĞƌ͕h^&ŝŐŝƚĂů>ŽŐŝĐ͕ AT1 +3.3V_PCH_GPP 1.8V/0.009A
AH19 VCCPRIM_1P0 :d'͕dŚĞƌŵĂů^ĞŶƐŽƌĂŶĚD/W/W,z͘ VCCPGPPA AU2
ůŽƐĞƚŽWŝŶ,ϭϴ ůŽƐĞƚŽWŝŶ,ϭϯ ůŽƐĞƚŽWŝŶZϮϭ ůŽƐĞƚŽWŝŶϭϱ ůŽƐĞƚŽWŝŶsϭ 1.0V/0.599A VCCPRIM_1P0 VCCPGPPA +3.3V_PCH_GPP
AK18 1.0V@ AV1 3.3V/0.004A
AL18 VCCPRIM_1P0 W^tͺϭWϬĞĞƉ^ǆtĞůůϭ͘Ϭs͗dŚŝƐƌĂŝůŝƐŐĞŶĞƌĂƚĞĚďǇŽŶ VCCPGPPB AW2
D VCCPRIM_1P0 VCCPGPPB +3.3V_PCH_GPP D
ĚŝĞ^tůŽǁĚƌŽƉŽƵƚ;>KͿůŝŶĞĂƌǀŽůƚĂŐĞƌĞŐƵůĂƚŽƌƚŽƐƵƉƉůǇ AH1 3.3V/0.006A
+VCCPRIM_CORE_R AE18 ^t'W/KƐ͕^tĐŽƌĞůŽŐŝĐĂŶĚ^th^ϮůŽŐŝĐ͘ŽĂƌĚ VCCPGPPC AJ2
AE19 VCCPRIM_CORE ŶĞĞĚƐƚŽĐŽŶŶĞĐƚϭƵ&ĐĂƉĂĐŝƚŽƌƚŽƚŚŝƐƌĂŝůĂŶĚƉŽǁĞƌƐŚŽƵůĚ VCCPGPPC AF1 +3.3V_PCH_GPP
1.1A VCCPRIM_CORE EKdďĞĚƌŝǀĞŶĨƌŽŵƚŚĞďŽĂƌĚ͘tŚĞŶƉƌŝŵĂƌǇǁĞůůƉŽǁĞƌŝƐ VCCPGPPD
3.3V/0.008A
AF18 AG2
+VCCPRIM_CORE RC165 +1.0VA_GATE VCCPRIM_CORE ƵƉ͕ƚŚŝƐƌĂŝůŝƐǇƉĂƐƐĞĚĨƌŽŵ sWZ/DͺϭƉϬ͘ VCCPGPPD +3.3V_PCH_GPP
RC163 AF19 AA2 3.3V/0.006A
VCCPRIM_CORE VCCPGPPE
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0_0603_5% 0_0603_5% AR16 1.0V/0.85V@ AB1
1 2 +VCCPRIM_CORE_R 1 2 +VCCSRAM_1P0 DCPDSW_1P0 AT16 VCCPRIM_CORE VCCPGPPE AN2 +1.8V_PCH_GPP
@ @ 1.8V/0.033A
VCCPRIM_CORE VCCPGPPF AP1
1 1 1 1 DCPDSW_1P0 VCCPGPPF +3.3V_PCH_GPP
CC129 CC130 CC29 CC42 AL2 AN15 3.3V/0.041A
AM1 DCPDSW_1P0 VCCPGPPG AP13
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 1U_0402_6.3V6K DCPDSW_1P0 VCCPGPPG
2 2 2 2 +VCCPRIM_1P0 V1 DŽĚW,zůǁĂǇƐKŶWƌŝŵĂƌǇϭ͘Ϭs͗ůǁĂǇƐŽŶƉƌŝŵĂƌǇ AC2 +VCCPRIM_3P3
W2 VCCMPHYAON_1P0 ƐƵƉƉůǇ ĨŽƌ W/ĞͬD/ͬh^ϯͬ^dͬD/W/ DW,z ůŽŐŝĐ VCCPRIM_3P3 AD1
ůŽƐĞƚŽWŝŶϭϴĂŶĚZϭϲ ůŽƐĞƚŽWŝŶϮϭ ůŽƐĞƚŽWŝŶ>Ϯ 1.0V/0.022A VCCMPHYAON_1P0 VCCPRIM_3P3
3.3V/0.075A
+1.0V_MPHYGT T1 AA15 +VCCPRIM_1P0
T15 VCCMPHYGT_1P0 VCCPRIM_1P0 AA16
1.0V/0.154A VCCMPHYGT_1P0
DŽĚW,zǆƚĞƌŶĂůůǇ'ĂƚĞĚWƌŝŵĂƌǇϭ͘Ϭs͗
VCCPRIM_1P0
1.0V/0.599A
+3V_PCH +3VALW +3VALW_DSW T16 ǆƚĞƌŶĂůůǇŐĂƚĞĚƉƌŝŵĂƌǇƐƵƉƉůǇĨŽƌ dŚĞƌŵĂů ^ĞŶƐŽƌ WƌŝŵĂƌǇ tĞůů ϭ͘ϴ s
U2 VCCMPHYGT_1P0 W/ĞͬD/ͬh^ϯͬ^dͬD/W/ DW,z ůŽŐŝĐ͘ AE15 +1.8V_PCH_GPP
+1.0VA_GATE VCCMPHYGT_1P0 VCCATS_1P8 AE16
RC157
+1.0V_MPHYPLL VCCATS_1P8
1.8V/0.006A ZdtĞůů^ƵƉƉůǇ͘dŚŝƐƌĂŝůĐĂŶĚƌŽƉ
0_0603_5% R213 1 2 0_0402_5% V15 ŶĂůŽŐƐƵƉƉůǇĨŽƌh^ϯ͕W/Ğ'ĞŶϮͬ'ĞŶϯ͕^dϯĂŶĚ ƚŽϮ͘ϬsŝĨĂůůŽƚŚĞƌƉůĂŶĞƐĂƌĞŽĨ Ĩ͘
1 2 +1.0V_MPHYGT @ R212 1 2 0_0402_5% V16 VCCAMPHYPLL_1P0 D/W/W>>ϭ͘Ϭs͗dŚŝƐ AK19 +VCCPRIM_3P3 dŚŝƐƉŽǁĞƌ
@ 1.0V/0.088A VCCAMPHYPLL_1P0 VCCRTCPRIM_3P3
ƌĂŝůŝƐĨƌŽŵĞǆƚĞƌŶĂůůǇŐĂƚĞĚĚŽŵĂŝŶ͘&ŝůƚĞƌŝŶŐ ƌĞƋƵŝƌĞĚ͘ AL19 3.3V/0.001A ŝƐŶŽƚĞǆƉĞĐƚĞĚƚŽďĞƐŚƵƚŽĨ Ĩ
1 1 1 +1.0V_APLL VCCRTCPRIM_3P3 ƵŶůĞƐƐƚŚĞZdďĂƚ ƚ ĞƌǇŝ Ɛ ƌ Ğ ŵŽǀĞĚ
CC20 CC25 CC19 AA18
VCCAPLL_1P0 ŽƌĚƌĂŝŶĞĚ͘
1.0V/0.026A AA19 ŶĂůŽŐƐƵƉƉůǇĨŽƌKW/͕h^ϮĂŶĚƵĚŝŽW>> AR19
VCCAPLL_1P0 VCCRTC +RTCVCC
22U_0603_6.3V6M 1U_0402_6.3V6K 0.1U_0201_10V6K WƌŝŵĂƌǇ ϭ͘Ϭs͗ &ŝůƚĞƌŝŶŐ ƌĞƋƵŝƌĞĚ͘ AT19 3.3V/0.001A
2 2 2 +VCCPRIM_1P0 AH13 VCCRTC
+3VALW_DSW AH15 VCCPRIM_1P0 AT18 1 2
1.0V/0.599A ZdĚĞͲĐŽƵƉůŝŶŐ ĐĂƉĂĐŝƚŽƌ
VCCPRIM_1P0 ŽŶůǇ͘dŚŝƐƌĂŝůƐŚŽƵůĚ EKd DCPRTC AV18 CC31 0.1U_0402_25V6 +1.0V_VCCCLK
ůŽƐĞƚŽWŝŶdϭĂŶĚdϭϱ ďĞĚƌŝǀĞŶ͘ DCPRTC
AL15 ůŽƐĞƚŽWŝŶdϭϴ
AM13 VCCDSW_3P3 V18
1 3.3V/0.071A VCCDSW_3P3
ĞĞƉ^ǆtĞůůĨŽƌ'W'W/KƐĂŶĚh^Ϯ
VCCCLK1
+1.0VA_GATE RC175 CC131 1.0V/0.035A Y18 1.0V/0.035A
C 0_0603_5% AT23 VCCCLK1 C
+1.0V_MPHYPLL +3V_HDA VCCHDA
1 @ 2 0.1U_0201_10V6K 3.3V/0.068A AV22 ,ƵĚŝŽWŽǁĞƌϯ͘ϯs͕ϭ͘ϴs͕ϭ͘ϱ V19
2 VCCHDA s͘&Žƌ/ŶƚĞů,ŝŐŚĞĨ ŝ Ŷŝ ƚ ŝ ŽŶ ƵĚŝŽ VCCCLK2 Y19
1 1 1 1 +3.3V_VCCSPI
ůŽĐŬƵĨ Ĩ ĞƌƐ Wƌŝ ŵĂƌǇ ϭ͘ Ϭ s
VCCCLK2
1.0V/0.029A
CC132 CC133 CC134 CC135 ůŽƐĞƚŽWŝŶ>ϭϱ AT15 1.0V/0.029A
AV15 VCCSPI V23
3.3V/0.011A VCCSPI
^W/WƌŝŵĂƌǇtĞůůϯ͘ϯsŽƌϭ͘ϴs
VCCCLK3
0.1U_0201_10V6K 22U_0603_6.3V6M 0.1U_0201_10V6K 0.1U_0201_10V6K ůŽĐŬƵĨ Ĩ ĞƌƐ Wƌŝ ŵĂƌǇ ϭ͘ Ϭ s Y23 1.0V/0.024A
2 2 2 2 +VCCSRAM_1P0 AA21 VCCCLK3
VCCSRAM_1P0
1.0V/0.024A
1.0V/0.565A AA23 ^ZDWƌŝŵĂƌǇtĞůůϭ͘Ϭs͘ĞĚŝĐĂƚĞĚ V21
AK23 VCCSRAM_1P0 ^ZDƌĂŝůĂŶĚĐĂŶŚĂǀĞŽŶďŽĂƌĚ VCCCLK4 Y21
ůŽƐĞƚŽWŝŶsϭϱ VCCSRAM_1P0
VCCCLK4
1.0V/0.033A
AL23 ƉŽǁĞƌĚŽǁŶŐĂƚĞĐŽŶƚƌŽů͘ 1.0V/0.033A
AN23 VCCSRAM_1P0 R21
+1.0V_PRIM +3V_PCH AR23 VCCSRAM_1P0 VCCCLK5 R23
RC128
VCCSRAM_1P0
VCCCLK5
1.0V/0.004A
LC3
+1.0V_APLL
0_0603_5%
+3.3V_VCCSPI +VCCPRIM_3P3
1.0V/0.004A
1 2 1 @ 2 AH21 R19
AK21 VCCPRIM_3P3 VCCCLK6 T19
1 1 1 3.3V/0.075A VCCPRIM_3P3
WƌŝŵĂƌǇ tĞůů ϯ͘ϯ s ůŽĐŬƵĨ Ĩ ĞƌƐ Wƌŝ ŵĂƌǇ ϭ͘ Ϭ s
VCCCLK6
1.0V/0.01A
BLM18EG221SN1D_2P CC21 CC22 CC30 1.0V/0.010A
AR21 PCH POWER BA13
+VCCPRIM_1P0 VCCPRIM_1P0 GPP_B0/CORE_VID0 CORE_VID0 <52>
22U_0603_6.3V6M 22U_0603_6.3V6M 0.1U_0201_10V6K AT21 1.0V/0.599A BB12
2 2 2 VCCPRIM_1P0 GPP_B1/CORE_VID1 CORE_VID1 <52>
+VCCAPLLEBB_1P0 R15
ůŽƐĞƚŽWŝŶdϭϱ VCCAPLLEBB_1P0
1.0V/0.033A R16
VCCAPLLEBB_1P0 16 OF 20
KBL-Y_BGA1515
+3V_PCH RC166 +3V_PCH +3V_HDA +RTCVCC
W'ͺƉůĂĐĞ ĂƐ ĐůŽƐĞ ĂƐ ďĂůů
0_0603_5% L24
1 @ 2 +VCCPRIM_3P3 1 2 W'ͺs,ĚĞƐŝŐŶĨŽƌ,ƵĚŝŽs,ƐŚŽƵůĚďĞ
1 1 1 1 1 ĐŽŶŶĞĐƚĞĚƚŽϯ͘ϯsŽƌϭ͘ϱs͕ŽƌĚĞƐŝŐŶĞĚĨŽƌ/Ϯ^s, 1
1
1
CC44 CC158 CC52 CC54 CC53 2 BLM18EG221SN1D_2P CC23 ƐŚŽƵůĚďĞĐŽŶŶĞĐƚĞĚ ƚŽ ϭ͘ϴs Žƌ ϯ͘ϯs͘ CC33 CC45
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0402_25V6 1U_0402_6.3V6K 0.1U_0201_10V6K CC169 0.1U_0201_10V6K 1U_0402_6.3V6K 0.1U_0402_25V6

2
2
2 2 2 2 2 2
2.2P_0201_25V
B 1 B
ůŽƐĞƚŽWŝŶ,Ϯϭ ůŽƐĞƚŽWŝŶϮ ůŽƐĞƚŽWŝŶ<ϭϵ ůŽƐĞƚŽWŝŶdϮϯ ůŽƐĞƚŽWŝŶZϭϵ
+1.0VA_GATE RC161 +3V_PCH RC156

0_0603_5% 0_0603_5%
1 @ 2 +VCCAPLLEBB_1P0 1 @ 2 +3.3V_PCH_GPP
1 1 1 1 1 1 1
CC27 CC41 CC46 CC47 CC49 CC28 CC50
0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K

2 2 2 2 2 2 2
+1.0V_PRIM RC164 +1.0V_VCCCLK
ůŽƐĞƚŽWŝŶsϭ ůŽƐĞƚŽWŝŶ,ϭ ůŽƐĞƚŽWŝŶ&ϭ ůŽƐĞƚŽWŝŶϮ ůŽƐĞƚŽWŝŶdϭ ůŽƐĞƚŽWŝŶEϭϱ
0_0603_5% ůŽƐĞƚŽWŝŶZϭϱ
1 @ 2
+1.8V_PRIM RC158
0_0603_5%
1 @ 2 +1.8V_PCH_GPP
1 1 CC166 1 2 EMI@
+3V_HDA
CC43 CC40 2.2P_0201_25V
+VCCAPLLEBB_1P0 CC167 1 2 EMI@
+1.0V_VCCCLK 0.1U_0201_10V6K 1U_0402_6.3V6K 2.2P_0201_25V
2 2 +1.0V_APLL CC168 1 2 EMI@
ůŽƐĞƚŽWŝŶEϮ ůŽƐĞƚŽWŝŶϭϱ 2.2P_0201_25V
1 1 1
CC39 CC26 CC55
0.1U_0201_10V6K 0.1U_0201_10V6K 22U_0603_6.3V6M

2 2 2
ůŽƐĞƚŽWŝŶZϮϭ
ůŽƐĞƚŽWŝŶsϮϭ ůŽƐĞƚŽWŝŶZϭϵ
A A
+1.0V_VCCCLK
1
CC24
1
CC38
1
CC51 Security Classification Compal Secret Data Compal Electronics, Inc.
0.1U_0201_10V6K 0.1U_0201_10V6K 22U_0603_6.3V6M
2 2 2
SKL Y(9/13) Power
ůŽƐĞƚŽWŝŶsϭϵ ůŽƐĞƚŽWŝŶsϭϴ ůŽƐĞƚŽWŝŶsϮϯ AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Re v
5 4 3 2 1
5 4 3 2 1
+VCC_CORE +VCC_CORE +VCC_GT +VCC_GT

SKYLAKE_ULX SKYLAKE_ULX
@ UC1L @ UC1M
Rev0.87 Rev0.87
A64 M58 AA53 AC53
AE32 VCC VCC N34 AB62 VCCGT VCCGT AC63
AE40 VCC VCC N54 AC47 VCCGT VCCGT AD62
AH41 VCC VCC N63 AC55 VCCGT VCCGT AE59
AN32 VCC VCC P64 AD54 VCCGT VCCGT AF46
D
AT33 VCC VCC R61 AD64 VCCGT 1.5V@24A VCCGT AG53
D
AT41 VCC 1.5V@24A VCC V41 AE61 VCCGT VCCGT AK47

J64 VCC VCC AC41 AF47 VCCGT VCCGT AN44
L48 VCC VCC AE38 AJ53 VCCGT VCCGT AN51
M33 VCC VCC AH32 AK49 VCCGT VCCGT AT49
M43
M53
M64
N40
N59
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AL41
AT32
AT40
H63
L46
Vinafix.com AN46
AT43
AT50
N50
T46
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
N48
T44
T51
U59
V58
P60 VCC VCC L63 T54 VCCGT VCCGT W55
R57 VCC VCC M41 U61 VCCGT VCCGT Y43
T41 VCC VCC M51 V60 VCCGT VCCGT Y50
AA32 VCC VCC M62 W57 VCCGT VCCGT Y60
AE33 VCC VCC N38 Y44 VCCGT VCCGT AB56
AE41 VCC VCC N57 Y51 VCCGT VCCGT AC43
AK32 VCC VCC P58 Y62 VCCGT VCCGT AC50
AN41 VCC VCC R41 AB54 VCCGT VCCGT AC59
AT35 VCC VCC T32 AB64 VCCGT VCCGT AD58
B64 VCC VCC Y41 AC49 VCCGT VCCGT AE55
L40 VCC VCC AC32 AC57 VCCGT VCCGT AF43
L50 VCC VCC AE36 AD56 VCCGT VCCGT AF50
M35 VCC VCC AF41 AE53 VCCGT VCCGT AK44
M45 VCC VCC AL32 AE63 VCCGT VCCGT AK51
M56 VCC VCC AR41 AF49 VCCGT VCCGT AN49
N32 VCC VCC AT38 AK43 VCCGT VCCGT AT46
N42 VCC VCC F64 AK50 VCCGT VCCGT N44
N61 VCC VCC L44 +VCC_CORE AN47 VCCGT VCCGT R53
C P62 VCC VCC L54 AT44 VCCGT VCCGT T49 C
R59 VCC VCC M39 AT51 VCCGT VCCGT U55
VCC VCC VCCGT VCCGT
1
V32 M49 R51 V54
AA41 VCC VCC M60 RC147 T47 VCCGT VCCGT V64
AE35 VCC VCC N36 U53 VCCGT VCCGT W61
AF32 VCC VCC N55 100_0201_1% U63 VCCGT VCCGT Y47
VCC VCC dƌĂĐĞ>ĞŶŐƚŚфϮϱŵŝůƐ VCCGT VCCGT
AK41 V62 Y56
2
AR32 VCC L34 W59 VCCGT VCCGT AN50
VCC VCC_SENSE VCCSENSE <55> VCCGT VCCGT
AT36 L32 Y46 AT47
VCC VSS_SENSE VSSSENSE <55> VCCGT VCCGT
D64 Y54 N46
VCC VCCGT VCCGT
2
L42 Y64 T43
L52 VCC RC148 AB58 VCCGT VCCGT T50
M37 VCC B58 SOC_SVID_ALERT# AC44 VCCGT VCCGT U57 +VCC_GT
M47 VCC VIDALERT# A56 SOC_SVID_CLK 100_0201_1% AC51 VCCGT VCCGT V56
R63 VCC VIDSCK A58 SOC_SVID_DAT AC61 VCCGT VCCGT W53
1
VCC VIDSOUT VCCGT VCCGT
1
P56 AD60 W63
R32 VCC AA26 RC140 AE57 VCCGT VCCGT Y49 RC139
Y32 VCC VCCSTG AC26 2 @ 1 AF44 VCCGT VCCGT Y58
VCC VCCSTG +1.0VS_VCCSTG VCCGT VCCGT
AF51 AN43 Close CPU 100_0201_1%
0_0402_1% AK46 VCCGT VCCGT
2
CPU POWER 1 OF 4 VCCGT
AB60 N52
VCCGT VCCGT_SENSE VCCGT_SENSE <55>
AC46 P52
12 OF 20 VCCGT VSSGT_SENSE VSSGT_SENSE <55>
2
KBL-Y_BGA1515 CPU POWER 2 OF 4
dƌĂĐĞ>ĞŶŐƚŚфϮϱŵŝůƐ
13 OF 20 RC141
KBL-Y_BGA1515
100_0201_1%
1
B B
SVID ALERT SVID CLK

+1.0V_VCCST
Place the PU
resistors close to CPU
1
RC142
56_0201_5% (To VR)

RC143 RC145
2
SOC_SVID_ALERT# 1 2 SVID_ALERT# SOC_SVID_CLK 2 @ 1 SVID_CLK

SVID_ALERT# <55> SVID_CLK <55>
220_0402_5%
0_0402_1%
SVID DATA
+1.0V_VCCST
Place the PU
resistors close to CPU
A A
2
RC144
100_0201_1% (To VR)

RC146
1
SOC_SVID_DAT 1 2 SVID_DAT
0_0402_5%
SVID_DAT <55> Security Classification Compal Secret Data Compal Electronics, Inc.
SKL Y(10/13) Power
5 4 3 2 1
5 4 3 2 1
D D
Vinafix.com
1.0V@4.1A
+VCC_SA +VCCCOREG0
SKYLAKE_ULX
@ UC1O
Rev0.87
AA29 AA35
AF30 VCCSA VCCG0 R38
AN29 VCCSA VCCG0 Y35
L30 VCCSA VCCG0 AA38
T30 VCCSA VCCG0 T35
AC29 VCCSA VCCG0 Y38
AH29 VCCSA VCCG0 AC35
AN30 VCCSA VCCG0 T38
+VCC_SA M31 VCCSA VCCG0 AC38
RC167 V29 VCCSA VCCG0 V35
2 @ 1 +VCC_SA_DDR AC30 VCCSA VCCG0 R35
AK29 VCCSA VCCG0 V38 +VCCCOREG1
0_0402_1% CC59 AR29 VCCSA VCCG0
2 CC60 2 CC61 1 VCCSA
C @ N30 AF35 C
Y29 VCCSA VCCG1 AK38
VCCSA VCCG1
0.1U_0201_10V6K
0.1U_0201_10V6K
22U_0603_6.3V6M
AE29 AR35
1 1 2 AK30 VCCSA VCCG1 AF38
R29 VCCSA VCCG1 AL35
+VCC_SA Y30 VCCSA VCCG1 AR38
AF29 VCCSA VCCG1 AH35
AL29 VCCSA VCCG1 AL38
VCCSA VCCG1
1
T29 AH38
RC149 VCCSA VCCG1 AN35
AT29 VCCG1 AK35
100_0201_1% AT30 VCCSA_DDR VCCG1 AN38
2 VCCSA_DDR VCCG1
VCCSA_SENSE M29
<55> VCCSA_SENSE VSSSA_SENSE VCCSA_SENSE
N28
<55> VSSSA_SENSE VSSSA_SENSE
2
CPU POWER 4 OF 4
RC150
15 OF 20
100_0201_1% KBL-Y_BGA1515
1
B B
A A

SKL Y(11/13) Power
5 4 3 2 1
5 4 3 2 1
@ UC1Q SKYLAKE_ULX @ UC1R SKYLAKE_ULX @ UC1S SKYLAKE_ULX

D Rev0.87 Rev0.87 Rev0.87 D
A14 K23 BH20 AR50 AF33 R46
AA36 VSS VSS K33 BH32 VSS VSS AT27 AF58 VSS VSS R6
AA47 VSS VSS K43 BH42 VSS VSS AU59 AH16 VSS VSS T23
AA57 VSS VSS K53 BH52 VSS VSS AV24 AH33 VSS VSS T56
AC15 VSS VSS L61 BJ47 VSS VSS AW21 AH46 VSS VSS V13
AC27
AE10
AE43
AE50
AF16
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
N20
R10
R24
R40
R49
Vinafix.com
BL1
BL47
BM18
BN6
BP38
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AY26
AY36
AY46
BA1
BA58
AH54
AK15
AK33
AK7
AL27
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V36
V47
Y11
Y27
Y5
AF40 VSS VSS T13 BP60 VSS VSS BB22 AL43 VSS VSS BB26
AF62 VSS VSS T33 E16 VSS VSS BB32 AL50 VSS VSS BB36
AH24 VSS VSS T60 E26 VSS VSS BB42 AM64 VSS VSS BB46
AH40 VSS VSS V27 E36 VSS VSS BB52 AN24 VSS VSS BB59
AH49 VSS VSS V43 E46 VSS VSS BC47 AN59 VSS VSS BD38
AK1 VSS VSS V50 E56 VSS VSS BE12 AR15 VSS VSS BE31
AK24 VSS VSS Y15 J3 VSS VSS BE47 AR33 VSS VSS BF38
AK40 VSS VSS Y33 K15 VSS VSS BG12 AR44 VSS VSS BG17
AL16 VSS VSS Y9 K25 VSS VSS BG4 AR51 VSS VSS BG63
AL33 VSS VSS AA24 K35 VSS VSS BH22 AT54 VSS VSS BH26
AL46 VSS VSS AA40 K45 VSS VSS BH34 AU61 VSS VSS BH38
AL53 VSS VSS AA49 K55 VSS VSS BH44 AV52 VSS VSS BH48
AN18 VSS VSS AA59 M3 VSS VSS BH54 AW23 VSS VSS BH59
AN33 VSS VSS AC16 N22 VSS VSS BJ62 AY28 VSS VSS BK38
AP64 VSS VSS AC33 R30 VSS VSS BL29 AY38 VSS VSS BL33
AR2 VSS VSS AE2 R43 VSS VSS BL8 AY48 VSS VSS BM14
AR4 VSS VSS AE44 R50 VSS VSS BM20 BA11 VSS VSS BN29
AR47 VSS VSS AE51 T18 VSS VSS BP22 BA64 VSS VSS BP30
C AR6 VSS VSS AF21 T36 VSS VSS BP44 BB24 VSS VSS BP52 C
AU55 VSS VSS AF54 T62 VSS VSS D6 BB34 VSS VSS C40
AV16 VSS VSS AF64 V30 VSS VSS E18 BB44 VSS VSS D8
AW17 VSS VSS AH27 V44 VSS VSS E28 BB54 VSS VSS E22
AY16 VSS VSS AH43 V51 VSS VSS E38 BD20 VSS VSS E32
AY32 VSS VSS AH50 Y16 VSS VSS E48 BE29 VSS VSS E42
AY42 VSS VSS AK11 Y36 VSS VSS E59 BF20 VSS VSS E52
AY52 VSS VSS AK27 Y7 VSS VSS J5 BG15 VSS VSS G14
BA5 VSS VSS AK5 AA27 VSS VSS K17 BG6 VSS VSS J7
BA9 VSS VSS AL21 AA43 VSS VSS K27 BH24 VSS VSS K21
BB28 VSS VSS AL36 AA50 VSS VSS K37 BH36 VSS VSS K31
BB38 VSS VSS AL47 AA61 VSS VSS K47 BH46 VSS VSS K41
BB48 VSS VSS AL59 AC18 VSS VSS L14 BH56 VSS VSS K51
BC17 VSS VSS AN19 AC36 VSS VSS N14 BK20 VSS VSS L59
BD56 VSS VSS AN36 AE21 VSS VSS N24 BL31 VSS VSS N18
BE33 VSS VSS AR10 AE46 VSS VSS R33 BM11 VSS VSS P54
BF56 VSS VSS AR27 AE8 VSS VSS R44 BM38 VSS VSS R2
BG2 VSS VSS AR40 AF23 VSS VSS R55 BP28 VSS VSS R4
BG8 VSS VSS AR49 AF56 VSS VSS T21 BP46 VSS VSS R47
BH28 VSS VSS AR8 AG59 VSS VSS T40 C14 VSS VSS R8
BH40 VSS VSS AU57 AH30 VSS VSS T64 D62 VSS VSS T24
BH50 VSS VSS AV20 AH44 VSS VSS V33 E20 VSS VSS T58
BJ29 VSS VSS AW19 AH51 VSS VSS V46 E30 VSS VSS Y3
BK56 VSS VSS AY24 AK13 VSS VSS Y1 E40 VSS VSS AA33
BL35 VSS VSS AY34 AK3 VSS VSS Y24 E50 VSS VSS AA46
BM16 VSS VSS AY44 AK54 VSS VSS Y40 F62 VSS VSS AA55
BP36 VSS VSS BA53 AL24 VSS VSS AA30 J62 VSS VSS AB13
BP54 VSS VSS BB20 AL40 VSS VSS AA44 K19 VSS VSS AC21
D10 VSS VSS BB30 AL49 VSS VSS AA51 K29 VSS VSS AD13
B E14 VSS VSS BB40 AM54 VSS VSS AA63 K39 VSS VSS AE4 B
E24 VSS VSS BB50 AN21 VSS VSS AC19 K49 VSS VSS AE49
E34 VSS VSS BC29 AN40 VSS VSS AC40 L57 VSS VSS AF15
E44 VSS VSS BD63 AR12 VSS VSS AE30 N16 VSS VSS AF36
E54 VSS VSS BE35 AR30 VSS VSS AE47 N26 VSS VSS AF60
J14 VSS VSS BF59 AR43 VSS VSS AF13 R18 VSS VSS AH23
J9 VSS VSS BG29 AP54 VSS VSS AU53 R36 VSS VSS BP1
AH47 VSS VSS AL30 AR18 VSS VSS AU63 AY40 VSS VSS A5
AJ59 VSS VSS AL44 AR36 VSS VSS AV54 V49 VSS VSS D1
AK16 VSS VSS AL51 AR46 VSS VSS AW25 Y13 VSS VSS
AK36 VSS VSS AN16 AR59 VSS VSS AY30 AH36 VSS BP62
AK9 VSS VSS AN27 BA3 VSS VSS AY50 V40 VSS VSS
V24 VSS VSS BA7 VSS VSS VSS
GND 3 OF 3
VSS VSS
GND 1 OF 3 GND 2 OF 3 19 OF 20
KBL-Y_BGA1515
17 OF 20 18 OF 20
KBL-Y_BGA1515 KBL-Y_BGA1515
A A

SKL Y(12/13) GND
5 4 3 2 1
5 4 3 2 1
D D
SKYLAKE_ULX
@ UC1T
Vinafix.com
Rev0.87
G52 BL64
CFG0 <5>
F53 CFG[0] RSVD_TP BG47
CFG1 <5>
CFG2
J52<5>CFG[1] RSVD_TP
H53 CFG[2] BA17
CFG3 <5>
CFG4 H55 CFG[3] RSVD_TP AY18
CFG4 <5>
D55 CFG[4] RSVD_TP
CFG5 <5>
C56 CFG[5] BF18
CFG6 <5>
F55 CFG[6] RSVD BE19
CFG7 <5>
D61 CFG[7] RSVD
CFG8 <5>
G58 CFG[8]
CFG9 <5>
D57 CFG[9] BA23
CFG10 <5>CFG[10] TP5
F61 AY22
CFG11 <5>CFG[11] TP6
J60
CFG12 <5>
J58 CFG[12]
CFG13 <5>
H61 CFG[13] R12
CFG14 <5>
H59 CFG[14] RSVD P13
CFG15 <5>CFG[15] RSVD M15
J54 RSVD L16
CFG16 <5>
G54 CFG[16] RSVD
CFG17 <5>CFG[17]
L18
G56 RSVD M17
CFG18 <5>
J56 CFG[18] RSVD
CFG19 <5>CFG[19]
AH7
C RC151 2 1 49.9_0402_1% CFG_RCOMP A54 RSVD C
CFG_RCOMP K12
XDP_ITP_PMODE A60 RSVD H12
<5> XDP_ITP_PMODE ITP_PMODE RSVD
RC152 1 2 1K_0402_1% CFG4 B4 BN3
B3 RSVD RSVD BP3
RSVD RSVD
F3 L22
F1 RSVD RSVD M23
Functional Strap Definitions RSVD RSVD
L36 BN1
L38 RSVD TP4
RSVD AY20
CFG[4] : Display Port Presence strap BA19 RSVD BA21
0 = Enabled - A Display Port device is connected to the Embedded Display Port. BB18 RSVD RSVD
No connect for disable. RSVD BB14 RC153 1 @ 2 0_0402_1%
BC19 RSVD
1 = Disabled - No Physical Display Port attached to Embedded DisplayPort*. RSVD
BD18 M25
Pull-down to GND through a 1 K? +-5% resistor to enable port. RSVD RSVD L24
D49 RSVD
M21 RSVD L28
L20 RSVD RSVD M27
M19 RSVD RSVD
RSVD BJ15
L26 TP1 BJ17
RSVD RESERVED SIGNALS TP2
20 OF 20
KBL-Y_BGA1515
B B
A A

SKL Y(13/13) RSVD
5 4 3 2 1
A B C D E
1 1
+VCCCOREG0 +1.2V_DDR
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2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
CC62 CC63 CC64 CC65 CC66 CC67 CC68 CC69 CC70 CC71 CC72 CC73 CC74 CC75 CC76 CC77 CC78 CC79 CC80 CC81 CC82 CC83 CC84 CC85 CC86 CC87 CC88 CC89 CC90 CC91
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
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0.1U_0201_10V6K
0.1U_0201_10V6K
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0.1U_0201_10V6K
0.1U_0201_10V6K
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0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
Backside cap Backside cap
+VCCCOREG1 +0.85VS_VCCIO +0.85VS_VCCIO
2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1
CC92 CC93 CC94 CC95 CC96 CC97 CC98 CC99 CC100 CC101 CC102 CC103 CC104 CC105 CC106 CC107 CC108 CC109 CC110 CC111 CC112 CC113 CC114 CC115 CC116 CC117 CC118
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1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2
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0.1U_0201_10V6K
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0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
1U_0402_6.3V6K
22U_0603_6.3V6M
Backside cap Backside cap Primary side
cap
+0.85VS_VCCIO
2 2 2 2 2 2 2 2 2 2
CC119 CC120 CC121 CC122 CC123 CC124 CC125 CC126 CC127 CC128
@ @ @ @ @ @ @ @ @ @
1 1 1 1 1 1 1 1 1 1
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0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
3 3
4 4

SKL Y -PROCESSOR DECOUPLING
A B C D E
5 4 3 2 1
D D
Vinafix.com
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RTC
RTCD1
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RB751S40T1G_SOD523-2
1
+RTCBATT RTCR2
R03_0701 ADD RTCR2 for safety certification.
JRTC1 200_0402_0.5%
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2
2 1 +RTCVCC +RTCBATT
2 RTCR1
1
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0(0B&21),* 0(0B&21),*
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APS
UD1 UD2 UD3 UD4 RH139 RH145 RH129 RH205 RH212
C MT52L256M32D1PF-107WTMT52L256M32D1PF-107WTMT52L256M32D1PF-107WT
MT52L256M32D1PF-107WT 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% C
SA00009XU0L SA00009XU0L SA00009XU0L SA00009XU0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
+3VALW +3V_PCH 0LFURQ *

X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@ X76_M8G@
UD1 UD2 UD3 UD4 RH150 RH145 RH129 RH205 RH212 ;/
JAPS2 MT52L512M32D2PF-107WTMT52L512M32D2PF-107WTMT52L512M32D2PF-107WT
MT52L512M32D2PF-107WT 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
1 SA00009U70L SA00009U70L SA00009U70L SA00009U70L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
2 1
<9,22,26,38> SIO_SLP_S3#
3 2 0LFURQ *
4 3 X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@ X76_M16G@
<9,38> SIO_SLP_S5#
<9,22,38> SIO_SLP_S4#
5 4 UD1 UD2 UD3 UD4 RH139 RH149 RH129 RH205 RH212 ;/
6 5 MT52L1G32D4PG-107WT MT52L1G32D4PG-107WT MT52L1G32D4PG-107WT MT52L1G32D4PG-107WT 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
<9,38> SIO_SLP_A# 6
7 SA00009XV0L SA00009XV0L SA00009XV0L SA00009XV0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
+3V_PCH 7
8
<9,39> RTC_RST#
9 8 +\QL[ *
10 9 X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@ X76_H4G@
<5,9,38> SIO_PWRBTN#
12 11 H9CCNNN8GTMLAR-NUD H9CCNNN8GTMLAR-NUD H9CCNNN8GTMLAR-NUD H9CCNNN8GTMLAR-NUD 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
13 12 SA00008G60L SA00008G60L SA00008G60L SA00008G60L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
<5,9> PM_SYS_RESET# 13
14
<9,22,33,52> SIO_SLP_S0#
15 14 +\QL[ *
16 15 X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@ X76_H8G@
18 17 H9CCNNNBJTMLAR-NUD H9CCNNNBJTMLAR-NUD H9CCNNNBJTMLAR-NUD H9CCNNNBJTMLAR-NUD 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
19 18 SA00008FJ0L SA00008FJ0L SA00008FJ0L SA00008FJ0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
20 GND
GND +\QL[ *
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CONN@ UD1 UD2 UD3 UD4 RH150 RH145 RH144 RH205 RH212 ;/
H9CCNNNCLTMLAR-NUD H9CCNNNCLTMLAR-NUD H9CCNNNCLTMLAR-NUD H9CCNNNCLTMLAR-NUD 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
SA00008YT0L SA00008YT0L SA00008YT0L SA00008YT0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
6DPVXQJ *
X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@ X76_S4G@
B
K4E8E324EB-EGCF K4E8E324EB-EGCF K4E8E324EB-EGCF K4E8E324EB-EGCF 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% B
SA00009XY0L SA00009XY0L SA00009XY0L SA00009XY0L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
6DPVXQJ *
K4E6E304EB-EGCF K4E6E304EB-EGCF K4E6E304EB-EGCF K4E6E304EB-EGCF 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
SA00008QV2L SA00008QV2L SA00008QV2L SA00008QV2L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
6DPVXQJ *
K4EBE304EB-EGCF K4EBE304EB-EGCF K4EBE304EB-EGCF K4EBE304EB-EGCF 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
SA00008X11L SA00008X11L SA00008X11L SA00008X11L SD028100280 SD028100280 SD028100280 SD028100280 SD028100280
A A

RTC,Debug, RAM setting
5 4 3 2 1
5 4 3 2 1
UD1 UD2
A3 P9 A3 P9
+1.8V_MEM VDD1 DQ0 DDR_A_D7 <6> +1.8V_MEM VDD1 DQ0 DDR_A_D19 <6>
A4 N9 A4 N9
VDD1 DQ1 DDR_A_D3 <6> VDD1 DQ1 DDR_A_D23 <6>
A5 N10 A5 N10
A6 N11 A6 N11
A10 M8 A10 M8
U3 M9 U3 M9
U4 M10 U4 M10
U5 M11 U5 M11
U6 F11 U6 F11
U10 F10 DDR_A_D11 <6>
U10 F10 DDR_A_D27 <6>
VDD1 DQ9 F9 VDD1 DQ9 F9
DQ10 DDR_A_D12 <6> DQ10 DDR_A_D28 <6>
F8 F8
DQ11 DDR_A_D9 <6> DQ11 DDR_A_D25 <6>
A8 E11 A8 E11
D +1.2V_DDR VDD2 DQ12 DDR_A_D10 <6> +1.2V_DDR VDD2 DQ12 DDR_A_D31 <6> D
A9 E10 A9 E10
D4 E9 D4 E9
D5 D9 D5 D9
D6 T8 D6 T8
G5 T9 G5 T9
H5 T10 H5 T10
DDR_A_D60 <6> DDR_A_D37 <6>
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H6 VDD2 DQ18 T11 H6 VDD2 DQ18 T11
H12 R8 H12 R8
J5 R9 J5 R9
J6 R10 J6 R10
K5 R11 K5 R11
K6 C11 K6 C11
K12 C10 K12 C10
L5 C9 DDR_A_D53 <6>
L5 C9 DDR_A_D43 <6>
P4 VDD2 DQ26 C8 P4 VDD2 DQ26 C8
P5 B11 P5 B11
P6 B10 P6 B10
U8 B9 DDR_A_D51 <6>
U8 B9 DDR_A_D41 <6>
U9 VDD2 DQ30 B8 U9 VDD2 DQ30 B8
A11 R2 DDR_A_CAA0 A11 R2 DDR_A_CAB0

+1.2V_DDR VDDQ CA0 DDR_A_CAA1 DDR_A_CAA0 <6> +1.2V_DDR VDDQ CA0 DDR_A_CAB1 DDR_A_CAB0 <6>
C12 P2 C12 P2
VDDQ CA1 DDR_A_CAA2 DDR_A_CAA1 <6> VDDQ CA1 DDR_A_CAB2 DDR_A_CAB1 <6>
E8 N2 E8 N2
E12 N3 E12 N3
G12 M3 G12 M3
H8 F3 H8 F3
H9 E3 DDR_A_CAA6 <6>
H9 E3 DDR_A_CAB6 <6>
H11 VDDQ CA6 E2 DDR_A_CAA7 H11 VDDQ CA6 E2 DDR_A_CAB7
J9 D2 J9 D2
J10 C2 J10 C2
VDDQ CA9 DDR_A_CAA9 <6> VDDQ CA9 DDR_A_CAB9 <6>
K8 K8
K11 VDDQ K11 VDDQ
L12 VDDQ L10 L12 VDDQ L10
VDDQ DQS0 DDR_A_DQS0 <6> VDDQ DQS0 DDR_A_DQS2 <6>
N8 G10 DDR_A_DQS1 <6>
N8 G10 DDR_A_DQS3 <6>
N12 VDDQ DQS1 P10 N12 VDDQ DQS1 P10
R12 D10 R12 D10
C U11 U11 C
VDDQ VDDQ
L11 L11
DQS0# DDR_A_DQS#0 <6> DQS0# DDR_A_DQS#2 <6>
F2 G11 F2 G11
+1.2V_DDR VDDCA DQS1# DDR_A_DQS#1 <6> +1.2V_DDR VDDCA DQS1# DDR_A_DQS#3 <6>
G2 P11 G2 P11
VDDCA DQS2# DDR_A_DQS#7 <6> VDDCA DQS2# DDR_A_DQS#4 <6>
H3 D11 H3 D11
VDDCA DQS3# DDR_A_DQS#6 <6> VDDCA DQS3# DDR_A_DQS#5 <6> +1.2V_DDR
L2 L2
M2 VDDCA M2 VDDCA
VDDCA L8 VDDCA L8
DM0 G8 DM0 G8
A1 DM1 P8 A1 DM1 P8 CD1
NC DM2 NC DM2 1 CD2 1 CD3 1 CD4 1 CD5 1 CD6 1 CD7 1 CD8 1 CD9 1
A2 D8 A2 D8
NC DM3 NC DM3
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
A12 A12
A13 NC A13 NC
B1 NC B3 RD28 1 2 243_0402_1% B1 NC B3 RD31 1 2 243_0402_1% 2 2 2 2 2 2 2 2 2
B13 NC ZQ0 B4 RD29 1 2 243_0402_1% B13 NC ZQ0 B4 RD32 1 2 243_0402_1%
C4 NC ZQ1 C4 NC ZQ1
K9 NC K9 NC
R3 NC K3 DDR_A_CKE0 R3 NC K3 DDR_A_CKE2
NC CKE0 DDR_A_CKE1 DDR_A_CKE0 <6> NC CKE0 DDR_A_CKE3 DDR_A_CKE2 <6>
T1 K4 DDR_A_CKE1 <6>
T1 K4 DDR_A_CKE3 <6>
T13 NC CKE1 T13 NC CKE1
U1 NC U1 NC
U2 NC L3 DDR_A_CS#0 U2 NC L3 DDR_A_CS#0
NC CS0# DDR_A_CS#1 DDR_A_CS#0 <6> NC CS0# DDR_A_CS#1
U12 L4 U12 L4
NC CS1# DDR_A_CS#1 <6> NC CS1#
U13 U13
NC NC
J3 DDR_A_CLK0 J3 DDR_A_CLK1 +1.2V_DDR +1.2V_DDR +1.2V_DDR
CK DDR_A_CLK#0 DDR_A_CLK0 <6> CK DDR_A_CLK#1 DDR_A_CLK1 <6>
P3 J2 P3 J2
VSSCA CK# DDR_A_CLK#0 <6> VSSCA CK# DDR_A_CLK#1 <6>
M4 M4
J4 VSSCA J4 VSSCA
G4 VSSCA J8 DDR_A_ODT0 G4 VSSCA J8 DDR_A_ODT0 CD12
VSSCA ODT DDR_A_ODT0 <6> VSSCA ODT 1 CD13 1 CD14 1 CD15 1 CD16 1 CD17 1 CD18 1 CD19 1 C1037 1 C1038 1
G3 G3 EMI@ EMI@
VSSCA VSSCA
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
F4 F4
VSSCA VSSCA
10P_0402_50V8J
10P_0402_50V8J
D3 J11 D3 J11
VSSCA Vref_DQ +VREFDQ_A VSSCA Vref_DQ +VREFDQ_A 2 2 2 2 2 2 2 2 2 2
C3 H4 C3 H4
VSSCA Vref_CA +VREFCA VSSCA Vref_CA +VREFCA
T12 B2 T12 B2
B
T6 VSSQ VSS B5 T6 VSSQ VSS B5 B
R6 VSSQ VSS C5 R6 VSSQ VSS C5
P12 VSSQ VSS E4 P12 VSSQ VSS E4
VSSQ VSS 1 VSSQ VSS 1
N6 E5 CD10 N6 E5 CD11
M12 VSSQ VSS F5 M12 VSSQ VSS F5
M6 VSSQ VSS H2 0.047U_0402_16V7K M6 VSSQ VSS H2 0.047U_0402_16V7K
L9 VSSQ VSS J12 +VREFCA 2 L9 VSSQ VSS J12 +VREFCA 2
K10 VSSQ VSS K2 K10 VSSQ VSS K2
H10 VSSQ VSS L6 +VREFDQ_A H10 VSSQ VSS L6 +VREFDQ_A +1.2V_DDR
G9 VSSQ VSS M5 G9 VSSQ VSS M5
G6 N4 CD20 G6 N4 CD21
F12 VSSQ VSS N5 F12 VSSQ VSS N5
F6 VSSQ VSS R4 0.047U_0402_16V7K F6 VSSQ VSS R4 0.047U_0402_16V7K CD31
VSSQ VSS VSSQ VSS 1 CD32 1 CD33 1 CD34 1 CD35 1 CD36 1 CD37 1 CD38 1
E6 R5 2 E6 R5 2
VSSQ VSS VSSQ VSS
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
D12 T2 D12 T2
C6 VSSQ VSS T3 C6 VSSQ VSS T3
B12 VSSQ VSS T4 B12 VSSQ VSS T4 2 2 2 2 2 2 2 2
B6 VSSQ VSS T5 B6 VSSQ VSS T5
VSSQ VSS VSSQ VSS
LPDDR3_FBGA178 LPDDR3_FBGA178
@ @
+1.2V_DDR
+0.6V_VREFCA +1.2V_DDR +VREFCA +0.6V_A_VREFDQ +1.2V_DDR +VREFDQ_A
CD22 1 CD23 1 CD24 1 CD25 1 CD26 1 CD27 1 CD28 1 CD29 1 CD30 1

1
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
RD34 RD35
8.2K_0402_1% 8.2K_0402_1% 2 2 2 2 2 2 2 2 2
2
A RD36 RD37 A
1 2 1 2
1 5.11_0402_1% 1 10_0402_1%
CD39 CD40
1
0.022U_0402_25V7K 0.022U_0402_25V7K
2 2 RD39
RD38
1
RD40 RD41 8.2K_0402_1%

8.2K_0402_1%
2
24.9_0402_1% 24.9_0402_1%
2
2041/09/08 2013/10/28 Title

LPDDRIII Channel A
5 4 3 2 1
5 4 3 2 1
UD3 UD4
A3 P9 A3 P9
+1.8V_MEM VDD1 DQ0 DDR_B_D0 <6> +1.8V_MEM VDD1 DQ0 DDR_B_D33 <6>
A4 N9 A4 N9
VDD1 DQ1 DDR_B_D5 <6> VDD1 DQ1 DDR_B_D39 <6>
A5 N10 A5 N10
A6 N11 A6 N11
A10 M8 A10 M8
U3 M9 U3 M9
U4 M10 U4 M10
U5 M11 U5 M11
U6 F11 U6 F11
U10 F10 DDR_B_D15 <6>
U10 F10 DDR_B_D45 <6>
VDD1 DQ9 F9 VDD1 DQ9 F9
DQ10 DDR_B_D8 <6> DQ10 DDR_B_D44 <6>
F8 F8
DQ11 DDR_B_D13 <6> DQ11 DDR_B_D40 <6>
A8 E11 A8 E11
D +1.2V_DDR VDD2 DQ12 DDR_B_D12 <6> +1.2V_DDR VDD2 DQ12 DDR_B_D47 <6> D
A9 E10 A9 E10
D4 E9 D4 E9
D5 D9 D5 D9
D6 T8 D6 T8
G5 T9 G5 T9
H5 T10 H5 T10
DDR_B_D49 <6> DDR_B_D27 <6>
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H6 VDD2 DQ18 T11 H6 VDD2 DQ18 T11
H12 R8 H12 R8
J5 R9 J5 R9
J6 R10 J6 R10
K5 R11 K5 R11
K6 C11 K6 C11
K12 C10 K12 C10
L5 C9 DDR_B_D60 <6>
L5 C9 DDR_B_D20 <6>
P4 VDD2 DQ26 C8 P4 VDD2 DQ26 C8
P5 B11 P5 B11
P6 B10 P6 B10
U8 B9 DDR_B_D61 <6>
U8 B9 DDR_B_D23 <6>
U9 VDD2 DQ30 B8 U9 VDD2 DQ30 B8
A11 R2 DDR_B_CAA0 A11 R2 DDR_B_CAB0

+1.2V_DDR VDDQ CA0 DDR_B_CAA1 DDR_B_CAA0 <6> +1.2V_DDR VDDQ CA0 DDR_B_CAB1 DDR_B_CAB0 <6>
C12 P2 C12 P2
VDDQ CA1 DDR_B_CAA2 DDR_B_CAA1 <6> VDDQ CA1 DDR_B_CAB2 DDR_B_CAB1 <6>
E8 N2 E8 N2
E12 N3 E12 N3
G12 M3 G12 M3
H8 F3 H8 F3
H9 E3 DDR_B_CAA6 <6>
H9 E3 DDR_B_CAB6 <6>
H11 VDDQ CA6 E2 DDR_B_CAA7 H11 VDDQ CA6 E2 DDR_B_CAB7
J9 D2 J9 D2
J10 C2 J10 C2
VDDQ CA9 DDR_B_CAA9 <6> VDDQ CA9 DDR_B_CAB9 <6>
K8 K8
K11 VDDQ K11 VDDQ
L12 VDDQ L10 L12 VDDQ L10
VDDQ DQS0 DDR_B_DQS0 <6> VDDQ DQS0 DDR_B_DQS4 <6>
N8 G10 DDR_B_DQS1 <6>
N8 G10 DDR_B_DQS5 <6>
N12 VDDQ DQS1 P10 N12 VDDQ DQS1 P10
R12 D10 R12 D10
C U11 U11 C
VDDQ VDDQ
L11 L11
DQS0# DDR_B_DQS#0 <6> DQS0# DDR_B_DQS#4 <6>
F2 G11 F2 G11
+1.2V_DDR VDDCA DQS1# DDR_B_DQS#1 <6> +1.2V_DDR VDDCA DQS1# DDR_B_DQS#5 <6>
G2 P11 G2 P11
VDDCA DQS2# DDR_B_DQS#6 <6> VDDCA DQS2# DDR_B_DQS#3 <6>
H3 D11 H3 D11
VDDCA DQS3# DDR_B_DQS#7 <6> VDDCA DQS3# DDR_B_DQS#2 <6> +1.8V_MEM
L2 L2
M2 VDDCA M2 VDDCA
VDDCA L8 VDDCA L8
DM0 G8 DM0 G8
A1 DM1 P8 A1 DM1 P8 CD41
NC DM2 NC DM2 1 CD42 1 CD43 1 CD44 1 CD45 1
A2 D8 A2 D8
NC DM3 NC DM3
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
A12 A12
A13 NC A13 NC
B1 NC B3 RD70 1 2 243_0402_1% B1 NC B3 RD72 1 2 243_0402_1% 2 2 2 2 2
B13 NC ZQ0 B4 RD71 1 2 243_0402_1% B13 NC ZQ0 B4 RD73 1 2 243_0402_1%
C4 NC ZQ1 C4 NC ZQ1
K9 NC K9 NC
R3 NC K3 DDR_B_CKE0 R3 NC K3 DDR_B_CKE2
NC CKE0 DDR_B_CKE1 DDR_B_CKE0 <6> NC CKE0 DDR_B_CKE3 DDR_B_CKE2 <6>
T1 K4 DDR_B_CKE1 <6>
T1 K4 DDR_B_CKE3 <6>
T13 NC CKE1 T13 NC CKE1
U1 NC U1 NC
U2 NC L3 DDR_B_CS#0 U2 NC L3 DDR_B_CS#0
NC CS0# DDR_B_CS#1 DDR_B_CS#0 <6> NC CS0# DDR_B_CS#1
U12 L4 U12 L4
NC CS1# DDR_B_CS#1 <6> NC CS1#
U13 U13
NC NC
J3 DDR_B_CLK0 J3 DDR_B_CLK1 +1.8V_MEM +1.2V_DDR +1.2V_DDR
CK DDR_B_CLK#0 DDR_B_CLK0 <6> CK DDR_B_CLK#1 DDR_B_CLK1 <6>
P3 J2 P3 J2
VSSCA CK# DDR_B_CLK#0 <6> VSSCA CK# DDR_B_CLK#1 <6>
M4 M4
J4 VSSCA J4 VSSCA
G4 VSSCA J8 DDR_B_ODT0 G4 VSSCA J8 DDR_B_ODT0 CD48
VSSCA ODT DDR_B_ODT0 <6> VSSCA ODT 1 CD49 1 CD50 1 CD51 1 CD52 1 C1039 1 C1040 1
G3 G3 EMI@ EMI@
VSSCA VSSCA
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
1U_0201_6.3V6K
F4 F4
VSSCA VSSCA
100P_0402_50V8J
100P_0402_50V8J
D3 J11 D3 J11
VSSCA Vref_DQ +VREFDQ_B VSSCA Vref_DQ +VREFDQ_B 2 2 2 2 2 2 2
C3 H4 C3 H4
VSSCA Vref_CA +VREFCA VSSCA Vref_CA +VREFCA
T12 B2 T12 B2
B
T6 VSSQ VSS B5 T6 VSSQ VSS B5 B
R6 VSSQ VSS C5 R6 VSSQ VSS C5
P12 VSSQ VSS E4 P12 VSSQ VSS E4
N6 E5 CD46 N6 E5 CD47
M12 VSSQ VSS F5 M12 VSSQ VSS F5
M6 VSSQ VSS H2 0.047U_0402_16V7K M6 VSSQ VSS H2 0.047U_0402_16V7K
L9 VSSQ VSS J12 +VREFCA 2 L9 VSSQ VSS J12 +VREFCA 2
K10 VSSQ VSS K2 K10 VSSQ VSS K2
H10 VSSQ VSS L6 +VREFDQ_B H10 VSSQ VSS L6 +VREFDQ_B
G9 VSSQ VSS M5 G9 VSSQ VSS M5
G6 N4 CD53 G6 N4 CD54
F12 VSSQ VSS N5 F12 VSSQ VSS N5
F6 VSSQ VSS R4 0.047U_0402_16V7K F6 VSSQ VSS R4 0.047U_0402_16V7K
E6 VSSQ VSS R5 2 E6 VSSQ VSS R5 2
D12 VSSQ VSS T2 D12 VSSQ VSS T2
C6 VSSQ VSS T3 C6 VSSQ VSS T3
VSSQ VSS VSSQ VSS
LPDDR3_FBGA178 LPDDR3_FBGA178
@ @
+0.6V_B_VREFDQ +1.2V_DDR +VREFDQ_B

1
RD75
8.2K_0402_1%
2
A RD76 A
1 2
1 10_0402_1%
CD67
1
0.022U_0402_25V7K
2 RD77
1
RD78 8.2K_0402_1%
2
24.9_0402_1%
2
2041/09/08 2013/10/28 Title

LPDDRIII Channel B
5 4 3 2 1
5 4 3 2 1
+3VALW
+3VALW
5
UC6
5
1 UC4
G VCC
<9,19,26,38> SIO_SLP_S3# B SIO_SLP_S3# 1
4
P
Y H_VCCST_PWRGD_P <9> B RUN_ON_P
2 4
<38> H_VCCST_PWRGD A O RUN_ON_P <42,51,52>
2
<38> RUN_ON_EC A
1
D D
3
MC74VHC1G09DFT2G_SC70-5 TC7SH08FU_SSOP5 RC78
3
100K_0402_5%
2
RE102 2 @ 1
0_0402_5%~D
Vinafix.com RC74 2 @
0_0402_5%
1
Change CPU VCCST_PWRGD enable from EC & PCH Change VCCIO & VCCSTG power enable from EC & PCH
+3VALW +3VALW
5
UC3 UC5
1 P RUN_ON_P 1
P
<9,19,38> SIO_SLP_S4# B SUS_ON_P B
4 4
O SUS_ON_P <42,43,51> O VR_ON <9,55>
2 2
<38> SUS_ON_EC A <38> IMVP_VR_ON A
G
1
C C
TC7SH08FU_SSOP5 RC21 TC7SH08FU_SSOP5 RC92
3
3
100K_0402_5%
100K_0402_5%
2
RC17 2 @ 1 RC91 2 @ 1
0_0402_5% 0_0402_5%
Change VCCST & 1.2_VR power enable from EC & PCH Change VCORE power enable from EC & PCH
+3V_PCH
+3V_PCH
5
U34
5
U31 SIO_SLP_S0IX# 1 R244
P
SUS_ON_P 1 R240 INB 4 1 XDP@ 2
P
B INB XDP_PRSENT O VCCSTG_EN <43> B

4 1 XDP@2 2 0_0402_5%
O VCCST_EN <42> INA
G
XDP_PRSENT 2 0_0402_5% XDP@
<5> XDP_PRSENT INA
G
XDP@ MC74VHC1G32DFT2G_SC70-5
3
MC74VHC1G32DFT2G_SC70-5
3
+3V_PCH
5
U33
RUN_ON_P R241 2 @ 1 0_0402_1% 1
P
B 4 SIO_SLP_S0IX#
O SIO_SLP_S0IX# <43>
<9,19,33,52> SIO_SLP_S0# R242 2 @ 1 0_0402_1% 2
A
G
TC7SH08FU_SSOP5
3
RZ75
100K_0402_5%
2
A A

Sequence Logic
5 4 3 2 1
5 4 3 2 1
D
+3VS_CAM
ĞWĂĐŬ>ŝŐŚƚWŽǁĞƌ ĂĐŬ>ŝŐŚƚWtDŽŶƚƌŽů
ǡ
10U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
68P_0402_50V8J
EMI@ C1034
1 1 1 ͳ ǡ α ͳʹ
1
R03_0707 BOM change fuse +INV_PWR_SRC
ͳͲ ǡ α ͳͲͲ
C53
C131
C133
D2
B+_CAM B+ ͳͲͲ ǡ α ͳͲͲͲ C1049 1 2
<5> ENBKL
2
2 2 2 EMI@
R266 JCCD2 60mil +INV_PWR_SRC_R 1 DISPOFF#
1U_0603_25V6K
1 2 1 22P_0201_25V8J
B+ 1
1
0_0603_5% 2 C50 2 3
2 <39> PANEL_BKEN_EC
1
3 C312 1 2 1U_0402_25V6K
<8>
4 3 60mil BAT54CW-7-F_SOT323-3 R31
2
CAM_CBL_DET# 4
AZ5123-01F.R7G_DFN1006P2X2
5 R226 +INV_PWR_SRC
D D12 6 5 U3 0_0603_5% 220K_0201_5% D
7 6 9 1 @ 2
2
7 VOUT
1
8 1 R30 1
USB20_P9_CONN 9 8 SS 8 1 2
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C57 D3
USB20_N9_CONN 10 9 2 DIS 1K_0603_5% 2
10 <38> EN_INVPWR EN <38> BIA_PWM_EC
11 7 0.1U_0402_25V6
+3VS_CAM 11 PG
1
12 3 2 1 INV_PWM_R
<34> DMIC_DAT_CODEC 12 VIN1
EMI@ 13 R29 6
<34> DMIC_CLK_CODEC +3VALW
2
14 13 4 VBIAS 3
14 VIN2 <5> PCH_INV_PWM
1
15 220K_0201_5% 5 +3VALW +3VALW
15 GND 1
16 R2 BAT54CW-7-F_SOT323-3 R32 C8
2
17 16 AP22850SH8-7_W-DFN2020-8 1 @ 2
GND 1
18 10K_0201_5% C7 220K_0201_5% 680P_0201_50V7K
GND 2
R03_0704 ADD R463 EMC Request
2
A00_0907: EMI Request change AZ5123-01 ACES_50208-01601-001 0.1U_0201_10V6K
CONN@ 2
L7
4 3 USB20_P9_CONN
11> USB20_P9
AZ5B25-01F_DFN0603P2Y2
1 2 USB20_N9_CONN
11> USB20_N9
TVNST52302AB0_SOT523-3
D10
HCM1012GH900BP_4P
3
1
D6 D7
EMI@
@EMI@
1
EMI@ EMI@
2
2
C C
ĞWŽŶŶ RE106 2 @ 1 0_0402_1% 40

JEDP
45 +LCDVDD
<10> CABC_EN 40 G5
39 44
eDP_TXN_P3_CONN 38 39 G4 43
C42 1 2 0.1U_0201_10V6K eDP_TXN_P0_C R14 1 @ 2 0_0201_5% eDP_TXN_P0_CONN eDP_TXP_P3_CONN 37 38 G3 42
<5> eDP_TXN_P0 37 G2
36 41 C46 1 C47 1 C48 1 C1018 1
eDP_TXN_P2_CONN 35 36 G1 EMI@ EMI@
C43 1 2 0.1U_0201_10V6K eDP_TXP_P0_C R15 1 @ 2 0_0201_5% eDP_TXP_P0_CONN eDP_TXP_P2_CONN 34 35
<5> eDP_TXP_P0 34
0.1U_0201_10V6K
10U_0603_6.3V6M
22P_0402_50V8J
100P_0201_50V8J
33
eDP_TXN_P1_CONN 32 33 2 2 2 2
eDP_TXP_P1_CONN 31 32
30 31
eDP_TXN_P0_CONN 29 30
eDP_TXP_P0_CONN 28 29
27 28
eDP_AUXP_CONN 26 27 R03_0602 Pin24 GND remove
eDP_AUXN_CONN 25 26
C39 1 2 0.1U_0201_10V6K eDP_TXN_P1_C R16 1 @ 2 0_0201_5% eDP_TXN_P1_CONN 24 25
<5> eDP_TXN_P1 24
23
+LCDVDD 23 +INV_PWR_SRC
22
C40 1 2 0.1U_0201_10V6K eDP_TXP_P1_C R17 1 @ 2 0_0201_5% eDP_TXP_P1_CONN 21 22
<5> eDP_TXP_P1 21
20
19 20
<38> LCD_TST 19
18 C52 1 1 C58
17 18 EMI@
16 17
16
10U_0603_25V6M
0.1U 16V K X5R 0201

B 15 B
14 15 2 2
<5> EDP_HPD 14
13
12 13
C166 1 2 0.1U_0201_10V6K eDP_TXN_P2_C R18 1 @ 2 0_0201_5% eDP_TXN_P2_CONN 11 12
<5> eDP_TXN_P2 11
10
DISPOFF# 9 10
C167 1 2 0.1U_0201_10V6K eDP_TXP_P2_C R19 1 @ 2 0_0201_5% eDP_TXP_P2_CONN INV_PWM_R 8 9
<5> eDP_TXP_P2 I2C0_SDA_EDP 8
7
TC44 @ I2C0_SCK_EDP 7
6
TC45 @ 6
5
+INV_PWR_SRC 5
4
3 4
2 3
I2C0_WP 1 2
eDP_TXN_P3_C eDP_TXN_P3_CONN TC43 @ 1
<5> eDP_TXN_P3 C168 1 2 0.1U_0201_10V6K R20 1 @ 2 0_0201_5%
ACES_50398-04041-001
R03_0627 Swap SDA&SCK CONN@
C172 1 2 0.1U_0201_10V6K eDP_TXP_P3_C R21 1 @ 2 0_0201_5% eDP_TXP_P3_CONN
<5> eDP_TXP_P3
C44 1 2 0.1U_0201_10V6K eDP_AUXN_C R22 1 @ 2 0_0201_5% eDP_AUXN_CONN

<5> eDP_AUXN
C45 1 2 0.1U_0201_10V6K eDP_AUXP_C R23 1 @ 2 0_0201_5% eDP_AUXP_CONN

<5> eDP_AUXP
A A

eDP / TS / CCD
5 4 3 2 1
5 4 3 2 1
CCG_VBUS
+5V_CONN_P +3V_PDLDO_OUT
1
+3V_PDLDO_OUT R1507 U723
100_0603_5%
0_0603_5%
1 2 31 11 CCG4_VBUS_5V_ON
@ R28
1U_0603_10V6K
1U_0603_10V6K
0.1U_0402_10V7K
0.1U_0402_10V7K
0.1U_0402_10V7K
VDDD VBUS_P_CTRL_P1 CCG4_VBUS_5V_ON <47>
1 1 1
1
32 12
C334
C333
C1224
C1221
C1222
L2N7002WT1G_SC-70-3
CCG4_VBUS_C_CTRL_P1 <47>
1 2
+5VALW VDDIO VBUS_C_CTRL_P1
20 CCG4_VBUS_DISCHARGE_P2 D
2
2 2 2 VBUS_DISCHARGE_P1 CCG4_VBUS_DISCHARGE_P2
C331 2 1 1U_0603_10V6K 33 2
Q312
VCCD
1U_0402_16V6K
G
@ RH34
USB2 Power Share S
10U_0603_10V6M
1 1
3
+5V_CONN_P
C1176
1 2
100K_0402_1%
+3V_PDLDO_OUT
1
10K_0201_5%
8 18 R33
C1177
2 2 VCONN_V5V_P1 HPD_P1 CCG4_HPD <25,26>

D D
23
VCONN_V5V_P2 7
CCG4_CC2 <29>
2
CC2_P1
3
I2C_SDA_SCB2_AR
4
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I2C_SCL_SCB2_AR 9
CC1_P1 CCG4_CC1 <29>
US2 5
@ PAD~D T197 1 8 2 @ 1 USBC2_PWR_SHR_EN# I2C_INT_AR_P1
MUX_USB2_N1 CEN CB USBC2_PWR_SHR_EN# <39>
2 7 R1171 0_0402_1% FLIP# 6
MUX_USB2_P1 DM TDM USB20_N1 <11> I2C_INT_AR_P2 AC2_CCG4_DISC#
3 6 26 AC2_CCG4_DISC#
USBC2_PWR_SHR_EN# DP TDP USB20_P1 <11> MUX_CTRL3_P1/SDA_3 <38,47>
2 @ 1 4 5 R110 2 1 10K_0402_1% 28 MUX_I2C_DATA
SMART-CDP Vdd +5VALW MUX_CTRL2_P1/SDA_4 <25>
R2704 0_0402_1% 9 29
390P_0402_50V8K
390P_0402_50V8K
Thermal-Pad MUX_CTRL1_P1/SCL_4 MUX_I2C_CLK <25> 1 1
R254 2 1 100K_0402_1% 13
C1281
C1282
CCG_VBUS VBUS_MON_P1
SLG55594AVTR_TDFN8_2X2
C1219 2 1 0.1U_0402_10V7K
+3V_PDLDO_OUT 2 2
US3 37 +3VALW_5085
1 5 VBUS_MON_P2 30
+5V_VBUS OUT IN +5VALW HPD_P2
5
2 UC7 TC7SH08FU_SSOP5
GND 1
P
B CCG4_PWR_SHR_VBUS_EN <38>
3 4 4 22
<11> USB_OC1# OC EN O CCG4_VBUS_5V_ON CCG4_SWD_IO CC1_P2
2 1
A SWD_IO
G
SY6288C20AAC_SOT23-5 CCG4_SWD_CLK 2
3
SWD_CLK/I2C_CFG_EC R492
AC2_CCG4_DISC# 1 2
CCG4_I2C_INT# 1 2 CCG4_I2C_INT#_R 15 24
<38> CCG4_I2C_INT# @ 4.7K_0402_5%
R490 0_0201_5% I2C_INT_EC CC2_P2
CCG4_I2C_DATA 1 2CCG4_I2C_DATA_R 16
<38> CCG4_I2C_DATA @
R488 0_0201_5% I2C_SDA_SCB1_EC
CCG4_I2C_CLK 1 2 CCG4_I2C_CLK_R 17
<38> CCG4_I2C_CLK @
R489 0_0201_5% I2C_SCL_SCB1_EC 34
C MUX_CTRL3_P2 C
35
MUX_CTRL2_P2 36 +5V_CONN_P
MUX_CTRL1_P2
CB SMART-CDP MODE VCONN_VM0N_P1 19
VSEL1_P1
2
14
0 X DCP_Auto <47>
CCG4_OVP_TRIP_P1# VSEL2/VCONN_MON_P1 R233
1 1 CDP 1M_0201_1%
25
1
VSEL1_P2/SCL3 VCONN_VM0N_P1
27
VSEL2/VCONN_MON_P2
2
38
VBUS_C_CTRL_P2 R235
21 39 2M_0201_5%
AR_RST VBUS_P_CTRL_P2
40
1
VBUS_DISCHARGE_P2
U30 +3V_PDLDO_OUT
+5VALW +5VALW
2 CCG4_XRES
R491 1 2 4.7K_0402_5% 10
GND XRES 41
1
0.1U_0402_10V7K
1 EPAD
C1094 IN +5V_CONN_P
1
OS debug&CCG4 debug
C1223
0.1U_0201_10V6K 3 AMI still suggest us to reserve it for source level debug.
2 OUT CYPD4125-40LQXIT_QFN40_6X6
2 JCCG4
AP2330W-7_SC59-3 1
1 CCG4_XRES +3V_PDLDO_OUT
2
2 3 CCG4_SWD_CLK
0.2A OCP for VCONN! 3

4
4
5
CCG4_SWD_IO
R2705 1 @ 2 0_0201_5%
UPD_SMBDAT_DEG <38>
5 6 R2706 1 @ 2 0_0201_5%
6 CCG4_I2C_DATA UPD_SMBCLK_DEG <38>
7
7 8 CCG4_I2C_CLK
8 9
B 9 +5VALW B
10 R2707 1 @ 2 0_0201_5%
10 UART2_TXD <10,38>
11 R2708 1 @ 2 0_0201_5%
11 UART2_RXD <10,38>
12
12 13
GND 14
GND
+3V_PDLDO_OUT E-T_4260K-Q12N-03L
CONN@
U1
10 1
VCC 1D+ BOT_MUX_P <29>
FLIP# R151 2 @ 1 0_0402_1%9 2
BOT_MUX_N <29>
S 1D-
MUX_USB2_P1 8 3
D+ 2D+ TOP_MUX_P <29>
MUX_USB2_N1 7 4
D- 2D- TOP_MUX_N <29>
<39> MUX_USB_EN# R152 2 @ 1 0_0402_1%6 5

OE# GND
NX3DV221GM XQFN10U 10P
FLIP# MUX_USB_EN# A_OUT B_OUT

(TOP) (BOT)
A A
X H X X
0 L D=1D X USB
1 L D=2D USB X Security Classification Compal Secret Data Compal Electronics, Inc.
USB Power Delivery 2
5 4 3 2 1
5 4 3 2 1
+3VS @ R1506 +3VS_MUX +3VS_MUX

0_0603_5%
1 2 1
C1093
+3V_PDLDO_OUT
R1510 0.1U_0201_10V6K
0_0603_5% 2
1 2
D D
R03_0701 add R1510 +3V_PDLDO_OUT
+3VS_MUX
R260 1 2 100K_0201_5% TBT_DP_AUX_N_C
R261 1 2 100K_0201_5% TBT_DP_AUX_P_C
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+3VS_MUX +3VS_MUX
C165 C159 C35

1 1 1
0.1U_0201_10V6K
0.1U_0201_10V6K
0.01U_0402_16V7K
2 2 2
17
28
20
6
U724
VDD33
VDD33
VDD33
VDD_DCI
C327 1 2 0.1U_0201_10V6K TBT_DP_ML0_P_C 9 30
<26> TBT_DP_ML0_P TBT_DP_ML0_N_C ML0p RX1p MUX_USB3_RX0_P <29>
<26> TBT_DP_ML0_N C328 1 2 0.1U_0201_10V6K 10 31
MUX_USB3_RX0_N <29>
C ML0n RX1n C
C332 1 2 0.1U_0201_10V6K TBT_DP_ML1_P_C 12 33 MUX_USB3_TX0_P_C C356 1 2 0.1U_0201_10V6K
<26> TBT_DP_ML1_P TBT_DP_ML1_N_C ML1p TX1p MUX_USB3_TX0_N_C C357 1 MUX_USB3_TX0_P <29>
<26> TBT_DP_ML1_N C340 1 2 0.1U_0201_10V6K 13 34 2 0.1U_0201_10V6K
<29>
ML1n TX1n MUX_USB3_TX0_N
C341 1 2 0.1U_0201_10V6K TBT_DP_ML2_P_C 15
<26> TBT_DP_ML2_P TBT_DP_ML2_N_C ML2p
<26> TBT_DP_ML2_N C342 1 2 0.1U_0201_10V6K 16 40
MUX_USB3_RX1_P <29>
ML2n RX2p 39
TBT_DP_ML3_P_C RX2n MUX_USB3_RX1_N <29>
<26> TBT_DP_ML3_P C343 1 2 0.1U_0201_10V6K 18
C344 1 2 0.1U_0201_10V6K TBT_DP_ML3_N_C 19 ML3p 37 MUX_USB3_TX1_P_C C354 1 2 0.1U_0201_10V6K
<26> TBT_DP_ML3_N ML3n TX2p MUX_USB3_TX1_N_C C353 1 MUX_USB3_TX1_P <29>
36 2 0.1U_0201_10V6K
TX2n MUX_USB3_TX1_N <29>
C345 1 2 0.1U_0201_10V6K TBT_DP_AUX_P_C 24
<26> TBT_DP_AUX_P TBT_DP_AUX_N_C AUXp MUX_PD_SBU1
<26> TBT_DP_AUX_N C346 1 2 0.1U_0201_10V6K 25 27 R262 1 @ 2 0_0201_5%
MUX_SBU1 <29>
AUXn SBU1 26 MUX_PD_SBU2 R263 1 @ 2 0_0201_5%
SBU2 MUX_SBU2 <29>
+3VS_MUX
C347 1 2 0.1U_0201_10V6K USB3RP1_C 5
<11> USB3RP1 USB3RN1_C SSRXp MUX_FLIP
<11> USB3RN1 C348 1 2 0.1U_0201_10V6K 4 38
SSRXn FLIP
1
35 MUX_USB
CE_USB 23 MUX_DP R2679
C349 1 2 0.1U_0201_10V6K USB3TP1_C 8 CE_DP +3VS_MUX @ 4.7K_0402_5%
<11> USB3TP1 USB3TN1_C SSTXp
<11> USB3TN1 C350 1 2 0.1U_0201_10V6K 7
SSTXn
2
PU & PD 29 R264 1 2 4.7K_0402_5%
I2C_EN 3 ADDR ADDR
R269 1 @ 2 0_0201_5% CCG4_HPD_R 32 DCICFG/ADDR
<24,26> CCG4_HPD IN_HPD
1
14 R270 1 @ 2 0_0201_5%
CDE/DCI_CLK DCI_CLK <10>
11 R271 1 @ 2 0_0201_5% R2680
SSDE/DCI_DATA DCI_DATA <10>
C200 1 2 2.2U_0402_6.3V6M 1 4.7K_0402_5%
B
R265 1 2 4.99K_0402_1% 2 CEXT 21 MUX_I2C_CLK_R R267 1 @ 2 0_0201_5% B
REXT DPEQ/CSCL MUX_I2C_DATA_R MUX_I2C_CLK <24>
22 R268 1 @ 2 0_0201_5%
MUX_I2C_DATA <24>
2
41 CEQ/CSDA
Thermal pad
R03_0706 Support BSSB DCI
PS8743BQFN40GTR-B0_QFN40_4X6
+3VS_MUX
+3VS_MUX +3VS_MUX +3VS_MUX

MUX_I2C_CLK_R R258 1 2 2.2K_0201_5%
1
MUX_I2C_DATA_RR259 1 2 2.2K_0201_5%
R2698 R2696 R2691
@ 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5% MUX_PD_SBU1 R2702 1 2 2M_0201_5%
MUX_PD_SBU2 R2703 1 2 2M_0201_5%
2
MUX_DP MUX_USB MUX_FLIP
1
R2699 R2697 R2695
@
2 4.7K_0402_5% @ 4.7K_0402_5% @ 4.7K_0402_5%
2
A A

DP MUX
5 4 3 2 1
5 4 3 2 1
1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P1_C Y23 PCIE_PRX_TBTX_P1_C
WhW/Zy
CT2 2 V23 CT1 2 1 0.22U_0201_6.3V6M
<11> PCIE_PTX_TBRX_P1 PCIE_PRX_TBTX_P1 <11>
+3VA_TBT_LC CT4 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N1_C Y22 PCIE_RX0_P PCIE_TX0_P V22 PCIE_PRX_TBTX_N1_C CT3 2 1 0.22U_0201_6.3V6M
<11> PCIE_PTX_TBRX_N1 PCIE_RX0_N PCIE_TX0_N PCIE_PRX_TBTX_N1 <11>
1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P2_C T23 PCIE_PRX_TBTX_P2_C
WhW/dy
CT6 2 P23 CT5 2 1 0.22U_0201_6.3V6M
CT8 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N2_C T22 PCIE_RX1_P PCIE_TX1_P P22 PCIE_PRX_TBTX_N2_C CT7 2 1 0.22U_0201_6.3V6M
10K_0402_0.5%
10K_0402_0.5%
10K_0402_0.5%
10K_0402_0.5%
1
1
CT11 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P3_C M23 K23 PCIE_PRX_TBTX_P3_C CT16 2 1 0.22U_0201_6.3V6M
RT6
RT7
RT8
RT9
CT12 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N3_C M22 PCIE_RX2_P PCIE_TX2_P K22 PCIE_PRX_TBTX_N3_C CT15 2 1 0.22U_0201_6.3V6M
PCIe GEN3
CT10 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_P4_C H23 F23 PCIE_PRX_TBTX_P4_C CT14 2 1 0.22U_0201_6.3V6M
2
2
TBT_JTAG_TDI CT9 2 1 0.22U_0201_6.3V6M PCIE_PTX_TBRX_N4_C H22 PCIE_RX3_P PCIE_TX3_P F22 PCIE_PRX_TBTX_N4_C CT13 2 1 0.22U_0201_6.3V6M
TBT_JTAG_TMS <11> PCIE_PTX_TBRX_N4 PCIE_RX3_N PCIE_TX3_N PCIE_PRX_TBTX_N4 <11>
TBT_JTAG_TCK V19 L4 TBT_PERST_N R104 2 @ 1 0_0402_1%
TBT_JTAG_TDO <9> CLK_PCIE_TBT PCIE_REFCLK_100_IN_P PERST_N PCH_PLTRST#_EC <9,30,31,32,33,37,38>
T19
<9> CLK_PCIE_TBT#
RT126 1 @ 2 0_0201_5% AC5 PCIE_REFCLK_100_IN_N N16 PCIe_RBIAS RT1 2 1 3.01K_0402_1%
D <9> CLKREQ_PCIE#1 PCIE_CLKREQ_N PCIE_RBIAS D
CT17 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P0_C AB7 R2
<5> DDI1_PTX_TBRX_P0 TBT_DP_ML0_P <25>
CT18 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N0_C AC7 DPSNK0_ML0_P DPSRC_ML0_P R1
<5> DDI1_PTX_TBRX_N0 DPSNK0_ML0_N DPSRC_ML0_N TBT_DP_ML0_N <25>
CT19 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P1_C AB9 N2
CT20 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N1_C AC9 DPSNK0_ML1_P DPSRC_ML1_P N1
<5> DDI1_PTX_TBRX_N1 TBT_DP_ML1_N <25>
Vinafix.com
DPSNK0_ML1_N DPSRC_ML1_N
SOURCE PORT 0
CT21 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P2_C AB11 L2
CPU DDI1
1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N2_C DPSNK0_ML2_P DPSRC_ML2_P
SINK PORT 0
<5> DDI1_PTX_TBRX_N2 CT22 2 AC11 L1
TBT_DP_ML2_N <25>
DPSNK0_ML2_N DPSRC_ML2_N
CT23 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_P3_C AB13 J2
CT24 2 1 0.1U_0201_6.3V6K DDI1_PTX_TBRX_N3_C AC13 DPSNK0_ML3_P DPSRC_ML3_P J1
<5> DDI1_PTX_TBRX_N3 DPSNK0_ML3_N DPSRC_ML3_N TBT_DP_ML3_N <25>
<5> CPU_DDI1_AUXP CT25 2 1 0.1U_0201_6.3V6K CPU_DDI1_AUXP_C Y11 W19 TBT_DP_AUX_P <25>

CT26 2 1 0.1U_0201_6.3V6K CPU_DDI1_AUXN_C W11 DPSNK0_AUX_P DPSRC_AUX_P Y19
<5> CPU_DDI1_AUXN DPSNK0_AUX_N DPSRC_AUX_N TBT_DP_AUX_N <25>
AA2 G1 TBT_SRC_HPD RT122 1 @ 2 0_0201_5%
<5> PCH_DDI1_HPD DPSNK0_HPD DPSRC_HPD CCG4_HPD <24,25> TBT_RESET_N_R @ RT120 2 1 0_0201_5% TBT_RESET_N <28>
TBT_DDI1_CLK Y5 N6 DPSRC_RBIAS RT2 2 1 14K_0402_1%
TBT_DDI1_DAT R4 DPSNK0_DDC_CLK DPSRC_RBIAS
DPSNK0_DDC_DATA U1 TBT_I2C_DATA RT121 2 1 0_0201_5%
TBT_I2C_DATA <28> TBT_RESET_N_EC <28,38>
CT29 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P0_C AB15 GPIO_0 U2 TBT_I2C_CLK
<5> DDI2_PTX_TBRX_P0 TBT_I2C_CLK <28>
CT30 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N0_C AC15 DPSNK1_ML0_P GPIO_1 V1 TBT_ROM_WP#
+3V_TBT <5> DDI2_PTX_TBRX_N0 DPSNK1_ML0_N GPIO_2 TBT_TMU_CLK_OUT
V2
CT31 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P1_C AB17 GPIO_3 W1 TBT_PCIE_WAKE#
<5> DDI2_PTX_TBRX_P1 TBT_PCIE_WAKE# <38>
CT32 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N1_C AC17 DPSNK1_ML1_P GPIO_4 W2 TBT_CIO_PLUG_EVENT#
<5> DDI2_PTX_TBRX_N1 DPSNK1_ML1_N GPIO_5 TBT_DDC_DATA TBT_CIO_PLUG_EVENT# <8>
Y1
LC GPIO
RT21 1 2 10K_0201_5% CLKREQ_PCIE#1 CPU DDI2
CT33 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P2_C AB19 GPIO_6 Y2 TBT_DDC_CLK
<5> DDI2_PTX_TBRX_P2
CT34 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N2_C AC19 DPSNK1_ML2_P GPIO_7 AA1 TBT_SRC_CFG1
SINK PORT 1
<5> DDI2_PTX_TBRX_N2 DPSNK1_ML2_N GPIO_8 TBT_I2C_INT#
J4
TBT_I2C_INT# <28>
CT35 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_P3_C AB21 POC_GPIO_0 E2
<5> DDI2_PTX_TBRX_P3
CT36 2 1 0.1U_0201_6.3V6K DDI2_PTX_TBRX_N3_C AC21 DPSNK1_ML3_P POC_GPIO_1 D4 RTD3_USB_PWR_EN_N RT123 1 @ 2 0_0201_5%
<5> DDI2_PTX_TBRX_N3 DPSNK1_ML3_N POC_GPIO_2 TBT_FORCE_PWR PCH_RTD3_USB_PWR_EN <8>
H4
TBT_RESET_N_R TBT_FORCE_PWR <8>
@ RT51 1 2 10K_0201_5% CT108 2 1 0.1U_0201_6.3V6K CPU_DDI2_AUXP_C Y12 POC_GPIO_3 F2 TBT_BATLOW#_N RT124 1 @ 2 0_0201_5%
<5> CPU_DDI2_AUXP TBT_BATLOW# <8>
<5> CPU_DDI2_AUXN CT107 2 1 0.1U_0201_6.3V6K CPU_DDI2_AUXN_C W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3#_N RT119 1 @ 2 0_0201_5% SIO_SLP_S3# <9,19,22,38>
POC GPIO
DPSNK1_AUX_N POC_GPIO_5 F1 RTD3_CIO_PWR_EN_N RT125 1 @ 2 0_0201_5%
POC_GPIO_6 RTD3_CIO_PWR_EN <8>
Y6
<5> PCH_DDI2_HPD DPSNK1_HPD TBT_TEST_EN
C E1 RT3 2 1 100_0201_1% C
RT26 1 2 10K_0201_5% RTD3_CIO_PWR_EN_N TBT_DDI2_CLK Y8 TEST_EN
@ RT52 1 2 10K_0201_5% RTD3_USB_PWR_EN_N TBT_DDI2_DAT N4 DPSNK1_DDC_CLK AB5 TBT_TEST_PWRG RT4 2 1 100_0201_1%
DPSNK1_DDC_DATA TEST_PWR_GOOD
Misc
2 1 Y18 F4 TBT_RESET_N_R
RT5 14K_0402_1% DPSNK_RBIAS RESET_N YT1
TBT_JTAG_TDI Y4 D22 XTAL_25_IN RT128 1 2 33_0201_1% 1 2
+3VA_TBT TBT_JTAG_TMS V4 TDI XTAL_25_IN D23 XTAL0 GND0
TBT_JTAG_TCK T4 TMS XTAL_25_OUT XTAL_25_OUT RT127 1 2 33_0201_1% XTAL_25_OUT_R 3 4
TBT_JTAG_TDO W4 TCK AB3 TBT_ROM_DI XTAL1 GND1
1 2 TBT_I2C_DATA TDO MISC EE_DI AC4 TBT_ROM_DO
RT35 2.2K_0201_5% 25MHZ 20PF +-10PPM 7M25000153
RT36 1 2 2.2K_0201_5% TBT_I2C_CLK TBT_RBIAS H6 EE_DO AC3 TBT_ROM_CS#
@ RT22 1 2 10K_0201_5% TBT_PCIE_WAKE# 1 2 TBT_RSENSE J6 RBIAS EE_CS_N AB4 TBT_ROM_CLK
RT23 1 2 10K_0201_5% TBT_CIO_PLUG_EVENT# RT10 4.75K_0402_0.5% RSENSE EE_CLK
TBT_BATLOW#_N 1 1
RT25 1 2 10K_0201_5% A15 B7 CT44
TBT_I2C_INT# <29> TBT_USB3_RX1_P PA_RX1_P PB_RX1_P
RT47 1 2 10K_0201_5% B15 A7 CT43
TBT_SLP_S3#_N <29> TBT_USB3_RX1_N PA_RX1_N PB_RX1_N
@ RT57 1 2 10K_0201_5% 27P_0201_25V9 27P_0201_25V9
CT37 2 1 0.22U_0201_6.3V6M TBT_USB3_TX1_P_C A17 A9 2 2
TBT_TMU_CLK_OUT <29> TBT_USB3_TX1_P
RT37 1 2 100K_0201_5% CT38 2 1 0.22U_0201_6.3V6M TBT_USB3_TX1_N_C B17 PA_TX1_P PB_TX1_P B9
TBT_FORCE_PWR <29> TBT_USB3_TX1_N PA_TX1_N PB_TX1_N
RT38 1 2 100K_0201_5%
@ RT39 1 2 100K_0201_5% RTD3_CIO_PWR_EN_N CT39 2 1 0.22U_0201_6.3V6M TBT_USB3_TX0_P_C A19 A11
RTD3_USB_PWR_EN_N <29> TBT_USB3_TX0_P A00_0909: RF issue for IPHONE5S
RT40 1 2 10K_0201_5% CT40 2 1 0.22U_0201_6.3V6M TBT_USB3_TX0_N_C B19 PA_TX0_P PB_TX0_P B11 R03_0622 RF ISSUE on SKL/KBL platform
R03_0713 Capacitance change for Vendor request
TBT_HPD <29> TBT_USB3_TX0_N PA_TX0_N PB_TX0_N
RT43 1 2 100K_0201_5%
RT44 1 2 1M_0201_1% TBT_LSTX B21 A13
PORT A
PORT B
TBT_LSRX <29> TBT_USB3_RX0_P PA_RX0_P PB_RX0_P
RT45 1 2 1M_0201_1% A21 B13
NC_B4 <29> TBT_USB3_RX0_N PA_RX0_N PB_RX0_N
RT50 1 2 100K_0201_5%
RT48 1 2 100K_0201_5% NC_B5 CT41 2 1 0.1U_0201_6.3V6K TBT_AUX_P_C Y15 Y16
<28> TBT_AUX_P
TBT PORTS
RT49 1 2 100K_0201_5% NC_G2 CT42 2 1 0.1U_0201_6.3V6K TBT_AUX_N_C W15 PA_DPSRC_AUX_P PB_DPSRC_AUX_P W16
TBT_DDI1_CLK <28> TBT_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N
RT54 1 2 100K_0201_5%
RT53 1 2 100K_0201_5% TBT_DDI1_DAT E20 E19
TBT_DDI2_CLK <28> TBT_USB2_D_P PA_USB2_D_P PB_USB2_D_P
RT55 1 2 100K_0201_5% D20 D19
TBT_DDI2_DAT <28> TBT_USB2_D_N PA_USB2_D_N PB_USB2_D_N
RT56 1 2 100K_0201_5%
TBT_LSTX A5 B4 NC_B4
<28> TBT_LSTX
POC
POC
RT33 1 2 100K_0201_5% TBT_DDC_CLK TBT_LSRX A4 PA_LS_G1 PB_LS_G1 B5 NC_B5
<28> TBT_LSRX
RT34 1 2 100K_0201_5% TBT_DDC_DATA TBT_HPD M4 PA_LS_G2 PB_LS_G2 G2 NC_G2
<28> TBT_HPD PA_LS_G3 PB_LS_G3
RT12 2 1 499_0201_1%H19 F19 RT164 2 1 499_0201_1%
PA_USB2_RBIAS PB_USB2_RBIAS
B B
AC23 D6
AB23 THERMDA MONDC_SVR
THERMDA A23
V18 ATEST_P B23
PCIE_ATEST ATEST_N
AC1 DEBUG E18
EKd͗ TEST_EDM USB2_ATEST
ddͺ^Zͺ&'ϭсϬ ĨŽƌ W ŵŽĚĞ͘ L15 W13
N15 FUSE_VQPS_64 MONDC_DPSNK_0
FUSE_VQPS_128 W18
C23 MONDC_DPSNK_1 ZͬWW^ KDDKE &>^,
TBT_SRC_CFG1 R1403 1 2 1M_0201_1% C22 MONDC_CIO_0 AB2
MONDC_CIO_1 MONDC_DPSRC
TBT_SRC_HPD R1405 1 2 1M_0201_1% UT1A AR-4C_BGA337
@
VCC3V3_TBT_LDO VCC3V3_TBT_LDO
0.1U_0201_6.3V6K
1
1
1
3.3K_0201_1%
3.3K_0201_1%
3.3K_0201_1%
3.3K_0201_1%
RT15
RT18
RT16
RT17
CT47
2
2
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW:
GPIO | TERMINATION | Power Rail UT5
8 1 TBT_ROM_CS#
---------------------------------------------------- TBT_ROM_HOLD# VCC CS# TBT_ROM_DO
GPIO_0 | 10K PU | VCC3V3_LC DEBUG PINs: 7 2
TBT_ROM_CLK 6 HOLD#(IO3) DO(IO1) 3 TBT_ROM_WP#
GPIO_1 | 10K PU | VCC3V3_LC TBT_ROM_DI 5 CLK WP#(IO2) 4
GPIO_2 | 100K PD | PIN | TERMINATION DI(IO0) GND
------------------------------- 9
GPIO_3 | 100k PD | thermal pad
GPIO_4 | 10K PU | VCC3V3_LC MONDC_SVR | GND
W25Q80DVZPIG_WSON8
GPIO_5 | 10K PU | VCC3V3_LC MONDC_DPSNK_0 | GND
GPIO_6 | 100K PD | MONDC_DPSNK_1 | GND
GPIO_7 | 100K PD | MONDC_DPSRC | GND
A GPIO_8 | 100K PD | MONDC_CIO_0 | GND A
POC_GPIO_0 | 10K PU | VCC3V3_SX_TBT TEST_EDM | GND
POC_GPIO_1 | 10K PU | VCC3V3_SX_TBT FUSE_VQPS_64 | GND
POC_GPIO_2 | 100K PD | FUSE_VQPS_128 | GND
POC_GPIO_3 | 100K PD | ATEST_P/N | FLOATING
POC_GPIO_4 | 10K PU | VCC3V3_SX_TBT USB2_ATEST | FLOATING
POC_GPIO_5 | 10K PU | VCC3V3_SX_TBT PCIE_ATEST | FLOATING
POC_GPIO_6 | 100K PD |
DELL CONFIDENTIAL/PROPRIETARY
Security Classification Compal Secret Data
Title
Compal Electronics, Inc.
Issued Date 2013/07/04 Deciphered Date 2012/07/25
P39-AR_TBT (1/2) DP / PCIE
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-D781P 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5 4 3 2 1
5 4 3 2 1
+3VA_TBT
+3V_TBT
+VCC0V9_DP +3VA_TBT_LC +3V_TBT_S0
1U_0201_6.3V6M
1
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1
0.1U_0201_6.3V6K
CT57
1U_0201_6.3V6M
1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CT50
2 1 1 1 1 1
+3VALW +3VA_TBT
CT62
CT63
CT64
CT65
CT66
CT67
CT68
CT53
CT54
CT55
CT56
2
CT52
2 2 2 2 2 2 2
RT113 2 @ 1 0_0402_1% 2 2 2 2 2
R13
+VCC0V9_DP
R6
H9
F8
D D
+3VS +3V_TBT L8 A2
VCC3P3_LC
VCC3P3_SX
VCC3P3A
VCC3P3_S0
RT241 L11 VCC0P9_DP VCC3P3_SVR A3
0_0603_5% L12 VCC0P9_DP VCC3P3_SVR B3
+VCC0V9_PCIE +VCC0V9_USB 1 @ 2 M8 VCC0P9_DP VCC3P3_SVR
T11 VCC0P9_DP
Vinafix.com
T12 VCC0P9_DP L9 VCC0V9_SVR
L6 VCC0P9_DP VCC0P9_SVR M9
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12
1 1 1 1 1 1 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA 1 1 1 1 1 1 1
V11 E13
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA
CT80
CT71
CT72
CT81
CT93
CT94
CT92
CT91
CT83
CT84
CT74
CT85
CT86
V12 F11
+VCC0V9_PCIE V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
2 2 2 2 2 2 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13 2 2 2 2 2 2 2
M13 VCC0P9_SVR_ANA F15
M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
M16 VCC0P9_PCIE VCC0P9_SVR_SENSE
VCC0P9_PCIE LT1
L19
VCC
N19 VCC0P9_ANA_PCIE_1 C1 TBT_SVR_IND 1 2
L18 VCC0P9_ANA_PCIE_1 SVR_IND C2 0.68UH_MLV-YT10NR68N-M1L_2.7A_30%
47U_0603_6.3V M
47U_0603_6.3V M
47U_0603_6.3V M
M18 VCC0P9_ANA_PCIE_2 SVR_IND D1
VCC0P9_ANA_PCIE_2 SVR_IND 1 1 1
N18
+VCC0V9_CIO +VCC0V9_USB VCC0P9_ANA_PCIE_2
CT88
CT89
CT90
R15 A1
R16 VCC0P9_USB SVR_VSS B1 2 2 2
VCC0P9_USB SVR_VSS B2
1U_0201_6.3V6M
1U_0201_6.3V6M
1U_0201_6.3V6M
R8 SVR_VSS
1 1 1 VCC0P9_CIO
+VCC0V9_CIO R9
+3V_TBT VCC0P9_CIO
CT101
CT102
CT103
R11
+3V_TBT_S0 R12 VCC0P9_CIO F18 VCC0V9_LVR_OUT
2 2 2 LT14 VCC0P9_CIO VCC0P9_LVR H18
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1 2 VCC_3V3_PCIE L16 VCC0P9_LVR J11
VCC_3V3_USB2 VCC3P3_ANA_PCIE VCC0P9_LVR 1 1 1 1
J16 H11
CT95
CT96
CT97
CT98
1U_0201_6.3V6M
1U_0201_6.3V6M
LQM18PN1R0MFHD_2P VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE
1 1
A6 V5
1U_0201_6.3V6M
47U_0603_6.3V M
47U_0603_6.3V M
VSS_ANA VSS_ANA 2 2 2 2
CT99
CT100
1 1 1 A8 V6
A10 VSS_ANA VSS_ANA V8
2 2 VSS_ANA VSS_ANA
CT163
CT164
CT165
A12 V9
C C
2 2 2 A16 VSS_ANA VSS_ANA V16
A20 VSS_ANA VSS_ANA W5
A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
B16 VSS_ANA VSS_ANA Y9
B22 VSS_ANA VSS_ANA AA22
D8 VSS_ANA VSS_ANA AA23
D9 VSS_ANA VSS_ANA AB6
E8 VSS_ANA VSS_ANA AB20
E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
GND
F9 VSS_ANA VSS_ANA AC16
G22 VSS_ANA VSS_ANA AC22
G23 VSS_ANA VSS_ANA D5
H1 VSS_ANA VSS E4
H2 VSS_ANA VSS E5
H12 VSS_ANA VSS E6
H13 VSS_ANA VSS F5
B
H15 VSS_ANA VSS F6 B
H16 VSS_ANA VSS H5
H20 VSS_ANA VSS H8
J5 VSS_ANA VSS J8
J18 VSS_ANA VSS J12
J19 VSS_ANA VSS J13
J20 VSS_ANA VSS J15
J22 VSS_ANA VSS L13
J23 VSS_ANA VSS M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11
L22 VSS_ANA VSS N12
L23 VSS_ANA VSS N13
M1 VSS_ANA VSS T6
M2 VSS_ANA VSS T8
M5 VSS_ANA VSS T9
M19 VSS_ANA VSS T13
M20 VSS_ANA VSS T15
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
N20 VSS_ANA VSS T18
N22 VSS_ANA VSS AB1
N23 VSS_ANA VSS AC2
VSS_ANA VSS
UT1B @
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U23
AR-4C_BGA337 U22
A A
Title
P40-AR_TBT (2/2) PWR / VSS
5 4 3 2 1
5 4 3 2 1
+5VALW
USB1 Power Share +3V_PDLDO_OUT TBT_VBUS VCC3V3_TBT_SX VCC3V3_TBT_LDO
1 1 1
1
1U_0402_16V6K
1 1 C1354 C1353 C1345 C1346
10U_0603_10V6M
C1173
US1 1U_0201_6.3V6M 1U_0603_25V6 1U_0201_6.3V6M 10U_0402_6.3V6M
USBC1_PWR_SHR_EN#
2
@ PAD~D T195 1 8 R25 1 @ 2 0_0201_5% 2 2 2
TBT_USB2_N CEN CB 7 USBC1_PWR_SHR_EN# <39>
2
C1172
D 2 2 TBT_USB2_P DM TDM 6 TBT_USB2_D_N <26> D

3
USBC1_PWR_SHR_EN# 1 DP TDP 5 TBT_USB2_D_P <26>
@ 2 0_0201_5%
4
SMART-CDPVdd +5VALW
R26 9
Thermal-Pad
SLG55594AVTR_TDFN8_2X2
VCC1V8A_TBT_LDO VCC1V8D_TBT_LDO TBT_LDO_BMC
Vinafix.com 1
2
CT151
4.7U_0402_6.3V6M
1
2
CT152
4.7U_0402_6.3V6M
1
2
CT144
2.2U_0402_6.3V6M
CB SMART-CDP MODE
0 X DCP_Auto
1 1 CDP
TBT_VBUS_L
U722
A00_0822: EMI Request
A6 B10
+PP_HV PP_HV SENSEP
A7 A10
A8 PP_HV SENSEN
C 1 C
4.7U_0603_25V6K
B7 PP_HV
@ C1341
PP_HV B9 T193 PAD~D @ LT107 EMI@ HCB2012KF-121T50_0805

A11 HV_GATE1 A9 T194 PAD~D @ TBT_VBUS_L 1 2 TBT_VBUS
2 +5VALW PP_5V0 HV_GATE2
C11
B11 PP_5V0 LT106 EMI@ HCB2012KF-121T50_0805
D11 PP_5V0 H11 1 2
PP_5V0 VBUS J10
R03_0602 add +3VALW option VBUS
H10 J11
PP_CABLE VBUS
2
BAT54LPS-7
+3VALW R1466 1 2 0_0402_5% K11
VBUS
D123
B1 C1339
VDDIO 1U_0402_25V6K EMI@ DI7
2
R1462 1 @ 2 0_0402_5% H1 H2 AZ4024-02S_SOT23-3~D
+3V_PDLDO_OUT VIN_3V3 VOUT_3V3 VCC3V3_TBT_SX
G1
VCC3V3_TBT_LDO
2
VCC3V3_TBT_LDO LDO_3V3 K1
VCC1V8A_TBT_LDO
1
D1 LDO_1V8A A2
PD_EE_CS# <26> TBT_I2C_DATA I2C_SDA1 LDO_1V8D VCC1V8D_TBT_LDO
R1477 1 2 3.3K_0402_1% D2 E1
PD_EE_DO <26> TBT_I2C_CLK I2C_SCL1 LDO_BMC TBT_LDO_BMC
R1475 1 2 3.3K_0402_1% C1
PD_EE_WP# <26> TBT_I2C_INT# I2C_IRQ1_N
R1474 1 2 3.3K_0402_1%
R1476 1 2 3.3K_0402_1% PD_HOLD# A5
<38> UPD_SMBDAT I2C_SDA2
B5
<38> UPD_SMBCLK I2C_SCL2
B6 L9
<38> UPD_SMBINT# I2C_IRQ2_N C_CC1 TBT_CC1 <29>
L10
C_CC2 TBT_CC2 <29>
PD_EE_CLK A3 K9 1 1
220P_0402_50V8K
220P_0402_50V8K
PD_EE_DI B4 SPI_CLK RPD_G1 K10
C1279
C1280
PD_EE_DO A4 SPI_MOSI RPD_G2
PD_EE_CS# B3 SPI_MISO
SPI_SS_N K6 2 2
VCC3V3_TBT_LDO C_USB_TP TBT_USB2_T_P <29>
L6
TBT_USB2_P C_USB_TN TBT_USB2_T_N <29>
L5
TBT_USB2_N K5 USB_RP_P
USB_RP_N K7
C_USB_BP TBT_I2C_B_P <29>
UT6 L7
PD_EE_CS# C_USB_BN TBT_I2C_B_N <29>
1 8 J1
PD_EE_DO CS# VCC PD_HOLD# <26> TBT_AUX_P AUX_P
2 7 J2
PD_EE_WP# DO(IO1) HOLD#(IO3) PD_EE_CLK <26> TBT_AUX_N AUX_N TBT_PD_SBU1
3 6 K8 R1457 1 @ 2 0_0201_5%
WP#(IO2) CLK PD_EE_DI C_SBU1 TBT_PD_SBU2 TBT_SBU1 <29>
4 5 L8 R1458 1 @ 2 0_0201_5%
B GND DI(IO0) C_SBU2 TBT_SBU2 <29> B
9 @ TC29 G4
thermal pad @ TC25 F4 SWD_CLK
W25Q80DVZPIG_WSON8 SWD_DATA B2 R1439 2 @ 1 0_0402_1% @ TC38
GPIO0 C2 R1437 2 @ 1 0_0402_1%
GPIO1 EN_PD_HV <47>
E2 D10 @ TC39
R1471 1 20_0201_5% F2 UART_TX GPIO2 G11
UART_RX GPIO3 AC1_PD_DISC# <47>
C10 R1438 2 @ 1 0_0402_1%
TBT_LSTX_R GPIO4 TBT_HPD <26>
A00_0822: Change PD ROM CPN to SA00008DZ00 L4 E10 @ TC36
VCC3V3_TBT_LDO TBT_LSRX_R K4 LSTX/R2P GPIO5 G10 @ TC40
LSRX/P2R GPIO6 D7 @ TC46
R1454 1 2 10K_0402_5% TBT_DBG_CTL1 E4 GPIO7 H6 R1445 1 @ 2 0_0402_5%
TBT_DBG_CTL2 DEBUG_CTL1 GPIO8 USB_OC0# <11>
R1460 1 2 10K_0402_5% D5
DEBUG_CTL2
UPD_SMBCLK R1441 1 @ 2 0_0201_5% UPD_SMBCLK_N L2 @ R1465 1 2 0_0201_5%
UPD_SMBDAT UPD_SMBDAT_N DEBUG1 TBT_RESET_N_EC <26,38>
R1442 1 @ 2 0_0201_5% K2 E11 R1468 1 2 100K_0402_5%
DEBUG2 MRESET
TBT_DEBUG3 L3 F11
TBT_DEBUG4 DEBUG3 RESET_N TBT_RESET_N <26>
K3
DEBUG4 F10 @ RT199 1 2 0_0402_5%
BUSPOWER_N VCC3V3_TBT_LDO
F1
I2C_ADDR G2 @ RT201 1 2 0_0402_5%
R_OSC VCC1V8A_TBT_LDO
H7
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
SS
1
1
100K_0201_5%
100K_0201_5%
0_0402_5%
15K_0402_1%
1
1
RT188
RT187
RT190
0.22U_0201_6.3V6M
0_0402_5%
1
VCC3V3_TBT_LDO
C618
R1473
RT200
SN1508014ZQZR_BGA96
A1
D6
E5
E6
E7
F5
G5
H4
H5
B8
D8
E8
F6
F7
F8
G6
G7
G8
H8
L1
L11
TBT_AUX_N
2
R1479 1 2 100K_0402_5% 2
TBT_AUX_P
2
R1472 1 2 100K_0402_5%
1 20_0201_5% TBT_LSTX_R
A TBT_LSTX <26> R1459 A
R1461 1 20_0201_5% TBT_LSRX_R

<26> TBT_LSRX
@ R1463 1 20_0201_5% TBT_DEBUG3
@ R1464 1 20_0201_5% TBT_DEBUG4

2013/07/04 2012/07/25 Title
P41-PD CONTROL
5 4 3 2 1
5 4 3 2 1
TBT_VBUS
CCG_VBUS
1 0.1U_0402_25V6 1 1 1 1 1 1 1
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
C60
C61
C62
C63
C64
C65
C66
C67
1
2 2 2 2 2 2 2 2 CT28
1U_0402_25V6K
2
CCG_VBUS CCG_VBUS
TBT_VBUS TBT_VBUS
D D
JUSBC2
JUSBC1 A1 B12
A1 B12 GND GND
GND GND MUX_USB3_TX0_P A2 B11 MUX_USB3_RX0_P
<25> MUX_USB3_TX0_P MUX_USB3_RX0_P <25>
Vinafix.com
TBT_USB3_TX0_P A2 B11 TBT_USB3_RX0_P MUX_USB3_TX0_N A3 SSTXP1 SSRXP1 B10 MUX_USB3_RX0_N
<26> TBT_USB3_TX0_P TBT_USB3_TX0_N SSTXP1 SSRXP1 TBT_USB3_RX0_N TBT_USB3_RX0_P <26> <25> MUX_USB3_TX0_N SSTXN1 SSRXN1 MUX_USB3_RX0_N <25>
A3 B10
<26> TBT_USB3_TX0_N SSTXN1 SSRXN1 TBT_USB3_RX0_N <26>
C405 1 2 A4 B9 2 1 C406
A4 B9 2 1 C398 0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
VBUS VBUS 0.47U_0402_25V6K CCG4_CC1 A5 B8 MUX_SBU2
TBT_CC1 TBT_SBU2 <24> CCG4_CC1 CC1 RFU2 MUX_SBU2 <25>
A5 B8
<28> TBT_CC1 CC1 SUB2 TBT_SBU2 <28> TOP_MUX_P_R BOT_MUX_N_R
A6 B7
TBT_USB2_T_P_R A6 B7 TBT_I2C_B_N_R TOP_MUX_N_R A7 DP1 DN2 B6 BOT_MUX_P_R
TBT_USB2_T_N_R DP1 DN2 TBT_I2C_B_P_R DN1 DP2
Bottom
A7 B6
DN1 DP2 MUX_SBU1 A8 B5 CCG4_CC2
Bottom
TBT_SBU1 TBT_CC2 <25> MUX_SBU1 RFU1 CC2 CCG4_CC2 <24>
TOP
A8 B5
<28> TBT_SBU1 SUB1 CC2 TBT_CC2 <28>
C404 1 2 A9 B4 2 1 C403
TOP
A9 B4 2 1 C402 0.47U_0402_25V6K VBUS VBUS 0.47U_0402_25V6K
VBUS VBUS 0.47U_0402_25V6K MUX_USB3_RX1_N A10 B3 MUX_USB3_TX1_N
TBT_USB3_RX1_N TBT_USB3_TX1_N <25> MUX_USB3_RX1_N MUX_USB3_RX1_P SSRXN2 SSTXN2 MUX_USB3_TX1_P MUX_USB3_TX1_N <25>
A10 B3 A11 B2
<26> TBT_USB3_RX1_N TBT_USB3_RX1_P SSRXN2 SSTXN2 TBT_USB3_TX1_P TBT_USB3_TX1_N <26> <25> MUX_USB3_RX1_P SSRXP2 SSTXP2 MUX_USB3_TX1_P <25>
A11 B2
<26> TBT_USB3_RX1_P SSRXP2 SSTXP2 TBT_USB3_TX1_P <26>
A12 B1
A12 B1 GND GND
GND GND
1 4
1 4 GND GND
GND GND 2 3
2 3 GND GND
5 GND GND 6
GND GND JAE_DX07SA24XJ2
JAE_DX07SD24JJ3 CONN@
CONN@
C C
ML6 ML7 ML8 ML9

1 2 TBT_USB2_T_N_R 4 3 TBT_I2C_B_P_R 4 3 TOP_MUX_P_R 4 3 BOT_MUX_P_R
<28> TBT_USB2_T_N <28> TBT_I2C_B_P <24> TOP_MUX_P <24> BOT_MUX_P
4 3 TBT_USB2_T_P_R 1 2 TBT_I2C_B_N_R 1 2 TOP_MUX_N_R 1 2 BOT_MUX_N_R

<28> TBT_USB2_T_P <28> TBT_I2C_B_N <24> TOP_MUX_N <24> BOT_MUX_N
HCM1012GH900BP_4P HCM1012GH900BP_4P HCM1012GH900BP_4P HCM1012GH900BP_4P

EMI@ EMI@ EMI@ EMI@
! " # $chnage
R03_0622 remove co-lay R03_0627 Pin3/Pin2 swap; Pin4/Pin1 swap
A00_0902 type-c high speed signal for
D99 EMI@
D75 EMI@ D84 EMI@ D98 EMI@ MUX_USB3_RX0_P 1 2

TBT_USB3_TX0_P 1 2 TBT_USB3_RX0_P 1 2 MUX_USB3_TX0_P 1 2
AZ5B6S-01B.R7G CSP ESD
AZ5B6S-01B.R7G CSP ESD AZ5B6S-01B.R7G CSP ESD AZ5B6S-01B.R7G CSP ESD D107 EMI@
D76 EMI@ D85 EMI@ D106 EMI@ MUX_USB3_RX0_N 1 2

TBT_USB3_TX0_N 1 2 TBT_USB3_RX0_N 1 2 MUX_USB3_TX0_N 1 2
B B
D77 EMI@ D87 EMI@ D102 EMI@ MUX_SBU2 1 2

TBT_CC1 1 2 TBT_SBU2 1 2 CCG4_CC1 1 2
AZ5B25-01F_DFN0603P2Y2 AZ5B25-01F_DFN0603P2Y2 AZ5B25-01F_DFN0603P2Y2 D109 EMI@
D78 EMI@ D86 EMI@ D108 EMI@ CCG4_CC2 1 2

TBT_SBU1 1 2 TBT_CC2 1 2 MUX_SBU1 1 2
D79 EMI@ D89 EMI@ D104 EMI@ MUX_USB3_TX1_N 1 2

TBT_USB3_RX1_N 1 2 TBT_USB3_TX1_N 1 2 MUX_USB3_RX1_N 1 2
D80 EMI@ D88 EMI@ D93 EMI@ MUX_USB3_TX1_P 1 2

TBT_USB3_RX1_P 1 2 TBT_USB3_TX1_P 1 2 MUX_USB3_RX1_P 1 2
D82 EMI@ D90 EMI@ D95 EMI@ BOT_MUX_N_R 1 2

TBT_USB2_T_P_R 1 2 TBT_I2C_B_N_R 1 2 TOP_MUX_P_R 1 2
D83 EMI@ D91 EMI@ D103 EMI@ BOT_MUX_P_R 1 2

A A
TBT_USB2_T_N_R 1 2 TBT_I2C_B_P_R 1 2 TOP_MUX_N_R 1 2

AZ5B25-01F_DFN0603P2Y2 AZ5B25-01F_DFN0603P2Y2 AZ5B25-01F_DFN0603P2Y2
Title
P42-PD USB TYPE-C
5 4 3 2 1
5 4 3 2 1
+3VS_SENSOR
+3VS_SENSOR
0.1U_0201_10V6K
1
^ĞŶƐŽƌ ,Ƶď ϮŶĚ ĐĐĞůĞƌŽŵĞƚĞƌ +3VS_SENSOR
C188
0.1U_0201_10V6K
1
C223
2
0.1U_0201_10V6K
0.1U_0201_10V6K
1 1
2
C185
C186
+3VS
+3VS_SENSOR 2 2
1
C225 +3VS @ R207 +3VS_SENSOR +3VS_SENSOR
0_0603_5%
0.1U_0201_10V6K 1 2
2 U18
D +3V_PCH LNG2DM D
0.1U_0201_10V6K
R208 1
C1068
0_0603_5% 10 5
1 2 SEN_I2C_SDA HUB@ R372 1 2 0_0402_5% 9 VDD_IO RES
6HQVRU+XE SEN_I2C_SCK HUB@ R371 1 2 0_0402_5% VDD 12 ACC2_INT1
2 ACC2_ADD_SEL 3 INT 1 11 ACC2_INT2
R03_0701 Del C187 Layout request ISH_I2C0_SDA_R ISH@ R370 1 ACC2_I2C_SDA SDO/SA0 INT 2
R03_0707 +3VS leakage change +3V_PCH 2 0_0402_5% 4
<10> ISH_I2C0_SDA_R
Vinafix.com
ISH_I2C0_SCK_R ISH@ R373 1 2 0_0402_5% ACC2_I2C_SCK 1 SDA/SDI/SDO 6
,6+ <10> ISH_I2C0_SCK_R SCL/SPC GND 7
R1090 2 1 100K_0402_5%~D 2 GND 8
24
36
48
+3VS_SENSOR CS GND
1
U731
VLCD
VDDA
VDD_1
VDD_2
VDD_3
SEN_GYRO_INT1 SEN_GYRO_INT1_R LNG2DMTR_LGA12_2X2
10 18 HUB@ R368 1 2 0_0402_5%
PA0-WKUP PB0 19 SEN_GYRO_INT2 HUB@ R367 1 2 0_0402_5% SEN_GYRO_INT2_R
PA1 11 PB1 20
PA2 12 PA1 PB2 39 +3VS_SENSOR
PA3 13 PA2 PB3 40
PA4 14 PA3 STM32L151CBU6TR_UFQFPN48 PB4 41 R1207 2 @ 1 0_0402_5%~D ACC2_ADD_SEL
PA5 15 PA4 PB5 42 SEN_I2C_SCK_R HUB@ R363 1 2 0_0402_5% SEN_I2C_SCK R1206 2 1 0_0402_5%~D ACC2_ADD_SEL
PA6 16 PA5 PB6 43 SEN_I2C_SDA_R HUB@ R364 1 2 0_0402_5% SEN_I2C_SDA
PA6 PB7 45
SEN_ACC2_INT1_R HUB@ R365 1 2 0_0402_5% SEN_ACC2_INT1 17 PB8 46
29 PA7 PB9 21
30 PA8 PB10 22
1.5K_0402_1% 1 2 RE81 31 PA9 PB11 25
USB20_N5_HUB 32 PA10 PB12 26
USB20_P5_HUB 33 PA11 PB13 27 SEN_COMPASS_DRDY_R HUB@ R2694 1 2 0_0402_5% SEN_COMPASS_DRDY +3VS_TS
34 PA12 PB14 28
37 PA13 PB15 RC288 1 2 4.7K_0402_5% I2C0_SDA_TS
SEN_ACC2_INT2_R HUB@ R366 1 2 0_0402_5% SEN_ACC2_INT2 38 PA14 RC289 1 2 4.7K_0402_5% I2C0_SCK_TS
PA15
HUB_OSCIN 5
HUB_OSCOUT 6 PH0-OSC_IN
PH1-OSC_OUT 2 HUB@ R2700 1 2 0_0402_5%
PC13-RTC_AF1 NB_MODE# <10,38>
NRST 7 3 R03_0622 +3V_PCH change +3VS_TS for AC S5 leakage
NRST PC14-OSC32_IN 4 +3VS_SENSOR
PC15-OSC32_OUT
44 BOOT0 HUB@ R2687 2 1 2.2K_0402_5% SEN_I2C_SCK_R +3VS_TS
C C
+3VS_SENSOR BOOT0 HUB@ R2688 2 1 2.2K_0402_5% SEN_I2C_SDA_R
HUB@ R2689 2 1 10K_0201_5% SEN_ACC2_INT1
VSS_1
VSS_2
VSS_3
SEN_ACC2_INT2
VSSA
HUB@ R2690 2 1 10K_0201_5%

PAD
1
10U_0402_6.3V6M
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
@EMI@ C59
R186 HUB@ R2693 2 1 10K_0201_5% SEN_GYRO_INT1
SEN_GYRO_INT2 1 1 1 1
C132
C164
C163
Option HUB@ HUB@ STM32L151CBU6TR_UFQFPN48_7X7 HUB@ R2692 2 1 10K_0201_5%
8
23
35
47
49
100K_0201_5%
2
NRST 2 2 2 2
2
C184
HUB@
0.1U_0201_10V6K
R194 1
BOOT0 2 1
HUB@ 20K_0201_5%
dŽƵĐŚ ^ĐƌĞĞŶ +3VS_TS

1
2
JSEN1
1
<8> TS_SPI_IRQ 2
3
<7> TS_SPI_CS# 3
<10> TS_I2C_RST# RR40 1 2
<7> TS_SPI_CLK
4
0_0201_5% 5 4
<7> TS_SPI_SI 5
6
L5 <7> TS_SPI_SO 6
@EMI@ <9,26,31,32,33,37,38> PCH_PLTRST#_EC RR38 1 @ 2 7
1 2 USB20_P3_CONN 0_0201_5% 8 7
<11> USB20_P3 <5> TOUCH_SCREEN_PD# 8
9
L62 9
HUB@ 10
USB20_N5_HUB USB20_N3_CONN <10> I2C0_SDA_TS 10
1 2 4 3 11
<11> USB20_N5 <11> USB20_N3 <10> I2C0_SCK_TS 11
12
<5> I2C0_IRQ_TS 12
D8 13
USB20_P5_HUB HCM1012GH900BP_4P 13
2
4 3 14
<11> USB20_P5 14
1
15
D1 D4 +3VS_SENSOR DB_SEN_I2C_SCK 15
D81 D92 16
HCM1012GH900BP_4P DB_SEN_I2C_SDA 17 16
A00_0831:Remove Co-lay COMPASS_DRDY 17
EMI@
18
EMI@
B
@EMI@ ACC1_INT1 19 18 B
1
GYRO_INT2 20 19
@EMI@ @EMI@ 21 20
22 G1
2
G2
E-T_4260K-F20N-40L
CONN@
HUB_OSCIN
R03_0627 Move sensor GND to JESN1
+3VS_SENSOR
HUB@ RH43 HUB@ R1210 HUB@ R1212

2 1 HUB_OSCOUT 2 1 PA1 2 1
1M_0402_5% 10K_0402_5% 10K_0402_5% +3VS_SENSOR
HUB@ YH3 HUB@ R1214 HUB@ R1215

12MHZ_12PF_X3S012000DC1H-X 2 1 PA2 2 1
1 3 10K_0402_5% 10K_0402_5% SEN_I2C_SDA HUB@ RR36 1 2 0_0201_5% DB_SEN_I2C_SDA
SEN_I2C_SCK DB_SEN_I2C_SCK 1
2 4 HUB@ RR37 1 2 0_0201_5%
ISH_I2C0_SDA_R ISH@ RR35 1
1
CH9 CH10 HUB@ R1216 HUB@ R1217 2 0_0201_5% C2984

HUB@ HUB@ 2 1 PA3 2 1 ISH_I2C0_SCK_R ISH@ RR34 1 2 0_0201_5% 0.1U_0402_25V6K~D
12P_0402_50V8J 12P_0402_50V8J 10K_0402_5% 10K_0402_5% 2
2
HUB@ R1218 HUB@ R1219

2 1 PA4 2 1
10K_0402_5% 10K_0402_5% COMPASS_DRDY
ISH@ RR20 1 2 0_0201_5% ACC1_INT1
<10> PCH_ACC1_INT1_R ACC2_INT1
HUB@ R1220 HUB@ R1221 ,6+ ISH@ RR21 1 2 0_0201_5%
2 1 PA5 2 1
<10> PCH_ACC2_INT1_R GYRO_INT2 6HQVRU
10K_0402_5% 10K_0402_5% ACC2_INT2
HUB@ R1222 HUB@ R1223

2 1 PA6 2 1
10K_0402_5% 10K_0402_5%
SEN_COMPASS_DRDY HUB@ RR39 1 2 0_0201_5%
SEN_GYRO_INT1_R HUB@ RR25 1 2 0_0201_5%
SEN_ACC2_INT1_R HUB@ RR26 1 2 0_0201_5%
A
6HQVRU+XE SEN_GYRO_INT2_R HUB@ RR27 1 2 0_0201_5% A
SEN_ACC2_INT2_R HUB@ RR28 1 2 0_0201_5%

2041/09/08 2013/10/28 Title
Security Module 1
5 4 3 2 1
5 4 3 2 1
M.2 Slot-C Key-M (SSD)
+3.3VDX_SSD
D D
5) 5HVHUYHG
JNGFF2 EMI@ EMI@
4.7U_0402_6.3V6M
C719
.1U_0402_16V7K~D
C720
0.01U_0402_16V7K~D
C721
47P_0402_50V8J~D
C722
15P_0402_50V8J
C1304
1 2 1 1 1 1 1
Vinafix.com
3 GND 3P3VAUX 4
5 GND 3P3VAUX 6
<11> PCIE_PRX_SSDTX_N5 PERn3 NC
7 8
<11> PCIE_PRX_SSDTX_P5 PERp3 NC 2 2 2 2 2
9 10
11 GND DAS/DSS# 12
<11> PCIE_PTX_SSDRX_N5 PETn3 3P3VAUX
13 14
<11> PCIE_PTX_SSDRX_P5 PETp3 3P3VAUX
15 16
17 GND 3P3VAUX 18
<11> PCIE_PRX_SSDTX_N6 PERn2 3P3VAUX
19 20
<11> PCIE_PRX_SSDTX_P6 PERp2 NC
21 22
23 GND NC 24
<11> PCIE_PTX_SSDRX_N6 PETn2 NC
<11> PCIE_PTX_SSDRX_P6
25 26
27 PETp2 NC 28
29 GND NC 30
3&,H66' <11> PCIE_PRX_SSDTX_N7
31 PERn1 NC 32
<11> PCIE_PRX_SSDTX_P7 PERp1 NC
33 34
35 GND NC 36 @ R1376 2 1 10K_0402_5%~D
<11> PCIE_PTX_SSDRX_N7 PETn1 NC +3.3VDX_SSD
37 38
<11> PCIE_PTX_SSDRX_P7 PETp1 DEVSLP SSD_DEVSLP <11>
39 40
41 GND NC 42
<11> SATA_PRX_SSDTX_P8 PERn0/SATA-B+ NC
43 44
<11> SATA_PRX_SSDTX_N8 PERp0/SATA-B- NC
45 46
6$7$ 66' 47 GND NC 48
<11> SATA_PTX_SSDRX_N8 PETn0/SATA-A- NC
49 50
<11> SATA_PTX_SSDRX_P8 PETp0/SATA-A+ PERST# PCH_PLTRST#_EC <9,26,30,32,33,37,38>
51 52
GND CLKREQ# CLKREQ_PCIE#3 <9>
53 54 R1377 1 2 10K_0402_5%~D
<9> CLK_PCIE_SSD# REFCLKN PEWake# +3.3VDX_SSD
55 56
<9> CLK_PCIE_SSD REFCLKP NC
57 58
GND NC
C C
67 68 @ R2662 1 2 0_0402_5%~D
NC SUSCLK(32kHz) SUSCLK <9,32>
R2665 2 @ 1 0_0402_1% 69 70
<11> SSD_IFDET PEDET(NC-PCIE/GND-SATA) 3P3VAUX +3.3VDX_SSD
71 72
73 GND 3P3VAUX 74
75 GND 3P3VAUX
GND 76
GND1 77
GND2
ACES_51747-06702-P12
CONN@
B B
A A
2013/07/04 2013/10/28 Title
P30-SSD(M.2) / FAN
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5 4 3 2 1
A B C D E
M.2 Slot-A Key-A (WLAN)

+3VS_NGFF
+3VS_NGFF
Close to JNGFF 5) 5HVHUYHG WL1
4
3.3V
22U_0603_6.3V6M~D
0.1U_0402_10V7K
15P_0402_50V8J
C1301 EMI@
5
72 3.3V 29
1 1 1 3.3V PEWAKE# PCIE_WAKE# <38>
C715
C724
73 30
3.3V CLKREQ# CLKREQ_PCIE#2 <9>
31
PERST# PCH_PLTRST#_EC <9,26,30,31,33,37,38>
2 2 2 1
2 UIM_POWER_SRC/GPIO1 27 0_0402_5%~D 2 1 R1195
ML11 UIM_POWER_SNK SUSCLK(32KHZ) SUSCLK <9,31>
3
4 3 USB20_P2_CONN UIM_SWP
1 <11> USB20_P2 1
14
11 SYSCLK/GNSS0 15
1 2 USB20_N2_CONN 12 COEX1 TX_BLANKING/GNSS1
<11> USB20_N2 COEX2
13
COEX3 7
HCM1012GH900BP_4P NFC_RESET#
Vinafix.com
EMI@ 16
18 RESERVED/VDDIO18
19 RESERVED/ISH2_UART_RXD(I)(0/1.8V) 6
66 RESERVED/ISH2_UART_TXD(O)(0/1.8V) GND 17
67 RESERVED/ISH2_UART_RTS(O)(0/1.8V) GND 20
RESERVED/ISH2_UART_CTS(I)(0/1.8V) GND 23
21 GND 26
22 ISH1_UART_CTS(I)(0/1.8V) GND 32
24 ISH1_UART_RTS(O)(0/1.8V) GND 35
25 ISH1_UART_RXD(I)(0/1.8V) GND 38
ISH1_UART_TXD(O)(0/1.8V) GND 41
GND 62
33 GND 68
<9> CLK_PCIE_WLAN# REFCLKN0 GND
34 71
<9> CLK_PCIE_WLAN REFCLKP0 GND 74
CH16 1 2 0.1U_0402_10V7K~D PCIE_PRX_WLANTX_N10_C 36 GND 75
<11> PCIE_PRX_WLANTX_N10
CH15 1 2 0.1U_0402_10V7K~D PCIE_PRX_WLANTX_P10_C 37 PETN0 GND 76
<11> PCIE_PRX_WLANTX_P10 PETP0 GND 77
39 GND 78
<11> PCIE_PTX_WLANRX_N10 PERN0 GND
40 79
<11> PCIE_PTX_WLANRX_P10 PERP0 GND 80
GND 81
R1192 2 @ 1 0_0402_1% CL_CLK_R 42 GND 82
<7> CL_CLK CL_DAT_R CLINK_CLK GND
<7> CL_DAT R1193 2 @ 1 0_0402_1% 43 83
R1194 2 @ 1 0_0402_1% CL_RST#_R 44 CLINK_DATA GND 84
<7> CL_RST# CLINK_RESET GND 85
GND 86
45 GND 87
46 SDIO_RESET#(I) GND 88
47 SDIO_WAKE#(O) GND 89
48 SDIO_DATA3(IO)/WIGIG_UART_RXD(I) GND 90
49 SDIO_DATA2(IO)/WIGIG_UART_TDX(O) GND 91
2 2
50 SDIO_DATA1(IO)/WIGIG_UART_RTS(O) GND 92
51 SDIO_DATA0(IO)/WIGIG_UART_CTS(I) GND 93
52 SDIO_CMD(IO) GND 94
SDIO_CLK(I) GND 95
53 GND 96
54 UART WAKE#(3.3V) GND 97
55 LPSS_UART_CTS GND 98
56 LPSS_UART_TXD GND 99
57 LPSS_UART_RXD GND 100
LPSS_UART_RTS GND 101
GND 102
58 GND 103
59 PCM_SYNC/I2S_WS GND 104
60 PCM_IN/I2S_SD_IN GND 105
61 PCM_OUT/I2S_SD_OUT GND 106
PCM_CLK/I2S_SCK GND 107
+3VS_NGFF GND 108
1 2 WLAN_WIGIG60GHZ_DIS#_R 28 GND
<39> WLAN_WIGIG60GHZ_DIS# W_DISABLE1#
63
2.2K_0201_5% 2 @ 1 RC292 WLAN_WIGIG60GHZ_DIS#_R DZ4 W_DISABLE2#
2.2K_0201_5% 2 @ 1 RC293 BT_RADIO_DIS#_R RB751S40T1G_SOD523-2
1 2 BT_RADIO_DIS#_R 65
<39> BT_RADIO_DIS# LED1#
64
DZ3 LED2#
USB20_N2_CONN 69
USB20_P2_CONN 70 USB_D-
USB_D+
8
9 ALERT#
10 I2C_CLK
I2C_DATA
8265D2WML.NVQ_108P
3 3
4 4
2013/07/04 2013/10/28 Title
P29-WLAN / BT (M.2)
A B C D E
5 4 3 2 1
TPM NOTE:
Place 0.1 uF capacitors as close as
possible to the device power pins
+3VS_TPM
D D
+3VALW
C95 C96 C97 C94
1 1 1 1
Vinafix.com
0.1U_0201_10V6K
0.1U_0201_10V6K
0.1U_0201_10V6K
10U_0603_6.3V6M
+3V_PCH +3VS_TPM C99 1
2 2 2 2 1 C237
R1393 0_0603_5%
0.1U_0201_10V6K
1U_0402_6.3V6K
1 @ 2
2 2
+3VS_TPM
RH126 1 2 10K_0201_5% TPM_PIRQ#
A00_0905 Spec request R03_0707 vendor request

R03_0707 vendor request +3VALW
C C
U16
1 +TPM_LPM 2 1
VSB +3VS_TPM
<9,19,22,52> SIO_SLP_S0# 1 @ 2 29 0_0402_5% RC229 @
RE92 0_0402_5%~D 30 GPIO0/SDA/XOR_OUT 8 +TPM_LPM
1 2 3 GPIO1/SCL VDD 14 1 2
GPIO2/GPX VDD +3VS_TPM +3VS
RE104 0_0402_5%~D 6 22 RC228 0_0402_5%~D
GPIO3/BADD VDD
<7> PCH_SPI_SO_TPM 24 2
21 LAD0/MISO NC 7
<7> PCH_SPI_SI_TPM TPM_PIRQ# LAD1/MOSI NC
18 10
<5> TPM_PIRQ# LAD2/SPI_IRQ# NC
15 11
LAD3 NC 25
PCH_SPI_CLK_TPM 19 NC 26
<7> PCH_SPI_CLK_TPM PCH_SPI_CS2# LCKL/SCLK NC
20 31
<7> PCH_SPI_CS2# LFRAME#/SCS# NC
17
<9,26,30,31,32,37,38> PCH_PLTRST#_EC LRESET#/SPI_RST#/SRESET#
2 1 27 9
PCH_SPI_CS2# R60 2 1 10K_0201_5% 13 SERIRQ GND 16
@ RC230 0_0402_5% 28 CLKRUN#/GPIO4/SINT# GND 23
LPCPD# GND 32
4 GND 33 +TPM_LPM
5 PP PGND 12 close to U15.8
TEST Reserved C98 CA72
NPCT650JBAYX 1 1
4.7U_0402_6.3V6M
0.1U_0201_10V6K
B B
NPCT650JBAYX is TPM 2.0 2 2

NPCT650JB2YX is TPM 1.2
Sammy0216: wait CIS symbol
@ C135
SA000082D40
2 1 PCH_SPI_CLK_TPM NPCT650JBAYX
0.1U_0201_10V6K
ZĞƐĞƌǀĞĨŽƌD/ƉůĞĂƐĞĐůŽƐĞƚŽhϭϱ
A A
P28-TPM
5 4 3 2 1
5 4 3 2 1
HD Audio Codec
LA5 +PVDD2
BLM15PX600SN1D_2P Placement near Audio Codec
2 1
50mil
+5VS_AUDIO moat
0.1U_0402_16V7K~N
Place next to CODEC +AVDD1 +5VS_AUDIO
10U_0603_10V6M
10U_0603_10V6M
+AVDD1
0.1U_0402_16V7K~N
10U_0603_6.3V6M~D
1 2 1 1 2 1
+3VS_AUDIO +DVDD
0.1U_0402_10V7K
10U_0603_10V6M
LA14
CA97
CA100
0.1U_0402_10V7K
BLM15BB220SN1D_2P HCB1005KF-600T25_2P LA7
CA98
CA99
D 2 1 1 2 D
CA49
CA105
CA102
1 2
2 @ 2 1@ 2
CA56
10U_0603_10V6M
AZ5125-01H.R7G_SOD523-2
1
Vinafix.com
1
1 2 2 1
EMI@
CA101
moat 2
U733
AGND AGND
2
+AVDD2
Near Codec RA75
1 2
+1.8VS_AUDIO
In order to prevent the built?in LDO damaged from
10U_0603_6.3V6M~D
0_0402_5% over?voltage on +5VD or Standby power line, we
suggested using this Voltage suppressing device.
1 2
0.1U_0402_10V7K
10U_0603_6.3V6M~D
1 2
CA80
+3VS_AUDIO +DVDDIO
LA15
CA82
0.1U_0402_10V7K
BLM15BB220SN1D_2P 2 1
2 1
CA104
CA57
1 2 Beep sound moat
CA37
+DVDDIO AGND RA24
1 2 1 2 MONO_IN
<38> BEEP
+DVDD RA72 1 2 0_0402_5%

+RTCVCC 1K_0402_1%
0.1U_0402_10V7K
100P_0402_50V8J
Near Codec
1
RA25
CA48
1 2
<8> SPKR
1
2 1K_0402_1% 1
R9 @ CA36
18
41
46
40
20
33
3
U730 1K_0402_1% 100P_0402_50V8J~D
DVDD
5VSTB/AUX MODE
DVDD-IO
PVDD1
PVDD2
AVDD1
CPVDD/AVDD2
A00_0907: EMI Request change 22ohm 2
2
C C
DMIC_DAT_CODEC RA61 1 2 22_0402_5% DMIC_DAT_CODEC_R 4
<23> DMIC_DAT_CODEC GPIO_0/DMIC DATA12 MONO_IN
34
DMIC_CLK_CODEC RA58 1 2 22_0402_5% DMIC_CLK_CODEC_R 5 PCBEEP
<23> DMIC_CLK_CODEC GPIO_1/DMCI CLK Close to UA2 Pin2
2 RA71 1 2 1K_0402_5%
1 PDB
GPIO_2/DMIC DATA34
R03_0624 Codec Damping resistance
23
AMP_I2C_DAT 6 CBP
<35> AMP_I2C_DAT I2C DATA 24 CA46 1 2 2.2U_0603_6.3V6K~D
AMP_I2C_CLK 7 CBN 0603 package size +DVDD
<35> AMP_I2C_CLK I2C CLK for 16 Ohm THD+N
AMP_I2S_IN 8
I2S IN 29
AMP_I2S_OUT Mic2-VrefO-R MIC2_VREFO_R <36>
2
9
I2S OUT 28 RA108
AMP_I2S_BCLK Mic2-VrefO-L MIC2_VREFO_L <36>
10 100K_0201_5%
+DVDD I2S BCLK 31
AMP_I2S_MCLK Mic2-R/Sleeve SLEEVE <36>
11 D124
1
I2S MCLK 30 2 1
AMP_I2C_DAT AMP_I2S_LRCK Mic2-L/Ring2 RING2 <36> <35> AMP_MUTE# NB_MUTE# <39>
RA59 1 2 2.2K_0402_5% 12
I2S LRCK
1
RA60 1 2 2.2K_0402_5% AMP_I2C_CLK @
+DVDD RA104 1 2 100K_0402_1%~D 47 RA49 D125
HDA_BITCLK_AUDIO I2S_IN/I2S_OUT JD 36 1K_0201_5% 2 1
JACK_PLUG Line1-L LINE1_L <36> PCH_MUTE# <10>
<36> JACK_PLUG RA106 1 2 200K_0402_1% 48
JACK_PLUG
2
HP/Line 1 JD 35 RB751S40T1G_SOD523-2
Line1-R LINE1_R <36>
EMI@ CA45
@ CA106 1 2 0.1U_0402_10V7K
33P_0402_50V8J
100P_0402_50V8J
D126
26 HP2_D_R 2 1 CODEC_MUTE#
1 HDA_BITCLK_AUDIO HPOut-R HP2_D_R <36>
1
@ CA47
14
<8> HDA_BITCLK_AUDIO AUDIOLINK: BCLK HP2_D_L
27 RB751S40T1G_SOD523-2
HPOut-L HP2_D_L <36>
15
<8> HDA_SYNC_AUDIO
2
2 AUDIOLINK:SYNC
RA69 1 2 33_0201_1% HDA_SDIN0_R 16
<8> HDA_SDIN0 AUDIOLINK:SDATA-IN +DVDD
Near Codec 32 CA50 1 2 10U_0402_6.3V6M
MIC2-CAP AGND
17 100K is used to speed up
<8> HDA_SDOUT_AUDIO AUDIOLINK:SDATA-OUT the discharge for LDO1.
39
A00_0906: EMI Request CA45 22 change 33pF LDO1-CAP RA111 1 2 100K_0201_5% CODEC_MUTE#
100K_0402_1%~D
10U_0603_6.3V6M~D
1
38 CA54 1 2 2.2U_0402_6.3V6M 1
42 VREF
RA74
CA53
SPK-OUT-LP 21 CA51 2 1 10U_0603_6.3V6M~D
B B
43 LDO2-CAP
DMIC_CLK_CODEC SPK-OUT-LN 13 CODEC_MUTE# 2
2
44 DC DET/EAPD AGND
DMIC_CLK_CODEC DMIC_DAT_CODEC SPK-OUT-RN
1 19 CA52 2 1 10U_0603_6.3V6M~D
45 LDO3-CAP
SPK-OUT-RP
3
EMI@ CA23
AGND
10P_0201_25V9 2
Thermal Pad
CPVEE
AVSS2
AVSS1
DMIC_DAT_CODEC EMI@ D11

1
1
EMI@ CA85
ALC3271-CG_MQFN48_6X6
22
37
25
49
10P_0201_25V9 2 Need update CIS symbol(31 30 revese)

2.2U_0603_6.3V6K~D
1
CA55
HP2_D_R moat
ZĞƐĞƌǀĞĚ ĨŽƌ D/ R03_0701 EMC request AGND
2
330P_0402_50V7K
R03_0701 layout request
CA63
0603 package size @ JPA1
for 16 Ohm THD+N 2 1
2
AGND
JUMP_43X39
@ JPA2
POST I2S interface 2 1
HP2_D_L JUMP_43X39
AMP_I2S_IN
330P_0402_50V7K
RA62 1 2 33_0402_5% GND AGND
AMP_I2S_IN_R <35>
AMP_I2S_OUT
CA64
RA63 1 2 33_0402_5% Near AVDD1 and AVDD2 power source input
AMP_I2S_OUT_R <35>
AMP_I2S_BCLK RA64 1 2 33_0402_5% AMP_I2S_BCLK_R <35> ф:Wϭх WůĂĐĞ Ăƚ ŽĚĞĐ ďŽƚ ƚ Ž ŵ Ɛŝ ĚĞ͘
2
AMP_I2S_MCLK RA65 1 2 33_0402_5%
ф:WϮх WůĂĐĞ ŶĞĂƌ ĂƵĚŝŽ ĐŽŶŶĞĐƚŽƌ͘
AMP_I2S_MCLK_R <35> ŽŶΖƚ ƐŚŽƌƚ ƚŚŝƐ ƉĂĚ ƚŽ h^ ĚŝŐŝƚĂů ŐƌŽƵŶĚ͕
AMP_I2S_LRCK RA66 1 2 33_0402_5% ĂŶĚ ƐŚŽƵůĚ ďĞ ĨĂƌ ĂǁĂǇ ĨƌŽŵ ĂŶǇ ƉŽǁĞƌ ƚƌĂĐĞƐ͘
AMP_I2S_LRCK_R <35>
A A
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
33P_0402_50V8J
sĞŶĚŽƌ ^ƵŐŐĞƐƚĞĚ
1
1
CA40
CA41
CA42
CA43
CA44
2
2013/07/04 2013/10/28 Title
P28-TPM
5 4 3 2 1
5 4 3 2 1
SMART AMP
B+_AMP B+_AMP
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6K~D
1000P_0402_25V8J
0.1U_0402_25V6K~D
10U_0603_25V6M
1 1 1 1 1
1
CA32
CA38
CA95
CA96
CA73
CA27
2
B+ B+_AMP 2 2 2 2 2
R1394 0_0603_5%
D 1 2 D
@
B+_AMP RA101
1 2 +1.8VS_AUDIO
10U_0603_25V6M
0.1U_0402_25V6K~D
1000P_0402_25V8J
0.1U_0201_6.3V6K
1U_0201_6.3V6M
1 1 1 1
1
CA103
CA81
CA79
0_0402_5%
CA84
CA83
Vinafix.com
2
2 2 2 2
RA110
+DVDD
0.1U_0402_16V7K~N
1U_0201_6.3V6M
B+_AMP @ 1 1
2
0.1U_0402_25V6K~D
1000P_0402_25V8J
CA28
1 Audio issue(Vendor request) 11/16
1
10U_0603_25V6M
CA78
CA77
CA29
1
CA107
RA94 2 2
2
2 1 2
0_0402_5%
1
2 100K_0402_5%~D
+1.8VS_AUDIO
0.1U_0402_16V7K~N
1U_0201_6.3V6M
1 1
CA34
1U_0603_25V6
1U_0603_25V6
CA35
B+_AMP
1
10U_0603_25V6M
10U_0603_25V6M
CA70
CA31
2 2
0.1U_0402_25V6K~D
1000P_0402_25V8J
1 1 1
1
CA69
CA68
2
CA71
CA67
2
2 2 2
RA98 2 @ 1 0_0402_1%
EC_I2C_DAT <38>
56
51
48
43
42
37
21
40
16
17
1
3
R03_0629 change 1% to 0.1% U725 RA99 2 @ 1 0_0402_1% EC_I2C_CLK <38>
AVDD1
AVDD2
PGVdd
DVDD-IO
PVDD-C
PVDD-D
PVDD-D
GVDD-CD
DVDD
PVDD-A
PVDD-A
PVDD-B
GVDD-AB
7 AMP_I2C_DAT_R 2 1 0_0402_1%
C CA58 0.033U_0402_16V4K RA109 @ AMP_I2C_DAT <34> C
AMP_OUT_L+ 1 2 2 SDA +DVDD
BST-A 8 AMP_I2C_CLK_R 2 1 0_0402_1%
RA81 10K_0402_0.1% CA59 0.033U_0402_16V4K RA102 @ AMP_I2C_CLK <34>
1 2 AMP_OUT_P_L+_R AMP_OUT_L- 1 2 50 SCL
BST-B AMP_ADDR_SEL
10K_0402_5%
@ RA96
RA86 10K_0402_0.1% CA60 0.033U_0402_16V4K 18
SPK_OUT_L+_R AMP_OUT_R+
1
1 2 1 2 49 ASEL
RA87 10K_0402_0.1% CA61 0.033U_0402_16V4K BST-C 39
1 2 SPK_OUT_L-_R AMP_OUT_R- 1 2 41 SYNC-IN
RA91 10K_0402_0.1% BST-D 38
1 2 AMP_OUT_P_R+_R SYNC-OUT
2
RA92 10K_0402_0.1% CA66 1 2 10U_0402_6.3V6M 22
1 2 SPK_OUT_R+_R LDO A1.5 55 AMP_OUT_L+ AMP_ADDR_SEL
AMP_OUT_P_L+ AMP_OUT_P_L+_R OUT-A
RA93 10K_0402_0.1% RA83 1 2 39K +-0.1% 0402 25
SPK_OUT_R-_R LISENDE_P AMP_OUT_L-
10K_0402_5%
1 2 52
SPK_OUT_L+ SPK_OUT_L+_R
1
RA84 1 2 39K +-0.1% 0402 26 OUT-B
LISENDE_N/LVSENSE_P AMP_OUT_R+
RA97
47
SPK_OUT_L- RA85 1 2 39K +-0.1% 0402 SPK_OUT_L-_R 27 OUT-C
LVSENSE_N 44 AMP_OUT_R-
OUT-D I2C Address Selection
2
RA95 1 2 22.6K_0402_1% 5 Low : 0x20
OC_ADJ 23 CA33 1 2 0.1U_0402_25V6K~D Hi : 0x22
AMP_OUT_P_R+ RA89 1 2 39K +-0.1% 0402 AMP_OUT_P_R+_R 28 VREF
RISENSE_P
SPK_OUT_R+ SPK_OUT_R+_R
RA88 1 2 39K +-0.1% 0402 29 9
AMP_I2S_MCLK_R <34>
RISENSE_N/RVSENSE_P MCLK
SPK_OUT_R- SPK_OUT_R-_R
RA90 1 2 39K +-0.1% 0402 30 10
AMP_I2S_BCLK_R <34>
RVSENSE_N BCLK
11 AMP_I2S_LRCK_R <34>
LRCK
32 12 AMP_I2S_OUT_R <34>
NC DACDAT
R03_0629 change 1% to 0.1%
31 13
NC SPDIF_IN
36 14
NC SPDIF OUT/I2S DATOUT AMP_I2S_IN_R <34>
35 15
NC PDBJD AMP_MUTE# <34>
Thermal Pad
B B
PGND-CD
PGND-CD
PGND-AB
PGND-AB
Int. Speaker Conn.
DGND
AGND
AGND
AGND
AGND
GND
R03_0629 change 0.4oh to 0.2 0hm
R03_0622 : Vendor request RA73,RA76
34
33
24
20
19
46
45
54
53
57
ALC1309-CG_QFN56_7X7
40mil = For 4ohm 3W Speaker

4.7UH +-20% 1269AS-H-4R7M=P2 RA73 0.2_0805_ 1%
AMP_OUT_L+ 1 LA16 2 AMP_OUT_P_L+ 1 2 SPK_OUT_L+
4.7UH +-20% 1269AS-H-4R7M=P2
AMP_OUT_L- 1 LA17 2 SPK_OUT_L-
4.7UH +-20% 1269AS-H-4R7M=P2 RA76 0.2_0805_ 1%
AMP_OUT_R+ 1 LA18 2 AMP_OUT_P_R+ 1 2 SPK_OUT_R+
4.7UH +-20% 1269AS-H-4R7M=P2
AMP_OUT_R- 1 LA19 2 SPK_OUT_R-
R03_0701 EMC request pop

330P_0201_50V7K
330P_0201_50V7K
330P_0201_50V7K
330P_0201_50V7K
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
CA62 EMI@
CA113 EMI@
CA114 EMI@
CA115 EMI@
1 1 1 1
1
CA91
CA92
CA93
CA94
SPK_OUT_L+ SPK_OUT_R+
2
2 2 2 2 SPK_OUT_L- SPK_OUT_R-
JSPK1
SPK_OUT_R-
EMI@ DA18
ESD203-B1-02EL_TSLP-2-20-2
EMI@ DA19
ESD203-B1-02EL_TSLP-2-20-2
EMI@ DA20
ESD203-B1-02EL_TSLP-2-20-2
EMI@ DA21
ESD203-B1-02EL_TSLP-2-20-2
1
SPK_OUT_R+
1
1
2 1
RA77 EMI@
RA78 EMI@
RA79 EMI@
RA80 EMI@
10_0402_1%
10_0402_1%
10_0402_1%
10_0402_1%
SPK_OUT_L- 3 2
SPK_OUT_L+ 4 3
SPK_DET 5 4 7
<8,38> SPK_ID# 5 G1
6 8
2
6 G2
2
CONN@
ACES_88460-00601-P01
A A
+3VS_AUDIO
SPK_ID#
RA107 1 2 10K_0402_5%

P38-Smart AMP
Date : Wednesday, November 16, 2016 Sheet 35 of 58
5 4 3 2 1
5 4 3 2 1
Universal Audio Jack
D D
R03_0622: Swap VREFO_L/R for schematic issue

RA27
2.2K_0402_5%~D
1 2
<34> MIC2_VREFO_L
<34> RING2
<34> HP2_D_L
HP2_D_L
RA28
1 2
5.6_0402_5%
HP2_D_L_R1
RA311
LA9
1
LA8
2 BLM15PX330SN1D_2P
2 PBY100505T-700Y-N
Vinafix.com
<34> JACK_PLUG
RING2_R
HP2_D_L_C
3
1
5
6
JHP2
HP2_D_R RA29 1 2 5.6_0402_5% HP2_D_R_R2 1 2 PBY100505T-700Y-N HP2_D_R_C 2

<34> HP2_D_R SLEEVE_R
1 2 4
<34> SLEEVE
RA32 BLM15PX330SN1D_2P 7
GND
SINGA_2SJ3108-071111F
CONN@
40mil
EMI@ DA16
AZ5123-01F.R7G_DFN1006P2X2
1 2
<34> MIC2_VREFO_R
EMI@ DA5
AZ5123-01F.R7G_DFN1006P2X2
EMI@ DA7
AZ5123-01F.R7G_DFN1006P2X2
EMI@ DA14
AZ5123-01F.R7G_DFN1006P2X2
EMI@ DA15
AZ5123-01F.R7G_DFN1006P2X2
RA33
2.2K_0402_5%~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
680P_0402_50V7K~D
CA89
CA88
CA90
CA39
1
1
1
1 1 1 1
2 2 2 2
2
PCB trace width of MIC2-R(SLEEVE)/MIC2-L(RING2) are
2
required at least 40 mil for HP crosstalk consideration
and, its length should be as short as possible.
AGND
C C
CA86 1 2 10U_0603_6.3V6M LINE1_L_C RA50 1 2 0_0402_5% HP2_D_L

<34> LINE1_L
CA87 1 2 10U_0603_6.3V6M LINE1_R_C RA51 1 2 0_0402_5% HP2_D_R
<34> LINE1_R
1
@ RA103 @ RA105
9.09K_0402_1% 9.09K_0402_1%
2
AGND AGND
B B
A A

2041/09/08 2013/10/28 Title
Audio Jack/SPK
5 4 3 2 1
5 4 3 2 1
Card Reader +ODR_PWR
SD_D2
SD_D3
1
2
JCR1
DAT2
SD_CMD 3 CD/DAT3 Close to JCR1
4 CMD
SD_CLK 5 VDD1 +ODR_PWR +SD_VDD2
+3VS_CR 6 CLK
+3VS_CR 1.DAT2 4.VDD1 SD_RCLK_P 7 VSS
2.DAT3 15.VDD2 SD_RCLK_M 8 DAT0/RCLK+
3.CMD +SD_VDD2 SD_CD# 9 DAT1/RCLK- CR14 CR15 CR17
CD 1 1 CR18 1
1
1 C1065 1 C1066 5.CLK
1
D EMI@ EMI@ 7.RCLK+ 15 D
VDD2
10U_0402_6.3V6M
0.1U_0201_10V6K
4.7U_0402_6.3V6M
0.1U_0201_10V6K
C222 8.RCLK- 16
2
SWIO 2 2 2
100P_0201_50V8J
22P_0402_50V8J
0.1U_0201_10V6K 9.CD 17
2
2 2 16. NC SD_LN0_P 18 VSS
6.VSS SD_LN0_M 19 D0+
20 D0- 10
Vinafix.com
17.VSS
20.VSS SD_LN1_M 21 VSS GND 11
23.VSS SD_LN1_P 22 D1- GND 12
18.D0+ 10 23 D1+ GND 13
19.D0- 11 VSS GND 14
21.D1- 12 GND
22.D1+ 13 T-SOL_158-1160902600
14 CONN@
Tom0114:wait CIS symbol

TAISOL 158-1160902600
VDD1=ODR_PWR=3.3V
VDD2=SD_VDD2=1.8V
changed footprint & CPN
+3VS_CR +3VS_CR
C CR7 C
1 CR11 1 CR2 CR3 1
1
0.1U_0201_10V6K
4.7U_0402_6.3V6M
10U_0402_6.3V6M
0.1U_0201_10V6K
2
2 2 2
27
11
UR1
+ODR_PWR
3V3aux
3V3_IN
1 12
<9,26,30,31,32,33,38> PCH_PLTRST#_EC PERST# CARD_3V3 DV33_18
2 18 CR1 2 1 1U_0201_6.3V6M
MEDIACARD_IRQ# <9> CLKREQ_PCIE#4 CLK_REQ# DV33_18
RR1 2 1
+3VS_CR
10K_0201_5% 5
<9> CLK_PCIE_MMI REFCLKP SD_RCLK_M_L SD_RCLK_M
6 15 RR10 1 @ 2 0_0201_5%
<9> CLK_PCIE_MMI# REFCLKN SP1 SD_RCLK_P_L SD_RCLK_P
16 RR11 1 @ 2 0_0201_5%
3 RTS5242 SP2 17 SD_CLK_L RR12 1 @ 2 0_0201_5% SD_CLK
<11> PCIE_PTX_CARDRX_P9 HSIP SP3 SD_CMD_L SD_CMD
4 19 RR13 1 @ 2 0_0201_5%
<11> PCIE_PTX_CARDRX_N9 PCIE_PRX_CARDTX_P9_C HSIN SP4 SD_D3_L SD_D3
<11> PCIE_PRX_CARDTX_P9 CR25 1 2 0.1U_0201_10V6K 7 20 RR14 1 @ 2 0_0201_5%
CR24 1 2 0.1U_0201_10V6K PCIE_PRX_CARDTX_N9_C 8 HSOP SP5 21 SD_D2_L RR15 1 @ 2 0_0201_5% SD_D2
<11> PCIE_PRX_CARDTX_N9 HSON SP6 SP7_SDWP
29 CR19 1 CR20 1 CR21 1 CR23 1 CR22 1 CR8 1
SP7 @ @ @ @ @ EMI@
MEDIACARD_IRQ# 32
<10> MEDIACARD_IRQ# WAKE#
5.6P_0201_25V8C
5.6P_0201_25V8C
5.6P_0201_25V8C
5.6P_0201_25V8C
5.6P_0201_25V8C
2.2P_0402_50V8C
31
SD_CD# 30 MS_INS# 2 2 2 2 2 2
B Support Runtime D3 mode => DE-POP RR1 SD_CD# B
No Support Runtime D3 mode => POP RR1 22 SD_LN1_P
SD_LN1_P 23 SD_LN1_M
CR4 1 2 DV12S 10 SD_LN1_M
0.1U_0201_10V6K 14 AV12 26 SD_LN0_P
DV12S SD_LN0_P 25 SD_LN0_M
CR5 13 SD_LN0_M
1 CR6 1 +SD_VDD2 SD_VDD2 SD_REG2
24 CR16 2 1 1U_0201_6.3V6M
SDREG2
E-PAD
RR6 1 2 RREF 9 28 RR9 2 1 10K_0201_5%

RREF GPIO +3VS_CR
0.1U_0201_10V6K
4.7U_0402_6.3V6M
6.2K_0402_1%
2 2
Close to UR1 RTS5242-GR_QFN32_4X4 If GPIO not use for LED function,
33
must be pull-high (Layout guide)
QR1 +3VS_CR
1)Placing the RTS5242 chip and flash card socket locate to suit trace routing for SI / EMI / ESD. For GPIO control SD_WP
2)Keep bulk and de-coupling capacitors as close as possible to the RTS5242 chip and flash card socket. L2N7002WT1G_SC-70-3
Ŷ Bulk capacitor for Card_3V3 place closed to flash card socket.
1
SP7_SDWP 1 3
S
Ŷ Bulk capacitor for 3V3_IN / 3V3aux / DV12S place closed to RTS5242 chip.
3)Keep damping resistor (ex, for SD CLK / MS CLK) as close as possible to the RTS5242 chip. RR18
4)Keep these capacitors for SD card / MS card signals as close as possible to flash card socket. @
10K_0201_5%
G
2
HOST_SD_WP# <10>
2
SP7_SDWP
A A

Card Reader - RT5242
5 4 3 2 1
5 4 3 2 1
+RTCVCC
+3VS +3VALW_5085
+RTC_CELL_VBAT
RE32 2 @ 1 0_0402_1%
0.1U_0402_25V6
+RTCVCC
2
RE184 BC_DAT_ECE1117 RPE5
1
10K_0402_5% VCI_IN2# 1 8
CE75
2 7
VCI_IN3#
3 6
2
BATBTN# 4 5
1
+3VALW_5085 D15
RUNPWROK 2 1 100K_0804_8P4R_5%
ALW_PWRGD_3V_5V <47,50>
0.1U_0402_25V6
1U_0402_6.3V6K
1
+3VALW_5085
CE99
CE14
RE180 1 2 0_0201_5%
1.2V_DDR_PG <51>
+3VALW_5085
2
D16
2 1
+1.0V_PGOOD <53> UPD_SMBDAT
UPD_SMBCLK RE175 1 2 2.2K_0201_5%
D17 PCIE_WAKE# RE176 1 2 2.2K_0201_5%
2 1 RE97 1 2 10K_0402_5%
1.8VALW_PG <54> MCP23017_SMBDAT
1U_0402_6.3V6K
RE98 1 2 2.2K_0402_5%
0.1U_0402_25V6
MCP23017_SMBCLK
RB751S40T1G_SOD523-2 CHARGER_SMBDAT RE76 1 2 2.2K_0402_5%
1
CHARGER_SMBCLK RE55 1 2 8.2K_0402_5%
CE92
CE17
D UE5 RE56 1 2 8.2K_0402_5% D
CCG4_I2C_DATA
CCG4_I2C_CLK RE10 1 2 2.2K_0402_1%
2
B64 A10 RE11 1 2 2.2K_0402_1%
VBAT GPIO021/RC_ID1 BOARD_ID SIO_EXT_WAKE# <10> CCG4_I2C_INT#
B10 RE12 1 2 2.2K_0402_1%
GPIO020/RC_ID2 PCIE_WAKE# 3VALW_PG_EC
B8 RE86 1 2 10K_0402_5%
+3V_PDLDO_OUT +3VALW_5085 GPIO014/GPTP-IN7/RC_ID3 LAN_WAKE#_R PCIE_WAKE# <32> H_VCCST_PWRGD
A22 B27 HOST_DEBUG_TX RE96 1 2 10K_0402_5%
RE49 H_VTR GPIO025/UART_CLK B44 RE187 1 @ 2 0_0201_5%
GPIO120/UART_TX/V2P_COUT_HI1 HOST_DEBUG_RX UART2_RXD <10,24>
0_0603_5% B46 RE188 1 @ 2 0_0201_5%
GPIO124/GPTP-OUT5/UART_RX/V2P_COUT_LO1 UART2_TXD <10,24>
1 @ 2 A58 B26 RUNPWROK
VTR_ADC VCC_PWRGD A25
SIO_SLP_S4# EN_INVPWR <23>
Vinafix.com
GPIO060/KBRST/BCM_B_INT#
10U_0603_6.3V6M
0.1U_0402_25V6
B36
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
GPIO101/ECGP_SCLK SIO_SLP_S4# <9,19,22>
B3 B37 +3VALW_5085
VTR GPIO103/ECGP_MISO PTP_INT#_EC <5,40>
1
A11 B38
VTR GPIO105/ECGP_MOSI PCH_ALW_ON AUX_EN_WOWL <42>
CE48
CE42
CE91
CE38
CE41
CE40
CE43
A26 A34
VTR GPIO102/BCM_C_INT# SIO_SLP_S3# PCH_ALW_ON <42> EC_I2C_DAT
B35 A35 RE87 1 @ 2 10K_0402_5%
PCH_DPWROK SIO_SLP_S3# <9,19,22,26> EC_I2C_CLK
2
A41 VTR GPIO104/SLP_S0# A36 RE100 1 @ 2 10K_0402_5%
VTR GPIO106 BAT1_LED# PCH_DPWROK <9>
A52 A40
VTR GPIO116/MSDATA/V2P_COUT_LO/TAP_SEL_STRAP BAT2_LED# BAT1_LED# <41> $PEHU
B43
GPIO117/MSCLK/V2P_COUT_HI BAT2_LED# <41> :KLWH
A45 MSDATA RE99 1 @ 2 10K_0402_5%
GPIO127/A20M PCH_RSMRST# <5,9>
B65 FWP#
nFWP SUS_ON_EC
A5 RE88 1 2 100K_0402_5%
<7>
SML1_SMBDAT GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA
Connect PCH<7> B6
SML1_SMBCLK CLK_TP_SIO GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK/GANG_DATA0 TBT_RESET_N_EC
A37 B57 RE93 1 2 100K_0402_5%
<40>
CLK_TP_SIO DAT_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO156/LED1/GANG_DATA1 PWR_LED# <41>
Connect Touch Pad<40> B40 B1
DAT_TP_SIO LCD_TST GPIO111/PS2_DAT2/GPTP-OUT6 GPIO157/LED0 TBT_RESET_N_EC ME_FWP_EC <8> PCH_ALW_ON
A38 A55 RE105 1 2 100K_0402_5%
<23> LCD_TST GPIO112/PS2_CLK1A GPIO153/LED2/GANG_DATA4 TBT_RESET_N_EC <26,28>
CCG4_I2C_INT# B41 A1
<47> VBUS1_ECOK GPIO113/PS2_DAT1A GPIO027/GPTP-OUT1 IMVP_VR_ON <22>
A39 B28
<24> CCG4_I2C_INT# GPIO114/PS2_CLK0A GPIO026/GPTP-IN1 SIO_SLP_A# <9,19>
B42 B2 NB_MODE#
<24> CCG4_PWR_SHR_VBUS_EN PBAT_SMBDAT GPIO115/PS2_DAT0A GPIO001/ECSPI_CS1/32KHZ_OUT NB_MODE# <10,30>
B59 A8
<47> PBAT_SMBDAT PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B/GANG_DATA5 GPIO015/GPTP-OUT7 RUN_ON ME_SUS_PWR_ACK <9>
+3VALW_5085 Connect Battery<47> A56 B9 R03_0707 EC requset align the pin name
PBAT_SMBCLK GPIO155/I2C1C_CLK/PS2_DAT1B/GANG_DATA6 GPIO016/GPTP-IN8 SUS_ON_EC
PBAT_SMBDAT JTAG_TDI A9 RESET_OUT# UPD_SMBDAT
GPIO017/GPTP-OUT8 SUS_ON_EC <22>
RE52 1 2 2.2K_0402_5%
PBAT_SMBCLK JTAG_TDO
A51 B39
H_VCCST_PWRGD RESET_OUT# <9> UPD_SMBCLK RE185 1 @ 2 0_0201_5%
UPD_SMBDAT_DEG <24>
RE53 1 2 2.2K_0402_5% B55 GPIO145/I2C1K_DATA/JTAG_TDI GPIO107/NRESET_OUT A44 RE186 1 @ 2 0_0201_5%
UPD_SMBINT# JTAG_CLK GPIO146/I2C1K_CLK/JTAG_TDO GPIO125/GPTP-IN5/PECI_REQUEST#/GANG_BUSY H_VCCST_PWRGD <22> UPD_SMBCLK_DEG <24>
RE3 1 2 10K_0402_5%
JTAG_TMS
B56
A53 GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK A54
JTAG_RST# GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO151/GPTP-IN4/GANG_DATA2 AC_PRESENT <9>
B47 B58 BAT1_LED#
JTAG_RST# GPIO152/GPTP-OUT4 SIO_PWRBTN# <5,9,19>
RE164 2 @ 1 0_0402_1% MSDATA
LID_CL_SIO_TAB# MCP23017_SMBDAT
B22 A3
PD_AC_DISC# LID_CL_SIO# GPIO050/FAN_TACH1/GTACH0/GANG_START GPIO003/I2C1A_DATA MCP23017_SMBCLK MCP23017_SMBDAT <39> BAT2_LED#
<24,47> AC2_CCG4_DISC#
1 @ 2
PD_AC_DISC#
A21
GPIO051/FAN_TACH2/GANG _MODE GPIO004/I2C1A_CLK
B4
EC_I2C_DAT MCP23017_SMBCLK <39> MCP23017 RE165 2 @ 1 0_0402_1% MSCLK
+3VS_TP R493 0_0201_5% B23 A4
GPIO052/FAN_TACH3/GTACH1/GANG_ERROR GPIO005/I2C1B_DATA/BCM_B_DAT EC_I2C_CLK EC_I2C_DAT <35>
CLK_TP_SIO 1 2 B24 B5 AMP
<47> AC_DISC# <47> DCIN1_EN GPIO053/PWM0 GPIO006/I2C1B_CLK/BCM_B_CLK EC_I2C_CLK <35>
RE8 1 2 4.7K_0402_5%~D R494 0_0201_5% A23 B7
DAT_TP_SIO <47> DCIN2_EN GPIO054/PWM1/GPWM1 GPIO012/I2C1H_DATA/I2C2D_DATA SUSACK# <9> SIO_SLP_S3# RUN_ON_EC
RE9 1 2 4.7K_0402_5%~D B25 A7 RE167 1 @ 2 0_0402_5%
<23> BIA_PWM_EC GPIO055/PWM2 GPIO013/I2C1H_CLK/I2C2D_CLK/GANG_DATA3 UPD_SMBDAT LCD_VCC_TEST_EN <42> RUN_ON_EC <22>
A24 B48
<47> VBUS2_ECOK GPIO056/PWM3/GPWM0 GPIO130/I2C2A_DATA/BCM_C_DAT UPD_SMBCLK UPD_SMBDAT <28>
B49 TI PD
GPIO131/I2C2A_CLK/BCM_C_CLK CHARGER_SMBDAT UPD_SMBCLK <28> RUN_ON
PCH_PLTRST#_EC A47 CHARGER_SMBCLK RE166 1 2 0_0402_5%
GPIO132/I2C1G_DATA CHARGER_SMBDAT <49>
RE54 1 @ 2 10K_0402_5%
LCD_TST
B50
SIO_SLP_SUS#_R CHARGER_SMBCLK <49> Charger
RE58 1 2 100K_0402_5% A43 GPIO140/I2C1G_CLK B52
RESET_OUT# <5> EC_SLP_S0IX# GPIO123/BCM_A_CLK GPIO141/I2C1F_DATA/I2C2B_DATA
RE59 1 2 10K_0402_5%
<9> SIO_SLP_WLAN# UPD_SMBINT#
B45 A49
CCG4_I2C_DATA PBAT_PRES# <47,49> SIO_SLP_SUS#_R
A42 GPIO122/BCM_A_DAT GPIO142/I2C1F_CLK/I2C2B_CLK B53 43K_0603_1% 2 1 RC99
SPK_DET#_EC <28> UPD_SMBINT# SPK_DET#_EC GPIO121/BCM_A_INT# GPIO143/I2C1E_DATA CCG4_I2C_CLK CCG4_I2C_DATA <24> SIO_SLP_SUS# <9,42>
RE170 2 @ 1 0_0402_1%
<8,35>
B20 A50
CCG4_I2C_CLK <24> Cypress PD/MUX PCIE_WAKE#
SPK_ID# A18 GPIO032/BCM_E_CLK GPIO144/I2C1E_CLK 2 1 0_0402_1%
<9,19> SIO_SLP_S5# RE168 @ TBT_PCIE_WAKE# <26>
C B19 GPIO031/GPTP-OUT2/BCM_E_DAT A59 1 2 C
<34> BEEP GPIO030/GPTP-IN2/BCM_E_INT#/GANG_DATA7 SYSPWR_PRES +3VLP
A20 RE57 1K_0402_5%
<39> BC_CLK_ECE1117 BC_DAT_ECE1117 GPIO047/LSBCM_D_CLK 3VALW_PG_EC ALW_PWRGD_3V_5V
1
100K_0402_5%
Connect ECE1117 <39> B21 B62 T189 PAD~D @ RE172 1 2 0_0402_5%
BC_DAT_ECE1117 GPIO046/LSBCM_D_DAT/GANG_STROBE BGP0
A19 A64
<39> BC_INT#_ECE1117 GPIO045/LSBCM_D_INT# VCI_OVRD_IN ACAV_IN <49>
RE107
A60 R03_0622 change on dead battery condition
VCI_OUT POWER_SW_IN# ALWON <50>
A6 B67
<5> SIO_EXT_SMI# GPIO011/nSMI VCI_IN0#
A27 A63 BATBTN#
<7> SIO_RCIN# VCI_IN2# BATBTN# <41>
2
A28 GPIO061/LPCPD# VCI_IN1# B63
POWER SW /LID CL +RTCVCC

<7>
<7>
<9,26,30,31,32,33,37>
IRQ_SERIRQ
PCH_PLTRST#_EC
CLK_PCI_MEC
PCH_PLTRST#_EC
CLK_PCI_MEC
LPC_FRAME#
B30
A29
B31
SER_IRQ
LRESET#
PCI_CLK
VCI_IN2#
VCI_IN3#
B68
B51
VCI_IN3#
LAN_WAKE#_R RE194
RE193
1
1
@
2 0_0201_5%
2 0_0201_5%
LAN_WAKE#
ISH_GP4
<9>
<10>
<7> LPC_FRAME# LPC_AD0 LFRAME# VREF_PECI H_PECI_R +1.0V_VCCST
A30 A48 1 2 R03_0707 Reserved for ISH behavior
<7> LPC_AD0 LPC_AD1 LAD0 PECI_DAT H_PECI <5>
2
100K_0402_5%
0.1U_0402_25V6
B32 RE94 43_0402_5%
<7> LPC_AD1 LPC_AD2 LAD1 REM_DIODE1_N
RE174
LPC_AD3 A31 B13 REM_DIODE1_P CE76 1 2 2200P_0402_50V7K

<7> LPC_AD2
1
LAD2 DN1_DP1A/THERM
CE98
@ B33 A13
<7> LPC_AD3 LAD3 DP1_DN1A/VREF_T REM_DIODE2_N
2 1 CE74 A32 B14 CE93 1 2 2200P_0402_50V7K
<7> CLKRUN# CLKRUN# DN2_DP2A REM_DIODE2_P +3VALW_5085
A33 A14
<10> SIO_EXT_SCI# REM_DIODE3_N
1
2
1U_0402_6.3V6K GPIO100/NEC_SCI DP2_DN2A A15 CE39 1 2 2200P_0402_50V7K
POWER_SW_IN# MEC_XTAL1 DN3_DP3A REM_DIODE3_P
2 1 MEC_XTAL2 MEC_XTAL2_R A61 B16 REM_DIODE4_N
<41> PBTN_SW# XTAL1 DP3_DN3A
1U_0402_6.3V6K
8.2K_0402_5%
10K_0402_5% RE181 RE169 1 2 0_0402_5% A62 A16
REM_DIODE4_P CE86 1 2 2200P_0402_50V7K
XTAL2 DN4_DP4A
1
1 B17
DP4_DN4A
RE69
B15
VIN VSET_5085
CE104
A17
VSET H_PECI_R
A12
2 VCP I_ADP <49>
B34 THERMATRIP2# @
THERMTRIP2# 3VALW_PG_EC
2
47P_0402_50V8J~D
CE100
A2 1
GPIO002/THERMTRIP3# THSEL_STRAP
VSS_ADC
B29
H_PROCHOT#_EC
VSS_RO
VR_CAP
GPIO024/THSEL_STRAP A46 RE101 1 2 100_0402_5% THERMATRIP2#
H_VSS
PROCHOT_IN#/PROCHOT_IO# H_PROCHOT# <5,48,49,51,55>
AGND
LID_CL_SIO# B61
VSS
V_ISYS0 I_BATT <49> 2 +0.85VS_VCCIO
METR3904W-G_SC70-3
1 2 A57
EP
<10,41> NB_LID# V_ISYS1 P_SYS <49,55>
0.1U_0402_25V6
0_0402_5% RE26
1
MEC5085-LZY-AVT00 A00_0825: I_BATT BPCC function C
B66
B11
B60
B12
B54
B18
C1
QE9
1 2 2
CE61
RE70 2.2K_0402_5% B
+VR_CAP
15mil E
3
LID_CL_SIO_TAB#
2
1 2
<10,41> TAB_LID#
4.7U_0603_6.3V6K
0_0402_5% RE28
1
<5> H_THERMTRIP#
CE96
R03_0628 change 10 ohm to 0 ohm
2
A00_0825: change CPN SB000002R00 to SB00000Z500
^Z фϮŽŚŵƐ
ϯϮ<,ǌůŽĐŬ
MEC_XTAL1 MEC_XTAL2
1 2
B +3VALW_5085 B
6HWWLQJIRU7KHUPDO'HVLJQ
22P_0402_50V8J
22P_0402_50V8J
YE2
1 32.768KHZ 9PF 20PPM 9H03200033 1
1
100K_0402_5%
VSET_5085
CE101
CE89
dŚĞƌŵĂůĚŝŽĚĞŵĂƉƉŝŶŐ
RE95
2 2 THSEL_STRAP
0.1U_0402_25V6
1.5K_0402_1%
1 2
1
RE162 1K_0402_5%
2
RE79
CE78
JTAG_RST#
2
CLK_PCI_MEC ϱϬϭϱ ŚĂŶŶĞů >ŽĐĂƚ ŝ ŽŶ ϭ͗ŚĂŶŶĞůϭǁŝůůƉƌŽǀŝĚĞdŚĞƌŵŝƐƚŽƌZĞĂĚŝŶŐƐ
1
Ϭ͗ŚĂŶŶĞůϭǁŝůůƉƌŽǀŝĚĞŝŽĚĞ ZĞĂĚŝŶŐƐ
1U_0402_6.3V6K
EMI@
1
1
@SHORT PADS~D
JTAG2 CONN@
100_0402_1%
10_0402_5%
WϭͬEϭ sKZ Wh;KdWͿ
JDEG
1
+3.3V_ALW_DEG +3VALW_5085
@ RE75
CE81
RE157
RE103
2 1 ZĞƐƚсϭ͘ϱ< ͕ dƉсϵϱ ĚĞŐƌĞĞ
WϮͬEϮ t>E
2
2
4.7P_0402_50V8C
EMI@
49.9_0402_1%
8
7
6
5
+3VALW_5085
10K_8P4R_5%
WϯͬEϯ ZͬW
2
1
RPE8
CE77
WϰͬEϰ ZD ^^
1
1
10K_0402_5%
10K_0402_5%
100K_0402_5%
1
2
3
4
2
@ RE108
@ RE109
@ RE80
JDEG2
1 EMI depop location
1 JTAG_TDI
2
2 JTAG_TMS
3 WůĂĐĞ ĐůŽƐĞ ƉŝŶ Ϯϵ
JTAG_CLK
2
3 4
4 JTAG_TDO REM_DIODE1_P REM_DIODE2_P
5
11 5 6 MSCLK
G1 6 METR3904W-G_SC70-3
100P_0402_50V8J
12 7 MSDATA
G2 7 HOST_DEBUG_TX
1
QE14
100P_0402_50V8J
100P_0402_50V8J
8
E
8
R03_0902 Change board ID on A00 MB C C
1
@ CE58
@ CE57
@ CE60
9 2 2 2
B
9 DEBUG_UART_TX <10>
10 +3VALW_5085 +3VALW_5085 B B
RE79 CE54 REV
1
10 Pin8 5085_TXD for EC Debug
C
E QE4 E QE3
3
ACES_50521-01041-P01_10P pin9 5048_TXD for SBIOS METR3904W-G_SC70-3 METR3904W-G_SC70-3
debug REM_DIODE1_N REM_DIODE2_N
CONN@
240K 4700p X00
1
WůĂĐĞ Yϭϰ ĐůŽƐĞ ƚŽ sZK ^ŬŝŶϭ ůŽĐĂƚ ŝ ŽŶ WůĂĐĞ Yϰ ĐůŽƐĞ ƚŽ Wh ^ŬŝŶϮ
RE111 RE115 WůĂĐĞ Yϯ ĐůŽƐĞ ƚŽ t>E
130K 4700p X01 4.3K_0402_1% 10K_0402_5% ϱϴ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ Yϭϰ ϱϳ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ Yϰ
ϲϬ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ Yϯ
62K 4700p X02
2
+3VS
JLPDE2 33K 4700p X03 BOARD_ID
FWP#
REM_DIODE4_P REM_DIODE3_P
1
1 8.2K 4700p X04
100P_0402_50V8J
2
2 LPC_AD0
2
METR3904W-G_SC70-3
100P_0402_50V8J
3
3 LPC_AD1
4.3K 4700p A00
1
1
QE8 QE17 QE10
@
@CE55
@ CE69
100P_0402_50V8J
4
E
LPC_AD2 CE79 C C
4
1
@ CE67
5 2 2 2
B
4700P_0402_25V7K RE82
A 11
G1
5
6
6
LPC_AD3
LPC_FRAME#
2K 4700p 10K_0402_5% B B A
2
2
12 7
C
E E
PCH_PLTRST#_EC
1K 4700p
1
3
G2 7 8 METR3904W-G_SC70-3 METR3904W-G_SC70-3
8 REM_DIODE3_N
9
9 REM_DIODE4_N
10
10 CLK_LPC_DEBUG <7>
ACES_50521-01041-P01_10P KZͺ/ƌŝƐĞƚ ŝ ŵĞŝ Ɛ ŵĞĂƐ Ƶƌ ĞĚĨƌ Ž ŵ ϱ йΕϲϴ й͘ WůĂĐĞ YϭϬ ĐůŽƐĞ ƚŽ ZͬW
WůĂĐĞ Yϴ ĐůŽƐĞ ƚŽ ZD ůŽĐĂƚ ŝ ŽŶ WůĂĐĞ Yϭϳ ĐůŽƐĞ ƚŽ ^^ ůŽĐĂƚ ŝ ŽŶ ϲϳ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ YϭϬ
CONN@
ϱϱ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ Yϴ ϲϵ ƐŚŽƵůĚ ĐůŽƐĞ ƚŽ Yϭϳ
P03-KB Controller
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number R ev
5 4 3 2 1
5 4 3 2 1
+3V_PDLDO_OUT +3VALW_23017
RE50
0_0603_5%
1 @ 2
+3VALW_23017
10U_0603_6.3V6M
0.1U_0402_25V6
0.1U_0402_25V6
1
1
CE4
WLAN_WIGIG60GHZ_DIS#
CE3
CE10
RE14 1 2 100K_0402_5% BT_RADIO_DIS#
2
RE13 1 2 100K_0402_5%
RTCRST_ON
2
RE15 1 2 100K_0402_5%
D D
5
UE4
VDD
<9,19> RTC_RST# RE153 2 @ 1 0_0402_1%
<23> RTCRST_ON 4 17
USBC2_PWR_SHR_EN# <24>
PANEL_BKEN_EC 3 GPB7 GPA0 18
GPB6 GPA1 USBC1_PWR_SHR_EN# <28>
2 19
<9> PCH_PCIE_WAKE# GPB5 GPA2 MUX_USB_EN# <24>
1 20
<41> BATT_LED#_LV5 GPB4 GPA3 NB_MUTE# <34>
1
D 28 21
RTCRST_ON <41> BATT_LED#_LV4 WLAN_WIGIG60GHZ_DIS# PTP_DIS# <40>
Vinafix.com
Q332 2 27 GPB3 GPA4 22
<41> BATT_LED#_LV3 GPB2 GPA5 BT_RADIO_DIS# WLAN_WIGIG60GHZ_DIS# <32>
L2N7002WT1G_SC-70-3 G 26 23
<41> BATT_LED#_LV2 GPB1 GPA6 BT_RADIO_DIS# <32>
S 25 24
<41> BATT_LED#_LV1 TP_PW_EN <43>
3
GPB0 GPA7
9
<38> MCP23017_SMBDAT SDA
8
<38> MCP23017_SMBCLK SCL
16
15 INTA
INTB
'HYLFH $GGUHVV RE27 1 2 10K_0402_5% 11 10
E $$$ +3VALW_23017
RE23 1 2 10K_0402_5% 12 A0 NC/SO 7
[ RE22 1 2 10K_0402_5% 13 A1 NC
A2 29
14 VSS(PAD) 6
RESET VSS(Ground)
+3VALW_23017 RE24 1 2 10K_0402_5%

MCP23017T-E-ML_QFN28_6X6
(QVXUHULVHWLPH ZLWKLQ PV
IDVW WKDQ 9PV
+3V_PDLDO_OUT
C C
U726
R1324 4 11 KSO00
0_0603_5% 24 VCC KSO00 13 KSO01
+3VALW_1117 VCC KSO01
1 @ 2 37 12 KSO02
VCC KSO02 14 KSO03
KSO03 16 KSO04
KSO04 17 KSO05
1 1 1 KSO05 15 KSO06
C2978 C2979 C2980 38 KSO06 5 KSO11
KB_BL_DET GPIO10 KSO11 CONN@
0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 0.1U_0402_25V6K~D 39 10 KSO12
2 2 2 KB_LED_PWM GPIO11 KSO12 ACES_51510-0304N-P01
40 7 KSO13
CAPS_LED# GPIO12/PWM1 KSO13
41 6 KSO14 30 32
GPIO13/PWM2 KSO14 <10> KB_DET#
42 8 KSO15 KSI7 29 30 GND 31
43 GPIO14/PWM3 KSO15 9 KSO16 KSI6 28 29 GND
44 GPIO15/PWM4/BC_INT_DN3#/SMB_INT_DN3# KSO16 3 KSO17 KSI4 27 28
GPIO20/PWM7 KSO17 2 KSO18 KSI2 26 27
GPIO01/KSO18 1 KSO19 KSI5 25 26
GPIO00/KSO19 47 KSO20 KSI1 24 25
GPIO23/KSO20/PWM8 46 KSI3 23 24
GPIO22/KSO21/PWM9 45 KSI0 22 23
GPIO21/KSO22 KSO05 21 22
KSO04 20 21
KSO11 19 20
31 KSO06 18 19
30 GPIO04/BC_DAT_DN1/SMB_DAT_DN1/TP_DAT KSO12 17 18
GPIO03/BC_CLK_DN1/SMB_CLK_DN1/TP_CLK KSO03 16 17
36 KSO01 15 16
35 GPIO07/BC_DAT_DN2/SMB_DAT_DN2/PS2_DAT KSO02 14 15
GPIO06/BC_CLK_DN2/SMB_CLK_DN2/PS2_CLK KSO00 13 14
KSO16 12 13
KSO20 11 12
34 KSO19 10 11
<38> BC_DAT_ECE1117 BC_DATA_UP/SMB_DAT_UP
33 18 KSI0 +3VS KSO17 9 10
<38> BC_CLK_ECE1117 BC_CLK_UP/SMB_CLK_UP KSI0
32 20 KSI1 +5VALW KSO18 8 9
<38> BC_INT#_ECE1117 BC_INT_UP#/SMB_INT_UP# KSI1 23 KSI2 +5VALW KSO13 7 8
KSI2 19 KSI3 Q330 KSO15 6 7
KSI3 5 6
2
R2667 1 2 10K_0402_1% 28 25 KSI4 R946 KSO14
SMB_ADDR KSI4 CAPS_LED
48 22 3 1 1 2 4 5
D
KSI5 R990
T1 TEST 1 2 TEST 29 OCS_TRM KSI5 26 KSI6 3 4
2
TEST_PIN KSI6 2 3
G
@ R2674 1K_0402_5% 27 KSI7 100K_0402_5% 240_0402_1%
KSI7 1 2
G
CAPS_LED#
2
RH28 1 2 15_0402_5% 21 3 1 1
VR_CAP JKB1
D
Reserve for ICT test 1
49
C2981 GND_PAD L2N7002WT1G_SC-70-3
4.7U_0603_6.3V6K Q327 1
2 ECE1117-Y3-1-TR SQFN 48P
B @ C1165 B
0.1U_0402_10V7K~D
2
Routed in at least 10 mil wide,and 15 ohm resistor abd 4.7uF cap must be placed very close to ECE1117
ECE1117-Y3-1-TR (Rev.C, New package) Compal P/N: SA00009DY00
CONN@
)XVHIRU%DFNOLJKW &RQQHFWRU IRU .H\ERDUG %DFNOLJKW +5VS_KBL

)LQJHUSULQW 8
7
ACES_51522-00601-001
G2
6 G1
+5VALW 5 6
20mil +5VS_KBL A00_0822: KBL issue (change Power net name)
+3VS +3VS_FP +3VS_FP USB20_P7_CONN 5
USB20_N7_CONN 4
3 4
A00_0906: Remove remainder capacitance 1 3
2 1 R2681 2
C1156 @ 2
2.2U_0402_6.3V6M
F1 1 2 1
1
0.1U_0201_10V6K
0.5A_13.2V_NANOSMDC050F-13.2-2 1U_0603_10V6K 1
2
C2990
1 1 0438.500WR 0.5A 32V UL/CSA 1 JFP1

C49
C1153 C1259
1U_0603_10V6K 10U_0603_6.3V6M~D 2
2 2 2
CONN@
ACES_51575-00401-001 A00_0831: Follow BAZ80 fingerprint Module pindefine
KB_LED_PWM#
4 6
3 4 G2 5
R03_0705 Dell request pop
KB_BL_DET
R944 1 2 47K_0402_5% 2 3 G1
R03_0707 BOM change fuse
1 2
+5VS_KBL 1 A00_0901: change Fuse SP040004X00
L6
2
JBL1 EMI@ USB20_N7_CONN

R945 1 2
<11> USB20_N7
100K_0402_1%
USB20_P7_CONN
>DĂǆŝŵƵŵƵƌƌĞŶƚ ŝƐ Ϯϳϯŵ 4 3
<11> USB20_P7
1
1
D
KB_LED_PWM HCM1012GH900BP_4P
2 Q311
L2N7002WT1G_SC-70-3
G
1
A A
1 S D9 D13
3
R2718
100P_0402_50V8J~D 2
Current limited 20mA
EMI@ EMI@
2
R03_0622 : add PD for Backlight light issue

A00_0831: keyboard Brightness display too dark.
A00_0907: EMI Request change AZ5B25-01F

P03-KB Controller
5 4 3 2 1
5 4 3 2 1
D D
Vinafix.com
C C
B+
1 1 1 1 1 1 1 1
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
0.1U_0402_25V6
C73
C75
C76
C68
C69
C70
C71
C72
2 2 2 2 2 2 2 2
@ @ @ @ @ @ @ @
R03_0707 B+ noise unpop
нϭ͘ϴs ŝƐĐŚĂƌŐĞ
dŽƵĐŚƉĂĚ KEE
B B
+1.8V_PRIM
+3VS_TP
1
@ R79
+3VS_TP B+
80.6_0402_1%~D
+3VS_TP R1104 2 1 2.2K_0402_5%
2
1
+3VS_TP EMI@
C9
C1225
15P_0402_50V8J
1 1
1U_0402_6.3V6K~D
RH461 2 @ 1 0_0402_1% I2C1_SDA @ R78

<10> I2C1_SDA_TP
200K_0402_1%
1
3
DMN66D0LDW-7_SOT363-6
2 2
@ QE13B
R1299 JTP1
2
100K_0402_5%~D 1
I2C1_SDA 2 1 R1105 2 1 2.2K_0402_5% 5
I2C1_SCK 3 2
2
4 3 RH456 2 @ 1 0_0402_1% I2C1_SCK

<10> I2C1_SCK_TP
4
4
6
<5,38> PTP_INT#_EC 5
5
@ QE13A
<39> 6
PTP_DIS# 6
<38> DAT_TP_SIO 7
8 7 2
<38> CLK_TP_SIO 8 <42,43,52,53,54> PCH_PWR_EN
9
1
10 GND1
GND2
3
ACES_50506-00841-P01
CONN@ DAT_TP_SIO
@EMI@MD9 @EMI@MD10
TVNST52302AB0_SOT523-3 CLK_TP_SIO
680P_0402_50V7K~D
@ C1229
680P_0402_50V7K~D
@ C1226
TVNST52302AB0_SOT523-3 1 1
1
2 2
A A
P36-TP/PWERGD/LID
5 4 3 2 1
A B C D E
Screw Hole Standoff 3RZHU%XWWRQ)RU'HEXJ

H26 H27 H28 H29 H30 H55 H51 H52 H53 H54 FD1 FD2
@ @ @ @ @ @ @ @ @ @
H_2P0 H_2P0 H_2P0 H_2P0 H_2P0 H_2P6 H_3P3 H_3P3 H_2P6 H_2P6 @ @ PBTN_SW# @ SW3
1
1
3 4
<38,41> PBTN_SW#
FIDUCIAL_C40M80 FIDUCIAL_C40M80
H31 H32 H33 H34 H35
@ @ @ @ @ FD3 FD4 1 2
H_2P0 H_2P0 H_2P0 H_2P0 H_2P0
1
1
SKRBAAE010_4P
@ @
1
H41 H42 H43 FIDUCIAL_C40M80 FIDUCIAL_C40M80
@ @ @
A00_0831: Unpop SW3
H_1P8N H_1P8N H_1P8N
1
1 1
86%6KLHOGLQJ&OLS
EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
H11 H12 H13
Vinafix.com
@ @ @
1
EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
H14 H15 H16 H17
@ @ @ @ Ăƚ ƚ Ğƌ Ǉ 'ĂƵŐĞ > +5VALW

1
EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
H18 H19 H20 H21
2
@ @ @ @
1
+3VALW
LED13
LED11
LED10
LED14
LED12
27-11-T1D-CP1Q1RY-3C_WHITE~D
EMIST_SUL-12A2M_1P EMIST_SUL-12A2M_1P
1
H22 H23
@ @
5
1
QH8A
G
BAT_LED#_LV5
4 3 R916 1 2 820_0402_5%~D
<39> BATT_LED#_LV5
D
2
<39> BATT_LED#_LV4
QH8B
G
BAT_LED#_LV4
1 6 R913 1 2 820_0402_5%~D
D
<39> BATT_LED#_LV3 DMN66D0LDW-7_SOT363-6
5
QH9A
G
<39> BATT_LED#_LV2 BAT_LED#_LV3
4 3 R912 1 2 820_0402_5%~D
2 2
D
<39> BATT_LED#_LV1
2
QH9B
G
BAT_LED#_LV2
1 6 R911 1 2 820_0402_5%~D
D
2
G
BAT_LED#_LV1
3 1 R910 1 2 820_0402_5%~D
D
Q41
L2N7002WT1G_SC-70-3
Tablet LID SW NB LID SW
Ăƚ ƚ Ğƌ Ǉ 'ĂƵŐĞ Ƶ ƚ ƚ Ŷ
Ž &RQQHFWRUIRU)URQW/(')3& +3VALW
+3VALW
1
+3VALW
1
+5VALW R130
2 SW4 4 +3VALW JLED1 +5VALW R2684
<38> BATBTN#
1 U20 47K_0201_5%
1 BAT2_LED#_R :KLWH 1 +3VALW
BAT1_LED#_R 2 U734 47K_0201_5%
2
C2983 3 2 2 3
GND
3 VDD VOUT NB_LID# <10,38>
2
4 2 3
0.1U_0402_10V7K $PEHU 1 1
GND
2 4 VDD VOUT TAB_LID# <10,38>
1 3 5 1
G1
5
TBFD12KQR 6 C2976 C2988 C161 YB8203ST23 SOT-23
1
QH10A G2 0.1U_0402_25V6K~D YB8203ST23 SOT-23
G
0.1U_0201_10V6K
1
4 3 ACES_51522-00401-001 2 0.1U_0201_10V6K 2
<38> BAT2_LED# 2
S
DMN66D0LDW-7_SOT363-6 CONN@
2
3 3
QH10B
G
1 6 R03_0707 : Change Lid sensor from 20~40G to 30~50G. R03_0713 : Change Lid sensor same for U734
<38> BAT1_LED#
S
PWR CONN +3VALW

2
G
JPWR1 Q42 L2N7002WT1G_SC-70-3

1 R24 300_0402_5%
1 +5VALW
2 1 2 1 3
2 PWR_LED# <38>
3
D
3 4
4 PBTN_SW# <38,41>
5
G1 6
G2
3
PJDLC05_SOT23-3
ACES_51522-00401-001
CONN@
@EMI@ DA13
1
4 4

LED/LID SW/SCREWH
A B C D E
5 4 3 2 1
+3VALW +3VS_NGFF_R +3VS_NGFF

C267
1U_0402_6.3V6K U26 R222
1 2 1 7 1 @ 2 +3VS_NGFF
2 VIN VOUT 8 +3VS_NGFF
+3VALW +3V_PCH_R +3V_PCH +3V_PCH VIN VOUT 0_0603_5%
C229 AUX_EN_WOWL 3 6 C238 1 2 2200P_0402_25V7K
<38> AUX_EN_WOWL ON CT
0.1U_0201_10V6K
0.1U_0201_10V6K U36 R210 1 1 1
1
100P_0201_50V8J
EMI@ C1031
68P_0402_50V8J
EMI@ C1033
1 2 1 14 1 @ 2 C282 4 5
VIN1 VOUT1 VBIAS GND
C280
2 13 9
VIN1 VOUT1 0_0603_5% 0.1U_0201_10V6K GND
2
PCH_PWR_EN 3 12 C264 1 2 1000P_0402_50V7K~D 2 APE8937GN2_DFN8_2X2 2 2
D <40,43,52,53,54> PCH_PWR_EN ON1 CT1 D
4 11
VBIAS GND
RUN_ON_P 5 10 C226 1 2 2200P_0402_25V7K +3VALW QZ9
<22,51,52> RUN_ON_P ON2 CT2 +3VS +3VS_CAM_R +3VS_CAM
C228 DMG2301U-7_SOT23-3
Vinafix.com
0.1U_0201_10V6K 6 9 +3VS R223 +3VS_CAM
VIN2 VOUT2 +3VS_R +3VS_CAM
D
1 2 7 8 3 1 1 @ 2
VIN2 VOUT2
1U_0402_6.3V6K
1 @ 2 +3VS 0_0603_5%
100P_0201_50V8J
EMI@ C1083
EMI@ C1086
15 R135 1 1 2
GPAD 0_0603_5%
1
C258
22P_0402_50V8J
1U_0402_6.3V6K
100P_0201_50V8J
EMI@ C1073
100P_0201_50V8J
EMI@ C1027
68P_0402_50V8J
EMI@ C1028
G
1 1 1
1
C235
EM5209VF_DFN14_3X2 C236
EN_CAM#
0.1U_0201_10V6K EN_CAM# <9>
2
R1444 1 2 0_0402_5% 2 2 1
<9,38> SIO_SLP_SUS#
2
@ R1443 1 2 0_0402_5% PCH_PWR_EN 2 2 2
<38> PCH_ALW_ON
R221 1 2 100K_0201_5% EN_CAM#

R224 1 2 100K_0201_5% AUX_EN_WOWL
+3VALW +3.3VDX_SSD_R +3.3VDX_SSD
C239 1
1U_0402_6.3V6K U32 R225 C244
1 2 1 14 1 @ 2 +3.3VDX_SSD
+3VALW +3VS_AUDIO_R +3VS_AUDIO +3VS_AUDIO 2 VIN1 VOUT1 13 0_0603_5% 0.1U_0402_10V7K
C252 VIN1 VOUT1 2
0.1U_0201_10V6K U37 R230 RUN_ON_P 3 12 C242 1 2 2200P_0402_25V7K
1 ON1 CT1
1 2 1 14 1 @ 2 C250
2 VIN1 VOUT1 13 4 11
VIN1 VOUT1 0_0603_5% VBIAS GND
0.1U_0201_10V6K
AUDIO_PWR_EN 3 12 C249 1 2 1000P_0402_25V8J 2 ENVDD 5 10 C246 1 2 2200P_0402_25V7K
<10,43> AUDIO_PWR_EN ON1 CT1 ON2 CT2
C240
C C
4 11 0.1U_0201_10V6K 6 9 +LCDVDD_R
VBIAS GND 1 2 7 VIN2 VOUT2 8 R228
AUDIO_PWR_EN 5 10 C265 1 2 4700P_0402_16V7K VIN2 VOUT2 1 @ 2 +LCDVDD
ON2 CT2 +LCDVDD
15 0_0603_5%
+1.8V_PRIM 6 9 +1.8VS_AUDIO GPAD
VIN2 VOUT2 +1.8VS_AUDIO_R 1
C266 7 8 R215 EM5209VF_DFN14_3X2 C254
0.1U_0201_10V6K VIN2 VOUT2 1 @ 2 +1.8VS_AUDIO 1
1 2 15 0_0603_5% C262 0.1U_0402_10V7K
GPAD 2
EM5209VF_DFN14_3X2 0.1U_0201_10V6K
2
D5
+3V_PCH 2
<5> ENVDD_PCH
@ R229 1 2 100K_0201_5% AUDIO_PWR_EN 1 ENVDD
R234 1 2 100K_0201_5% AUDIO_PWR_EN
<38> LCD_VCC_TEST_EN 3
BAT54CW-7-F_SOT323-3
R231 1 2 220K_0201_5% ENVDD
+1.0V_VCCST
+3VS_TS
B
+3VS_TS B
+3VALW +3VS_TS_R +1.0V_PRIM +1.0V_VCCST_R +1.0V_VCCST
0.1U_0201_10V6K
1U_0402_6.3V6K
C230 C241 1 1
0.1U_0201_10V6K
C279
C285
0.1U_0201_10V6K U39 R219 1 1 1U_0402_6.3V6K~D U27 R393
1
100P_0201_50V8J
EMI@ C1029
22P_0402_50V8J
EMI@ C1030
1 2 1 14 1 @ 2 +3VS_TS 1 2 1 7 1 @ 2
VIN1 VOUT1 VIN VOUT
C233
2 13 0_0603_5% 2 8 0_0603_5%
VIN1 VOUT1 VIN VOUT 2 2
2
TS_PWR_EN 3 12 C231 1 2 2200P_0402_25V7K 2 2 VCCST_EN 3 6 C284 1 2 1000P_0402_50V7K

<10> TS_PWR_EN ON1 CT1 <22> VCCST_EN ON CT @
4 11 +3VALW 4 5
VBIAS GND VBIAS GND 9
SD_PWR_EN 5 10 C234 1 2 2200P_0402_25V7K GND
<8> SD_PWR_EN ON2 CT2
C232 APE8937GN2_DFN8_2X2
1U_0402_6.3V6K~D 6 9 +3VS_CR_R
1 2 7 VIN2 VOUT2 8 R216 +3VS_CR +1.0VA_GATE
VIN2 VOUT2 1 @ 2 +3VS_CR +1.0V_PRIM +1.0VA_GATE
15 0_0603_5% 1
GPAD C263
0.1U_0201_10V6K
1U_0402_6.3V6K
EM5209VF_DFN14_3X2 1 1
VCCST_EN
C283
C276
0.1U_0201_10V6K <22,43,51> SUS_ON_P nXDP@ R390 1 2 0_0402_5%
+3VS 2
R220 1 2 100K_0402_5%~D SD_PWR_EN 2 2

R217 1 2 100K_0201_5% TS_PWR_EN
@ R227 1 2 100K_0402_5%~D SD_PWR_EN
A A

DC/DC Interface 1
5 4 3 2 1
5 4 3 2 1
+5VALW +1.0V_PRIM
D D
+1.0V_PRIM +1.0VS_VCCSTG_R
1 1
C270 C271 U35
1
0.1U_0201_10V6K 0.1U_0201_10V6K 2 VIN1 R245 +1.0VS_VCCSTG
2 2 VIN2 +5VALW +5VS_AUDIO_R +5VS_AUDIO
Vinafix.com
0_0603_5%
7 6 1 @ 2 C248 R232 +5VS_AUDIO
VIN thermal VOUT 0.1U_0201_10V6K U29 0_0603_5%
1
+5VALW
3 C269 1 2 1 7 1 @ 2 1
nXDP@ R246 VBIAS 2 VIN VOUT 8 C247
SIO_SLP_S0IX# 1 2 4 5 0.1U_0201_10V6K VIN VOUT
<22> SIO_SLP_S0IX# ON GND 2
0_0402_5% 3 6 0.1U_0201_10V6K
<10,42> AUDIO_PWR_EN ON CT 2
1
C339 1 2 0.1U_0201_10V6K TPS22961DNYR_WSON8 +5VALW
4 5
VBIAS GND 9 C253
GND 220P_0402_50V7K
APE8937GN2_DFN8_2X2 2
<22> VCCSTG_EN
+3VALW +1.2V_DDR +1.8V_PRIM +1.8V_MEM_R +1.8V_MEM

+1.2V_VCCPLL_OC_R C1095 R1508 +1.8V_MEM
C +1.2V_DDR 0.1U_0201_10V6K U48 0_0603_5% C
1 1
C274 C275 U44 1 2 1 7 1 @ 2 1
1 2 VIN VOUT 8 C255
0.1U_0201_10V6K 0.1U_0201_10V6K 2 VIN1 R388 +1.2V_VCCPLL_OC VIN VOUT
2 2 VIN2 0_0402_1% 3 6 0.1U_0201_10V6K
<22,42,51> SUS_ON_P ON CT 2
7 6 1 @ 2 1
VIN thermal VOUT 4 5 C1091
1 +3VALW VBIAS GND
3 C273 9
+3VALW VBIAS GND 2200P_0402_25V7K
SIO_SLP_S0IX# 2 @ 1 4 5 0.1U_0201_10V6K APE8937GN2_DFN8_2X2 2
R247 0_0402_1% ON GND 2
TPS22961DNYR_WSON8
+3VS +3VS_TP_R +3VS_TP
нϭ͘ϬsͺWZ/DŝƐĐŚĂƌŐĞ C1096
0.1U_0201_10V6K
1 2 1
U49
7 1
R1509
0_0603_5%
@ 2
+3VS_TP
VIN VOUT 1
+1.0V_PRIM 2 8 C256
VIN VOUT
3 6 0.1U_0201_10V6K
<39> TP_PW_EN ON CT 2
1
4 5 C1092
+3VALW VBIAS GND
1
B 9 B
R80 GND 2200P_0402_25V7K

B+ APE8937GN2_DFN8_2X2 2
80.6_0402_1%~D
2
1
R81
200K_0402_1%
3
2
QE18B
5
4
6
QE18A
2
<40,42,52,53,54> PCH_PWR_EN
1
A A

DC/DC Interface 2
5 4 3 2 1
A B C D E F G H
1K
1K
+3V_PCH
AC12 MEM_SMBCLK 53
MEM_SMBDATA 51 XDP
W6
@4.7K
1
SKL-Y 1
@4.7K +3V_PCH
AD11 I2C0_SDA_TS
AB3 I2C0_SCK_TS JSEN1
W3 V3
SML1_SMBDATA
1K Vinafix.com
SML1_SMBCLK
+3V_PCH
1K
A5 B6 2.2K
3A 3A
2.2K +3VALW_5085
B4 MCP23017_SMBCLK 8
1A
MCP23017_SMBDAT
9 MCP_23017 MCP 23017 address :0x42
1A A3
2.2K
2.2K +DVDD
2
B5 EC_I2C_CLK 7 2
1B AMP I2C address selection L= 0x20H (L= 0x20H ; H= 0x22H)
A4 EC_I2C_DAT 8
1B
2.2K
6
Audio
KBC 2.2K
+3VALW_5085 7
100 ohm 3
1C A56 PBAT_SMBCLK
4 BATTERY
1C B59 PBAT_SMBDAT 100 ohm Battery address selection 0x16
CONN
2.2K
+3VALW_5085
2.2K
B49
2A UPD_SMBCLK B5
MEC 5085 2A
B48
UPD_SMBDAT A1
TI PD TI PD address selection 0x70
L2
A49 PD_Debug
2B K2 PD_Debug address selection 0xEC
3 B52 3
2B
8.2K
+3VALW_5085
8.2K
B50 CHARGER_SMBCLK 12
1G Charger address selection 0x12
A47 11 Charger
1G CHARGER_SMBDAT
2.2K
+3VALW_5085
2.2K
A50 CCG4_I2C_CLK
1E 17
B53 CCG4_I2C_DATA CCG4
16
1E
4
2A MUX
3
2A
4 4
2013/07/04 2013/10/28 Title
P32-BAT LED
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Re
Re v
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-C881P
A B C D E F G H
5 4 3 2 1
AP22850 EN_INVP W R
(U3) +INV_PWR_SRC +3VA_TBT
+3VALW_DSW
+3VALW_5105 +3V_HDA
+3V_SPI
ADAPTER
+3VS_TPM
SY8286B ALW O N EM5209VF SIO_SLP_SUS#
D (PU300) +3VALW (U36) +3V_PCH +3.3V_PCH_GPP D
RUN_ O N_ P
+3VS +3VS_TP
EM5209VF
Vinafix.com
TS_PW R_EN
(U39) +3VS_TS
SY8288C ALW O N
(PU301) +5VALW
CHARGER SD_PW R_EN
BQ25700 +3VS_CR
(P200) EM5209VF AUX_EN_W OW L
(U26) +3VS_NGFF
SY8210A SUS_ON_P EN_CAM
(PU400) +1.2V_DDR +3VS_CAM
B+ EM5209VF RUN_ O N_ P
(U32) +3.3VDX_SSD
E NVD D
BATTERY SIO_SLP_S0# & +LCDVDD
TPS62134A RUN_ O N_ P
(PU500) +0.85VS_VCCIO
EM5209VF AUDIO_PW R _ E N
(U37) +3V_AUDIO
C C
TPS62134D SIO_SLP_SUS# TPS2544 USBC1_PW R_EN SN1508014
(PU501) +VCCPRIM_CORE (US1) +5V_USB_P1 (U722) TBT_VBUS
TPS2544 USBC2_PW R_EN CYPD4225

(US2) +5V_VBUS (U723) CCG4_VBUS
RT6219A SIO_SLP_SUS#
(PU600) +1.0V_PRIM
APE8937 AUDIO_PW R _ E N
(U29) +5V_AUDIO
AP21510 PCH_PW R_ E N
(U47) +5V_CONN
G5719C SIO_SLP_SUS#
(PU700) +1.8V_PRIM
TPS22961 SIO_SLP_S0IX#
(U44) +1.2V_VCCPLL_OC
+VCC_SA
ISL95852 VR_ O N
(PU801) +VCC_GT
+1.0V_VCCCLK
B +VCC_CORE B
EM5209VF SUS_ON_P
(U45) +1.0V_VCCST
EXT_PWR_GATE#
+1.0VA_GATE
TPS22961 SIO_SLP_S0IX
(U35) +1.0V_VCCSTG
Wh WtZ
W, WtZ
'Wh WtZ
WĞƌŝƉŚĞƌĂů ĞǀŝĐĞ WtZ +3.3V_1.8V_ESPI
+1.8V_5105
APE8937 SUS_ON_P
(U48) +1.8V_MEM
EM5209VF AUDIO_PW R _ E N
(U37) +1.8V_AUDIO
A A

2011/06/02 2013/10/28 Title
P58-PWR_PIR-1
5 4 3 2 1
5 4 3 2 1
D D
+3VALW: TDC 5.5A
Vinafix.com
B+ (SY8286BRAC)
USB Type C x2
+5VALW: TDC 6.28A
(SY8288CRAC)
+1.8PRIM: TDC 1.2A

(G5719CRC1U)
Power path
C C
+0.85VS_VCCIO: TDC 2.1A

(TPS62134ARGT)
CHARGER
(ISL88738)
2S Battery (buck- boost) +VCCPRIMP_CORE TDC 0.77A
(TPS62134DRGTR)
+1.2V_DDR: TDC 3.03A

(SY8210A)
Battery Low Detect
B
+1.0V_PRIM: TDC 2.33A B
(RT6219AGQW)
+VCC_CORE: TDC 12A

+VCC_GT: TDC 11A
+VCC_SA: TDC 4A
(ISL95852)
A A

P46 - PWR_POWER BLOCK DIAGRAM
5 4 3 2 1
5 4 3 2 1
+3VALW +3VALW
AC Disconnect Logic
200K_0402_1%
200K_0402_1%
1
1
PR67
PR66
PR80
PD3 SE30AFB-M3-6A_SMA2 <38> AC_DISC# 0_0402_5%
2
2 1 1 2
S1
AC_DISC_OUT# <49>
6
D
TBT_VBUSFBMA-L11-201209-121LMA50T_0805
EMC@ PL7 @ PT2 1 2 2
PQ20A
S2
ISL-CHG-PROCHOT# <49>
PQ2 CHG_VIN G
3
1 2 PQ4 @ PR76 0_0402_1% D @ PR86 0_0402_1%
1
EMC@ PL1 AON7401_DFN8-5 AON7401_DFN8-5 1 2 5
PQ13B
S
<38,47> VBUS1_ECOK
1
FBMA-L11-201209-121LMA50T_0805 1 1 G PR88
TBT_DCIN
1 2 2 2 0_0402_5%
TBT_DC_SS +3VALW
3 5 5 3 S
4
+3VALW
2
1
DMP3099L-7_SOT23-3
200K_0402_1%
1000P_0402_50V7K
100P_0402_50V8J
1
0.022U_0402_25V7K
DMP3099L-7_SOT23-3
PR14
4
10U_0603_25V6M
100P_0402_50V8J
0.1U_0402_25V6
3
0.01U_0402_25V7K
300K_0402_1% PR9 D D
PC8
D D
499K_0402_1%
499K_0402_1%
1
1
@ PR78 300K_0402_1% 5 1 2 5
EMC@ PC1
EMC@ PC2
EMC@ PC3
EMC@ PC4
EMC@ PC5
PC6
PR69
3
1
S
1M_0402_1% PC7 G G PQ15B
PQ22
PR2
PR3
200K_0402_1%
2
3
S
2
G
@ PR87 0_0402_1%
PQ7
PR73
0.022U_0402_25V7K
2
2
G
2 S PQ20B S
4
D
1
D
100K_0402_1%
2
1
6
D
100K_0402_1%
1
@ PR77 0_0402_5% 2
PQ28A
PR64
+3V_PDLDO_OUT
1
1 2 G
PR55
PR7 PR54 <28,38,47> EN_PD_HV
3
49.9K_0402_1% 49.9K_0402_1% D S
200K_0402_1%
1
+3V_PDLDO_OUT
1
1 2 5
PQ28B
Vinafix.com
2
<28,38,47> AC1_PD_DISC# G
PR20
2
PQ11B PQ6B @ PR44 0_0402_1%
DMN66D0LDW-7_SOT363-6 DMN66D0LDW-7_SOT363-6 S
4
6
1
D D D 0_0402_5% PR16
0_0201_1%
200K_0402_1%
2
2 1 2 5 5 2 1
PQ23A
@ PR13
PR19
<38> DCIN1_EN
1
G G @ PR52 G VBUS1_ECOK <38,47>
PR24 0_0402_5% 0_0201_1% @ PR83 0_0402_5% @ PC39
3
1
PR41 D S S S 1 2 1000P_0402_25V8J
1
2
6
6
1 2 5 1 2 D @ PR79 0_0402_1% D
PQ23B
<28> EN_PD_HV
G PR4 2 1 2 2
PQ14A
PQ13A
<38,47> VBUS2_ECOK
0_0402_5% PR47 1M_0402_1% 1M_0402_1% G G
S +3VALW
4
2
1
S +3VALW S
1
3
PR53 PR38 D
1M_0402_1% 1 2 5
PQ14B
200K_0402_1%
1
<28,38,47> AC_DISC# G
0_0402_5%
PR85
200K_0402_1%
2
1
S
4
PR49
PR75
1M_0402_1%
2
2
6
@ PR81 0_0402_5% D
1 2 2
PQ21A
TI Port <24,38,47> CCG4_VBUS_C_CTRL_P1 G
3
D
1 2 5
PQ21B
S
1
<24,38,47> AC2_CCG4_DISC# G
@ PR68 0_0402_1%
S
4
C C
CCG_VBUS FBMA-L11-201209-121LMA50T_0805
EMC@ PL6
@ PT3 S3 PD6
2
SE30AFB-M3-6A_SMA2
1
CHG_VIN @ PR84 0_0402_5%
EMC@ PL2
1
FBMA-L11-201209-121LMA50T_0805
2
1
PQ12
AON7401_DFN8-5
PQ17
AON7401_DFN8-5
1
S4 1 2
CCG_DCIN
1 2 2 2
CCG_DC_SS PQ3
3 5 5 3 CCG_VBUS AON7401_DFN8-5
+5V_VBUS
1
DMP3099L-7_SOT23-3
1
10U_0603_25V6M
100P_0402_50V8J
100P_0402_50V8J
0.1U_0402_25V6
1000P_0402_50V7K
1
0.01U_0402_25V7K
DMP3099L-7_SOT23-3
1M_0402_1%
PR15 2
499K_0402_1%
4
4
1
0.022U_0402_25V7K
@ 300K_0402_1% PR12 3 5
EMC@ PC15
EMC@ PC16
EMC@ PC17
EMC@ PC18
EMC@ PC19
PC20
499K_0402_1%
1
PR82
PC21
PR28
300K_0402_1%
3
1
S
PC22
PQ24
PR27
2
DMP3099L-7_SOT23-3
G S
2 0.022U_0402_25V7K PR21
PQ18
2
4
1
G
2 300K_0402_1%
2
1
1
D
PR6
100K_0402_1%
3
D S
1M_0402_1% PC37
100K_0402_1%
1
2
1
G
2 0.022U_0402_25V7K
PQ26
PR70
2
+3V_PDLDO_OUT
PR58
100K_0402_1%
2
1
1
D
+3V_PDLDO_OUT
2
+3V_PDLDO_OUT
1
1
PR31
PR63
49.9K_0402_1% PR57
2
49.9K_0402_1%
200K_0402_1%
2
1
PQ8A
PR74
2
1
1
DMN66D0LDW-7_SOT363-6 PQ6A PR11
200K_0402_1%
200K_0402_1%
6
PR29 D DMN66D0LDW-7_SOT363-6
PR46
100K_0402_1%
1 2 2 @ PR34 PR37
PR72
<24> CCG4_VBUS_C_CTRL_P1
2
1
6
G 0_0201_1% D 0_0402_5% D
6 2
6
D 0_0402_5% @ PR56 2 1 2 2 PR59
PQ27A
VBUS2_ECOK <38,47>
2
2
2 PR33 0_0201_1% G G 0_0402_5% D
PQ25A
S
1
6
G 1 2 D 1 2 2
PQ16A
<24> CCG4_VBUS_5V_ON
1
2 G
PQ19A
S S
0.022U_0402_25V7K
S 1M_0402_1% PR5 G
1
1
PQ8B 1M_0402_1% S
1
1
DMN66D0LDW-7_SOT363-6 S PR60
1
3
PR65 D PR40 0_0402_5% D 1M_0402_1%
PC38
2
1 2 5 1 2 5
PQ25B
<38> DCIN2_EN
2
3
<24,47> CCG4_OVP_TRIP_P1# G G PR45 D @
2
3
0_0402_5% 1 2 5 D
PQ19B
1
<24,38,47> AC_DISC# G 1 2 5
PQ27B
S S
<24,47> CCG4_OVP_TRIP_P1#
4
B PR71 PR50 0_0402_5% G B
1
1M_0402_1% 1M_0402_1% S @ PR62 0_0402_1%
4
PR51 S
4
1M_0402_1%
2
2
Cypress Port
Cypress 5V Provide Path Control
@ PT1
EMC@ PL3 PQ5
+PBATT FBMA-L11-201209-121LMA50T_0805 +3V_PDLDO AO3413_SOT23-3 +3V_PDLDO_OUT
1 2
EMC@ PL4 +3V_PDLDO 1 3
S
FBMA-L11-201209-121LMA50T_0805 PD10 PU1
1U_0402_16V6K
1 2 BATT RB520SM-30T2R_EMD2-2 RT9069-33GB_SOT23-5
EMC@ PL5 2 1 PDLDO 1 5
CCG_VBUS
G
2
VCC OUT
1
FBMA-L11-201209-121LMA50T_0805
PC9
1
1 2 2 PR10
1U_0603_25V6
1
PD11 GND PC14 100K_0402_1%
2
1
2 1 3 4 1U_0402_16V6K 1 2
TBT_VBUS PC12
2
0.1U_0402_25V6
1000P_0402_50V7K
NC EN
EMC@ PC23
EMC@ PC24
2
RB520SM-30T2R_EMD2-2 PC10
+3VALW
2
0.01U_0402_25V7K
@ PD12 1 2
RB520SM-30T2R_EMD2-2
1
2 1 @ PR26 0_0201_5%
Primary Battery Connector EMC@ PD4 EMC@ PD5 +PP_HV PR22 200K_0402_1%
ALW_PWRGD_3V_5V
1 2 PQ9 AO3413_SOT23-3
TVNST52302AB0_SOT523-3 TVNST52302AB0_SOT523-3 1 2
1 3
S
1
PQ15A
2
JBAT1 DMN66D0LDW-7_SOT363-6 PR17
G
2
1
1 D PR61 0_0402_5% 2K_0201_5%
PR22 200k PC36:1U delay 70ms
100K_0402_1%
1U_0603_25V6
2
1
1
2 PR39 100_0402_1% 2 1 2 PR25
PR23
2200P_0402_50V7K
2 3 1 2 G ALW_PWRGD_3V_5V <38,50> 0_0201_5%

60$57
PC36
CLK_SMB PBAT_SMBCLK <38>
2
A 3 4 PR42 100_0402_1% 1 6 1 2
A
DAT_SMB %DWWHU\
S
2
1
D
5 1 2 S @ PC35
PBAT_SMBDAT <38>
2
5 % $77
3
6 1U_0402_16V6K D PQ10A
@EMC@ PC25
6 7 1 2
PBAT_PRES# <38,49> % $77 5 DMN66D0LDW-7_SOT363-6
2
2
7 8 G
8 9 PR43 100_0402_1%
% $77
9 10 &/ .B60% S PQ10B
4
10 11 PR48 100K_0201_1% '$7B60% DMN66D0LDW-7_SOT363-6
GND 12 1 2
+3VALW % $77B356
GND
ACES_50278-01001-001 6< 6B35(6 3.3V LDO for initial EC
CONN@ *1 '
%DWWHU\ LQIRUPDWLRQ *1 '
*1 ' Security Classification Compal Secret Data Compal Electronics, Inc.
639ROWDJH0D[ 7\S 0LQ Issued Date 2015/12/10 Deciphered Date 2015/12/10 Title
999
P47 - PWR_DCIN/BATT CONN/OTP
5 4 3 2 1
5 4 3 2 1
ddůŽǁǀŽůƚĂŐĞĚĞƚĞĐƚ
+3VALW_DSW
B+_5V
+3VALW_DSW +3VALW_DSW +3VALW_DSW
0.01UF_0402_25V7K
232K_0402_1%
100P_0201_50V8J
1
D D
1
@ PR100
PC100
PC101
10K_0201_1%
10K_0201_1%
1
1
@ PR101 @ PC102
2M_0201_5% 0.1U_0402_10V7K
@ PR102
PR103
2
2
@ @ 1 2 1 2
2
@ PR112
Vinafix.com
@ 1 2
H_PROCHOT# <5,38,49,51,55>
2
@ PQ100A 75_0402_5%
5
3 DMN66D0LDW-7_SOT363-6
P
+
6
1 4 3 1
P
1000P_0201_16V7K
D
BATT_VREF 2 O B 4 2 G
D
@ PQ100B
- Y
G
@ PU100A 2 DMN66D0LDW-7_SOT363-6
84.5K_0402_1%
G
S
A
1
G
LM393DMR2G_MICRO8
@ PC103
1
@ PU101
@ PR104
1U_0402_10V6K
3
M74VHC1GT00DFT2G_SC70-5
2
1
FAST_COMP_OUT
@ PC104
2
2
@ PR105
22.6K_0402_1%
+3VALW_DSW 1 2
@ PC105
C C
0.1U_0402_10V7K
1 2
5
1
P
4 B
Y
B+_5V +3VALW_DSW +3VALW_DSW A
2
G
@ PU102
3
@ PR107 M74VHC1GT00DFT2G_SC70-5
2M_0201_5%
232K_0402_1%
48.7K_0402_1%
1
1 2
10K_0201_1%
1
@ PR106
@ PR108
@ PR109
+3VALW_DSW
2
2
8
5
P
+ 7
BATT_VREF 6 O
-
G
@ PU100B
B LM393DMR2G_MICRO8 B
4
84.5K_0402_1%
42.2K_0402_1%
0.1U_0402_25V6
SLOW_COMP_OUT
1
1U_0603_10V6K
@ PR110
@ PR111
@ PC106
@ PC107
2
1
2
A A

P48 - PWR_DIS_BAT_PROCHOT#
0.1
5 4 3 2 1
A B C D
Module model information

ISL9237_V1.mdd for dual layer
CHG_VIN @ PT200
+CHG_VIN_SRC
1 PR200 EMC@ PL201 1
0.02_1206_1% 1UH_PCMB041B-1R0MS_4.2A_20%
1 4 1 2
10U_B15G_25VM_R100M
2 3
0.1U_0402_25V6
10U_B15G_25VM_R100M
1
PC200
2200P_0402_50V7K
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
1
+
PC246
1
+
@EMC@ PC205
@EMC@ PC206
PC207
PC203
PC209
PC204
PC222
EMC@ PC208
EMC@ PC218
2
1
@
1
PR201 2@
2
Vinafix.com
442K_0402_1% PR202 PR203 @ @ @ 2
3.3_0402_1% 3.3_0402_1%
2
2
ISL-CHG-ACIN
4.5V PC210
4.7U_0603_25V6K
0.1U_0402_25V6
1 2 B+
1
1
1
PR204 PC212
PC211
1U_0402_25V6K PC213
100K_0402_1% 1U_0402_25V6K
2
2
2
33U_B3_16VM_R45M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
2200P_0402_50V7K
1
0.1U_0402_25V6
1
1
+
PC214
PC215
PC216
PC217
PC219
PC221
PC247
EMC@ PC223
@EMC@PC224
0.22U_0603_25V7K
2.2_0603_5%
1
2
1
PR206 @ 2
PC225
PR205
2_1206_5%
1 2 ISL-CHG-ADP
CHG_VIN
2
2
2 2
ISL-CHG-CSIP
ISL-CHG-CSIN
1U_0603_25V6
1
PC226
ISL-CHG-BST1
ISL-CHG-UG1
ISL-CHG-LX1
ISL-CHG-LG1
5
PC227 1U_0603_25V6
2
1 2
AON7506_DFN33-8-5
AON7506_DFN33-8-5
PD200
RB520SM-30T2R_EMD2-2 PR207
2 1
PQ200
PQ201
PR208 4.7_0402_5%
CHG_VIN 2_1206_5% 1 2 ISL-CHG-VDD ISL-CHG-UG1 4 ISL-CHG-UG2 4
16
15
14
13
12
11
10
33
9
PD201 1 2
RB520SM-30T2R_EMD2-2 +8.8V_BATT+ +PBATT
ADP
CSIP
CSIN
ASGATE
BOOT1
UGATE1
PHASE1
LGATE1
PAD
2 1 5V
B+ PC228 1U_0603_16V7
3
2
1
3
2
1
ISL-CHG-DCIN 17 8 ISL-CHG-VDDP 1 2 PR209
PC229 1U_0402_6.3V6K DCIN VDDP 0.01_1206_1% PQ202
@ PR225 0_0402_5% 1 2 ISL-CHG-VDD 18 7 ISL-CHG-LG2 PL200 AON7405_DFN8-5
ISL-CHG-VDD 1 2 VDD LGATE2 2.2UH_MMD-06AE-2R2M-M1L_6A_20% 1 4 1
PR210
ISL-CHG-ACIN 19 6 ISL-CHG-LX2 1 2 ISL-CHG-LX1 1 2 ISL-CHG-LX2 2
PR232 0_0402_5% PR231 0_0402_5% ACIN PHASE2 2 3 3 5
10U_0603_25V6M
10U_0603_25V6M
2.2_0603_5%
1 2 1 2 OTGEN/CMIN 20 5 ISL-CHG-UG2
@EMC@ PR215
@EMC@ PR216
AON7534_DFN3X3-8-5
OTGEN/CMIN UGATE2
1
PR212 0_0402_5% PC230
PC231
PC232
4.7_1206_5%
4.7_1206_5%
1
1
1 2 21 PU200 4 ISL-CHG-BST2 1 2
2200P_0402_50V7K
<38> CHARGER_SMBDAT
4
PR213 0_0402_5% SDA ISL88738HRTZ-T_TQFN32_4X4 BOOT2
4700P_0402_25V7K
AON7534_DFN3X3-8-5
2
5
5
<38> CHARGER_SMBCLK
1 2 22 3 0.22U_0603_25V7K
SCL VSYS
1
ISL-CHG-BGATE
PQ204
PR214 75_0402_5% PR217
PC234
1
OTGPG/CMOUT
1 2 23 2 0_0402_5%
PC233
<5,38,48,51,55> H_PROCHOT#
1SNUB_CHG1 2
1SNUB_CHG2 2
PROCHOT# CSOP
B+
AMON/BMON
1 2
2
24 1
PQ203
BATGONE
<38> ISL-CHG-PROCHOT#
2
ACOK BGATE CSON ISL-CHG-LG1 4 ISL-CHG-LG2 4
CMOP
PROG
PSYS
VBAT
<38> ACAV_IN
PR218 100K_0402_1%
ISL-CHG-CSON
ISL-CHG-CSOP
@EMC@ PC237
680P_0402_50V7K
680P_0402_50V7K
1
ISL-CHG-VDD 1 2
@EMC@ PC236
@ PC235
25
26
27
28
29
30
31
32
3
2
1
3
2
1
PR219 200K_0402_1% 0.1U_0402_25V6
1
PR220 1 2
2
ISL-CHG-BGATE
100K_0402_1% PR222 PR223

ISL-CHG-VBAT1
93.1K_0402_1%
ISL-CHG-AMON
ISL-CHG-PSYS
1
<38,47> PBAT_PRES#
1 2 2.2_0402_1% 2.2_0402_1%
3
PR221
2
1
PR230 0_0402_5%
10P_0402_50V8J
1
@ PR224 1 2
PC238
100K_0402_5% <28,38,47> AC_DISC_OUT# PC239 PC240 PC241

1U_0402_25V6K 4.7U_0603_25V6K 1U_0402_25V6K
2
1 2 1 2 1 2
2
ISL-CHG-COMP
1
0_0402_5%
1
PR227
PR228
PR226 1K_0402_1%
@ PD202 499_0402_1%
RB520SM-30T2R_EMD2-2 @
560P_0402_50V7K
2 1
ISL-CHG-ACIN B+
2
2
1
PC242
0.1U_0402_25V6
1
PC244
0_0402_5%
0_0402_5%
2
1
PC243 @
PR238
PR239
P_SYS
CHG_VIN B+ 0.01U_0402_16V7K
2
PR229 100_0402_1%
2
1 2 +PBATT
<38,55>
2
2
1
1
0_0402_5%
PR233
PR236
0_0402_5%
@ PC245
0.1U_0402_25V6
I_BATT <38>
I_ADP <38>
@ @ PQ205 @
2
@ PR234 @ PD203 DMN65D8LW-7_SOT323-3

10K_0402_5% RB520SM-30T2R_EMD2-2
1 2 2 1 1 3
D
S
G
2
@ PR235
4 1 2 4
1M_0402_1%
1
@ PR237
@ PD204 3M_0402_5%
S ZEN DIO GLZ5.1B LL-34
SC400001300
2

System short detection cirucit Issued Date 2014/10/24 Deciphered Date 2015/08/31 Title
ͺͿǦǦ ȋ ;;ͽ͹;Ȍ
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Ǧͽ;ͷ
A B C D
A B C D E
B+ EMC@ PL300 PR300 PC300 +3VALW

FBMA-L11-201209-121LMA50T_0805
BST_3V
0_0603_5% 0.1U_0603_25V7M TDC 5.5A
1 2 1 2 1 2
WĂĐŬĂŐĞ͗ϳ͘Ϯǆϲ͘ϳǆϭ͘ϱ
Peak Current 7.7A
OCP current 8A
10U_0603_25V6M
10U_0603_25V6M
@EMC@ PC303
2200P_0402_50V7K
EMC@ PC304
/ĚĐсϲ͘ϱ
0.1U_0402_25V6
1
1
/ƐĂƚсϭϮ
PC301
PC302
PU300
1
SY8286BRAC_QFN20_3X3 ZсϮϬŵŽŚŵ;dǇƉ͘Ϳ
IN
IN
IN
IN
BS
2
2
LX_3V 6 20 PL301
LX LX 1.5UH_MMD-06AEI1R5M-M1L_6.5A_20%
7 19 LX_3V 1 2
GND LX +3VALWP
+3VALWP 8 18 +3VLP
1 GND GND 1
1
9 17
PG LDO @EMC@ PR302
Imax=6.23A
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
10 16 4.7_0603_5%
NC NC
PR303 Itdc=4.653A
OUT
EN2
EN1
1
PC306
PC307
PC308
PC309
21
NC
FF
10K_0402_5%
Vinafix.com
2
GND PC305
PR309 4.7U_0603_6.3V6M frequency=600kHz
11
12
13
14
15
2
0_0402_5%
<38,47> ALW_PWRGD_3V_5V
1 2 IL=2.3A
1
@EMC@ PC310
Isat=7.8A
ENLDO_3VALW
680P_0603_50V7K
OC= IL / 2 + 1 2
2
Ripple=7.82mV/9V
PR301 499K_0402_1%
1 2 ENLDO_3VALW
B+ 3V_EN @ PJP300
JUMP_43X118
1
1 2
1 2
PR304 +3VALWP +3VALW
499K_0402_1%
2
3V_FB 1 2 1 2
@ PC312
4.7U_0402_6.3V6M PC311 PR305
1 2 1000P_0402_25V8J 1K_0402_5%
PR306
0_0402_5%
1 2 3V_EN
<38> ALWON
1
PR308 PR307
1M_0402_1% 0_0402_5%
1 2 5V_EN
2 2
@ PC330
4.7U_0402_6.3V6M
2
1 2
@ PJP301
JUMP_43X118
1 2
1 2
+5VALWP +5VALW
B+_5V
EMC@ PL303 PR311 PC313
FBMA-L11-201209-121LMA50T_0805 0_0603_5% 0.1U_0603_25V7K
1 2 BST_5V 1 2 1 2 5VALW
B+ WĂĐŬĂŐĞ͗ϳ͘Ϯǆϲ͘ϳǆϭ͘ϱ TDC 6.28A
EMC@ PL304
/ĚĐсϲ͘ϱ Peak Current 8.98A
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
FBMA-L11-201209-121LMA50T_0805
0.1U_0402_25V6
33U_B3_16VM_R45M
2200P_0402_50V7K
PU301
1 2 1 /ƐĂƚсϭϮ OCP Current 10A
1
SY8288CRAC_QFN20_3X3
PC316
PC317
PC318
PC319
EMC@ PC314
EMC@ PC315
+
ZсϮϬŵŽŚŵ;dǇƉ͘Ϳ
PC331
IN
IN
IN
IN
BS
2
LX_5V 6 20 PL302
@ 2 LX LX 1.5UH_MMD-06AEI1R5M-M1L_6.5A_20%
7 19 LX_5V 1 2
GND LX +5VALWP
8 18
GND GND PC320
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
ALW_PWRGD_3V_5V 1
1
3 3
2 9 17 1 2
PG VCC @EMC@ PR314
PC321
PC322
PC323
PC324
PC325
PC326
@ PR313 10 16 4.7_0603_5%
4.7U_0603_6.3V6M
2
0_0402_5% NC NC
OUT
LDO
EN2
EN1
PR315 21
FF
5V_SN 2
499K_0402_1% GND
1 2 ENLDO_5VALW
B+
11
12
13
14
15
VL
5V LDO 150mA~300mA Vout 5V
ENLDO_5VALW
680P_0603_50V7K
1
PR316 PC327
@EMC@ PC328
Fsw=600KHz
1
499K_0402_1% 4.7U_0603_6.3V6M
2
2
PC329 PR318
1000P_0402_25V8J 1K_0402_5%
5V_EN 5V_FB 1 2 1 2
4 4

2015/12/10 2015/12/10 Title
P50 - PWR-3VALWP/5VALWP
ϯsͬϱs ĐŽŶƚƌŽůůĞƌ;ϯϱ͘ϭͿ͕ ^ƵƉƉŽƌƚ ĐŽŵƉŽŶĞŶƚ;ϯϱ͘ϮͿ DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
0.1

A B C D E
5 4 3 2 1
@ PR400
B+ 1 2
H_PROCHOT# <5,38,48,49,55>
75_0402_5%
EMC@ PL400
FBMA-L11-201209-121LMA50T_0805 @ PR403
1 2 100K_0402_1%
D 1 2 D
+3VALW
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_25V7K
PU400 1.2V_DDR_PG <38>
1
PC400
PC401
PC402 EMC@
PC403 EMC@
+3VALW 10 19 @EMC@ PR404 @EMC@ PC404 WĂĐŬĂŐĞ͗ ϱ͘ϰǆϱ͘ϳǆϭ͘ϱ
IN OT 4.7_0603_5% 680P_0402_50V7K
2 /ĚĐсϲ͘ϱ
2
Vinafix.com +1.2V_DDRP
13 18 1 2 1 2
BYP PG /ƐĂƚсϵ
1U_0402_6.3V6K
PR405 PC405 .1U_0402_16V7K
14 12 1 2 1 2 PL401 ZсϮϬŵŽŚŵ;dǇƉ͘Ϳ
VCC BS
PC406
0_0603_5% 1UH_PCME051E-1R0MS_6.5A_20%
1
LX_DDR
2.2U_0402_6.3V6M
4 11 1 2
VTTGND LX
PC407
2
нϯs>t
330P_0402_50V7K
9 16
2
PGND FB
1
100K_0402_1%
1
+1.2V_DDRP
PC408
PR406
15 8 PC413
SGND VDDQSNS
1
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
@ PR407 7 1 2
R1
2
VLDOIN
1
PC409
PC410
PC411
PC412
0_0402_5%
2
ILMT_DDR 17 6
ILMT VTT +0.6VSP
2
2
1 5
S5 VTTSNS
1
ILMT_DDR
100K_0402_1%
PR408
2 3
S3 VTTREF
22U_0603_6.3V6M
22U_0603_6.3V6M
C R2 C
1
1
1U_0402_10V6K
PC414
PC415
PC416
PR409 SY8210AQVC_QFN19_4X3
EN_1.2V
2
0_0402_5%
2
EN_0.6V
2
VFB=0.6V
PR410
Vout=0.6V* (1+R1/R2)
0_0402_5%
1 2
Vout=1.2V
<22,42,43> SUS_ON_P
Fsw=600KHz
0.1U_0402_10V7K
1
1
@ PC417
@ PR411
1M_0402_1%
2
2
B PR412 B
0_0402_5%
<6> SM_PG_CTRL
1 2
+1.2V_DDRP +1.2V_DDR +0.6VSP +0.6VS_VTT
0.1U_0402_10V7K
@ PJP400 @ PJP401
1
1
1M_0402_1%
@ PC418
@ PR414 JUMP_43X118 JUMP_43X39

PR413
0_0402_5% 1 2 1 2
1 2 1 2 1 2
<22,42,52> RUN_ON_P
2
2
+1.2V_DDR 0.6Volt +/- 5%

Mode SM_PG_CTRL SUS_ON_P VOUT VTT TDC 3.03A TDC 0.007A
Normal H H on on Peak Current 4.33A Peak Current 0.01A
Stadby L H on off OCP Current 8A OCP Current 2A (fix)
Shutdown L L off off
A A

P51 - PWR_+1.2V_DDR/0.6VS
Z ĐŽŶƚƌŽůůĞƌ;ϯϱ͘ϯͿ͕ ^ƵƉƉŽƌƚ ĐŽŵƉŽŶĞŶƚ;ϯϱ͘ϰͿ MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D781P
5 4 3 2 1
5 4 3 2 1
нϯs>t
1
@ PR500
100K_0402_1%
PR501
2
0_0402_5%
1 2
<9,19,22,33,52> SIO_SLP_S0#
dW^ϲϮϭϯϰ PR502 47K_0402_1%
⼀>W s/ϭ s/Ϭ sŽƵƚ;sͿ

<22,42,51> RUN_ON_P
1 2
EN_VCCIO
D PD501 s/K D
0.47U_0402_25V6K
d Ϯ͘ϭ
1
y y 1 2
Ϭ Ϭ͘ϬϬ
1M_0402_5%
1
PR503
PC500
WĞĂŬ ƵƌƌĞŶƚ ϯ
ϭ Ϭ Ϭ Ϭ͘ϴϱϬ KWƵƌƌĞŶƚϰ͘Ϯ&ŝǆďǇ/
2
@
D/E͗ϯ͘ϲ
Vinafix.com
13
14
15
16
17
ϭ Ϭ ϭ Ϭ͘ϴϳϱ PU500 Dy͗ϰ͘ϵ
ŚŽŬĞZ ϰϯ͘ϬŵŽŚŵ
EN
PGND
PGND
TP
LPM
EMC@ PL500
HCB1608KF-121T30_0603
ϭ ϭ Ϭ Ϭ͘ϵϱϬ VIN_VCCIO
нϱs>t 1 2 12
PVIN VOS
1
нϬ͘ϴϱs^ͺs/KW
PL502
ϭ ϭ ϭ Ϭ͘ϵϳϱ 1UH_PCMB041B-1R0MS_4.2A_20%
10U_0603_25V6M
10U_0603_25V6M
LX_VCCIO
1
11 2 1 2
нϬ͘ϴϱs^ͺs/KW
PC501
PC502
PVIN SW
WĂĐŬĂŐĞ͗ ϰ͘Ϯǆϰ͘ϳǆϭ͘Ϯ
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
2
нϯs>t TPS62134ARGT_QFN16_3X3
/ĚĐсϰ͘Ϯ
1
10 3
PC505
PC506
PC507
2200P_0402_50V7K
AVIN SW /ƐĂƚсϱ͘Ϯ
0.1U_0402_25V6
1
1
EMC@ PC503
ZсϰϯŵŽŚŵ;dǇƉ͘Ϳ
EMC@ PC504
2
1
@
4.7_0603_5%
VID0_VCCIO 9 4
@EMC@ PR504
2
2
VID0 PG
1SNUB_VCCIO
100K_0402_1%
100K_0402_1%
1
AGND
VID1
FBS
2
PR505
@ PJP500
@ PR506
Fsw=1.2MHz
SS
JUMP_43X79
1 2
+0.85VS_VCCIOP +0.85VS_VCCIO
5
1 2
680P_0402_50V7K
2
1
@EMC@ PC508
PR507
VID0_VCCIO VID1_VCCIO
0_0402_1%
SS_VCCIO
2
VID1_VCCIO @
2
C C
1
@ PR508 0_0402_1%
100K_0402_1%
100K_0402_1%
1 2
PR509
PR510
470P_0201_25V7K
1
VCCIO_SENSE <12>
200K _0201_1%
PC509
PR511
@
2
2
R C @
2
SY8057 @
TI62134 @
нϯs>t
1
<9,19,22,33,52> SIO_SLP_S0#
@ PR514
100K_0402_1%
PR515
2
0_0402_5%
PR516 1 2
0_0402_5%
WZ/DͺKZ
EN_PRIM_COREP
<40,42,53,54> PCH_PWR_EN 1 2 dϬ͘ϳϳ

dW^ϲϮϭϯϰ WĞĂŬƵƌƌĞŶƚ ϭ͘ϭ
0.22U_0402_16V7K
1
KWƵƌƌĞŶƚϰ͘Ϯ&ŝǆďǇ/
⼀>W
@ PD502
PC510
2 1
s/ϭ s/Ϭ sŽƵƚ;sͿ D/E͗ϯ͘ϲ
2
RB751S40T1G_SOD523-2 @ Dy͗ϰ͘ϵ
Ϭ y y Ϭ͘ϳϬϬ ŚŽŬĞZϰϯ͘ϬŵŽŚŵ
13
14
15
16
17
PU501
B WĂĐŬĂŐĞ͗ ϰ͘Ϯǆϰ͘ϳǆϭ͘Ϯ B
ϭ Ϭ Ϭ Ϭ͘ϴϱϬ
EN
PGND
PGND
TP
LPM
EMC@ PL505 /ĚĐсϰ͘Ϯ

HCB1608KF-121T30_0603
VIN_PRIM
/ƐĂƚсϱ͘Ϯ
ϭ Ϭ ϭ Ϭ͘ϵϬϬ
нϱs>t 1 2 12
PVIN VOS
1
нsWZ/DWͺKZ ZсϰϯŵŽŚŵ;dǇƉ͘Ϳ
PL504
ϭ ϭ Ϭ Ϭ͘ϵϱϬ 1UH_PCMB041B-1R0MS_4.2A_20%
10U_0603_25V6M
10U_0603_25V6M
LX_PRIM
1
11 2 1 2
нsWZ/DWͺKZ
PC512
PC511
PVIN SW
ϭ ϭ ϭ ϭ͘ϬϬϬ
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
1
10 TPS62134DRGTR_VQFN16_3X3 3
PC513
PC514
PC515
2200P_0402_50V7K
AVIN SW
0.1U_0402_25V6
@ PJP501
1
1
EMC@ PC516
JUMP_43X79
EMC@ PC517
2
нϯs>t @ 1 2
4.7_0603_5%
+VCCPRIMP_CORE 1 2 +VCCPRIM_CORE
1
9 4
@EMC@ PR518
2
VID0 PG
1SNUB_PRIM
AGND
VID0_PRIM_CORE
VID1
FBS
Fsw=1.2MHz
SS
680P_0402_50V7K
8
5
1
100K_0402_1%
100K_0402_1%
PR520
@EMC@ PC518
PR519
2
SS_PRIM
@ @
VID1_PRIM_CORE
2
@ PR521 0_0201_5%
1 2
VID0_PRIM_CORE <13> CORE_VID0
VID1_PRIM_CORE
@ PR522 0_0201_5% +VCCPRIMP_CORE
1 2 @ PR523 0_0201_5%
<13> CORE_VID1 0.95VCC_SENSE_R 1 2
100K_0402_1%
470P_0201_25V7K
100K_0402_1%
1
1
@PR524
@ PR525
PC519
A @ PR517 A
499K_0201_1%
2
2

2015/12/10 2015/12/10 Title
P52 - PWR_VCCIO/PRIM_CORE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. DB-1942P
5 4 3 2 1
5 4 3 2 1
Module model information

RT6219A_V2.mdd
D D
Vinafix.com
EMC@ PL600
FBMA-L11-201209-121LMA50T_0805
B+_1.0V
н 1 2
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_50V7K
1
1
@EMC@ PC600
PC602
PC603
EMC@ PC601
C C
2
2
PC604 @EMC@ PR602 @EMC@ PC605
PR600 0_0402_5% PR601 2.2_0603_1% 0.22U_0603_10V7K 4.7_0603_5% 680P_0402_50V7K @ PJP600
1 2 EN_1.0V BST_1.0V 1 2 BST_1.0V_R 1 2 1 2 SNB_1.0V 1 2 JUMP_43X39
<40,42,52,54> PCH_PWR_EN 1 2
+1.0V_PRIMP 1 2 +1.0V_PRIM
1
@ PR603 @ PC606
1M_0402_1% 0.1U_0402_25V6
PU600
2
7
RT6219AGQW_WDFN10_3X3
2
VIN
BOOT
4 PL601
EN
+5VALW
PR604
1
5.1_0402_1%
2
SW3
10 LX_1.0V
1UH_PCME051E-1R0MS_6.5A_20%
1 2 нϭ͘ϬsͺWZ/DW
1
2
VBYP
1
PC607 9
22P_0402_50V8J
SW2
1
2.2U_0603_10V6K PR605
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
2
42.2K_0402_1%
PC613
+1.0V_PRIM
22U_0603_6.3V6M
1
1
8
2
SW1
1 TDC 2.33A
PC608
PC609
PC610
PC611
PC612
<38> +1.0V_PGOOD
2
PGOOD
FB_1.0V Peak Current 3.33A
2
5
VCC_1.0V 6 PGND FB
@ PR606
1 2 VCC OCP 5A(Fix by IC)
нϯs>t
1
1
10K_0402_5% PC614
62K_0402_1%
11
PR607
2.2U_0603_10V6K
2
2
B B
VFB=0.6V
Vout=0.6V* (1+Rup/Rdown)
Vout=1.0V
A A

2011/12/10 2012/12/10 Title
ͻ͹Ǧ̸ήͷǤͶ̸
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Ǧͽ;ͷ
5 4 3 2 1
5 4 3 2 1
D D
+3VALW Vinafix.com PR700

0_0402_5%
+1.8VSP_ON 1 2
PCH_PWR_EN <40,42,52,53>
1
PR701
0.1U_0402_16V7K
1
100K_0402_1%
@ PC700
1
PR705
1M_0402_1%
2
WĂĐŬĂŐĞ͗ ϰ͘Ϯǆϰ͘ϳǆϭ͘Ϯ
2
/ĚĐсϰ͘Ϯ
2
<38> 1.8VALW_PG
PU700 /ƐĂƚсϱ͘Ϯ @ PJP700
9 ZсϰϯŵŽŚŵ;dǇƉ͘Ϳ 1 2
C
1
VFB
TP
GND
8 +1.8V_PRIMP 1 2 +1.8V_PRIM C
JUMP_43X79
EMC@ PL700 2 7 PL701
HCB1608KF-121T30_0603 PG EN 1UH_PCMB041B-1R0MS_4.2A_20%
1 2 3 6 LX_1.8V 1 2
+5VALW VIN LX
+1.8V_PRIMP
1
4 5
68P_0402_50V8J
GND NC
1
Rup PR703 +1.8V_PRIM
22U_0603_6.3V6M
22U_0603_6.3V6M
1
1
PC701 @EMC@ PR702
PC702
PC703
PC704
20K_0402_1%
22U_0603_6.3V6M G5719CRC1U_TDFN8_2X2 4.7_0603_5% TDC 1.2A
Peak Current 1.67A
2
2
2
FB_1.8V
OCP 3A(Fix by IC)
1
Rdown
1
@EMC@ PC705
PR704
680P_0402_50V7K
10K_0402_1%
2
B B
Vout=0.6V* (1+Rup/Rdown)
A A

P54 - PWR_+1.8V_PRIM
5 4 3 2 1
5 4 3 2 1
VCCSA:KPL_Y
VCC_SA
B+ CPU_B+ TDC PL1: 4.5W
TDC at PL2 (15W) 100 seconds : 4A
EMC@ PL800
FBMA-L11-201209-121LMA50T_0805 ICCmax 10ms : 4.1A
1 2 DC Load line: 17.9mV/A(SKU A (10-layer
EMC@ PL801 Motherboard)
FBMA-L11-201209-121LMA50T_0805 di (transient): 4A
33U_B3_16VM_R45M
1 2 1 1
OCP current: 6.97A
33U_B3_16VM_R45M
+ +
PC801
PC803
D D
2 2
+5VALW TYP MAX
H/S Rds(on) 4.5V :12.4 mohm , 15.8 mohm
PR800
L/S Rds(on) 4.5V :9.1 mohm , 11.6 mohm
+5VALW 2.32K_0402_1%
1 2
1
PR801 PC805
0_0402_5% 22P_0402_50V8J PC804
Vinafix.com
1 2 1 2 1U_0402_16V6K
VCCSA_SENSE <15>
2
1
0_0603_5%
1
PR804
2K_0402_1%
PR802
0_0603_5%
PR803
1 2
VSSSA_SENSE <15>
CPU_B+
G4_FB_SA
0.22U_0402_10V6K
PC806
1
1U_0402_16V6K
PC807
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
0.1U_0402_25V6
2200P_0402_25V7K
1 2
470P_0402_50V8J
1
+3VALW
PC811
PC812
PC813
PC814
VCC_D3.D6
2
1
5
PC808
@EMC@ PC809
@EMC@ PC810
G1
D1
D1
D1
VCC
FCCM
PHASE
LGATE
2
+1.0V_VCCST PU800 @ @ @
2
ISL95808HRZ-TS2378_DFN8_2X2 9 10
1
D2/S1 D1
G4
G5
PU801
D3
D6
D4
D5
H3
PR805 ISL95852HIZ-T_WLCSP64 9
G2
S2
S2
S2
1.91K_0402_1% TP PQ800
UGATE
VCC_D3
VCC_D6
AGND_D4
AGND_D5
AGND_H3
FB_SA
RTN_SA
BOOT
AON7934_DFN3X3A8-10
PWM
GND
2
5
PR806
100_0402_1%
SVID_DAT
1 2 F3
<9> VCORE_PG
4
@ PR807 VR_RDY PL802
10K_0402_1% PR808 0.47UH_MMD-05ABHR47MET1L-SE_7A_20%
SVID_ALERT# F4_VR_ON E3_PWM_SA
1 2 1 2 F4 E3 1 2
PR809
<9,22> VR_ON
0_0402_5%
VR_EN PWM_SA
E2_FCCM_SA
+VCC_SA
1
45.3_0402_1% E7 E2
SVID_CLK <38,49> P_SYS PSYS FCCM_SA
1 2 @ PR852 @EMC@ PR810 @EMC@ PC815 PR811
100K_0402_1% 4.7_0805_5% 1000P_0603_50V7K Dimensions(mm)
1 2 PR813 1 2 1 2 3.65K_0402_1%
1K_0402_1%
5.7 x 5.4 x 1.2
E4_LG
2
+1.0VS_VCCSTG E4 1 2 Idc 7A , Isat 11A
LG_SA DCR 13.6mohm ± 5%
H4_ISENP_SA
H4
PR814 10_0402_1% ISENP_SA
H5_ISENN_SA
1
1
1 2 SDA F6 H5
1U_0402_16V6K
PC816 @ PR812 <14> SVID_DAT PR815 0_0402_5% SDA ISENN_SA PR816
0.022U_0402_16V7K
1U_0402_6.3V6K 10K_0402_1% 1 2 ALERT# E5 2.61K_0402_1%
@ PC817
<14> SVID_ALERT# G3_COMP_SA
2
ALERT#
1
PR817 49.9_0402_1% G3
11K_0402_1%
COMP_SA
1
1 2 SCLK F5
PR820
PC818
<14> SVID_CLK H6_IMON_SA
5.76K_0402_1%
2
2
SCLK
1
C H6 @ PR821 @ PC819 C
IMON_SA 2200P_0402_25V7K
10K_0402_1%
PR818
PR819 G6_CNFG
1
1 2 E6 G6 1 2 1 2
2
<5,38,48,49,51> H_PROCHOT# VR_HOT# CNFG
220P_0402_50V8J
75_0402_5% PH800
150P_0402_50V8J
1
1
0.01U_0402_16V7K
10K_0402_5%_TSM0A103J4302RE
@ PC822
34K_0402_1%
10K_0402_1%
154K_0402_1%
1U_0402_16V6K
2
1
1
@ PR823
PR822
PR824
PC821
1
PR825 1.1K_0402_1%
@ PC820
2
1
PC823 PR827 1 2
PC824
2
PR826 2.8K_0402_1% 330P_0402_50V8J 2K_0402_1%
2
1 2 1 2 1 2
2
@ PC825 @ PR828 +5VALW PR829 PC826
22P_0402_50V8J 0_0402_5% 2K_0402_1% 330P_0402_50V8J PR830 3.01K_0402_1%
G2_FB_GT
<14> VCCGT_SENSE 1 2 1 2 G2 G7 1 2 1 2 1 2
FB_IA FB_GT
@ PC827 @ PR831
<14> VSSGT_SENSE F2 F7 22P_0402_50V8J 0_0402_5%
RTN_IA RTN_GT 1 2 1 2
VCCSENSE <14>
@EMC@ PC828 @EMC@ PR832 PC829 PR833 PR834 PC830
1000P_0603_50V7K 4.7_0805_5% 0.22U_0402_10V6K 0_0603_5% D7_BOOT_IA 0_0603_5% 0.22U_0402_10V6K
1 2 1 2 1 2 1 2 BGT D2 D7 1 2 1 2 VSSSENSE <14>
BOOT_IA BOOT_GT
B1 B5
PL803 B2 PHASE_IA_B1 PHASE_GT_B5 B6 @EMC@ PR835 @EMC@ PC831
0.15UH_MHCB06015R15MC1A3R555_16A_20% B3 PHASE_IA_B2 PHASE_GT_B6 B7 4.7_0805_5% 1000P_0603_50V7K
B1-4_PHASE_GT PHASE_IA_B3 PHASE_GT_B7 B5-8_PHASE_IA
1 2 B4 B8 1 2 1 2
+VCC_GT PHASE_IA_B4 PHASE_GT_B8
Dimensions(mm) PL804
G8_ISENP_IA
G1 G8 0.15UH_MHCB06015R15MC1A3R555_16A_20%
7.2 x 6.7 x 1.5
1
ISENP_IA ISENP_GT 1 2
+VCC_CORE
G1_ISENP_GT
PR836 Idc 16A , Isat 30A

3.65K_0402_1% DCR 3.55mohm ± 5% F8_ISENN_IA
1
F1 F8 1
ISENN_IA ISENN_GT PR837
2
3.65K_0402_1% + @ PC840
F1_ISENN_GT
Dimensions(mm)
7.2 x 6.7 x 1.2 220U_B3_2.5VM_R35M
2
Idc 16A , Isat 30A 2
1
DCR 3.55mohm ± 5%
PR838
VIN_GT_C5
VIN_GT_C6
VIN_GT_C7
VIN_GT_C8
1
0.01U_0402_16V7K
0.01U_0402_16V7K
VIN_IA_C1
VIN_IA_C2
VIN_IA_C3
VIN_IA_C4
COMP_GT
4.87K_0402_1%
PVCC_GT
PGND_A1
PGND_A2
PGND_A3
PGND_A4
AGND_H1
AGND_H8
PGND_A5
PGND_A6
PGND_A7
PGND_A8
IMON_GT
COMP_IA
PVCC_IA
1
IMON_IA
PR840
11K_0402_1%
0.01U_0402_16V7K
0.01U_0402_16V7K
4.87K_0402_1%
PR839
PC832
PC833
2
1
11K_0402_1%
1
1
PC834
PC835
PR841
2
2
2
C1
C2
C3
C4
D1
A1
A2
A3
A4
H2
E1
H1
H8
E8
H7
A5
A6
A7
A8
D8
C5
C6
C7
C8
1
PR842 1.13K_0402_1%
1
PH801 1 2
2
10K_0402_5%_TSM0A103J4302RE PH802
PR843 1.13K_0402_1% 10K_0402_5%_TSM0A103J4302RE
B 1 2 B
2
2
1 2 1 2
1 2 1 2
@ PR844 @ PC836
H7_COMP_IA
D8_PVCC_IA
E8_IMON_IA
10K_0402_1% 2200P_0402_25V7K @ PR845 @ PC837

H2_COMP_GT
E1_IMON_GT
10K_0402_1% 2200P_0402_25V7K
D1_PVCC_GT
CPU:KPL_Y
CPU_B+ CPU_B+ VCC_core
3.24K_0402_1%
3.24K_0402_1%
1
TDC PL1: 4.5W

PR846
PR847
270P_0402_50V7K
0.1U_0402_25V6
2200P_0402_25V7K
1 TDC at PL2 (15W) 100 seconds : 15A

10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
10U_0603_25V6M
1U_0402_16V6K
0.1U_0402_25V6
2200P_0402_25V7K
220P_0402_50V8J
150P_0402_50V8J
150P_0402_50V8J
1
1
@ PC848
0_0603_5%
ICCmax: 10ms : 24A

0_0603_5%
100K_0402_1%
100K_0402_1%
1U_0402_16V6K
1
1
33U_B3_16VM_R45M
+
PR851
@EMC@ PC838
@EMC@ PC839
PC841
PC842
PC843
PC844
PR848
@ PC845
PC846
PC847
PR850
PC849
PC853
PC854
PR849
2
DC Load line: 5.9mV/A(SKU A (10-layer

@EMC@ PC850
@EMC@ PC851
2
Motherboard)
2
2
0.1U_0402_25V6
2 @ @ @
VCCGT:KPL_Y
2
2
0.1U_0402_25V6
1
di (transient): 24A
PC856
PC857
VCC_GT
TDC PL1: 4.5W OCP current 27A
2
TDC at PL2 (15W) 100 seconds : 14A

ICCmax: 10ms : 24A
DC Load line: 5.7mV/A(SKU A (10-layer
Motherboard)
di (transient): 24A +5VALW
OCP current: 27A
A A

P55 - PWR_VCORE/SA/GT
5 4 3 2 1
4
0.1U_0201 * 28 pcs +1U_0201*6 pcs+10U_0402*9pcs+47U_0603*10pcs

VCC_CORE
+VCC_CORE
sͺKZŽƵƚƉƵƚĐĂƉ;ϯϲ͘ϰͿ
2 1 2 1 2 1 2 1 2 1 2 1
PC981 PC957 PC945 PC937 PC925 PC900

47U_0603_6.3V6M 10U_0402_6.3V6M 1U_0201_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
Vinafix.com
2 1 2 1 2 1 2 1 2 1 2 1
A
@ PC982 PC958 PC946 PC938 PC926 PC901
2 1 2 1 2 1 2 1 2 1 2 1
PC983 PC959 PC947 PC939 PC927 PC902
Back side
2 1 2 1 2 1 2 1 2 1 2 1
PC984 PC960 PC948 PC940 PC928 PC903

2 1 2 1 2 1 2 1 2 1 2 1
PC985 PC961 PC949 PC941 PC929 PC904

2 1 2 1 2 1 2 1 2 1 2 1
PC986 PC962 PC950 PC942 PC930 PC905

2 1 2 1 2 1 2 1 2 1
@
PC987 PC963 PC943 PC931 PC906
47U_0603_6.3V6M 10U_0402_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
2 1 2 1 2 1 2 1 2 1
PC988 PC964 PC944 PC932 PC907

47U_0603_6.3V6M 10U_0402_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
2 1 2 1 2 1 2 1
@
PC989 PC965 PC933 PC908
TOP side
47U_0603_6.3V6M 10U_0402_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
2 1 2 1 2 1
@ PC990 PC934 PC909

47U_0603_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
B
sͺ^ŽƵƚƉƵƚĐĂƉ;ϯϲ͘ϲͿ
+VCC_SA
TOP side
1U_0201 * 5 pcs +47U_0603*11 pcs

VCC_SA
2 1 2 1
PC991 PC966
47U_0603_6.3V6M 1U_0201_6.3V6M
2 1 2 1
@
PC992 PC967
47U_0603_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PC993 PC968
47U_0603_6.3V6M 1U_0201_6.3V6M
2 1 2 1
PC994 PC969
Back side
47U_0603_6.3V6M 1U_0201_6.3V6M
C
2 1 2 1
PC995 PC970
47U_0603_6.3V6M 1U_0201_6.3V6M
2 1
Security Classification
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
@ PC996
Issued Date
47U_0603_6.3V6M
2 1
@
PC997
47U_0603_6.3V6M
2 1
@
PC998
47U_0603_6.3V6M
2 1
PC999
47U_0603_6.3V6M
2 1
2015/12/10
PC1000
0.1U_0201
VCC_GT
47U_0603_6.3V6M
2 1
PC1001
47U_0603_6.3V6M
Compal Secret Data
*
sͺ'dŽƵƚƉƵƚĐĂƉ;ϯϲ͘ϱͿ
Deciphered Date
15
+VCC_GT
pcs
D
D
+1U_0201*6
2 1 2 1 2 1
2015/12/10
2 1 2 1 2 1 2 1 PC935 PC920 PC910

1U_0201_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
@
PC1002 PC971 PC955 PC951 2 1 2 1 2 1
47U_0603_6.3V6M 47U_0603_6.3V6M 10U_0402_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 2 1 PC936 PC921 PC911
pcs+1U_0402*4pcs+10U_0402*2pcs+47U_0603*13pcs
1U_0201_6.3V6M 0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
@ PC1003 PC972 PC956 PC952 2 1 2 1
47U_0603_6.3V6M 47U_0603_6.3V6M 10U_0402_6.3V6M 1U_0201_6.3V6M
2 1 2 1 2 1 PC922 PC912
0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
PC1004 PC973 PC953 2 1 2 1
Back side
47U_0603_6.3V6M 47U_0603_6.3V6M 1U_0201_6.3V6M
2 1 2 1 PC923 PC913
0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
PC974 PC954 2 1 2 1
Date:
Size
Title
47U_0603_6.3V6M 1U_0201_6.3V6M
2 1 PC924 PC914
P56 - Decoupling cap. for CPU power
0.1U_0201_6.3V6K 0.1U_0201_6.3V6K
Document
@
PC975 2 1
Wednesday, November 16, 2016
LA-D781P
47U_0603_6.3V6M
2 1 PC915
0.1U_0201_6.3V6K
PC976 2 1
Number
47U_0603_6.3V6M
2 1 PC916
0.1U_0201_6.3V6K
PC977 2 1
47U_0603_6.3V6M
2 1 PC917
TOP side
0.1U_0201_6.3V6K
E
E
PC978 2 1
47U_0603_6.3V6M
2 1 PC918
0.1U_0201_6.3V6K
@
PC979 2 1
Sheet
47U_0603_6.3V6M
2 1 PC919
0.1U_0201_6.3V6K
PC980
56
47U_0603_6.3V6M
of
56
Re v
0.1
1
5 4 3 2 1
AP22850 EN_INVPW R +3VA_TBT

(U3) +INV_PW R_SRC
+3VALW_DSW +3V_HDA
+3VALW_5105 +3V_SPI
+3VS_TPM
ADAPTER +3.3V_PCH_GPP
D D
SY8286B ALW O N EM5209VF SIO_SLP_SUS#
(PU300) +3VALW (U36) +3V_PCH
RUN_O N_P APE8937 SIO_SLP_SUS#

+3VS (U47) +3V_MUX
EM5209VF TS_PWR_EN
(U39) +3VS_TS
Vinafix.com
SY8288C ALW O N
(PU301) +5VALW
CHARGER SD_PWR_EN
BQ25700 +3VS_CR
(P200) EM5209VF AUX_EN_WOWL
(U26) +3VS_NGFF
SY8210A SUS_ON_P EN_CAM
(PU400) +1.2V_DDR +3VS_CAM
B+ EM5209VF RUN_O N_P
(U32) +3.3VDX_SSD
ENVDD
BATTERY SIO_SLP_S0# & +LCDVDD
TPS62134A RUN_O N_P
C
(PU500) +0.85VS_VCCIO C
EM5209VF AUDIO_PW R_EN
(U37) +3V_AUDIO
TPS62134D SIO_SLP_SUS#
(PU501) +VCCPRIM_CORE
RT6219A SIO_SLP_SUS#
(PU600) +1.0V_PRIM
G5719C ALW O N
(PU700) +1.8VALW
B B
+VCC_SA
ISL95852 VR_O N
(PU801) +VCC_GT
+VCC_CORE
A A

P57-PWR_PIR-1
5 4 3 2 1
5 4 3 2 1
[RTC in]
+RTCVCC
tPCH01 < 9ms
PCH_RTCRST#
[AC in] [AC in] [Battery only, AC absent]

Type-C TBT_VBUS
Type-C CCG_VBUS
Ta
+3V_PDLDO Ta
+3V_PDLDO
Tb
+3V_PDLDO_OUT Tb +PBATT
D +3V_PDLDO_OUT D
Tc Tm
TI GPIO EN_PD_HV Tc B+
CCG4 GPIO CCG4_VBUS_C_CTRL_P1
Ti
+3V_PDLDO_OUT
Ti
EC GPIO DCIN1_EN Ti
EC GPIO DCIN2_EN
Td 1ns < Tj < 4s
Vinafix.com
CHG_VIN Td EC Input ACAV_IN
CHG_VIN EC Input
Te Tk
B+ Te EC Output POWER_SW_IN#
B+ EC Output
Tf Te
EC Input ACAV_IN Tf +3VALW
EC Input ACAV_IN
Tg Tf
EC Output ALWON Tg +5VALW
EC Output ALWON
Th Tg
+3VALW P Th
+3VALW P
1ns < Tj < 4s Th
+5VALW P 1ns < Tj < 4s
+5VALW P
T1
PCH Output SIO_SLP_SUS#
T2
+3V_PCH
SUSCLK
T3
+1.8VA
T4
C +1.0V_PRIM_CORE C
T5
+1.0VA
T6=tPCH06
PCH Output MPHYP_PWR_EN(EXT_PWR_GATE#)
T7
+1.0V_MPHYGT
PCH Output SIO_SLP_S0#

T8
EC Output SUSACK#
T9
EC Output PCH_RSMRST#
PCH Output ME_SUS_PWR_ACK(SUSWARN#)

T10
EC Output AC_PRESENT
T11
T12
PCH Output SIO_SLP_A#
T13
PCH Output SIO_SLP_WLAN#
T14
EC Output AUX_EN_WOWL
T15
+3VS_NGFF
EC Output SIO_PWRBTN# 16ms < T < 4s
DŝŶŝŵƵŵ ĚƵƌĂƚ ŝ ŽŶ ŽĨ W tZd E η ĂƐƐĞƌ ƚ ŝ ŽŶ с ϭ ϲŵ^ ĂĨƚ Ğƌ ^h^>< Ɛ ƚĂď
Ğů
T16
T17
+1.0V_VCCST
B B
T18
EC Output SUS_ON_EC
T19
+1.8VU
T20
+1.2V_DDR
T21
VCCST_PWRGD
T22
T23
EC Output RUN_ON_EC
T24
+3.3VDX_SSD
T25
+1.0VS_VCCSTG
T26
+1.0VS_VCCIO
T27
+3VS
T28
+5VS
T29
EC Input RUNPWROK (ALL_SYS_PWRGD)
PCH Output CL_RST#
T30
EC Output IMVP_VR_ON
T31
VCORE_PG (PCH_PWROK)
T32
A +VCC_SA A
T33
+VCC_EDRAM
T34
+VCC_EOPIO
T35
EC Output SYS_PWROK (RESET_OUT#)
PCH Output PCH_PLTRST#

T36
+VCC_CORE
T37
+VCC_GT Security Classification Compal Secret Data Compal Electronics, Inc.
P62-Power Up Sequence
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 1.0(A00)
Da
Date:
te : Wednesday, November 16, 2016 Sheet
Shee t 58 of 58
5 4 3 2 1
+VCC_CORE
VGATE
SYS_PWROK
PCH_PLTRST#

LA-D781P Aventador MB 20161116

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A B C D E

MODEL NAME : Aventador

SA0000A3Q0L SA0000ADX0L SA0000ADS0L

Security Classification Compal Secret Data Compal Electronics, Inc.

4/8/16 GB Memory Down

USB Type C VBUS1

USB Type C VBUS2 DP Switch

PD Controller USB2.0 MUX USB2.0 Port 4

uSD Conn. CardReader PCIE2x1

Headphone Jack I2C

TouchPAD LPC Bus Nuvoton TPM1.2/2.0

KSIO Keyboard Controller LED FPC Conn.

Security Classification Compal Secret Data Compal Electronics, Inc.

Power BTN FPC

SMSC MEC 5085 Front Side LED FPC

Security Classification Compal Secret Data Compal Electronics, Inc.

POWER STATES / WKZdη ^d/Ed/KE h^ϯ͘Ϭ WKZdη ^d/Ed/KE

S4 (Suspend to DISK) / M-OFF

ŽĂƌĚ / dĂďůĞ

RC6 1 @ 2 2.2K_0201_5% PCH_DDI1_CLK

+3V_PCH +1.0V_PRIM +1.0V_XDP

+1.0VS_VCCSTG (Option w/ CPU JTAG) UC10 61

RC37 2 1 51_0402_5% PCH_JTAG_TMS XDP_PRSENT# 2 NC 4 62 63

R4 RC34 2 1 51_0402_5% NL17SZ14DFT2G_SOT353-5 E-T_6601K-Y61N-04L

WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϴ WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϭ

DDR_VTT_CNTL RC48 1 2 0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Functional Strap Definitions Functional Strap Definitions

Security Classification Compal Secret Data Compal Electronics, Inc.

<26> TBT_FORCE_PWR GPP_D20/DMIC_DATA0

GPP_B14 (Internal Pull Down): SPKR

Pin Name Micron 4GB

Security Classification Compal Secret Data Compal Electronics, Inc.

TC7SH08FU_SSOP5 RH45 1 2 PCH_SRTCRST#

PCH_RSMRST#_R RH67 1 @ 2 0_0402_5% PCH_DPWROK_R

UH3 SIO_SLP_S5# @ TC2

<22,55> VR_ON B PCH_PWROK SIO_SLP_WLAN#

R03_0622 Del RC286,RC287 change power rail to +3V_TS

DDR_CHA_EN @ RH61 1 2 SHORT PADS

RC202 1 2 49.9K_0201_1% SIO_EXT_WAKE#

RC200 1 2 49.9K_0201_1% UART2_RXD

RC7 1 2 10K_0201_5% SIO_EXT_SCI# +3V_PCH

KB_DET# RC273 1 2 10K_0201_5%

Functional Strap Definitions Functional Strap Definitions

Security Classification Compal Secret Data Compal Electronics, Inc.

USB_OC0# RH122 1 2 10K_0201_5%

PCH_GPP_E8 RH135 1 2 10K_0201_5%

USB_ID RH153 1 2 1K_0201_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

+1.2V_DDR SKYLAKE_ULX +0.85VS_VCCIO

+1.2V_VCCPLL_OC +1.0V_VCCST +1.0V_VCCPLL +1.0VS_VCCSTG

Security Classification Compal Secret Data Compal Electronics, Inc.

0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0402_25V6 1U_0402_6.3V6K 0.1U_0201_10V6K CC169 0.1U_0201_10V6K 1U_0402_6.3V6K 0.1U_0402_25V6

+1.0VA_GATE RC161 +3V_PCH RC156

0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K 0.1U_0201_10V6K

0.1U_0201_10V6K 0.1U_0201_10V6K 22U_0603_6.3V6M

+VCC_CORE +VCC_CORE +VCC_GT +VCC_GT

AT41 VCC 1.5V@24A VCC V41 AE61 VCCGT VCCGT AK47

SVID ALERT SVID CLK

56_0201_5% (To VR)

SOC_SVID_ALERT# 1 2 SVID_ALERT# SOC_SVID_CLK 2 @ 1 SVID_CLK

100_0201_1% (To VR)

Security Classification Compal Secret Data Compal Electronics, Inc.

POWER STATES / WKZdη ^d/Ed/KE h^ϯ͘Ϭ WKZdη ^d/Ed/KE

ŽĂƌĚ / dĂďůĞ

WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϴ WůĂĐĞ ŶĞĂƌ :yWϭ͘ϰϭ

+3VALW +3V_PCH 0LFURQ *

ĞWŽŶŶ RE106 2 @ 1 0_0402_1% 40