ASCLIN

Asynchronous Synchronous Interface

AURIX™ TC3xx Microcontroller Training

V1.0 2020-06
Please read the Important Notice and Warnings at the end of this document
ASCLIN
Asynchronous Synchronous Interface

ATX Pin Highlights

x.y
ARX LIN
Pin
x.y
Provide asynchronous serial communication
ARTS
Port Control with external devices using only data-in,
ACTS SPI
ASCLIN (Master) data-out signals. The focus of the module is
ASCLKO set to fast and flexible communication: either
ASC fast point-to-point or master-to-many slaves
ASLSO
Pin communication using the LIN protocol
x.y

Key Features Customer Benefits

3 in 1 module Customer can use single module for ASC
(UART), LIN and Master SPI applications

Configurable oversampling per bit Choose up to 16 oversampling per bit for

higher accuracy for higher baud rates

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ASCLIN
3 in 1 Module

ASCLKO
ARX
ATX
ASCLIN
ASLSO
ARTS
ACTS

› ASCLIN module supports three different serial protocol standards:

 ASC(UART)
 LIN
 SPI
› Customer can leverage three protocols support without additional hardware
› SPI master is supported with three or four wire approach (with or without slave select
output signal)

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ASCLIN
Configurable oversampling per bit

› Programmable oversampling of 4 Open

Microcontroller 1 drain Microcontroller 2
to 16 times per bit as shown in bus
a) b) c)
figure waveform ASC TX ASC RX

› Programmable sample point 10 11 12 10 11 12

position with respect to the a) Waveform at

oversampling points in the range of the transmitting
module output
0 to 15
› Programmable number of samples b) Waveform on
the open-drain
per bit between 1 or 3 bus

c) Waveform at
the receiving
module input

d) Oversampling of the
receiving module waveform
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0

1 bit 1 bit

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ASCLIN
System integration

› ASCLIN module is integrated to

fASCLINS
provide following benefits: fASCLINF
ARX

 Interrupts signals capable of fERAY

fOSC0 ATX

triggering either CPU or DMA Pin

 Internal loop-back mode for

CLOCK
CONTROL

PORT CONTROL
test functionality ARTS

 Up to 12 ASCLIN channels SPB ASCLIN

ACTS Pin

available with flexible

connections to multiple GPIO
ASCLKO
via multiplexers for
ASLSO
transmission and reception Pin
CPUx

RXSR
respectively IR TXSR
EXSR
DMA

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Application example
LIN

ATX
LIN
ARX

Overview
› Supports all four elementary LIN
transactions including header/response
transmission & reception, as master or
slave
› Supports standard LIN v1.3/2.0/2.1/2.2
and J2602 with collision detection
Advantages
› Auto baud detection
› Optional collision detection
› Bus idle monitoring and wake-up
capabilities
› Stuck at zero/one monitoring for safety

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Application example
ASC

ATX ATX

Standard ARX High- ARX

Speed
ASC
ARTS ASC ARTS

ACTS ACTS

Overview
› Configure UART communications
› Supports baudrates up to 25 MBaud
Advantages
› Extended supports of different sensors
through high-speed ASC extension
› Extension in functionality to support
optional handshaking (RTS/CTS) for
high-speed ASC communication

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Application example
SPI master

SCLKO ASCLKO
SCLKO
ARX ARX
(MRST) ARX Half- (MRST)
4-Wire 3-Wire
(MRST) Duplex
SPI ATS SPI ATS
(MTSR) ATS SPI (MTSR)
ASLSO (MTSR) ASLSO

Overview Advantages
› SPI master configuration for SPI based › Up to 16 bit data width supported
communications in multiple
configurations › Programmable leading & trailing delays

› Support of full and half duplex

› Supports baudrates up to 25 MBaud

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Trademarks
All referenced product or service names and trademarks are the property of their respective owners.

Edition 2020-06 IMPORTANT NOTICE For further information on the product,

Published by The information given in this document shall in no technology, delivery terms and conditions and
Infineon Technologies AG event be regarded as a guarantee of conditions or prices please contact your nearest Infineon
81726 Munich, Germany characteristics (“Beschaffenheitsgarantie”) . Technologies office (www.infineon.com).
With respect to any examples, hints or any typical
© 2020 Infineon Technologies AG. WARNINGS
values stated herein and/or any information
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regarding the application of the product, Infineon
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warranties and liabilities of any kind, including
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Asynchronous_Synchronous_Interface with its obligations stated in this document and
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