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Module 5
Operating System
An operating system (OS) is a software consisting of programs and data, that runs
on computers and manages the computer hardware and provides common
services for efficient execution of various application software.
The Kernel
The kernel is the core of the operating system and is responsible for managing
the system resources and the communication among the hardware and other
system services.
Kernel acts as the abstraction layer between system resources and user
applications. Kernel contains a set of system libraries and services.
For a general purpose OS, the kernel contains different services for handling the
following:
• Process Management
• Primary Memory Management
• File System Management
• I/O System (Device) Management
• Secondary Storage Management
• Protection Systems
• Interrupt Handler
Monolithic Kernel
In monolithic kernel architecture, all kernel services run in the kernel space.
• Here all kernel modules run within the same memory space under a single kernel
thread.
• The tight internal integration of kernel modules in monolithic kernel architecture
allows the effective utilisation of the low-level features of the underlying system.
• The major drawback of monolithic kernel is that any error or failure in any one of
the kernel modules leads to the crashing of the entire kernel application.
• LINUX, SOLARIS, MS-DOS kernels are examples of monolithic kernel.
Microkernel
The microkernel design incorporates only the essential set of Operating System
services into the kernel.
The rest of the Operating System services are implemented in programs known
as 'Servers' which runs in user space.
This provides a 'highly modular design and OS-neutral abstract to the kernel.
Memory management, process management, timer systems and interrupt
handlers are the essential services, which forms the part of the microkernel.
Mach, QNX, Minix 3 kernels are examples for microkernel.
process, a stack for holding the local variables associated with the process and the
code corresponding to the process.
When the process gets its turn, its registers and the program counter register
becomes mapped to the physical registers of the CPU.
From a memory perspective, the memory occupied by the process is
segregated into three regions, namely, Stack memory, Data memory and Code
memory (Fig. 10.5).
Process Management
Process management deals with the creation of a process, setting up the memory
space for the process, loading the process‟s code into the memory space,
allocating system resources, setting up a Process Control Block (PCB) for the
process and process termination/deletion
Threads
A thread is the primitive that can execute code. A thread is a single sequential fl
ow of control within a process. „Thread‟ is also known as lightweight process.
A process can have many threads of execution.
Different threads, which are part of a process, share the same address space;
meaning they share the data memory, code memory and heap memory area.
Threads maintain their own thread status (CPU register values), Program
Counter (PC) and stack.
The memory model for a process and its associated threads are given in Fig. 10.7
If all the sub functions of a task are executed in sequence, the CPU utilization
may not be efficient.
For example, if the process is waiting for a user input, the CPU enters the wait
state for the event, and the process execution also enters a wait state.
Instead of this single sequential execution of the whole process, if the task/process
is split into different threads carrying out the different sub functionalities of the
process, the CPU can be effectively utilized and when the thread corresponding
to the I/O operation enters the wait state, another threads which do not require
the I/O event for their operation can be switched into execution
The multithreaded architecture of a process can be better visualized with the
thread-process diagram shown in Fig. 10.8.
Use of multiple threads to execute a process brings the following advantage.
o Better memory utilisation. Multiple threads of the same process share the
address space for data memory. This also reduces the complexity of inter
thread communication since variables can be shared across the threads.
o Since the process is split into different threads, when one thread enters a
wait state, the CPU can be utilised by other threads of the process that do
not require the event, which the other thread is waiting, for processing.
This speeds up the execution of the process.
o Efficient CPU utilisation. The CPU is engaged all time.
Thread Pre-emption
Thread pre-emption is the act of pre-empting the currently running thread
(stopping the currently running thread temporarily).
Thread pre-emption ability is solely dependent on the Operating System. Thread
pre-emption is performed for sharing the CPU time among all the threads.
The execution switching among threads are known as „Thread context switching‟.
Thread context switching is dependent on the Operating system‟s scheduler and
the type of the thread.
When we say „Thread‟, it falls into any one of the following types
User Level Thread
Kernel/System Level Thread
Many-to-One Model
One-to-One Model
Many-to-Many Model
Pre-emptive Scheduling
Employed in systems, which implements preemptive multitasking
Every task in the „Ready‟ queue gets a chance to execute.
When and how often each process gets a chance to execute (gets the CPU time)
is dependent on the type of preemptive scheduling algorithm used for scheduling
the processes
The scheduler can preempt (stop temporarily) the currently executing
task/process and select another task from the „Ready‟ queue for execution
When to pre-empt a task and which task is to be picked up from the „Ready‟
queue for execution after preempting the current task is purely dependent on the
scheduling algorithm
Pradeepkumar SK | Dept. of ECE, KIT, Tiptur 11
Embedded System 18EC62 [MODULE 5: RTOS AND IDE FOR EMBEDDED SYSTEM DESIGN]
Task Communication :
A shared memory is an extra piece of memory that is attached to some address
spaces for their owners to use. As a result, all of these processes share the same
memory segment and have access to it.
Consequently, race conditions may occur if memory accesses are not handled
properly. The following figure shows two processes and their address spaces.
The yellow rectangle is a shared memory attached to both address spaces and
both process 1 and process 2 can have access to this shared memory as if the
shared memory is part of its own address space.
In some sense, the original address spaces is "extended" by attaching this shared
memory.
Pipes
„Pipe‟ is a section of the shared memory used by processes for communicating.
Pipes follow the client-server architecture.
A process which creates a pipe is known as a pipe server and a process which
connects to a pipe is known as pipe client.
A pipe can be considered as a conduit for information flow and has two
conceptual ends.
It can be unidirectional, allowing information flow in one direction or
bidirectional allowing bi-directional information flow.
A unidirectional pipe allows the process connecting at one end of the pipe to
write to the pipe and the process connected at the other end of the pipe to read
the data, whereas a bi-directional pipe allows both reading and writing at one end.
The unidirectional pipe can be visualized as
Message Passing
Message passing is an (a)synchronous information exchange mechanism used for
Inter Process/Thread Communication.
The major difference between shared memory and message passing technique is
that, through shared memory lots of data can be shared whereas only limited
amount of info/data is passed through message passing.
Also message passing is relatively fast and free from the synchronization
overheads compared to shared memory.
Based on the message passing operation between the processes, message passing
is classified into
o Message Queue
Message queues provide an asynchronous communications protocol, meaning that the
sender and receiver of the message do not need to interact with the message queue at
the same time.
Messages placed onto the queue are stored until the recipient retrieves them. Message
queues have implicit or explicit limits on the size of data that may be transmitted in a
single message and the number of messages that may remain outstanding on the queue.
o Mailbox
Mailboxes provide a means of passing messages between tasks for
data exchange or task synchronization.
Using mailboxes achieves synchronization by forcing the calculation
task to wait for new data before it operates.
The data producer puts the data in a mailbox and SENDs it.
The data consumer task calls RECEIVE to check whether there is
new data in the mailbox; if not, RECEIVE calls Pause() to allow
other tasks to execute while the consuming task is waiting for the
new data.
o Signaling
Signals are commonly used in POSIX systems.
Signals are sent to the current process telling it what it needs to do,
such as, shutdown, or that it has committed an exception.
A process has several signal-handlers which execute code when a
relevant signal is encountered.
The ANSI header for these tasks is <signal.h>, which includes
routines to allow signals to be raised and read.
Signals are essentially software interrupts.
It is possible for a process to ignore most signals, but some cannot
be blocked.
Some of the common signals are Segmentation Violation (reading or
writing memory that does not belong to this process), Illegal
Instruction (trying to execute something that is not a proper
instruction to the CPU), Halt (stop processing for the moment),
Continue (used after a Halt), Terminate (clean up and quit), and Kill
(quit now without cleaning up)
The two processes may be on the same system, or they may be on different
systems with a network connecting them.
Racing
A race condition is a situation that may occur inside a critical section.
This happens when the result of multiple thread execution in critical section
differs according to the order in which the threads execute.
A race condition occurs when two or more threads can access shared data and
they try to change it at the same time.
Because the thread scheduling algorithm can swap between threads at any time,
you don't know the order in which the threads will attempt to access the shared
data.
Therefore, the result of the change in data is dependent on the thread scheduling
algorithm, i.e. both threads are "racing" to access/change the data.
The following illustration shows how inconsistent results may be produced if multiple
processes execute concurrently without any synchronization.
Consider-
Two processes P1 and P2 are executing concurrently.
Both the processes share a common variable named “count” having initial
value = 5.
Process P1 tries to increment the value of count.
Process P2 tries to decrement the value of count.
Deadlock:
In a multiprogramming environment several processes may compete for a finite
number of resources.
A process request resources; if the resource is available at that time a process
enters the wait state.
Waiting process may never change its state because the resources requested are
held by other waiting process. This situation is known as deadlock.
In a deadlock process never finish executing and system resources are tied up.
A deadlock situation can arise if the following four conditions hold
simultaneously in a system.
Mutual Exclusion: At a time only one process can use the resources.
If another process requests that resource, requesting process must
wait until the resource has been released.
Hold and wait: A process must be holding at least one resource and
waiting to additional resource that is currently held by other
processes.
No Preemption: Resources allocated to a process can‟t be forcibly
taken out from it, unless it releases that resource after completing
the task.
Circular Wait: A set {P0, P1, …….Pn} of waiting state/ process must
exists such that P0 is waiting for a resource that is held by P1, P1 is
waiting for the resource that is held by P2 ….. P(n – 1) is waiting for
the resource that is held by Pn and Pn is waiting for the resources
that is held by P4.
Functional Requirements
o Processor Support
o Memory Requirements
o Real-time Capabilities
o Kernel and Interrupt Latency
o Inter Process Communication and Task Synchronization
o Modularization Support
o Support for Networking and Communication
o Development Language Support
Non-functional Requirements
o Custom Developed or Off the Shelf
o Cost
o Development and Debugging Tools Availability
o Ease of Use
o After Sales
The commonly used firmware embedding techniques for a non-OS based embedded
system are explained below
The programmer contains a ZIF socket with locking pin to hold the
device to be programmed. The programming device will be under the
control of a utility program running on a PC.
Usually the programmer is interfaced to the PC through RS-
232C/USB/Parallel Port Interface. The commands to control the
It modifies the program code memory under the control of the embedded
application.
Updating calibration data, look-up tables, etc., which are stored in code
memory, are typical examples of IAP.
The Boot ROM resident API instructions which perform various functions
such as programming, erasing, and reading the Flash memory during ISP
mode, are made available to the end-user written firmware for IAP.
Thus it is possible for an end-user application to perform operations on the
Flash memory.
Disassembler
In essence, a disassembler is the exact opposite of an assembler.
Where an assembler converts code written in an assembly language into binary
machine code, a disassembler reverses the process and attempts to recreate the
assembly code from the binary machine code.
Since most assembly languages have a one-to-one correspondence with
underlying machine instructions, the process of disassembly is relatively straight-
forward, and a basic disassembler can often be implemented simply by reading in
bytes, and performing a table lookup.
Many disassemblers have the option to output assembly language instructions in
Intel, AT&T, or (occasionally) HLA syntax.
Decompilers
Decompilers take the process a step further and actually try to reproduce the
code in a high level language.
Frequently, this high level language is C, because C is simple and primitive
enough to facilitate the decompilation process.
Decompilation does have its drawbacks, because lots of data and readability
constructs are lost during the original compilation process, and they cannot be
reproduced.
Since the science of decompilation is still young, and results are "good" but not
"great", this page will limit itself to a listing of decompilers, and a general (but
brief) discussion of the possibilities of decompilation.
Simulators
Simulators simulate the target hardware and the firmware execution can be inspected
using simulators. The features of simulator based debugging are listed below.
1. Purely software based
2. Doesn‟t require a real target system
3. Very primitive (Lack of featured I/O support. Everything is a simulated one)
4. Lack of Real-time behavior
Emulator
In computing, an emulator is hardware or software or both that duplicates (or
emulates) the functions of one computer system (the guest) in another computer
system (the host), different from the first one, so that the emulated behavior
closely resembles the behavior of the real system (the guest).
The above described focus on exact reproduction of behavior is in contrast to
some other forms of computer simulation, in which an abstract model of a system
is being simulated.
For example, a computer simulation of a hurricane or a chemical reaction is not
emulation.
The emulator hardware contains necessary emulation logic and it is hooked to
the debugging application running on the development PC on one end and
connects to the target board through some interface on the other end.
In summary, the simulator „simulates‟ the target board CPU and the emulator
„emulates‟ the target board CPU.
Boundary Scan
Boundary scan is a technique used for testing the interconnection among the
various chips, which support JTAG interface, present in the board.
Chips which support boundary scan associate a boundary scan cell with each pin
of the device.
The boundary scan cell is a multipurpose memory cell.
The boundary scan cell associated with the input pins of an IC is known as „input
cells‟ and the boundary scan cells associated with the output pins of an IC is
known as „output cells‟.
The boundary scan cells can be used for capturing the input pin signal state and
passing it to the internal circuitry, capturing the signals from the internal circuitry
and passing it to the output pin, and shifting the data received from the Test Data
In pin of the TAP.
The boundary scan cells associated with the pins are interconnected and they
form a chain from the TDI pin of the device to its TDO pin.
The boundary scan cells can be operated in Normal, Capture, Update and Shift
modes.
Boundary Scan Description Language (BSDL) is used for implementing
boundary scan tests using JTAG.
BSDL provides information on how boundary scan is implemented in an
integrated chip.
The BSDL file is used as the input to a Boundary Scan Tool for generating
boundary scan test cases for a PCB.
Automated tools are available for boundary scan test implementation from
multiple vendors.