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Custom single-purpose processor basic

model
… …

external external
control data controller datapath
inputs inputs
… …
datapath next-state registers
control and
controller inputs datapath control
logic

datapath
control state functional
outputs register units
… …
external external
control data
outputs outputs
… …

controller and datapath a view inside the controller and datapath

Embedded Systems Design: A Unified 10


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Example: greatest common divisor
!1
(a) black-box 1:
(c) state
• First create algorithm view 1 !(!go_i) diagram
2:

• Convert algorithm to go_i x_i y_i


2-J:
!go_i

“complex” state machine GCD


3: x = x_i
d_o
– Known as FSMD: finite- 4: y = y_i
state machine with datapath (b) desired functionality
5: !(x!=y)
– Can use templates to 0: int x, y; x!=y
1: while (1) {
perform such conversion 2: while (!go_i);
6:
x<y !(x<y)
3: x = x_i;
7: y = y -x 8: x = x - y
4: y = y_i;
5: while (x != y) {
6-J:
6: if (x < y)
7: y = y - x;
else 5-J:

8: x = x - y; 9: d_o = x
}
9: d_o = x; 1-J:
}

Embedded Systems Design: A Unified 11


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
State diagram templates

Assignment statement Loop statement Branch statement


a=b while (cond) { if (c1)
next statement loop-body- c1 stmts
statements else if c2
} c2 stmts
next statement else
other stmts
next statement

!cond
a=b C: C:
cond c1 !c1*c2 !c1*!c2

next loop-body-
c1 stmts c2 stmts others
statement statements

J: J:

next next
statement statement

Embedded Systems Design: A Unified 12


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Creating the datapath
• Create a register for any 1:
!1

1 !(!go_i)
declared variable 2:
x_i y_i
!go_i
• Create a functional unit for 2-J:
x_sel
Datapath

each arithmetic operation 3: x = x_i


y_sel
n-bit 2x1 n-bit 2x1

x_ld

• Connect the ports, registers 4: y = y_i 0: x 0: y


y_ld

and functional units 5: !(x!=y)


!= < subtractor subtractor
x!=y
– Based on reads and writes 6:
5: x!=y
x_neq_y
6: x<y 8: x-y 7: y-x

x<y !(x<y)
– Use multiplexors for 7: y = y -x 8: x = x - y
x_lt_y
d_ld
9: d

multiple sources 6-J:


d_o

• Create unique identifier 5-J:

– for each datapath component 9: d_o = x

control input and output 1-J:

Embedded Systems Design: A Unified 13


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Creating the controller’s FSM
!1 go_i
1:

1 !(!go_i)
Controller
0000 1:
!1 • Same structure as FSMD
2:
!go_i
0001 2:
1 !(!go_i)
• Replace complex
!go_i
2-J:
0010 2-J: actions/conditions with
3: x = x_i x_sel = 0
0011 3: x_ld = 1
datapath configurations
4: y = y_i
y_sel = 0 x_i y_i
0100 4: y_ld = 1
!(x!=y)
Datapath
5: !x_neq_y
0101 5: x_sel
x!=y n-bit 2x1 n-bit 2x1
x_neq_y y_sel
6: 0110 6:
x_ld
x<y !(x<y) x_lt_y !x_lt_y 0: x 0: y
y_ld
7: y = y -x 8: x = x - y 7: y_sel = 1 8: x_sel =1
y_ld = 1 x_ld = 1

6-J: 0111 1000


!= < subtractor subtractor
1001 6-J:
5: x!=y 6: x<y 8: x-y 7: y-x
5-J: x_neq_y
1010 5-J:
x_lt_y 9: d
9: d_o = x 1011 9: d_ld = 1
d_ld

1-J: 1100 1-J: d_o

Embedded Systems Design: A Unified 14


Hardware/Software Introduction, (c) 2000 Vahid/Givargis
Splitting into a controller and datapath
go_i

Controller implementation model Controller !1


0000 1: x_i y_i
go_i
x_sel 1 !(!go_i) (b) Datapath
Combinational y_sel 0001 2:
logic !go_i x_sel
x_ld n-bit 2x1 n-bit 2x1
y_ld 0010 2-J: y_sel
x_neq_y x_sel = 0 x_ld
0011 3: x_ld = 1 0: x 0: y
x_lt_y y_ld
d_ld
y_sel = 0
0100 4: y_ld = 1
!= < subtractor subtractor
x_neq_y=0 5: x!=y 6: x<y 8: x-y 7: y-x
0101 5: x_neq_y
Q3 Q2 Q1 Q0 x_neq_y=1
0110 6: x_lt_y 9: d
State register d_ld
x_lt_y=1 x_lt_y=0
I3 I2 I1 I0
7: y_sel = 1 8: x_sel =1 d_o
y_ld = 1 x_ld = 1
0111 1000
1001 6-J:

1010 5-J:

1011 9: d_ld = 1

1100 1-J:

Embedded Systems Design: A Unified 15


Hardware/Software Introduction, (c) 2000 Vahid/Givargis

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