Manrique, Angelo Lann P

BSCS 2B

COMPARC ASS.#3

Breakdown step by step:

1. Load RAM data into the accumulator at address 0H:

Mnemonic: LDA 0H

Opcode: 3A 00 00

2. Add RAM data from address 3B9H to the accumulator:

Mnemonic: ADD 3B9H

Opcode: 86 B9 03

3. Add RAM data from address 185 to the accumulator:

Mnemonic: ADD 185H

Opcode: 86 B9 03

4. Add RAM data from address 276 to the accumulator:

Mnemonic: ADD 276H

Opcode: 86 B9 03

5. Subtract RAM data from address 36 from the accumulator:

Mnemonic: SUB 36H

Opcode: 94 36 00

6. Subtract RAM data from address 20 from the accumulator:

Mnemonic: SUB 20H

Opcode: 94 20 00

7. Load accumulator data into the output register:

Mnemonic: OUT

Opcode: A2 00 00

8. Stop processing:

Mnemonic: HLT
Opcode: 00Clock: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

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LDA 0H | OPCODE (3A 00 00) | DATA FROM RAM | ACC <- DATA |

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ADD 3B9H | OPCODE (86 B9 03) | DATA FROM RAM | ACC <- ACC + DATA |

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ADD 185H | OPCODE (86 B9 03) | DATA FROM RAM | ACC <- ACC + DATA |

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ADD 276H | OPCODE (86 B9 03) | DATA FROM RAM | ACC <- ACC + DATA |

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SUB 36H | OPCODE (94 36 00) | DATA FROM RAM | ACC <- ACC - DATA |

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SUB 20H | OPCODE (94 20 00) | DATA FROM RAM | ACC <- ACC - DATA |

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OUT | OPCODE (A2 00 00) | ACC (Output) | Output Register <- ACC |

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HLT | OPCODE (00) | Stop Processing |

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