IRCC Award Talk

Si Quantum Dots for Solar Cell Applications

18th Aug. 2010

Chetan S. Solanki

Department of Energy Science and Engineering

Indian Institute of Technology

Acknowledgements
Dr. Ashish Panchal Dharmendra Rai Paresh Kale Dr. Pravin Narwankar, Applied Materials

Department of Energy Science and Engineering Applied Materials Nano-electronics Project My family

Contents
Solar PV scenario: World and India Why Si nanomaterials? - Solar PV potential, Cost and efficiency Si quantum dots for solar cells - All-Si multi-junction cells - Obtaining Si QDs: HWCVD and Porous Si - Results and Analysis Conclusion and future work

Chetan S Solanki, IIT Bombay

Generation of Power with Solar Cell

A Solar cell is a device that convert light into electricity
Metal contact

It requires
- Absorption of a photon - Separation of a electron-hole pair - Collection of the charges at electrodes
P-N Jn separation force Metal contact

Sun light as input energy No moving parts, long life, moderate efficiency Solar cell are being manufactured since 1954

Solar Energy Potential in India

300 days of clear sky average 2000 kWh/m2/year Our capita energy consumption is about 600 kWh/capita/year

Indias annual energy consumption is about 4 trillion kWh/year

Indias solar energy resource is 5000 trillion kWh/year Characteristics of Solar PV technologies are: - Clean, maintenance free - Modular - Distributed generation

Worldwide PV Module Production

PV market is growing with over 35% rate since last decade Learning curve for PV is -18%

Solar PV in India
Current cell and module manufacturing capacity is about 400 and 750 MWp respectively

Jawaharlal Nehru National Solar Mission (JNNSM) has been announced to promote solar PV electricity generation in India SIPS scheme for promoting solar PV manufacturing in India

Target is to install 20,000 MW of Solar power in India by 2022 stirred lot of activities in the country The Mission document mentions NCPRE at IIT Bombay:
setting up of a National Centre for Photovoltaic Research & Education at IIT Bombay, drawing upon its Department of Energy Science & Engineering and its Centre of Excellence in Nanoelectronics
Chetan S Solanki, IIT Bombay

Solar PV Module Prices

Cost of conventional power is ~1$/Watt Solar PV technology is expensive

Si Shortage

Source: www.solarbuzz.com

Price fluctuation due to demand-supply balance, increase in production volume

Challenges to PV Technologies
Technology Attributes Features
High price per unit watt (high 1.5 to 4 $ / Watt, should be cost of material) about 1$/Watt Moderate efficiencies Availability of material Long term stability 14 to 16% for c-Si, 6 to 9% for thin film, higher is better Should be abundant Minimum acceptable life is 25 years

Long energy pay back period 2 to 3 years for c-Si, < 1 year (high processing cost) for thin-film, should be low Long money pay back period Depends on region, 5 to 12 years

Efficiency and Cost

I Im Isc
X
er ow P

Pm

Efficiency is defined as the ratio of energy output from the solar cell to input energy from the sun.

Vm Voc

Voc I sc FF Efficiency = Pin

Raw material cost, cell and module processing

$ m 2 = Production cost Cost = = Efficiency Watt Watt 2 m

Chetan S Solanki, IIT Bombay

Quality of material, technology understanding, cell size

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Photovoltaic Generations: 1st, 2nd & 3rd

US$0.10/W US$0.20/W 100 US$0.50/W

80

Efficiency, %

60 40 20

US$1.0/W

III

II
0 100 200

I
300 400 500

US$3.50/W

Cost, US$/m2

Ref: M.A Green, Progress In Photovoltaics, 9 (2000) 123.

1st generation: Si wafer based technologies 2nd generation: Thin-film technologies 3rd generation: Advanced nanostructure based concepts
Chetan S Solanki, IIT Bombay

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Si is good but expensive

How to minimize Si consumption?

Chetan S Solanki, IIT Bombay

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Si is Expensive
Solid
Metallurgic al grade Si (MGS)

Liquid
Melting

Solid Coal

Quarzite
H2

Initial Reaction
HCl

Gas
Cholorosilanes

Separation and purification

Gas
Pure SiHCl3 Deposit solid Si

Solid
Grow single crystal EGS ingot

Solid
Si wafers
Chetan S Solanki, IIT Bombay

Liquid
13

Pure poly -EGS Pure poly -EGS

Approaches to Si PV cost reduction

High cost due to large volume consumption of high purity material

Si

Concent rators

Thin film C-Si Nanostructures of Si

Chetan S Solanki, IIT Bombay

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Contents
Why Si nanomaterials - Solar PV potential - Cost and efficiency Si nanomaterials for solar cells - All-Si multi-junction cells - Obtaining Si QDs: HWCVD and Porous Si - Results and Analysis Conclusion and future work

Chetan S Solanki, IIT Bombay

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Concept of multi-junction cells

How to obtain higher efficiency?

Chetan S Solanki, IIT Bombay

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Single junction cells are inefficient

Required work

200 J
Chetan S Solanki, IIT Bombay

100 J

50 J

100 J
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Single junction cells are inefficient

Electrons

Photon Eff .

Eg

Work done = Photon energy

Holes

Photon efficiency is different for different energy Losses in energy conversion inefficient utilization of solar spectrum 23% 1-transmission, 4- contact losses 33% 2-thermalization, 5. recombination losses
Chetan S Solanki, IIT Bombay

3-junctionn loss

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Strategies for higher efficiency

Approach- I Band gap matching with spectrum (splitting spectrum over several materials/cells) tandem cells intermediate band cells
1.5 1.0

Approach- II: Reduced thermalization losses (adopting one host material for solar spectrum) hot electron cells

(Adopting Solar spectrum for one host material) up- and downconversion

Sunlight intensity (kW/m2/m)

Approach- III: Reshaping the solar spectrum

Multi-junction cell approach

0.5

0.5

Wavelength (m)

1.5

2.5

Chetan S Solanki, IIT Bombay

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All Si Multi-junction solar cells

How to change band gap?

Chetan S Solanki, IIT Bombay

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Quantum confinement and Band gap

Quantum confinement occurs when the crystal size becomes less than the Bhor exciton radius (4.9 nm for Si)

Effective band gap

Si

Si

Si

SiO2, SiN, SiC could be used as possible dielectric matrix

Band gap of the Si QD depends on size of the dots and quantum confinement parameter
Chetan S Solanki, IIT Bombay

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Si-QDs for PV applications

Wide band gap material Si-QD

8m Te = 16 exp E d h2
Tunneling Probability

Top cell

Middle cell

c-Si cell

k E g (eV ) = E g (bulk ) + 2 d
Band gap variation

2 eV

1.5 eV

1.1 eV

Multi-junction solar cell of Si with control over Si-QD size is possible Theoretical efficiency of triple junction cell is about 64%
Chetan S Solanki, IIT Bombay

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Two approaches for obtaining Si QDs:

-

Porous Si Thin film deposition (HWCVD)

Si QDs using porous Si

Top down approach

Chetan S Solanki, IIT Bombay

Porosity, HF conc. & Current Density

Porosity (p) as a function of HF conc. and current density Provides control over size of nanoparticles

75

HF 10%

HF

HF

Porosity (%)

H2

HF solution

x=0

12.5%

55
HF

16.6%
HF

25%

ft(t)

35 15

35%

x Silicon

50

100

150

Current Density (mA/cm2)

Larger porosity results in smaller Si particle size

Chetan S Solanki, IIT Bombay

Porous Silicon (PS) Thin Films

Porous Silicon films between 5 to 15 micrometers are obtained

Current J Density 2 (mA / cm2)

J1

Pore diameter can be from nano-meter to micro-meter range

t1 t2 Time (min or sec)

Use of heavily doped P-type Si results in nano-porous Si

Pores

Chetan S Solanki, IIT Bombay

TEM results
Plan is: Dispersion of Si particle in suitable dielectric Spinning on substrate to deposit Si-QD layer

2 Hr Sonication. Particle size in range of 10nm. Control over particle size Distribution of particles
100 nm
Chetan S Solanki, IIT Bombay

Si Quantum dots using HWCVD

Bottom up approach (Structural and optical characterization)

Chetan S Solanki, IIT Bombay

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Hot Wire CVD

silane If 5 cm ammonia hot filament

substrate Principle of HWCVD

Wafer size 2 inch Room temperature to 800oC Up to 2000oC SiH4, NH3, H2, B2H6, N2 Up to 10-7 mbar Substrate temperature Filament temperature Gases Chamber pressure

SiH4 & NH3 cracked at hot filament

Gas utilization: ~10% in PECVD ~80% in HWCVD Deposition rate as high as 2 nm/sec
Chetan S Solanki, IIT Bombay

Distance between filament and 3-5 cm substrate

Variation in HWCVD parameters

Deposition of Si-nS with variation in parameters to : Substrate temperature SiH4 & NH3 gas flow rate Deposition time to see the effects in Si-nS size With increasing above parameters, the Si-nS size expected to increase
Depo. parameters Basic Pressure Gas pressure Filament Temp. Substrate Temp. Gas Flow Dep. Time SiNx deposition ~ 10-6 mbar ~ 10-2 mbar 1900oC 250oC 1:20 sccm (SiH4:NH3) 75 sec Si-nS deposition ~ 10-6 mbar ~ 10-3 mbar 1900oC 200-400-600-650-700-750oC 1-2-4 sccm (SiH4) 60-40-20 sec

Superlattice of SiNx/a-Si
Using the optimized conditions 40 alternate layers of SiNx and a-Si are deposited 1 deposition takes about 5 hr A novel deposition technique is developed where the flow of NH3 is interrupted for pre-determined time a-Si SiNx 40 layers a-Si SiNx a-Si SiNx Substrate
Chetan S Solanki, IIT Bombay

a-Si SiNx Annealing 40 layers a-Si a-Si SiNx SiNx Substrate

Effect of annealing Temp.:

1st order Raman spectra
Annealing temperature of sample (oC) As-deposited 800 850 900 950 a-Si peak position (cm-1) Si-QD peak position (cm-1) Intensity ratio for 2nd order Raman spectra 0.52 0.61 0.83 0.88

482 495 498 500 disappeared

505 507 509 508 making shoulder

With increasing annealing temp. - a-Si phase reduces - Asymmetric shoulder appears

2nd order Raman spectra

With increasing annealing temp. the 2nd order Raman peak for Si increases, shows the growth of Si-QD

Regain c-Si shape & increased intensity

Asymmetric shift & reduced intensity

Chetan S Solanki, IIT Bombay

PL Analysis
With PL presence of quantum dots can be established Room temp. PL performed with He-Cd laser 325 nm PL peak shifts from blue to red wavelength as the Si-QD size increases as annealing temp. increases Estimated band gap between 2.3 to 2.6 eV
Chetan S Solanki, IIT Bombay

PL intensity (a.u.)

TEM analysis
a-Si/SiNx multilayer as-deposited at 250oC and annealed at 850oC for 30 min. 40 alternate layers are deposited Thickness of layers in 4 to 6 nm range Optimized deposition and annealing conditions were used SIMS analysis is done for Si/N variation in layers
Chetan S Solanki, IIT Bombay

TEM: as deposited multilayer

No Si-QD formation as-deposited a-Si/SiNx ML at 250oC

Chetan S Solanki, IIT Bombay

Annealing of ML @850oC

No Si precipitation in SiNx layer after annealing

Si-QD with av. Inter-dot distance < 5 nm annealed a-Si/SiNx multilayer at 850oC
Chetan S Solanki, IIT Bombay

Optimized temp. for Si-QD growth

Annealing of ML @900oC
Inter-dot distance < 1 nm making continuous nC Si film

annealed a-Si/SiNx multilayer at 900oC

Chetan S Solanki, IIT Bombay

Effect of deposition time of a-Si layer

PL A20AS HRTEM No ML At smaller deposition time, there is no continuity in a-Si layers

A20AS A40AS 2.67 eV a-Si ~3.0 nm

A40AS A60AS 2.44 eV a-Si ~3.47 nm

A60AS
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Solar cell with Si-QD/SiNx ML

Front Al Front Al p-type a-Si layer (30 nm) QD QD QD

Solar cell device structure with Si quantum dots Whole device fabricated in HWCVD

i-type Si-QD/SiNx

QD SiNx layer n-Si substrate Back Al

QD

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Cell with A60AS and A60AN850 40 ML

Hydrogenation for 40 min at 420oC after Al contact evaporation 40 Si-QD/SiNx ML 40 Si-QD/SiNx ML V I
oc sc

(mV) 80 70 50 340 90 20

(pA) 6.37 34.3 50 804 1.17 1.23

as-deposited on different devices illuminated

annealed gives no I-V characteristics with illumination

Best cell

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Conclusion and Future Work

Successful formation of less than 10 nm Si dots using PS Successful development of alternate 40 layers of a-Si/SiNx in single HWCVD Formation of Si-QD 3-5 nm with optimized annealing temp. 850 oC No Si-QD formed in as-deposited samples Charge transport increased due to light shining on the device Best cell with 340 mV of open circuit voltage

Effect of band gap enhancement on open circuit voltage is yet to be demonstrated Current transport through quantum dot structure is under investigation

It isn't new energy that will make such a difference in the next millennium. The power to run ... It's new technology that will bring proven ways of generating power ..

Thank you for your

Chetan S Solanki, IIT Bombay

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