GII THIU B PLC CA SIMATIC S7-200

Tng qut v PLC1. Gii thiu PLCPLC vit tt ca Programmable Logic Controller l thit b iu khin lp trnh c (kh trnh) cho php thc hin linh hot cc thut ton iu khin logic thng qua mt ngn ng lp trnh. Ngi s dng c th lp trnh thc hin mt lot trnh t cc s kin. Cc s kin ny c kch hot bi tc nhn kch thch (ng vo) tc ng vo PLC hoc qua cc hot ng c tr nh thi gian nh th hay cc s kin c m. Mt khi s kin c kch hot tht s, n bt ON hay OFF thit b iu khin bn ngoi c gi l thit b vt l. Mt b iu khin lp trnh s lin tc lp trong chng trnh do ngi s dng lp ra ch tn hiu ng vo v xut tn hiu ng ra ti cc thi im lp trnh. khc phc nhng nhc im ca b iu khin dng dy ni ( b iu khin bng Relay) ngi ta ch to ra b PLC nhm tha mn cc yu cu sau: Lp trnh d dng ngn ng lp trnh d hc Gn nh, d dng bo qun, sa cha. Dung lng b nh ln c th cha c nhng chng trnh phc tp. Hon ton tin cy trog mi trng cng nghip. Giao tip c vi cc thit b thng minh khc nh: my tnh, ni mng, cc mi Modul m rng.

 Gi c c th cnh tranh c. Cc thit k u tin l nhm thay th cho cc phn cng Relay dy ni v cc Logic thi gian.Tuy nhin, bn cnh vic i hi tng cng dung lng nh v tnh d dng cho PLC m vn bo m tc x l cng nh gi c Chnh iu ny gy ra s quan tm su sc n vic s dng PLC trong cng nghip. Cc tp lnh nhanh chng i t cc lnh logic n gin n cc lnh m, nh thi, thanh ghi dch sau l cc chc nng lm ton trn cc my ln S pht trin cc my tnh dn n cc b PLC c dung lng ln, s lng I / O nhiu hn. Trong PLC, phn cng CPU v chng trnh l n v c bn cho qu trnh iu khin hoc x l h thng. Chc nng m b iu khin cn thc hin s c xc nh bi mt chng trnh. Chng trnh ny c np sn vo b nh ca PLC, PLC s thc hin vic iu khin da vo chng trnh ny. Nh vy nu mun thay i hay m rng chc nng ca qui trnh cng ngh, ta ch cn thay i chng trnh bn trong b nh ca PLC. Vic thay i hay m rng chc nng s c thc hin mt cch d dng m khng cn mt s can thip vt l no so vi cc b dy ni hay Relay. .a 2. Cu trc, nguyn l hot ng ca PLC .1 Cu trc Tt c cc PLC u c thnh phn chnh l:

 Mt b nh chng trnh RAM bn trong ( c th m rng thm mt s b nh ngoi EPROM ). Mt b vi x l c cng giao tip dng cho vic ghp ni vi PLC. Cc Modul vo /ra. Bn cnh , mt b PLC hon chnh cn i km thm mt n v lp trnh bng tay hay bng my tnh. Hu ht cc n v lp trnh n gin u c RAM cha ng chng trnh di dng hon thin hay b sung. Nu n v lp trnh l n v xch tay, RAM thng l loi CMOS c pin d phng, ch khi no chng trnh c kim tra v sn sng s dng th n mi truyn sang b nh PLC. i vi cc PLC ln thng lp trnh trn my tnh nhm h tr cho vic vit, c v kim tra chng trnh. Cc n v lp trnh ni vi PLC qua cng RS232, RS422, RS458, .2 Nguyn l hot ng ca PLC .i n v x ly trung tam CPU iu khin cc hot ng bn trong PLC. B x l s c v kim tra chng trnh c cha trong b nh, sau s thc hin th t tng lnh trong chng trnh, s ng hay ngt cc u ra. Cc trng thi ng ra y c pht ti cc thit b lin kt thc thi. V ton b cc hot ng thc thi u ph thuc vo chng trnh iu khin c gi trong b nh.

.ii H thng bus H thng Bus l tuyn dng truyn tn hiu, h thng gm nhiu ng tn hiu song song: Address Bus: Bus a ch dng truyn a ch n cc Modul khc nhau. Data Bus: Bus dng truyn d liu. Control Bus: Bus iu khin dng truyn cc tn hiu nh th v iu khin ng b cc hot ng trong PLC. Trong PLC cc s liu c trao i gia b vi x l v cc modul vo ra thng qua Data Bus. Address Bus v Data Bus gm 8 ng, cng thi im cho php truyn 8 bit ca 1 byte mt cch ng thi hay song song. Nu mt modul u vo nhn c a ch ca n trn Address Bus, n s chuyn tt c trnh thi u vo ca n vo Data Bus. Nu mt a ch byte ca 8 u ra xut hin trn Address Bus, modul u ra tng ng s nhn c d liu t Data bus. Control Bus s chuyn cc tn hiu iu khin vo theo di chu trnh hot ng ca PLC. Cc a ch v s liu c chuyn ln cc Bus tng ng trong mt thi gian hn ch. H thng Bus s lm nhim v trao i thng tin gia CPU, b nh v I/O. Bn cch , CPU c cung cp mt xung Clock c tn s t 1 8 MHZ. Xung

ny quyt nh tc hot ng ca PLC v cung cp cc yu t v nh thi, ng h ca h thng. .iii B nh PLC thng yu cu b nh trong cc trng hp: Lm b nh thi cho cc knh trng thi I/O. Lm b m trng thi cc chc nng trong PLC nh nh thi, m, ghi cc Relay. Mi lnh ca chng trnh c mt v tr ring trong b nh, tt c mi v tr trong b nh u c nh s, nhng s ny chnh l a ch trong b nh. a ch ca tng nh s c tr n bi mt b m a ch bn trong b vi x l. B vi x l s gi tr trong b m ny ln mt trc khi x l lnh tip theo. Vi mt a ch mi, ni dung ca nh tng ng s xut hin u ra, qu trnh ny c gi l qu trnh c. B nh bn trong PLC c to bi cc vi mch bn dn, mi vi mch ny c kh nng cha 2000 16000 dng lnh, ty theo loi vi mch. Trong PLC cc b nh nh RAM, EPROM u c s dng.

 RAM (Random Access Memory ) c th np chng trnh, thay i hay xa b ni dung bt k lc no. Ni dung ca RAM s b mt nu ngun in nui b mt. trnh tnh trng ny cc PLC u c trang b mt pin kh, c kh nng cung cp nng lng d tr cho RAM t vi thng n vi nm. Trong thc t RAM c dng khi to v kim tra chng trnh. Khuynh hng hin nay dng CMOSRAM nh kh nng tiu th thp v tui th ln. EPROM (Electrically Programmable Read Only Memory) l b nh m ngi s dng bnh thng ch c th c ch khng ghi ni dung vo c. Ni dung ca EPROM khng b mt khi mt ngun, n c gn sn trong my, c nh sn xut np v cha h iu hnh sn. Nu ngi s dng khng mun m rng b nh th ch dng thm EPROM gn bn trong PLC. Trn PG (Programer) c sn ch ghi v xa EPROM. Mi trng ghi d liu th ba l a cng hoc a mm, c s dng trong my lp trnh. a cng hoc a mm c dung lng ln nn thng c dng lu nhng chng trnh ln trong mt thi gian di. Kch thc b nh: Cc PLC loi nh c th cha t 300 1000 dng lnh ty vo cng ngh ch to.

 Cc PLC loi ln c kch thc t 1K 16K, c kh nng cha t 2000 16000 dng lnh. Ngoi ra cn cho php gn thm b nh m rng nh RAM, EPROM. .iv Cc ng vo ra I / O Cc ng tn hiu t b cm bin c ni vo cc modul ( cc u vo ca PLC ), cc c cu chp hnh c ni vi cc modul ra ( cc u ra ca PLC ). Hu ht cc PLC c in p hot ng bn trong l 5V, tn hiu x l l 12/24VDC hoc 100/240VAC. Mi n v I / O c duy nht mt a ch, cc hin th trng thi ca cc knh I / O c cung cp bi cc n LED trn PLC, iu ny lm cho vic kim tra hot ng nhp xut tr nn d dng v n gin. B x l c v xc nh cc trng thi u vo (ON,OFF) thc hin vic ng hay ngt mch u ra. .3 Cc hot ng x l bn trong PLC .i X l chng trnh Khi mt chng trnh c np vo b nh ca PLC, cc lnh s c trong mt vng a ch ring l trong b nh. PLC c b m a ch bn trong vi x l, v vy chng trnh bn trong b nh s c b vi x l thc hin mt cch tun t tng lnh mt, t u cho n cui chng trnh. Mi ln thc hin chng trnh t u n cui c gi l

mt chu k thc hin. Thi gian thc hin mt chu k ty thuc vo tc x l ca PLC v ln ca chng trnh. Mt chu l thc hin bao gm ba giai on ni tip nhau: 1. u tin, b x l c trng thi ca tt c u vo. Phn chng trnh phc v cng vic ny c sn trong PLC v c gi l h iu hnh. 2. Tip theo, b x l s c v x l tun t lnh mt trong chng trnh. Trong ghi c v x l cc lnh, b vi x l s c tn hiu cc u vo, thc hin cc php ton logic v kt qu sau s xc nh trng thi ca cc u ra. 3. Cui cng, b vi x l s gn cc trng thi mi cho cc u ra ti cc modul u ra. .ii X l xut nhp Gm hai phng php khc nhau dng cho vic x l I / O trong PLC:
1 Cp nht lin tc

iu nay i hi CPU qut cc lnh ng vo (m chng xut hin trong chng trnh ), khong thi gian Delay c xy dng bn trong chc chn rng ch c nhng tn hiu hp l mi c c vo trong b nh vi x l. Cc lnh ng ra c ly trc tip ti cc thit b. Theo hot ng logic ca chng trnh, khi lnh OUT c thc hin th cc ng ra ci li vo n v I / O, v th nn chng vn gi c trng thi cho ti khi ln cp nht k tip.
2 Chuc anh qua trnh xuat nhap

Hu ht cc PLC loi ln c th c vi trm I / O, v th CPU ch c th x l mt lnh mt thi im. Trong sut qu trnh thc thi, trng thi mi ng nhp phi c xt n ring l nhm d tm cc tc ng ca n trong chng trnh. Do chng ta yu cu relay 3ms cho mi ng vo, nn tng thi gian cho h thng ly mu lin tc tr nn rt di v tng theo s ng vo. lm tng tc thc thi chng trnh, cc ng I / O c cp nht ti mt vng c bit trong chng trnh. y, vng RAM c bit ny c dng nh mt b m lu trng thi cc logic iu khin v cc n v I / O. Mi ng vo ra u c mt a ch I / O RAM ny. Sut qu trnh copy tt c cc trng thi vo trong I / O RAM. Qu trnh ny xy ra mt chu k chng trnh (t Start n End ). Thi gian cp nht tt c cc ng vo ra ph thuc vo tng s I/O c copy tiu biu l vi ms. Thi gian thc thi chng trnh ph thuc vo chiu di chng trnh iu khin tng ng mi lnh mt khong t 1 10 s.

PLC SIMATIC S7-200 CPU 214

A Cu trc phn cng ca CPU 214 S7-200 l thit b iu khin logic kh trnh loi nh ca Hng SIEMNS (CHLB c) c cu trc theo kiu Modul v c cc modul m rng. Cc modul ny c s dng cho nhiu ng dng lp trnh khc nhau. Thnh phn c bn ca S7-200 l khi vi x l CPU-214. CPU-214 bao gm 14 ng vo v 10 ng ra, c kh nng thm 7 modul m rng. 2.048 t n (4 Kbyte) thuc min nh c / ghi non-volatile lu chng trnh (vng nh c giao din vi EEPROM). 2.048 t n (4 Kbyte) thuc kiu c ghi lu d liu, trong 512 t u thuc min non-volatile. Tng s ng vo / ra cc i l 64 ng vo v 64 ng ra. 128 Timer chia lm 3 loi theo phn gii khc nhau: 4 Timer 1ms, 16 Timer 10ms v 108 Timer 100ms. 128 b m chia lm 2 loi: ch m tin v va m tin va m li. 688 bt nh c bit dng thng bo trng thi v t ch lm vic. Cc ch x l ngt gm: ngt truyn thng, ngt theo sn ln hoc xung, ngt thi gian, ngt ca b m tc cao v ngt truyn xung.

 3 b m tc cao vi nhp 2Khz v 7 Khz. 2 b pht xung nhanh cho dy xung kiu PTO hoc kiu PWM. 2 b iu chnh tng t Ton b vng nh khng b mt d liu trong khong thi gian 190 gi k t khi PLC b mt ngun cung cp. .a Cc n bo trn S7-200 CPU214 SF (en o): en o SF bao hieu he thong b hong. RUN (en xanh): en xanh RUN ch nh PLC ang che o lam viec va thc hien chng trnh c nap vao trong may. STOP (en vang): en vang STOP ch nh rang PLC ang che o dng chng trnh va ang thc hien lai. Cng vo ra + Ix.x (n xanh): n xanh cng vo bo hiu trng thi tc thi ca cng Ix.x . n ny bo hiu trng thi ca tn hiu theo gi tr Logic ca cng tc. + Qx.x (n xanh): n xanh cng ra bo hiu trng thi tc thi ca cng Qx.x . n ny bo hiu trng thi ca tn hiu theo gi tr logic ca cng. .b Ch lm vic PLC c 3 ch lm vic:

 RUN: cho php PLC thc hin chng trnh tng b nh, PLC s chuyn t RUN sang STOP nu trong my c s c hoc trong chng trnh gp lnh STOP. STOP: Cng bc PLC dng chng trnh ang chy v chuyn sang ch STOP. TERM: Cho php my lp trnh t quyt nh ch hot ng cho PLC hoc RUN hoc STOP. .c Cng truyn thng S7-200 s dng cng truyn thng ni tip RS485 vi phch ni 9 chn phc v cho vic ghp ni vi thit b lp trnh hoc vi cc trm PLC khc. Tc truyn cho my lp trnh kiu PPI l 9600 baud. Tc truyn cung cp ca PLC theo kiu t do l 300 38.400 baud. ghp ni S7-200 vi my lp trnh PG702 hoc cc loi my lp trnh thuc h PG7xx c th dng mt cp ni thng MPI. Cp i km vi my lp trnh. Ghp ni S7-200 vi my tnh PC qua cng RS232 cn c cp ni PC / PPI vi b chuyn i RS232 / RS485. Chn Gii thch .d Cu trc b nh B nh S7-200 c chia thnh 4 vng vi 1 t c nhim v duy tr d liu trong mt khong thi gian nht nh khi mt ngun. B nh S7-200 c tnh nng

ng cao, c, ghi c trong ton vng, loi tr cc bit nh c bit SM (Special memory) ch c th truy nhp EEPROM MIN NH NGOI .1 Vng chng trnh L ngun nh c s dng lu gi cc lnh chng trnh. Vng ny thuc kiu non-volatile c / ghi c. Vng tham s: L min lu gi cc tham s nh: t kha, a ch trm, cng ging nh vng chng trnh, thuc kiu non-volatile c / ghi c. .2 Vng d liu L min nh ng c s dng ct gi cc d liu ca chng trnh. N c th c truy cp theo tng bt, tng byte, tng t n (W-Word) hoc theo t kp (DW_ Double Word), vng d liu c chia thnh nhng min nh nh vi cc cng dng khc nhau. Chng c k hiu bng ch ci u theo t ting Anh, c trng cho cng dng ring ca chng nh sau: V : Variable Memory. I : Input image register.

O : Output image regiter. M : Internal Memory bits. SM : Special Memory bits.

Tt c cc min ny u c th truy nhp theo tng bt, tng byte, tng t (word) hoc t kp (double word). .3 Vng i tng Bao gm cc thanh ghi Timer, b m tc cao, b m vo ra, thanh ghi AC. Vng ny khng thuc kiu Non-Volatile nhng c / ghi c. .e M rng cng vo ra CPU 214 cho php m rng nhiu nht 7 Modul. Cc modul m rng tng t v c th m rng cng vo ca PLC bng cch ghp ni thm vo n cc modul m rng v pha bn phi ca CPU, lm thnh mt mc xch. a ch ca cc v tr ca cc modul c xc nh cng kiu. V d nh mt modul cng ra khng th gn a ch ca mt modul cng vo, cng nh mt modul tng t khng th c a ch nh mt modul s v ngc li. Cc modul m rng s hay tng t u chim ch trong b m, tng t vi s u vo/ra ca modul. Sau y l a ch ca mt s modul m rng trn CPU214
Modul 0 CPU214 4vo/4a Modul 1 8 vo Modul 2 3vo/1a Analog Modu3 8 ra Modul 4 3vo/1a

I0.0 Q0.0 I0.1 Q0.1 I0.2 Q0.2 I0.3 Q0.3 I0.4 Q0.4 I0.5 Q0.5 I0.6 Q0.6 I0.7 Q0.7 I1.0 Q1.0 I1.1 Q1.1 I1.2 I1.3 I1.4 I1.5

I2.0 I2.1 I2.2 I2.3 Q2.0 Q2.1 Q2.2 Q2.3

I3.0 I3.1 I3.2 I3.3 I3.4 I3.5 I3.6 I3.7

AIW 0 AIW 2 AIW 4

Q3.0 Q3.1 Q3.2 Q3.3 Q3.4

AIW8 AIW12 AQW 4

AQW 0

Q3.5 Q3.6 Q3.7

.f Cu trc chng trnh ca S7-200 C th c lp trnh cho PLC S7-200 bng cch s dng mt trong cc phn mm: Step 7 Micro / Dos Step 7 Micro / Win Nhng phn mm ny u c th ci t c trn cc my lp trnh h PG 7xx v cc my tnh c nhn. Cac chng trnh cho S7-200 phi c cau truc bao gm chng trnh chnh (main program) v sau en cac chng trnh con v cac chng trnh x l ngat. Chng trnh chnh c kt thc bng lnh kt thc chng trnh (MEND). Chng trnh con l mt b phn ca chng trnh, cc chng trnh phi c vit sau lnh kt thc chng trnh l lnh MEND. Cc chng trnh x l ngt cng l mt b phn ca chng trnh. Nu cn s dng phi vit sau lnh kt thc chng trnh chnh (MEND). Cc chng trnh c nhm li thnh mt nhm ngay sau chng trnh chnh, sau n cc chng trnh x l ngt. Cng c th do trn ln cc chng trnh con v chng trnh x l ngt sau chng trnh chnh
Thc hin chng trnh ca S7-200

+ PLC thc hin chng trnh theo chu k lp. Mi vng lp c gi l vng qut (scan). Mi vng qut c bt u bng giai on c cc d liu t cc cng vo vng b m o, tip theo l giai on thc hin chng trnh. Trong tng vng qut, chng trnh c thc hin bng lnh u tin v kt thc ti lnh kt thc MEND. Sau giai on thc hin chng trnh l giai on truyn thng ni b v kim li. Vng qut c kt thc bng giai on chuyn cc ni dung ca b m o ti cc cng ra. + Nh vy ti thi im thc hin lnh vo / ra thng thng lnh khng lm vic trc tip cng vo ra m ch thng qua b m o ca cng trong vng nh tham s. Vic truyn thng gia b m o vi ngoi vi trong cc giai on (1) v (4) do CPU qun l. Khi gp lnh vo / ra ngay lp tc h thng s cho dng mi cng vic khc, ngay c chng trnh x l ngt thc hin lnh ny trc tip vi cng vo v ra. Nu s dng cc ch ngt chng trnh tng ng vi tng tn hiu ngt c son tho v ci t nh mt b phn ca chng trnh. Chng trnh x l ngt ch c thc hin trong vng qut khi xut hin tn hiu bo ngt v c th xy ra bt c im no trong vng qut. .g Cc ton hng lp trnh c bn C 6 phn t lp trnh c bn, mi phn t c cng dng ring. d dng xc nh th mi phn t c gn cho m k t: I: Dung ch ngo vo vat ly noi trc tip vao PLC. Q : Dng ch ng ra vt l ni trc tip t PLC. T: Dng xc nh phn t nh thi c trong PLC.

 C : Dng xc nh phn t m c trong PLC. M v S: Dng nh cc c hot ng nh bn trong PLC. Tat ca cc phan t (toan hang) trn co hai trang thi ON hoc OFF (1 hoc 0). Cun dy c th c dng iu khin trc tip ng ra t PLC (nh phn t Q) hoc c th iu khin b nh th, b m hoc c (nh phn t M, S). Mi cuc dy c gn vi cc cng tc. Cc cng tc ny c th l thng m hoc thng ng. Cc ng vo vt l ni n b iu khin lp trnh (phn t I) khng c cun dy lp trnh. Cc phn t ny ch c th dng dng cc cng tc m thi (loi thng ng v thng m). B NGON NG LAP TRNH CUA S7-200 CPU 214 + Phng php lp trnh S7-200 biu din mt mch logic cng bng mt dy cc lnh lp trnh. Chng trnh bao gm mt dy cc tp lnh. S7-200 thc hin chng trnh bt u t lnh lp trnh u tin v kt thc lp trnh cui trong mt vng qut (scan). + Mt vng qut (scan cyele) c bt u bng mt vic c trng thi ca u vo, v sau thc hin chng trnh. Vng qut kt thc bng vic thay i trng thi u ra. Trc khi bt u mt vng qut tip theo S7-200 thc thi cc nhim v bn trong v nhim v truyn thng. Chu trnh thc hin chng trnh l chu trnh lp.

+ Cch lp trnh cho S7-200 ni ring v cho cc PLC ni chung da trn hai phng php c bn. Phng php hnh thang (Ladder, vit tt l LAD) v phng php lit k lnh (Statement list, vit tt l STL). + Nu c mt chng trnh vit di dng LAD, thit b lp trnh s t dng to ra mt chng trnh theo dng STL tng ng. Ngc li khng phi mi chng trnh vit di dng STL u c th chuyn sang c dng LAD. .a Phng php hnh thang (LAD): LAD l mt ngn ng lp trnh bng ha, nhng thnh phn c bn dng trong LAD tng ng vi cc thnh phn ca bng iu khin bng r le. Trong chng trnh LAD, cc phn t c bn dng biu din lnh logic nh sau: Tiep iem: La bieu tng (Symbol) mo ta cac tiep iem cua r le + Tiep iem thng m + Tiep iem thng ong Cun dy (coil): L biu tng ( ) m t r le c mc theo chiu dng in cung cp cho r le. Hp (Box): L biu tng m t cc hm khc nhau, n lm vic khi c dng in chy n hp. Nhng dng hm thng c biu din bng hp l cc b thi gian (Timer), b m (counter) v cc hm ton hc. Cun dy v cc hp phi mc ng chiu dng in. Mng LAD: L ng ni cc phn t thnh mt mch hon thin, i t ng ngun bn tri sang ng ngun bn phi. ng ngun bn tri l dy

pha, ng ngun bn phi l dy trung ha v cng l ng tr v ngun cung cp (thng khng c th hin khi dng chng trnh tin dng STEPT MICRO / DOS hoc STEPT MICRO/WIN. Dng in chy t tri qua tip im n ng cc cun dy hoc cc hp tr v bn phi ngun. .b Phng php lit k lnh (STL): L phng php th hin chng trnh di dng tp hp cc cu lnh. Mi cu lnh trong chng trnh, k c nhng lnh hnh thc biu din mt chc nng ca PLC. .c Cc ton hng v gii hn cho php ca CPU 214
Phng php truy nhp Truy nhp bit (a ch byte, ch s bit) Gii hn cho php ca cc ton hng V (0.0 4095.7) I (0.0 7.7) Q (0.0 7.7) M (0.0 31.7) SM (0.0 85.7) T (0 127) C (0 127) Truy nhp bit VB (0 4.095) IB (0 7) MB (0 31). SMB (0 85) AC (0 3) Hng s Truy nhp t n VW (0 4094)

T (0 127) C (0 127) IW (0 6) QW (0 6) MW (0 30) SMW (0 84) AC (0 3) AIW (0 30) AQW (0 30) Hng s Truy nhp t kp VD (0 4092) ID (0 4) QD (0 4) MD (0 28) SMD (0 82) AC (0 3) HC (0 2) Hng s.

.d Mt s lnh c bn dng trong lp trnh .1 Cc lnh vo ra .i Load (LD): Lnh LD np gi tr logic ca mt tip im vo trong bt u tin ca ngn xp (xem hnh a), cc gi tr c cn li trong ngn xp b y li xung mt bt. .ii Load Not (LDN):

Lnh LDN np gi tr logic nghch o ca mt tip im vo trong bt u tin ca ngn xp (xem hnh b), cc gi tr cn li trong ngn xp b y li xung mt bt. Trc LD Sau
c0 c1 c2 c3 c4 c5 c6 c7 c8 M c0 c1 c2 c3 c4 c5 c6 B y ra khi ngn xp c7

Hnh a: Trng thi ca ngn xp trc v sau khi thc hin lnh LD Trc LDN Sau
c0 c1 c2 c3 c4 c5 c6 m c0 c1 c2 c3 c4 c5

c7 c8

c6 c7

B y ra khi ngn xp Hnh b: Trang thi ca ngn xp trc v sau khi thc hin lnh LDN. Cc dng khc nhau ca lnh LD, LDN cho LAD nh sau:
LAD LD n M t Tip im thng m s c ng nu n = 1. Tip im thng ng s m khi n = 1. Tip im thng m s ng tc thi khi n = 1 Tip im thng ng s m tc thi khi n = 1 n: I Ton hng n: I, Q, M, SM, T, C, V (bit)

LDN n

LDI n

LDNI n

Cac dang khac nhau cua lenh LD, LDN cho STL nh sau:
Lnh LD n M t Lnh np gi tr logic ca im n vo bt u tin trong ngn xp. Lnh np gi tr logic nghch o ca im n vo bt u tin trong ngn xp. Ton hng n (bt): I, Q, M, SM, T, C, V

LDN n

LDI n

Lnh np tc thi gi tr logic ca im n vo bt u tin trong ngn xp. Lnh np tc thi gi tr logic nghch o ca im n vo bt u tin trong ngn xp.

n: I

LDNI n

.iii OUTPUT (= ) Lenh sao chep noi dung cua bt au tien trong ngan xep vao bt c ch nh trong lenh. Noi dung cua ngan xep khong b thay oi. M t lnh bng LAD nh sau:
LAD n () n () () M t Cun dy u ra trng thi kch thch khi c dng iu khin i qua. Cun dy u ra c kch thch tc thi khi c dng iu khin i qua. Ton hng n: I, Q, M, SM, T, C, V (bt) n: Q (bt)

M t bng lnh STL nh sau:

STL =n M t Lnh = sao chp gi tr ca nh ngn xp ti tip im n c ch dn trong lnh. Lnh = I (immediate) sao chp tc thi gi tr ca nh Ton hng n: I, Q, M, SM, T, C, V (bt) n: Q (bt)

=In

stack ti tip im n c ch dn trong lnh.

.2 .3 Cc lnh ghi / xa gi tr cho tip im .i SET (S) ; RESET (R): Lnh dng ng v ngt cc im gin on c thit k. Trong LAD, logic iu khin dng in ng hoc ngt cc cuc dy u ra. Khi dng iu khin n cc cuc dy th cc cun dy ng hoc m cc tip im (hoc mt dy cc tip im). Trong STL, lnh truyn trng thi bt u ca ngn xp n cc im thit k. Nu bt ny c gi tr =1 , cc lnh S v R s ng ngt tip im hoc mt dy cc tip im (gii hn t 1 n 255). Ni dung ca ngn xp khng b thay i bi cc lnh ny. M t bng lnh LAD
LAD S BIT n (S) M t ng mt mng gm n cc tip im k t S BIT Ton hng S BIT: I, Q, M, SM, T, C, V n(byte): IB, QB, MB, SMB, VB,AC, Hng s, *VD, *AC

S BIT

n (R)

ng mt mng gm n cc tip im k t S BIT. Nu S BIT li ch vo Timer hoc Counter th lnh s xa bt u ra ca Timer / Counter .

S BIT

n ( SI )

ng tc thi mt mng gm n cc tip im k t S BIT

S BIT: Q N(byte): IB, QB, MB, SMB, VB,AC, Hng s, *VD, *AC

S BIT

n ( RI )

Ngt tc thi mt mng gm n cc tip im k t a ch S BIT

STL S S BIT n

M t Ghi gi tr logic vo mt mng gm n bt k t a ch S BIT

Ton hng S BIT: I, Q, M, SM, T, C, V (bit)

R S BIT n

Xa mt mng gm n bt k n: IB, QB, MB, SMB, t a ch S BIT. Nu S BIT li VB ch vo Timer hoc Counter th (byte) AC, Hng s, lnh s xa bt u ra ca Timer / *VD, *AC Counter. Ghi tc thi gi tr logic 1 vo mt mng gm n bt k t a ch S BIT Xa tc thi mt mng gm n bt k t a ch S BIT S BIT: Q (bit) n: IB, QB, MB, SMB, VB (byte) (byte) AC, Hng s, *VD, *AC

S I S BIT n

RI n

S BIT

Cc lnh logic i s (BOOLEAN) Cc lnh tip im i s Boolean cho php to lp c cc mch logic (khng c nh). Trong LAD cc lnh ny c biu din thng qua cu trc mch,

mc ni tip hay song song cc tip im thng ng v cc tip im thng m. STL c th s dng cc lnh A (And) v O (Or) cho cc hm h hoc cc lnh AN (And Not), ON (Or Not) cho cc hm kn. Gi tr ca ngn xp thay i ph thuc vo tng lnh.
Lnh M t Lnh thc hin ton t ^ (A) v V (O) gia gi tr logic ca tip im n v gi tr bt u tin trong ngn xp. Kt qu c ghi li bt u trong ngn xp. Lnh thc hin ton t ^ (A) v V (O) gia gi tr logic nghch o ca tip im n v gi tr bt u tin trong ngn xp. Kt qu c ghi li bt u trong ngn xp. Lnh thc hin tc thi ton t ^ (A) v V (O) gia gi tr logic ca tip im n v gi tr bt u tin trong ngn xp. Kt qu c ghi li bt u trong ngn xp. n: 1 (bit) Ton hng n: I, Q, M, SM, T, C, V (bit)

On An

AN n ON n

AI n OI n

ANI n ONI n

Lnh thc hin tc thi ton t ^ (A) v V (O) gia gi tr logic nghch o ca tip im n v gi tr bt u tin trong ngn xp. Kt qu c ghi li bt u trong ngn xp.

Ngoi nhng lnh lm vic trc tip vi tip im, S7-200 cn c 5 lnh c bit biu din cc php tnh ca i s Boolean cho cc bit trong ngn xp, c

gi l cc lnh stack logic. l cc lnh ALD (And load), OLD (Or load), LPS (Logic push), LRD (Logic read) v LPP (Logic pop). Lnh stack logic c dng t hp, sao chp hoc xa cc mnh logic. LAD khng c b m dnh cho lnh stack logic. STL s dng cc lnh stack logic thc hin phng trnh tng th c nhiu biu thc con. Bng sao tm tt c php gi cc lnh stack logic trong STL.
Lnh M t Ton hng Khng c

ALD

Lnh t hp gi tr ca bt u tin v th hai ca ngn xp bng php tnh logic. Kt qu ghi li vo bt u tin. Gi tr cn li ca ngn xp c ko ln mt bt. Lnh t hp gi tr ca bt u tin v th hai ca ngn xp bng php tnh logic V. Kt qu ghi li vo bt u. Gi tr cn li ca ngn xp c ko ln mt bt. Lnh logic Push (LPS) sao chp gi tr ca bt u tin vo bt th hai trong ngn xp. Gi tr cn li b y xung mt bt. Bt cui cng b y ra khi ngn xp. Lnh sao chp gi tr ca bt th hai vo bt u tin trong ngn xp. Cc gi tr cn li ca ngn xp gi nguyn v tr. Lnh ko ngn xp ln mt bt. Gi tr ca bt sau c chuyn cho bt trc.

OLD

Khng c

LPS

Khng c

LRD

Khng c

LPP

Khng c

.ii AND (A) OR (O)

Lnh A v O phi hp gi tr logic ca mt tip im n vi gi tr bt u tin ca ngn xp. Kt qu php tnh c t li vo bt u tin trong ngn xp. Gi tr ca cc bt cn li trong ngn xp khng b thay i. Lut tnh ton ca cc php tnh logic And v Or nh sau:
x y x^ y (And) 0 0 0 1 xv y (Or) 0 1 1 1

0 0 1 1

0 1 0 1

Tc ng ca lnh AND v OR vo ngn xp nh sau Trc A Sau m= c0 ^ c1

c0 c1 c2 c3 c4 c5 c6 c7 c8 m C1 C2 C3 C4 C5 C6 C7 C8

Trc O Sau m= c0 v c1

c0 c1 c2 c3 c4 c5 c6 c7 c8

m C1 C2 C3 C4 C5 C6 C7 C8

.iii AND LOAD (ALD) OR LOAD (OLD): Lnh ALD v lnh OLD thc hin php tnh logic And v Or gia hai bt u tin ca ngn xp. Kt qu ca php logic ny s c ghi li vo bt u trong ngn xp. Ni dung cn li ca ngn xp c ko ln mt bt.

Tc ng ca lnh ALD v OLD vo ngn xp nh sau: Trc ALD Sau m= c0^ c1

c0 c1 c2 c3 c4 c5 m c2 c3 c4 c5 c6

c6 c7 c8

c7 c8

Trc OLD Sau m= c0 v c1

c0 c1 c2 c3 c4 c5 c6 c7 c8 m c2 c3 c4 c5 c6 c7 c8

.iv LOGIC PUSH (LPS) LOGIC READ (LRD) LOGIC POP (LPP) Lenh LPS, LRD va LPP la nhng lenh thay oi noi dung bt au tien cua ngan xep. Lenh LPS sao chep noi dung cua bt au tien va bt th hai trong ngan xep, noi dung ngan xep sau o b ay xuong mot bt. Lenh LRD lay gia tr cua bt th hai ghi vao bt au tien cua ngan xep, noi dung ngan xep o c keo len mot bt. Lenh LPP keo ngan xep len mot bt. S minh ha thay i ngn xp ca cc lnh LPS, LRD v LPP Trc LPS Sau Trc LRD Sau Trc LPP Sau

C 0 c1 c2 c3 c4 c5 c6 c7 c8

c0

c0

c1

c0

c1

c0 c1 c2 c3 c4 c5 c6 c7

c1 c2 c3 c4 c5 c6 c7 c8

c1 c2 c3 c4 c5 c6 c7 c8

c1 c2 c3 c4 c5 c6 c7 c8

c2 c3 c4 c5 c6 c7 c8

.v ORW, ORD ANDW, ANDD XORW, XORD Lenh thc hien cac thuat toan logic And, Or va Exclusive Or cua ai so Boolean tren 2 bite hoac 4 byte (mang nhieu bt hoac t iem). Ngoi cc lnh logic lm vi tip im, S7-200 cung cp thm nhng lnh logic c kh nng thc hin cc thut ton logic trn mt mng nhiu tip im (hay nhiu bt) nh trn 2 byte hoc 4 byte. Lut tnh ton ca chng nh sau:
x Y X^y (And) 0 0 0 1 xvy (Or) 0 1 1 1 x XOR y 0 1 1 0

0 0 1 1

0 1 0 1

Cch biu din cc lnh logic ny trong LAD v STL c tm tt trong bng sau. Chng s dng bt nh c bit SM 1.0 thng bo v trng thi kt qu php tnh c thc hin (kt qu bng 0). Biu din trong STL
STL M t Ton hng

ANDW IN1 IN2

Lnh thc hin php logic AND IN1: VW, T, C, gia cc bt tng ng ca hai t IW, QW. IN1 v IN2. Kt qu c ghi li (word) SMW, vo IN2 AC, AIW, *VD Lnh thc hin php logic OR gia cc bt tng ng ca hai t IN1 v IN2. Kt qu c ghi li vo IN2 Lnh thc hin php logic XOR gia cc bt tng ng ca hai t IN1 v IN2. Kt qu c ghi li vo IN2 *AC, Hng s. IN2: VW, T, C, IW, QW (word) W, CA, AIW, *VD, *AC

ORW IN1 IN2

XORW IN1 IN2

ANDD IN1 IN2

Lnh thc hin php logic AND IN1: VD, ID, gia cc bt tng ng ca hai t QD, MD, SMQ. kp IN1 v IN2. Kt qu c ghi (Dword) AC, li vo IN2 HC, *CD,*AC Lnh thc hin php logic OR gia cc bt tng ng ca hai t kp IN1 v IN2. Kt qu c ghi li vo IN2 Lnh thc hin php logic XOR gia cc bt tng ng ca hai t kp IN1 v IN2. Kt qu c ghi li vo IN2 Hng s. IN2: VD, ID, QD, MD, SMD (Dword)AC, *VD, *AC

ORD IN1 IN2

XORD IN1 IN2

Biu din trong LAD

LAD WAND EN IN1 IN2 W M t Lnh thc hin php tnh logic AND theo tng bt ca hai t IN1 v IN2. Kt qu c ghi vo t OUT. Ton hng IN1: VW, T, C, IW, QW (word) SMW, AC, AIW, VD *AC, Hng s. IN2: VW, T, C, IW, QW (word) SMW, AC, AIW, *VD, *AC, Hng s. OUT: VW, T, C, IW, QW, MW (word) SMW, AC, *VD, *AC

OUT

WOR EN IN1 IN2

OUT

Lnh thc hin php tnh logic OR gia cc bt tng ng ca hai t IN1 v IN2. Kt qu c ghi vo t OUT.

WXOR EN IN1 IN2

OUT

Lnh thc hin php tnh logic XOR gia cc bt tng ng ca hai t IN1 v IN2. Kt qu c ghi vo t OUT.

WAND EN IN1 IN2

DW

OUT

Lnh thc hin php tnh logic AND gia cc bt ca hai t kp IN1 v IN2. Kt qu c ghi vo t OUT.

IN1: VD, ID, QD, MD, SMW (Dword) AC, AIW, Hng s, VD, AC

WOR EN IN1 IN2

DW

OUT

Lnh thc hin php tnh logic OR gia cc bt ca hai t kp IN1 v IN2. Kt qu c ghi vo t OUT.

IN2: VD, ID, QD, MD, SMW (Dword) AC, AIW, Hng s, *VD, *AC OUT: VD, ID, QD, MD, SMD (Dword) AC, *VD, *AC

WXOR EN IN1 IN2

DW

OUT

Lnh thc hin php tnh logic XOR gia cc bt ca hai t kp IN1 v IN2. Kt qu c ghi vo t OUT.

.4 Cc lnh tip im c bit: C th dng cc lnh tip im c bit pht hin s chuyn tip trng thi ca xung (sn xung) v o li trng thi ca dng cung cp (gi tr ca nh ngn xp). LAD s dng cc tip im c bit tc ng vo dng cung cp. Cc tip im c bit khng c ton hng ring ca chnh chng v v th phi t chng vo v tr pha trc ca cun dy hoc hp u ra. Tip im chuyn tip dng/m (cc lnh sn trc v sn sau) c nhu cu v b nh, nn i vi CPU 214 l 256 lnh. Cac lenh tiep iem ac biet c bieu dien nh sau trong LAD
LAD M t Tip im o trng thi ca dng cung cp. Nu dng cung cp c tip im o th n b ngt mch, nu khng c tip Ton hng Khng c

NOT

im o th n thng mch. Tip im chuyn i dng cho php dng cung cp thng mch trong mt vng qut khi sn xung iu khin chuyn t 0 ln 1 N Tip im chuyn i m cho php dng cung cp thng mch trong mt vng qut khi sn xung iu khin chuyn t 1 xung 0. Khng c

Khng c

Cac lenh tiep iem ac biet c bieu dien nh sau trong STL
STL NOT M t Lnh o gi tr ca bt u tin trong ngn xp. Lnh nhn bit s chuyn tip trng thi t 0 ln 1 trong mt vng qut ca nh ngn xp. Khi nhn c s chuyn tip nh vy nh ngn xp s c gi tr bng 1 trong mt vng qut. Lnh nhn bit s chuyn tip trng thi t 1 xung 0 trong mt vng qut ca nh ngn xp. Khi nhn c s chuyn tip nh vy nh ngn xp s c gi tr bng 1 trong mt vng qut. Ton hng Khng c

EU

Khng c

ED

Khng c

.i NOT (NOT) EDGE UP (EU) EDGE DOWN (ED) Lenh NOT, EU va ED thc hien cac thuat toan ac biet tren bt au tien cua ngan xep. Lenh NOT ao gia tr cua bt au tien trong ngan xep. Lenh EU khi phat hien thay sn len t 0 en 1 trong bt au tien cua ngan xep th at gia tr 1 vao bt au tien cua ngan xep trong khoang thi gian bang mot vong quet.

Tac ong cua lenh vao ngan xep nh sau: Trc NOT Sau Trc EU Sau
c0 c0 c1 c1 c1 c1 1 c2 c2 c2 c2 2 c3 c3 c3 c3 3 c4 c4 c4 c4 4 c5 c5 c5 c5 5 c6 c6 c6 c6 6 c7 c7 c7 c7 7 c8 c8 c8 c8 8 C c8 C c7 C c6 C c5 C c4 C c3 C c2 1

Trc ED Sau
c1 0 C c1 C 1

.5 Cc lnh so snh Khi lap trnh, neu co cac quyet nh ve ieu khien c thc hien da tren ket qua cua viec so sanh th co the s dung lenh so sanh cho byte, t hay t kep cua S7200.

LAD s dng lnh so sanh e so sanh cac gia tr cua byte, t va t kep (gia tr thc hoac nguyen). Nhng lenh so snh thng l so snh nh hn hoac bang (<= ); so snh bng (= ) v so snh ln hn hoc bng (> =) . Khi so snh gi tr ca byte th khng cn phi y n du ca ton hng. Ngc li khi so snh cc t hoac t kp vi nhau th phi y n du ca ton hng, ngc li khi so snh cc t hoac t kp vi nhau th phi y n du ca ton hng l bt cao nht trong t hoc t kep. Biu din cc lnh so snh trong LAD:
LAD n1 n1 n1 n1 ==B n2 n2 n2 M t Tip im ng khi n1 = n2 B = Byte I = Integer D = Double Integer ==R ==B n2 R = Real Ton hng

==I ==D

n1,n2 (byte): VB, IB, QB, MB, SMB, AC, Const, *VD*, AC

Tip im ng khi n1 n2 >=B ==B n1 n2 >=I n2 >=D ==B n1 n2 >=R ==B n1 N1 > n2 B = Byte I = Integer D = Double Integer R = Real n1,n2 (t): VW, T, C, IW, QW, MW, SMW,AC, AIW Hng s, *VD, *AC

Tip im ng khi n1 n2 <=B ==B n1 n2 <=I n1 n2 N1 < n2 B = Byte I = Integer D = Double Integer R = Real

n1, n2(t kp):V D, ID, QD, MD, SMD, AC, HC, Hng s, *VD, *AC

<=D ==B n1 n2 <=R ==B

Trong STL, nhng lnh so snh thc hin php so snh byte, t v t kp. Cn c vo kiu so snh (<= , =, >= ), kt qu ca php so snh c gi tr bng 0 (nu ng) hoc 1 (nu sai) nn c th s dng kt hp cng vi cc lnh gogic LA, A, O. to ra c cc php so snh m S7-200 khng c lnh so snh tng ng nh: so snh khng bng nhau (< >), so snh nh hn (>), c th to ra c nh dng kt hp lnh NOT vi cc lnh c (= , >= , <= ). V d sau m t vic thc hin php so snh khng bng nhau (< >) gia ni dung ca t V>W100 v hng s 50 bng cch s dng kt hp php so snh bng nhau LDW = v lnh o NOT. .i LDB =, LDW = Va LDD =, LDR = * Lnh kim tra tnh bng nhau ca ni dung 2 byte, t, t kp, hoc s thc. Trong trng hp php so snh cho kt qu ng, bt u tin trong ngn xp s c gi tr logic bng 1. .ii LDB < =, LDW < = Va LDD < =, LDR < =

* Lnh so snh ni dung ca byte, t, t kp hoc s thc th nht c nh hn hoc bng ni dung ca byte, t, t kp hoc s thc th hai hay khng. Trong trng hp php so snh cho kt qu ng, bt u tin trong ngn xp c gi tr logic bng 1. .iii LDB > =, LDW > = Va LDD > =, LDR > = * Lenh so sanh noi dung cua byte, t, t kep hoac so thc th nhat co ln hn hoac bang noi dung cua byte, t, t kep hoac so thc th hai hay khong. Trong trng hp phep so sanh cho ket qua ung, bt au tien trong ngan xep co gia tr logic bang 1. .iv AB =, AW = AD =, AR = * Lenh kiem tra tnh bang nhau cua noi dung 2 byte, t, t kep, hoac so thc. Trong trng hp phep so sanh cho ket qua ung, se thc hien phep tnh logic And gia bt au tien trong ngan xep vi gia tr logic. .v AB < =, AW < = Va AD < =, AR < = Lenh so sanh noi dung cua byte, t, t kep hoac so thc th nhat co nho hn hoac bang noi dung cua byte, t, t kep hoac so thc th hai hay khong. Trong trng hp phep so sanh cho ket qua ung, se thc hien phep tnh logic AND gia bt au tien trong ngan xep vi gia tr logic 1 Biu din lnh so snh trong STL:
STL M t Ton hng

LDB = n1 n2 AB = n1 n2 OB = n1 n2

Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 byte n1 v n2 tha mn n1 = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 byte n1 v n2 tha mn n1 > = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 byte n1 v n2 tha mn n1 < = n2

n1, n2 (byte):V B, IB, QB, MB, SMB, AC, hng s, *VD, *AC

LDB > = n1 n2 AB > = n1 n2 OB > = n1 n2

LDB < = n1 n2 AB < = n1 n2 OB < = n1 n2

LDW = n1 n2 AW = n1 n2 OW = n1 n2

Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t n1 v n2 tha mn n1 = n2

n1,n2 (t):V W, T, C, QW, MW, SMW, AC, AIW, hng s, *VD, *AC

LDW > = n1 n2 AW > = n1 n2 OW > = n1 n2 LDW < = n1 n2 AW < = n1 n2 OW < = n1 n2

Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t n1 v n2 tha mn n1 > = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t n1 v n2 tha mn n1 < = n2

LDD = n1 n2 AD = n1 n2 OD = n1 n2

Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t kp n1 v n2 tha mn n1 = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t kp n1 v n2 tha mn n1 > = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp khi ni dung 2 t kp n1 v n2 tha mn n1 < = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp nu hai s thc n1 v n2 (4 byte) tha mn n1 = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp nu hai s thc n1 v n2 (4 byte ) tha mn n1 > = n2 Lnh thc hin php tnh logic Load, And hoc Or gia gi tr logic 1 vi ni dung nh ngn xp nu hai s thc

n1, n2 (t kp):VD, ID, QD, MD, SMD, AC, HC, hng s, *VD, *AC

LDD > = n1 n2 AD > = n1 n2 OD > = n1 n2

LDD < = n1 n2 AD < = n1 n2 OD < = n1 n2

LDR = n1 n2 AR = n1 n2 OR = n1 n2

n1,n2 (t kp):V D, ID, QD, MD, SMD, AC, HC, hng s, *VD, *AC

LDR > = n1 n2 AR > = n1 n2 OR > = n1 n2

LDR < = n1 n2 AR < = n1 n2

OR < = n1 n2

n1 v n2 (4 byte) tha mn n1 < = n2

.6 Lnh nhy chng trnh con: Cc lnh ca chng trnh, nu khng c nhng lnh iu khin ring, s c thc hin theo th t t trn xung di trong mt vng qut. Lnh iu khin chng trnh cho php thay i th t thc hin lnh. Chng cho php chuyn th t thc hin, ng l ra l lnh tip theo, ti mt lnh bt c no khc ca chng trnh, trong ni iu khin chuyn n phi c nh du trc bng mt nhn, ch, ch. Thuc nhm lnh iu khin chng trnh gm: lnh nhy, lnh gi chng trnh con, nhn ch ch, hay gi n gin l nhn, phi c nh du trc khi thc hin lnh nhy hay lnh gi chng trnh con. Vic t nhn cho lnh nhy phi nm trong chng trnh. Nhn ca chng trnh con, hoc ca chng trnh x l ngt c khai bo u chng trnh. Khng th dng lnh nhy JMP chuyn iu khin t chng trnh chnh vo mt nhn bt k trong chng trnh con hoc trong chng trnh x l ngt. Tng t nh vy cng khng th t mt chng trnh con hay chng trnh x l ngt nhy vo bt c mt nhn no nm ngoi cc chng trnh . Lnh gi chng trnh con l lnh chuyn iu khin n chng trnh con. Khi chng trnh con thc hin xong cc php tnh ca mnh th vic iu khin li c chuyn tr v lnh tip theo trong chng trnh chnh nm ngay sau lnh gi chng trnh con. T mt chng trnh con c th gi c mt chng trnh con

khc trong n, c th gi nh vy nhiu nht l 8 ln trong S7-200. Ni chung (trong mt chng trnh con c lnh gi n chnh n) v nguyn tc khng b cm song phi n gii hn trn. Nu lnh nhy hay lnh gi chng trnh con c thc hin th nh ngn xp lun c gi tr logic 1. Bi vy trong chng trnh con cc lnh c iu kin c thc hin nh cc lnh khng iu kin. Sau cc lnh LBL (t nhn) v SBR, lnh LD trong STL s b v hiu ha. Khi mt chng trnh con c gi, ton b ni dung ca ngn xp s c ct i, nh ca ngn xp nhn gi tr logic mi l 1, cc bt khc ca ngn xp nhn gi tr logic 0 v iu khin c chuyn n chng trnh con c gi. Khi thc hin xong chng trnh con v trc khi iu khin c chuyn tr li chng trnh gi n, ni dung ngn xp c ct gi trc s c chuyn tr li ngn xp. Ni dung ca thanh ghi AC khng c ct gi khi gi chng trnh con, nhng khi mt chng trnh x l ngt c gi, ni dung ca thanh ghi AC s c ct gi trc khi thc hin chng trnh x l ngt v np li khi chng trnh x l ngt c thc hin xong. Bi vy chng trnh x l ngt c th t do s dng bn thanh ghi AC ca S7-200. .i JMP.C ALL
1 LBL.S BR

Lnh nhy JMP v lnh gi chng trnh con SBR cho php chuyn iu khin t v tr ny n v tr khc trong chng trnh. C php ca lnh nhy v lnh gi chng trnh con trong LAD v STL u c ton hng l nhn ch ch (ni nhy n, ni cha chng trnh con). Lnh nhy, lnh gi chng trnh con, lnh khai bo nhn v lnh thot khi chng trnh con c biu din trong LAD v trong STL nh sau:
LAD n ( JMP ) STL M t Lnh nhy thc hin vic chuyn iu khin n nhn n trong mt chng trnh. Lnh khai bo nhn n trong mt chng trnh. Lnh gi chng trnh con, thc hin php chuyn iu khin n chng trnh con c nhn l n. Lnh gn nhn n cho mt chng trnh con. Ton hng n: 0 255

JMP Kn LBL Kn

LBL:n

n ( CALL )

CALL Kn

n: 0 255

SBR: n

SBR Kn

n ( CRET )

CRET

Lnh tr v chng trnh gi chng trnh con c iu kin (bt u tin ca ngn xp c gi tr logic bng 1).

Khng c

n ( RET )

RET

Lnh tr v chng trnh gi chng trnh con khng iu kin.

.ii Cc lnh can thip vo thi gian vng qut:

1 Lnh MEND, END, STOP, NOP, WDR.

Cc lnh ny c dng kt thc chng trnh ang thc hin, v ko di trong khong thi ca mt vng qut. Trong LAD v STL chng trnh chnh phi c kt bng lnh kt thc khng iu kin MEND. C th s dng lnh kt thc c iu kin END trc lnh kt thc khng iu kin. Lnh STOP kt thc chng trnh, n chuyn iu khin chng trnh n ch STOP. Nu gp lnh STOP trong chng trnh chnh hoc trong chng trnh con th chng trnh ang thc hin s c kt thc ngay lp tc. Lnh sng NOT khng c tc dng g trong vic thc hin chng trnh. Lnh NOT ny phi c t trong chng trnh chnh, hoc chng trnh ngt, hoc chng trnh con. Lnh WDR s khi ng li ng h quan st (watchdog Timer) v chng trnh tip tc c thc hin trong vng qut ch quan st. S dng lnh MEND, END, STOP v WDR trong LAD v STL nh sau:
LAD ( END ) STL END M t Lnh kt thc chng trnh chnh hin hnh c iu kin.

( MEND )

MEND

Lnh kt thc khng iu kin dng kt thc mt chng trnh hin hnh. Lnh STOP kt thc chng trnh hin hnh v chuyn sang ch STOP. Lnh WDR khi to li ng h quan st.

( STOP )

STOP

( WDR )

WDR

NOT

( NOT )

Lnh NOT khng c hiu lc trong chng trnh hin hnh. Ton hng n l mt s nm trong khong 0 25

.7 Cc lnh iu khin Timer Timer l b to thi gian tr gia tn hiu vo v tn hiu ra nn trong iu khin vn thng gi l khu tr. Nu k hiu tn hiu (logic) vo l x (t) v thi gian tr c to ra bng Timer l r th tn hiu u ra ca Timer s l x (t-r). S7-200 c 128 Timer (CPU-214) c chia lm 2 loi khc nhau, l: * Timer to thi gian tr khng c nh (Timer on delay), k hiu l TON. * Timer to thi gian tr c nh (Timer on delay retentive), k hiu l TONR. Hai kiu Timer ca S7-200 (TON v TONR) phn bit vi nhau phn ng ca n i vi trng thi tn hiu u vo, tc l khi tn hiu u vo chuyn trng thi logic t 0 ln 1, c gi l thi im Timer c kch, v khng tnh khong thi gian khi u vo c gi tr logic 0 vo thi gian tr tn hiu c t trc.

Khi u vo c gi tr logic bng 0, TON t ng reset cn TONR th khng t reset. Timer TON c dng to thi gian tr trong mt khong thi gian (min lin thng), cn vi TONR thi gian tr s c to trong nhiu khong thi gian khc nhau. Timer TON v TONR bao gm 3 loi vi 3 phn gii khc nhau, phn gii 1ms, 10 ms, 100 ms. Thi gian tr r c to ra chnh l tch ca phn gii ca b Timer c chn v gi tr t trc cho Timer. V d mt b Timer c phn gii bng 10 ms v gi tr t trc 10 ms th thi gian tr s l r = 500 ms Timer ca S7-200 c nhng tnh cht c bn sau: Cc b Timer c iu khin bi mt cng vo v gi tr m tc thi. Gi tr m tc thi ca Timer c nh trong thanh ghi 2 byte (gi l T-word) ca Timer, xc nh khong thi gian tr k t khi Timer c kch. Gi tr t trc ca cc b Timer c k hiu trong LAD v STL l PT. Gi tr m tc thi ca thanh ghi T-word thng xuyn c so snh vi gi tr t trc ca Timer. Mi b Timer, ngoi thanh ghi 02 byte T-word lu gi tr m tc thi, cn c 1 bt, k hiu bng T-bt, ch trnh thi logic u ra. Gi tr logic ca bt ny ph thuc vo kt qu so snh gia gi tr m tc thi vi gi tr t trc. Trong khong thi gian tn hiu x (t) c gi tr logic 1, gi tr m tc thi trong T-word lun c cp nht v thay i tng dn cho n khi n t gi tr cc i. Khi gi tr m tc thi ln hn hoc bng gi tr t trc, T-bt c gi tr logic 1.

Cc loi Timer ca S7-200 (i vi CPU 214) chia theo TON, TONR v phn gii bao gm:
Lnh phn gii 1 ms TON 10 ms 100 ms 1 ms TONR 10 ms 100 ms Gi tr cc i 32,767s 327,67s 3276,7s 32,767s 327,67s 3276,7s CPU 214 T32 T96 T33 T36; T97 T100 T37 T63; T101 T127 T0 T64 T1 T4; T65 T68 T5 T31; T69 T95

C php khai bo s dng Timer trong LAD nh sau:

LAD

M t Khai bo Timer s hiu xx kiu TON to thi gian tr tnh t khi u vo IN c kch. Nu nh gi tr m tc thi ln hn hoc bng gi tr t trc PT th T-bt c gi tr logic bng 1. C th reset Timer kiu TON bng lnh R hoc bng gi tr logic 0 ti u vo IN 1 ms 10 ms T32 T96 T33 T36;

Ton hng Txx: T32 T63 T96 T127 PT: VW, T, C, IW QW, MW, SMW AC, AIW, VD *AC, Hng s.

TON Txx IN PT

T97 T100 100 ms T37 T63;

T101 T127 Khai bo Timer s hiu xx kiu TONR to thi gian tr tnh t khi u vo IN c kch. Nu nh gi tr m tc thi ln hn hoc bng gi tr t trc PT th T-bt c gi tr logic bng 1. Ch c th reset kiu TONR bng lnh R cho T-bt 1 ms 10 ms T0 T64 T1 T4 ; Txx: T0 T31 T64 T95 PT: VW, T, C, IW QW, AIW, SMW, AC, AIW, VD *AC, Hng s.

TONR _Txx IN PT

T65 T68 100 ms T5 T31;

T69 T95

C php khai bo s dng Timer trong STL nh sau: TON, TONR khai bo s dng Timer ca S7-200, lnh khai bo s dng Timer l lnh c iu kin. Ti thi im khai bo tn hiu u vo c gi tr logic bng gi tr logic ca bt u tin trong ngn xp.
STL M t Ton hng Txx: T32 T63 T96 T127 n (word): VW, T, C, IW,QW, MW, SMW AC, AIW, VD *AC, Hng s

Khai bo Timer s hiu xx kiu TON Txx n TON to thi gian tr tnh t khi bt u tin trong ngn xp c gi tr logic 1. Nu nh gi tr m tc thi ln hn hoc bng gi tr t trc n th T-bt c gi tr logic bng 1. C th reset Timer kiu TON bng lnh R hoc bng gi tr logic 0 ti u vo. 1 ms T96

10 ms 100 ms

T97 T100 T101 T127 Txx:T0 T31 T64 T95 n (word):VW, T, C, IW,QW, AIW, SMW AC, AIW, VD *AC, Hng s

TONR Txx n

Khai bo Timer s hiu xx kiu TONR to thi gian tr tnh t khi bt u tin trong ngn xp c gi tr logic 1. Nu nh gi tr m tc thi ln hn hoc bng gi tr t trc n th T-bt c gi tr logic bng 1. Ch c th reset Timer kiu TONR bng lnh R cho T-bt 1 ms 10 ms 100 ms T64 T65 T68 T69 T95

Ch : Khi s dng Timer kiu TONR, gi tr m tc thi c lu li v khng b thay i trong khong thi gian khi tn hiu u vo c logic 0. Gi tr ca T-bt khng c nh m hon ton ph thuc vo kt qu so snh gia gi tr m tc thi v gi tr t trc. Cc Timer c nh s t 0 n 127 (i vi CPU 214). Mt Timer c t tn l Txx, trong xx l s hiu ca Timer. Txx ng thi cng l a ch hnh thc ca T-word v T-bt vn c phn bit vi nhau nh kiu lnh s dng vi Txx. Khi dng lnh lm vic vi t, Txx c hiu l a ch ca T-word, ngc li khi s dng lnh lm vic vi tip im, Txx c hiu l a ch ca T-bt. Mt Timer ang lm vic c th c a li v trng thi khi ng ban u. Cng vic a mt Timer v trng thi ban u c gi l reset Timer .

Khi reset mt b Timer, T-word v T-bt ca n ng thi c xa v c gi tr bng 0, nh vy gi tr m tc thi c t v 0 v tn hiu u ra cng c trng thi logic bng 0. C th reset bt c b Timer ca S7-200 bng lnh R (reset). iu ni rng khi dng lnh R cho T-bt ca mt Timer, Timer s c a v trng thi ban u v lnh R cho mt Txx va xa T-word va xa Tbt ca Timer . C hai phng php reset mt Timer kiu TON: Xa tn hiu u vo. Dng lnh R (reset). Dng lnh R l phng php duy nht reset cc b Timer kiu TONR. t gi tr 0 cho gi tr m tc thi ca mt Timer cng khng th xa T-bt ca Timer . Cng nh vy, khi t mt gi tr logic 0 cho T-bt ca mt Timer khng th xa gi tr m tc thi ca Timer . C php reset mt timer Txx bng lnh R l R Txx K1 Ch rng lnh R thuc nhm lnh c iu kin. Hnh 7 a: Timer ca S7-200
X(t) Gi tr m tc thi T-word Gi tr t trc T-Bit

.8 Cc lnh iu khin Counter

Counter l b m hin chc nng m sn xung trong S7-2000. Cc b m ca S7-2000 c chia ra lm 2 loi: b m tin (CTU) v b m tin/li (CTUD). B m tin CTU m s sn ln ca tn hiu logic u vo, tc l m s ln thay i trng thi logic t 0 ln 1 ca tn hiu. S sn xung m c, c ghi vo thanh ghi 2 byte ca b m, gi l thanh ghi C-word. Ni dung ca C-word, gi l gi tr m tc thi ca b m, lun c so snh vi gi tr t trc ca b m c k hiu l PV. Khi gi tr m tc thi bng hoc ln hn gi tr t trc ny th b m bo ra ngoi bng cch t gi tr logic 1 vo mt bt c bit ca n, c gi l C-bt. Trng hp gi tr m tc thi nh hn gi tr t trc th C-bt c gi tr logic l 0. Khc vi cc b Counter, cc b m CTU u c chn ni vi tn hiu iu khin xa thc hin vic t li ch khi pht ban u (reset) cho b m, c k hiu bng ch ci R trong LAD hay c qui nh l trng thi logic ca bt u tin ca ngn xp trong STL. B m c reset khi tn hiu xa ny c mc logic l 1 hoc khi lnh R (reset) c thc hin vi C-bt. Khi b m c reset, c C-word v C-bt u nhn gi tr 0. Hnh 8 a: B m CTU ca S7-200
CU Gi tr m tc thi PV R C-Bit C-word

B m tin / li CTUD m tin khi gp sn ln ca xung vo cng m, k hiu l CU trong LAD hoc bt th 3 ca ngn xp trong STL, v m li khi gp sn ca xung vo cng m li, c k hiu l CD trong LAD hoc bt th 2 ca ngn xp trong STL. Ging nh b m CTU, b m CTUD cng c a v trng thi khi pht ban u bng 2 cch. Khi u vo logic ca chn xa, k hiu bng R trong LAD hoc bt th nht ca ngn xp trong STL, c gi tr logic l 1 hoc Bng lnh R (reset) vi C-bt ca b m. CTUD c gi tr m tc thi ng bng gi tr ang m v c lu trong thanh ghi 2 byte C-word ca b m. Gi tr m tc thi lun c so snh vi gi tr t trc PV ca b m. Nu gi tr m tc thi ln hn bng bng gi tr t trc th C-bt c gi tr logic bng 1. Cn cc trng hp khc C-bt c gi tr logic bng 0. Hnh 8 b: B 9m CTUD ca S7-200

CU C-Bit B m tin CTU c min gi tr m tc thi t 0 n 32.767. B m

tin/li CTUD c min gi tr m tc thi l 32.767

Gi tr m tc thi

PV CD R

C-word

Cc b m c nh s t 0 n 127 (i vi CPU 214) v k hiu bng Cxx, trong xx l s th t ca b m. K hiu Cxx ng thi cng l a ch hnh thc ca C-word v ca C-bt. Mc d dng a ch hnh thc, song C-word v C-bt vn c phn bit vi nhau nh kiu lnh s dng lm vic vi t hay vi tip im (bt). Lnh khai bo s dng b m trong LAD nh sau:
LAD M t Ton hng

CTU CU PV R

Cxx

Khai bo b m tin theo sn Cxx:C 0 C47 ln ca CU. Khi gi tr m tc thi C80 C127 C-word Cxx ln hn hoc bng gi PV (word): VW, tr t trc PV, C-bt (cxx) c gi tr logic bng 1. B m c reset T, C, IW, QW, MW, SMW, AC khi u vo R c gi tr logic bng 1. B m ngng m khi C-word AIW, Hng s Cxx t gi tr cc i 32.767. *VD, *AC Khi bo b m tin/li, m tin theo sn ln ca CU v m li theo sn ln ca CD. Khi gi tr m tc thi C-word Cxx ln hn hoc bng gi tr t trc PV, C-bt (cxx) c gi tr logic bng 1. B m ngng m tin khi Cword t gi tr cc i 32.767 v ngg m li khi C-word t gi tr cc tiu 32.767 CTUD reset khi u vo R c gi tr logic bng 1.

CTUD CU PV R

Cxx

Cxx: C48 C79

PV (word):V W,T, C, IW, QW, MW, SMW, AC,A IW, Hng s, *VD, *AC

Lnh khai bo s dng b m trong STL nh sau:

STL

M t Khai bo b m tin theo sn ln ca CU. Khi gi tr m tc thi C-word ln hn hoc bng gi tr t trc n, Cbt c gi tr logic bng 1. B m c reset khi u ngn xp c gi tr logic bng 1. B m ngng m khi C-word t gi tr cc i 32.767. Khai bo b m tin/li, m tin theo sn ln ca CU v m li theo sn ln ca CD. Khi gi tr m tc thi C-word, Cxx ln hn hoc bng gi tr t trc n, C-bt c gi tr logic bng 1, b m ngng m tin khi C-word t gi tr cc i 32.767 v ngng m li khi C-word t c gi tr cc tiu 32.767 CTUD reset khi bt u ca ngn xp c gi tr logic bng 1.

Ton hng Cxx: C0 C47 C80 C127 n (word):V W, T, C, IW, QW, MW, SMW, AC, AIW, Hng s.

CTU Cxx n

*VD, *AC
Cxx: C48 C79 n (word): VW, T, C, IW,QW, MW, SMW, AC, AIW, Hng s, *VD, *AC CTUD Cxx n

.i Cc lnh s hc .ii a. Lnh cng (ADD)

1 Lnh ADD_I

L lnh thc hin php cng cc s nguyn 16-bt IN1 v IN2. Trong LAD kt qu l mt s nguyn 16-bt c ghi vo OUT, tc l: IN1 + IN2 = OUT. Cn trong STL, kt qu cng l mt gi tr 16-bt nhng c ghi vo IN2, tc l IN1 + IN2 = IN2.
2 Lnh ADD_DI:

L lnh thc hin php cng cc s nguyn 32-bt IN1 v IN2 Trong LAD, kt qu l mt s nguyn 32-bt c ghi vo OUT, tc l: IN1 + IN2 = OUT. Cn trong STL, kt qu cng l mt gi tr 32-bt nhng c ghi vo IN2, tc l IN1 + IN2 = IN2.
3 Lnh ADD_R:

L lnh thc hin php cng cc s thc 32-bt IN1 v IN2. Trong LAD, kt qu l mt s thc 32-bt c ghi vo OUT, tc l: IN1 + IN2 = OUT. Cn trong STL, kt qu cng l mt gi tr thc 32-bt nhng c ghi vo IN2, tc l IN1 + IN2 = IN2. .iii b. Lnh tr (SUB):
1 Lnh SUB_I:

L lnh thc hin php tr cc s nguyn 16-bt IN1 v IN2 Trong LAD kt qu l mt s nguyn 16-bt v c ghi vo OUT, tc l: IN1 - IN2 = OUT. Cn trong STL, kt qu l mt gi tr 16-bt nhng c ghi li vo IN2, tc l IN1- IN2 = IN2.
2 Lnh SUB-DI:

L lnh thc hin php tr cc s nguyn 32-bt IN1 v IN2 Trong LAD kt qu l mt s nguyn 32-bt c ghi vo IN2, tc l:

IN1 - IN2 = IN2. Cn trong STL, kt qu l mt gi tr 32-bt nhng c ghi li vo IN2, tc l IN1- IN2 = IN2.
3 Lnh SUB_R:

L lnh thc hin php tr cc s thc 32-bt IN1 v IN2 Trong LAD kt qu l mt s thc 32-bt c ghi vo OUT, tc l: IN1 - IN2 = OUT. Trong STL, kt qu l mt gi tr 32-bt nhng c ghi li vo IN2, tc l IN1- IN2 = IN2. C php dng lnh cng v tr trong LAD v STL nh sau:

LAD ADD EN IN1 IN2 I

STL + I IN1 IN2

OUT

SUB EN IN1 IN2

- I IN1

IN2

OUT

ADD EN IN1 IN2

DI

+ D IN1 IN2

OUT

SUB EN IN1 IN2

DI

- D IN1 IN2

OUT + R IN1 IN2

ADD EN IN1 IN2

OUT

SUB EN IN1 IN2

- R IN1 IN2

OUT

.iv c. Lnh nhn (MUL):

1 Lnh MUL:

Trong LAD: Lnh thc hin php nhn 2 s nguyn 16-bt IN1 v IN2 v cho ra kt qu 32-bt cha trong t kp OUT (4 byte). Trong STL: Lnh thc hin php nhn gia 2 s nguyn 16-bt n1 v s nguyn cha trong t thp (t 0 n bt 15) ca ton hng 32-bt n2 (4 byte). Kt qu 32-bt c ghi vo n2.

2 Lnh MUL_R:

Trong LAD: lnh thc hin php nhn hai s thc 32-bt IN1 v IN2 v cho ra kt qu 32-bt cha trong t kp OUT (4 byte). Trong STL: Lnh thc hin php nhn gia s thc 32-bt c ghi vo IN2. C php dng lnh trong LAD v STL nh sau:
LAD MUL EN IN1 IN2 OUT *R IN 1 IN2 STL MUL n1 n2

MUL EN IN1 IN2

OUT

.v d. Lnh chia (DIV) Trong LAD: Lnh thc hin php chia s nguyn 16-bt IN1 cho s nguyn 16-bt IN2. Kt qu 32-bt cha trong t kp OUT gm thng s ghi trong mng 16-bt t bt 0 n bt15 (t thp) v phn d cng 16-bt ghi trong mng t bt-16 n bt-31 (t cao). Trong STL: Lnh thc hin php chia s nguyn 16-bt n1 cho s nguyn, s nguyn 16-bt nm trong t thp t bt 0 n bt 15 ca ton hng 32-bt n2. Kt

qu 32-bt c ghi li vo n2 bao gm thng s ghi trong mng 16-bt t bt 0 n bt 15 (t thp) v phn d ghi trong mng 16-bt t bt-16 n bt-31 (t cao).
1 Lnh DIV_R:

Trong LAD: lnh thc hin php chia s thc 32-bt IN1 cho s thc 32-bt IN2 v cho ra kt qu 32-bt cha trong t kp OUT. Trong STL, lnh thc hin php chia s thc 32-bt IN1 cho s thc 32-bt IN2, kt qu 32-bt c ghi li vo IN2. C php dng lnh chia hai s trong LAD v STL nh sau:

LAD DIV EN IN1 IN2 OUT

STL DIV n1 n2

DIV EN IN1 IN2

/R n1 n2

OUT

.vi Lnh ly cn bc 2 (SQRT): La mot lenh thc hien lay can bac hai cua so thc 32-bt IN. Ket qua cung la mot so 32-bt c ghi vao t kep OUT. Cu phap dung lenh lay can bac hai ca mt s thc nh sau:

LAD SQRT EN IN OUT

STL SQRT IN OUT

.vii Cc lnh cng tr mt n v

1 a. Lnh INC_B:

L lnh cng s nguyn 1 vo ni dung ca byte u vo. Trong LAD: Kt qu c ghi vo OUT, tc l: IN1 + 1 = OUT. Trong STL: Kt qu c ghi vo IN. C php dng lnh INCW trong LAD v trong STL nh sau:
LAD INC EN IN B OUT STL INCW IN

2 Lnh INC_W

Lnh cng s nguyn 1 vo ni dung t n In. Trong LAD: Kt qu c ghi vo OUT. Trong STL: Kt qu c ghi li vo IN. C php dng lnh INCW trong LAD v trong STL nh sau:

LAD INC EN IN W OUT

STL INCW IN

3 Lnh INC_DW (DOUBLE WORD)

L lnh cng s nguyn 1 vo ni dung t kp IN Trong LAD: Kt qu c ghi vo OUT, tc l: IN + 1 = OUT Trong STL: Kt qu c ghi vo IN, tc l: IN + 1 = IN C php dng lnh INCD trong LAD v trong STL nh sau:
LAD INC EN IN DW OUT STL

INCD IN

4 Lnh DEC_B

L lnh bt ni dung ca byte u vo i 1 n v. Trong LAD: Kt qu c ghi vo OUT, tc l: IN - 1 = OUT Trong STL: Kt qu c ghi vo IN, tc l: IN - 1 = IN C php dng lnh DECW trong STL v DEC_W trong LAD nh sau:
LAD STL

DEC EN IN

B OUT

DECB IN

5 Lnh DEC_W

L lnh bt ni dung IN i 1 n v. Trong LAD: Kt qu c ghi vo OUT, tc l: IN - 1 = OUT Trong STL: Kt qu c ghi vo IN, tc l: IN - 1 = IN C php dng lnh DECW trong STL v DEC_W trong LAD nh sau:
LAD INC EN IN W OUT STL DECW IN

Lnh DEC_DW

L lnh gim ni dung t kp IN i 1 n v. Trong LAD: Kt qu c ghi vo OUT, tc l: IN - 1 = OUT Trong STL: Kt qu c ghi vo IN, tc l: IN - 1 = I C php dng lnh DECDW trong STL hay DEC_DW trong LAD nh sau:

LAD

STL

INC EN IN

DW OUT

DECD

IN

.viii Cc lnh dch chuyn ni dung nh Cc lnh dch chuyn ni dung nh thc hin vic di chuyn hoc sao chp s liu t vng ny sang vng khc trong b nh. Trong LAD hay trong STL lnh dch chuyn thc hin vic di chuyn hay sao chp ni dung ca mt byte, mt t n, mt t kp hoc mt gi tr thc t vng ny sang vng khc trong b nh.
1 Lnh MOV_B

L lnh sao chp ni dung ca byte IN sang byte OUT. C php dng lnh MOV_B trong LAD hay MOVB trong STL nh sau:
LAD MOV EN IN B OUT STL MOVB IN OUT

b. Lnh MOV_W

L lnh sao chp ni dung ca t n IN sang t n OUT. C php dng lnh MOVW trong STL hay MOV_W trong LAD nh sau:
LAD STL

MOVW
MOV EN IN W OUT

IN

OUT

3 c. Lnh MOV_DW

L lnh sao chp ni dung ca t kp IN sang t kp OUT. C php dng lnh MOVD trong STL hay MOV_DW trong LAD nh sau:
LAD MOV EN IN DW OUT STL

MOVD

IN

OUT

d. Lnh MOV_R

L lnh sao chp mt s thc t IN (4 byte) sang OUT (4 byte). C php dng lnh MOV_R trong LAD hay MOVR trong STL:
LAD MOV EN IN R OUT STL

MOVR

IN

OUT

e. Lnh SWAP

L lnh trao i ni dung ca Byte thp v Byte cao trong ni dung t n IN C php dng lnh SWAP trong LAD hay trong STL nh sau:

LAD

STL SWAP SWAP EN IN OUT IN

.ix Cc lnh dch chuyn thanh ghi Cc lnh dch chuyn thanh ghi c chia lm hai nhm: Nhm cc lnh lm vic vi thanh ghi c di bng mt t n (16-bt) hay mt t kp (32-bt). Nhm cc lnh lm vic vi thanh ghi c di ty m c nh ngha trong lnh. Nhm lnh vi thanh ghi c di 16 hoc 32 bt. Lnh dch chuyn thuc nhm ny cho php dch chuyn v quay cc bt trong cc t n v trong cc t kp. S ln dch chuyn cc bt ca t n hay t kp c ch th bng mt ton hng trong c gi l s ln m y. S ln quay cc bt ca t n hay t kp cng c ch th bng mt ton hng trong lnh, c gi l s ln m quay. Khi s dng cc lnh dch chuyn cc bt ca t n hay t kp cn ch :

 S khng thc hin vic dch chuyn nu nh s m ln y bng 0. Nu s ln y c gi tr ln hn 0, bt nh trn SM1.1 c gi tr logic ca bt cui cng c y ra. Nu s m ln y ln hn hoc bng 16 (t n), ln hn hoc bng 32 (t kp) khi dch chuyn th lnh s ch thc hin vi s m ln y ln nht l 16 hoc 32. Lnh SRW (y cc bt t n sang phi) v SDR (y cc bt t kp sang phi) s chuyn gi tr 0 vo bt cao nht ca t hoc t kp ti mi ln y. Sau khi thc hin lnh, bt SM1.1 s c gi tr a bt th N-1 ca t n hoc t kp vi N l s ln y. Lnh SLW (y cc bt t n sang tri) v SRD (y cc bt t kp sang tri) s chuyn gi tr logic 0 vo bt thp nht ca t hoc t kp ti mi ln y. Sau khi thc hin lnh, bt SM1.1 s c gi tr ca bt th 16-N i vi t n hoc 32-N i vi t kp, trong N l s ln y. Bt bo kt qu 0 (bt SM1.0) s c gi tr logic bng 1 nu nh sau khi thc hin lnh y ni dung ca t n hay t kp bng 0. Khi s dng lnh quay cc bt ca t n hay t kp cn ch :

 Lnh quay thc hin php y vng trn sang tri hay phi cc bt ca mt t n hoc ca mt t kp. Ti mi ln quay, gi tr logic ca bt b y ra khi u ny cng l gi tr logic c a vo u kia ca t hay ca t kp. Lnh quay s khng thc hin nu nh s m ln quay c gi tr l 0 hay bng bi s ca 16 (vi t n) hoc 32 (vi t kp). i vi cc gi tr khc ca s m ln quay ln hn 16 (i vi t n) hoc 32 (i vi t kp), lnh s thc hin vi s m ln quay mi bng phn d ca s m ln quay c chia cho 16 hoc chia cho 32. Khi thc hin lnh quay sang phi RRW (vi t n) hay RRD (vi t kp), ti mi ln quay gi tr thp nht trong t hoc t kp c ghi vo bt bo trn SM1.1. Sau khi lnh c thc hin xong bt SM1.1 s c gi tr logic bt 16-N ca t n hoc 32-N ca t kp, trong N l s m ln quay. Khi thc hin lnh quay sang tri RLW (vi t n) hay RLD (vi t kp) ti mi ln quay, gi tr logic ca bt cao nht trong t hoc t kp c ghi vo bt bo trn SM1.1. Sau khi lnh c thc hin xon bt SM1.1 s c gi tr logic bt th N-1 trong t n hoc t kp, trong N l s m ln quay (mi). Bt bo kt qu 0 (bt SM1.0) s c gi tr logic 1 nu t hay t kp c quay c gi tr bng 0.
1 Lnh SHR_R:

L lnh dch chuyn cc bt ca t n IN sang phi N v tr, trong N c gi l s m ln dch chuyn. Ti mi ln dch chuyn, gi tr logic 0 c a vo bt cao (bt th 15) v gi tr logic ca bt thp (bt 0) c chuyn vo bt bo trn SM1.1. Trong LAD kt qu c ghi vo OUT, cn trong STL kt qu vn nm trong IN. C php ca lnh nh sau:

LAD

STL

SHR EN IN N

W OUT

SRW IN

2 Lnh SHL_W:

L lnh dch chuyn cc bt ca t n IN sang tri n v tr, trong N c gi l s m ln dch chuyn. Ti mi ln dch chuyn, gi tr logic 0 c a vo bt thp (bt 0) v gi tr logic ca bt cao (bt th 15) c chuyn vo bt bo trn SM1.1. Trong LAD kt qu c ghi vo t OUT, cn trong STL kt qu vn nm trong IN. C php dng lnh ny nh sau:

8LAD SHL EN IN N W OUT

STL

SLW

IN

3 Lnh SHR_DW:

L lnh dch chuyn cc bt ca t kp IN sang phi N v tr vi N l s m ln dch chuyn. Ti mi ln dch chuyn, gi tr logic 0 c a vo bt cao (bt th 31) v gi tr ca bt thp (bt 0) c chuyn vo bt bo trn SM1.1. Trong LAD kt qu c ghi vo t kp OUT, cn trong STL kt qu vn nm trong IN. C php dng lnh dch chuyn ny nh sau:
LAD SHR EN IN N DW STL

SRD IN
OUT

4 Lnh SHL_DW:

L lnh dch chuyn cc bt ca t kp IN sang tri N v tr, trong N c gi l s m ln dch chuyn. Ti mi ln dch chuyn, gi tr logic 0 c a vo bt thp (bit 0) v gi tr logic ca bt cao (bt 31) c chuyn vo bt bo trn SM1.1 Trong LAD kt qu c ghi vo t kp OUT.

Trong STL kt qu vn nm trong IN. C php ca lnh ny nh sau:

LAD SHL EN IN N DW STL

SLD IN
OUT

5 Lnh ROR_W:

L lnh quay cc bt ca t n IN sang phi N ln, vi N c gi l s m ln quay. Ti mi ln quay, gi tr logic ca bt thp (bt 0) c chuyn vo bt bo trn SM1.1 va c ghi li vo bt cao (bt 15) ca t IN. Trong LAD kt qu c ghi vo t OUT. Trong STL kt qu vn nm trong IN. C php ca lnh ny nh sau:
LAD ROR EN IN N W OUT STL

RRW IN

Lnh ROR_DW

L lnh quay cc bt ca t kp IN sang phi N ln, trong N c gi l s ln quay. Ti mi ln quay, gi tr logic ca bt thp (bt 0) va c chuyn vo

bt bo trn SM1.1 va c chuyn vo bt cao (bt 31) ca t kp IN. Trong LAD kt qu c ghi vo t OUT. Cn trong STL kt qu vn nm trong IN. C php dng lnh ny nh sau:
LAD ROR EN IN N DW OUT STL

RRD IN

7 Lnh ROL-W:

L lnh quay cc bt ca t n IN sang tri N ln vi N l s m ln quay. Ti mi ln quay, gi tr logic ca bt cao (bt 15) va c chuyn vo bt bo trn SM1.1 va c ghi li vo bt thp ca t IN. Trong LAD kt qu c ghi vo t OUT. Trong STL kt qu vn nm trong IN C php dng lnh ny nh sau:
LAD ROL EN IN N W STL

RLW IN
OUT

8 Lnh ROL-DW

L lnh quay cc bt ca t kp IN sang tri N ln, trong N c gi l s m ln quay. Ti mi ln quay, gi tr logic ca bt cao (bt 31) va c chuyn vo bt bo trn SM1.1 va c ghi li vo bt thp (bt 0) ca t kp IN. Trong LAD kt qu c ghi vo t OUT. Trong STL kt qu vn nm trong IN C php dng lnh ny nh sau:
LAD ROL EN IN N DW RLD OUT IN N STL

9 Hm i d liu tng ng thanh ghi 7 nt

Hm SEG chuyn i s nguyn h c s Hexa trong khong 0 F sang thnh gi tr bit tng ng ca thanh ghi 7 nt. Hm SEG lp gi tr cc bit ca thanh ghi 7 nt tng ng vi ni dung ca 4 bit thp ca byte u vo IN. Kt qu c ghi co byte u ra OUT S cc bit ca thanh ghi 7 nt
S nguyn 0 1 Thanh ghi 7 nt -gfedcba 00111111 00000110 f e d a b g c

2 3 4 5 6 7 8 9 A B C D E F

01011011 01001111 01100110 01101101 0111111 00000111 01111111 01100111 01110111 01111100 00111001 01011110 01111001 01110001

LAD

STL ENCO IN OUT SEG EN IN OUT

Ton hng

IN (Byte):VB, IB, QB, MB, SMB, AC, *VD, *AC, hng s

OUT(byte): VB, IB, QB, MB, SMB, AC, *VD, *AC

.x ng h thi gian thc ng h ti gian thc ch c CPU 214. c th lm vic vi ng h thi gian thc CPU 214 cung cp hai lnh c v ghi gi tr cho ng h. Nhng gi tr

c c hoc ghi c vi ng h thi gian thc l cc gi tr v ngy, thnh, nm, v cc gi tr gi, phc, giy.Cc d liu c, ghi vi ng h thi gian thc trong LAD v trong STL c di mt byte v phi c m ha theo kiu s nh phn BCD.

Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Byte 7

Nm ( 0 99) Thng(0 12) Ngy (0 31) Gi (0 23) Phc (0 59) Giy (0 59) 0 0 ngy trong tun

Cc d liu hp l l:
Nm (yy) 0 99 Thng (mm) 1 12 Ngy (dd) 1 31 Gi (hh) 0 23 Pht (mm) 0 59 Giy (ss) 0 59

Ring gi tr v ngy trong tun l mt s tng ng vi ni dung ca nibble(4 bit) thp trong byte theo kiu:

Ch Th Th Th Th Th Th nht hai my t nm su by bin p 1 2 3 4 5 6 7

1 READ_RTC (LAD) TODR (STL)

Lnh c ni dung ca ng h thi gian thc vi b m 8 byte c ch th trong lnh bng ton hng T
2 SET_RTC (LAD)TODW (STL )

Lnh ghi ni ca b m 8 byte c ch th trong lnh bng ton hng T vo ng h thi gian thc. C php s dng lnh c, ghi d liu vi ng h thi gian thc trong LAD, STL:
LAD STL TODR T READ RTC EN T TODW T SET EN T RTC Ton hng

T(byte): VB, IB, QB, MB, SMB, *VD,9 *AC

Tuyt i khng s dng lnh TODR v lnh TODW ng thi va trong chng trnh chnh, va trong chng trnh x l ngt.Khi mt lnh TODR hay TODW c thc hin, th khi gi chng trnh x l ngt, cc lnh ln vic vi ng h thi gian thc trong chng trnh x l ngt s khng c thc hin na. Bit SM4.5 s c logic 1 trong nhung trng hp nh vy.