M U

thut vi iu khin hin nay rt pht trin rt mnh m, n c ng dng vo rt rt nhiu lnh vc t trong i sng sinh hot hng ngy(kha s, t lnh, ti vi, ...) cho ti cc lnh vc trong cng nghip cng nh trong qun s. Do c nhiu u im nh nh gn, kh nng lp trnh iu khin theo mun, gi thnh thp, c kh nng x l c nhiu cng vic ln vi iu khin tr thnh linh kin khng th thiu c trong cc thit b phc v con ngi chng ta. AVR l mt trong rt nhiu dng vi iu khin 8bit hin nay. N c ng dng rng ri trong lnh vc iu khin ng dng, lnh vc iu khin o lng, lnh vc iu khin t ng, lnh vc iu khin qung co .v.v Vi nhng kin thc c c v dng vi iu khin AVR em chn ti tt nghip: Thit k h thng o nhit s dng LM335. Mc tiu ca ti l kt hp vi iu khin AVR kt hp vi IC cm bin nhit thnh h thng o nhit .IC LM335 s cm bin nhit bn ngoi mi trng ( chuyn nhit thnh tn hiu in p) a n vi iu khin AVR x l ri hin th trn LCD 16x2. Ni dung ca n chia lm 3 chng : -, Chng 1: Tm hiu v mt s loi cm bin nhit thng dng v LM335 -, Chng 2: Tm hiu v vi iu khin AVR ,ngn ng C , phn mm WINavr v LCD 16x2. -, Chng 3: Thit k h thng o nhit x dng LM335.

Chng 1 Tm hiu v mt s loi cm bin thng dng v LM335

Trc tin ta cn bit cm bin l g: Cm bin l thit b dng o, m, cm nhn,cc i lng vt l khng in thnh cc tn hiu in. V d: Nhit l 1 i lng khng lin quan n in chng ta phi chuyn n v 1 i lng khc ( in tr, in p ) ph hp vi cc c cu in t. Nguyn l hot ng ca cm bin nhit : Nhit t mi trng s c cm bin hp thu, ti y ty theo c cu ca cm bin s bin i lng nhit ny thnh mt i lng in no ( in p, dng in..). Nh th mt yu t ht sc quan trng l nhit mi trng cn o v nhit cm nhn ca cm bin. C th iu ny l: Cc loi cm bin m ta trng thy n u l ci v bo v, phn t cm bin nm bn trong ci v ny ( bn dn, lng kim.) do vic o c chnh xc hay khng ty thuc vo vic truyn nhit t mi trng vo n phn t cm bin tn tht bao nhiu ( 1 trong nhng yu t quyt nh gi cm bin nhit ). . PHN LOI CM BIN NHIT. Cp nhit in ( Thermocouple ). Nhit in tr ( RTD-resitance temperature detector ) - PT100. Thermistor. Bn dn ( Diode, IC ,.). Ngoi ra cn c loi o nhit khng tip xc ( ha k- Pyrometer ). Dng hng ngoi hay lazer. 1. CP NHIT IN ( Thermocouples ). - Cu to: Gm 2 cht liu kim loi khc nhau, hn dnh mt u. - Nguyn l: Nhit thay i cho ra sc in ng thay i ( mV). - u im: Bn, o nhit cao. - Khuyt im: Nhiu yu t nh hng lm sai s. nhy khng cao. - Thng dng: L nhit, mi trng kht nghit, o nhit nht my nn, - Tm o: -100 D.C <1400 D.C

Gm 2 dy kim loi khc nhau c hn dnh 1 u gi l u nng ( hay u o), u cn li gi l u lnh ( hay l u chun ). Khi c s chnh lch nhit gia u nng v u lnh th s pht sinh 1 sc in ng V ti u lnh. Mt vn t ra l phi n nh v o c nhit u lnh, iu ny ty thuc rt ln vo cht liu. Do vy mi cho ra cc chng loi cp nhit , mi loi cho ra 1 sc in ng khc nhau: E, J, K, R, S, T. V th cn lu iu ny chn u d v b iu khin cho thch hp. Dy ca cp nhit in th khng di ni n b iu khin, yu t dn n khng chnh xc l ch ny, gii quyt iu ny chng ta phi b tr cho n ( offset trn b iu khin ). Lu khi s dng: T nhng yu t trn khi s dng loi cm bin ny chng ta lu l khng nn ni thm dy ( v tn hiu cho ra l mV ni s suy hao rt nhiu ). Cng dy ca cm bin nn thng thong ( ng cho cng dy ny dnh vo mi trng o ). Lu : V tn hiu cho ra l in p ( c cc m v dng ) do vy cn ch k hiu lp t vo b khuch i cho ng.

Hnh cp nhit in 2. NHIT IN TR ( RTD-resistane temperature detector ) - PT100

Cu to ca nhit in tr RTD Cu to ca RTD gm c dy kim loi lm t: ng, Nikel, Platinum,c qun ty theo hnh dng ca u o. Khi nhit thay i in tr gia hai u dy kim loi ny s thay i, v ty cht liu kim loi s c tuyn tnh trong mt khong nhit nht nh.Ph bin nht ca RTD l loi cm bin Pt, c lm t Platinum. Platinum c in tr sut cao, chng oxy ha, nhy cao, di nhit o c di. Thng c cc loi: 100, 200, 500,1000 ohm ti 0 D.C. in tr cng cao th nhy nhit cng cao.RTD thng c loi 2 dy, 3 dy v 4 dy. Lu khi s dng: Loi RTD 4 dy gim in tr dy dn i 1/2, gip hn ch sai s. Cch s dng ca RTD kh d chu hn so vi Thermocouple. Chng ta c th ni thm dy cho loi cm bin ny ( hn k, cht lng dy tt, c chng nhiu ) . V l bin thin in tr nn khng quan tm n chiu u dy. Ta s tm hiu k hn nguyn l o nhit ca Pt100 : Thit b o nhit Pt100 hay cn gi l can nhit Pt c cu to l mt in tr nhit (in tr thay i khi nhit thay i).in tr ny l mt dy kim loi c bc cc on s bao quanh ton b dy kim loi.Phn bao bc ny li c t trong mt ng bo v(thermowell) thng c dng hnh trn,ch a 2 u dy kim loi ra kt ni vi thit b chuyn i.Phn ng bo v s c t ni cn o nhit ,thng thng can nhit Pt100 ch o c nhit ti a l 600C. Hai u dy kim loi cha ra phn ng bo v c kt ni ti mt thit b gi l b chuyn i tn hiu nhit thnh tn hiu in phc v cho vic truyn ti phng iu khin gim st.Thit b chuyn i c cu to chng qua l mt cu in tr c mt nhnh chnh l Pt100(c in tr l 100 m 0 C) 3. THERMISTOR - Cu to: Lm t hn hp cc oxid kim loi: mangan, nickel, cobalt, - Nguyn l: Thay i in tr khi nhit thay i. - u im: Bn, r tin, d ch to. - Khuyt im: Dy tuyn tnh hp. - Thng dng: Lm cc chc nng bo v, p vo cun dy ng c, mch
4

in t. - Tm o: 50 <150 D.C.

Cu to Thermistor. Thermistor c cu to t hn hp cc bt ocid. Cc bt ny c ha trn theo t l v khi lng nht nh sau c nn cht v nung nhit cao. V mc dn in ca hn hp ny s thay i khi nhit thay i. C hai loi thermistor: H s nhit dng PTC- in tr tng theo nhit ; H s nhit m NTC in tr gim theo nhit . Thng dng nht l loi NTC. Thermistor ch tuyn tnh trong khong nhit nht nh 50-150 C do vy ngi ta t dng dng lm cm bin o nhit. Ch s dng trong cc mc ch bo v, ngt nhit, cc bc nh ta thng gi l Tt-mt. Ci Block lnh no cng c mt vi b gn cht vo cun dy ng c. Lu khi s dng: Ty vo nhit mi trng no m chn Thermistor cho thch hp, lu hai loi PTC v NTC .C th test d dng vi ng h VOM. Nn p cht vo b mt cn o. Trnh lm hng v bo v. V bin thin in tr nn khng quan tm chiu u dy.

Hnh thermistor.

4. IC BN DN - Cu to: Lm t cc loi cht bn dn. - Nguyn l: S phn cc ca cc cht bn dn b nh hng bi nhit . - u im: R tin, d ch to, nhy cao, chng nhiu tt, mch x l n gin. - Khuyt im: Khng chu nhit cao, km bn. - Thng dng: o nhit khng kh, dng trong cc thit b o, bo v cc mch in t. - Tm o: -50 <150 D.C.

Cm bin nhit Bn Dn l nhng loi cm bin c ch to t nhng cht bn dn. C cc loi nh Diode, Transistor, IC. Nguyn l ca chng l da trn mc phn cc ca cc lp P-N tuyn tnh vi nhit mi trng. Ngy nay vi s pht trin ca ngnh cng ngh bn dn cho ra i rt nhiu loi cm bin nhit vi s tch hp ca nhiu u im: chnh xc cao, chng nhiu tt, hot ng n nh, mch in x l n gin, r tin,. Ta d dng bt gp cc cm bin loi ny di dng diode ( hnh dng tng t Pt100), cc loi IC nh: LM35, LM335, LM45. Nguyn l ca chng l nhit thay i s cho ra in p thay i. in p ny c phn p t mt in p chun c trong mch.

IC cm bin nhit LM35

Cm bin nhit dng Diode

Gn y c cho ra i IC cm bin nhit cao cp, chng h tr lun c chun

6

truyn thng I2C ( DS18B20 ) m ra mt xu hng mi trong th gii cm bin.

IC cm bin nhit DS18B20 Lu khi s dng: V c ch to t cc thnh phn bn dn nn cm bin nhit Bn Dn km bn, khng chu nhit cao. Nu vt ngng bo v c th lm hng cm bin. Cm bin bn dn mi loi ch tuyn tnh trong mt gii hn no , ngoi di ny cm bin s mt tc dng. Ht sc quan tm n tm o ca loi cm bin ny t c s chnh xc. Loi cm bin ny km chu ng trong mi trng khc nghit: m cao, ha cht c tnh n mn, rung sc va chm mnh. *, Trong phn ny ta s tm hiu k hn v IC LM335: .a, Temperature accuracy ( s chnh xc ca nhit o). LM335A Thng s in p ra Sai s nhit Sai s nhit Sai s vi 250C Sai s mc nhit max Tnh khng tuyn tnh iu kin TC=25 C, IR=1.5mA Tc=250C, IR=1mA Tc=250C, IR=1mA TMinTCTMax, IR=1mA Tc=TMax IR=1mA 0.3 1.5 0.3 1.5
0 0

LM335 n v

Min Typ Max Min typ Max 2.95 2.98 3.01 2.92 2.98 3.04 V 1 2 0.5 2 3 5 1 2 4 1 2 6 9 2
0

C C C C

.b, Thng s in LM335 Min Typ

7

Thng s

iu kin

Max

n v

in p ra vi dng thay i Tr khng H s u ra Thi gian n nh

400AIR5mA Ti 1 nhit c nh. IR=1mA Tc=1250C

3 0.6 +10 0.2

14

mV mV/0C
0

C/khr

.c. Cc cch kt ni LM335 trong mch

H1

H2
8

H3

H4 -, Trong H1: y l cch ghp ni c bn ca LM335 trong mch, LM335 s c mc ni tip vi ngun (5V) qua 1 in tr R. Khi mc kiu ny ta s thu c in p u ra bin thin 10mV/0K. -, Trong H2: ta c th mc ni tip 3 IC LM335 vi nhau ,ni tip vi in tr 6K v ngun 15V. Vi cch ny in p u ra bin thin trung bnh 30mV/0K. -,Trong H3 : ta c th mc ni tip LM335 vi in tr v ngun, ta c th iu chnh nc thang o ca LM335 ly chun in p bin thin u ra l 10mV/0K thng qua vic iu chnh bin tr 10K chn ADJ. -, Trong H4 : ta mc song song 3 IC LM335 vi nhau, ri mc ni tip vi ngun 15V qua in tr 6K. Vi cch ny ta thu c in p u ra bin thin 10mV/0K. *, Hnh dng ca LM335 thng thy trong thc t :

N c 3 chn chnh : 2 chn cp ngun v 1 chn out tn hiu Analog Khi ta cp in p 5V cho LM335 th nhit o c t cm bin s chuyn thnh in p tng ng ti chn s 2 (Vout). in p ny c t l vi gii nhit m n o c. Vi gii ca nhit u ra l 10mV/K. Hot ng trong gii in p t 0 cho n 5V v gii nhit o c t 0 oC n 100oC. V cn ch n nhng thng s chnh sau : + Hot ng chnh xc dng in u vo t 0.4mA n 5mA. Dng in u vo ngoi khong ny kt qu o s sai + in p cp vo n nh l 5V + Tr khng u ra thp 1 m + Gii nhit mi trng l t 0 n 100 C Nh vy LM335 n cho chng ta tn hiu tng t (Analog) v chng phi x l tn hiu ny thnh nhit .

Chng 2 Tm hiu v vi iu khin AVR ,ngn ng C,phn mm WINavr v LCD 16x2 1, Tm hiu v vi iu khin AVR.
1.1. Tng quan v dng vi iu khin AVR - Vi iu khin AVR do hng Atmel (Hoa K) sn xut c gi thiu ln u nm 1996. AVR c rt nhiu dng khc nhau bao gm dng Tiny AVR (nh AT tiny 13, AT tiny 22) c kch thc b nh nh, t b phn ngoi vi, ri n dng AVR (chn hn AT90S8535, AT90S8515,) c kch thc b nh vo loi trung bnh v mnh hn l dng Mega (nh ATmega32, ATmega128,) vi b nh c kch thc vi Kbyte n vi trm Kbye cng
10

vi cc b ngoi vi a dng c tch hp trn chip, cng c dng tch hp c b LCD trn chip (dng LCD AVR). Tc ca dng ATmega cng cao hn so vi cc dng khc. - S khc nhau c bn gia cc dng chnh l cu trc ngoi vi, cn nhn th vn nh nhau (hnh 1.1). t bit, nm 2008, Atmel li tip tc cho ra i dng AVR mi l XmegaAVR, vi nhng tnh nng mnh m cha tng c cc dng AVR trc . C th ni AVR l dng MCU 8 bit mnh m nht hin nay. Cc c im chnh: 1-Kin trc RISC vi hu ht cc lnh c chiu di c nh, truy nhp b nh np lu tr v 32 thanh nghi a nng. 2- C nhiu b phn ngoi vi ngay trn chip, bao gm: Cng v/ra s, b bin i ADC, b nh EEFROM, b nh thi, b iu ch rng xung (PWM),giao tip CAN, 3- Hu ht cc lnh u thc hin trong mt chu k xung nhp. 4- Hot ng vi chu k xung nhp cao, c th ln n 20 MHz tu thuc tng loi chp c th. 5- B nh chng trnh va b nh d liu c tch hp ngay trn chip. 6- Kh nng lp trnh c trong h thng, c th lp trnh c ngay khi ang c cp ngun trn bn mch khng cn phi nhc chp ra khi bn mch. 7- H tr cho vic lp trnh bng ngn ng bc cao ngn ng C.

11

Hnh 1.1. Cu trc dng AVR

1.2. Vi iu khin Atmega16 1.2.1. c im

16Kbytes b nh chng trnh dng flash c th Read-WhileWrite 512 bytes EEPROM. 1 Kbyte RAM tnh (SRAM). 32 ng kt ni I/O mc ch chung. 32 thanh ghi lm vic mc ch chung c ni trc tip vi n

v x l s hc v logic (ALU). Mt giao din JATG cho qut ngoi vi. Lp trnh v h tr g ri trn chip. 3 Timer/Counter linh hot vi cc ch so snh. Cc ngt ngoi v ngt trong (21 nguyn nhn ngt). Chun truyn d liu ni tip USART c th lp trnh.
12

 Mt ADC 10 bit, 8 knh vi cc knh u vo ADC c th la chn bng cch lp trnh. Mt Watchdog Timer c th lp trnh vi b to dao ng bn trong. Mt cng ni tip SPI ( serial peripheral interface). 6 ch tit kim nng lng c th la chn bng phn mm. La chn tn s hot ng bng phn mm. ng gi 40 chn kiu PDIP. Tn s ti a 16MHz. in th 4,5 5,5V. Vi iu khin ATmega16 c h tr lp trnh vi ngn ng lp trnh bc cao nh ngn ng lp trnh C. iu ny gip cho ngi s dng rt tin li trong vic lp trnh cho vi iu khin.1.2.2. S khi v cu trc

ca ATMEGA16. 1.2.2. S khi v cu trc ca vi iu khin ATMEGA 16.

13

Hnh 1.2. S khi ca Atmega16.

14

Hnh 1.3. S cu trc ca ATMEGA16.

- Phn ct li l AVR kt hp vi cc tp lnh a dng vi 32 thanh ghi a nng. 32 thanh ghi c kt ni trc tip vi b s hc ALU (Arthmetic Logic Unit), cho php truy cp 2 thanh ghi c lp trong mt lnh n c thc thi trong mt xung nhp. Cu trc ny mang li nhiu kh nng lp trnh c hiu qu cao t trn 10 ln nhanh hn b vi x l CISC (Complex Instruction Set Computer: my tnh c tp lnh phc tp) thng thng. - Atmega16 cung cp cc thng s c trng sau: b nh Flash 16kbyte lp trnh c ngay trn h thng vi kh nng c v ghi, EEPPROM 512byte, SRAM 1kbyte, 32 ng vo/ra a nng, 32 thanh ghi lm vic a nng, 1 giao din JTAG, vic lp trnh v p ng b d sai trn chip, 3 b Timer/Counter lm vic linh hot vi ch so snh, cc ngt ngoi v trong, 1 b USART lp trnh ni tip, 1 giao din ni tip 2 dy byte nh hng, 1 b chuyn ADC 8 knh 10 bit vi trng thi u vo vi sai vi li c th lp trnh, 1 b nh thi Watchdog c th lp trnh vi b dao ng bn trong, 1 cng ni tip SPI,
15

v 6 ch tit kim nng lng c th la chn nh phn mm. Ch ngh lm cho CPU ngng hot ng trong khi cho php b USART, b giao din 2 dy, b chuyn i A/D, SRAM, b Timer/Counter, cng SPI, v h thng ngt vn tip tc lm vic. Ch lm gim mc tiu th nng lng lu ni dung thanh ghi nhng li b dao ng hot ng, cm tt c cc chc nng khc trn chip cho n khi c tn hiu ngt ngoi k tip hoc tn hiu reset phn cng. ch tit kim nng lng, b Timer bt ng b vn tip tc hot ng v cho php ngi s dng vn tip tc duy tr 1 b nh thi c s trong khi cc thit b cn li trong ch ngh. Ch gim nhiu ADC lm cho CPU ngng hot ng v tt c cc mun vo/ra ngoi tr b Timer bt ng b v b ADC, nhiu ca vic chuyn mch t cc tiu trong sut qu trnh chuyn i ADC. Trong ch d phng, thch anh/b dao ng cng hng s hot ng trong khi cc thit b cn li trong ch ngh. iu ny cho php vic khi ng nhanh c kt hp vi vic tiu th nng lng thp. ch d phng bn ngoi, c hai b dao ng chnh v Timer bt ng b vn tip tc hot ng. - Cc thit b c ch to bi cng tuy Atmel s dng cng ngh b nh khng t mt d liu v c mt cao. B nh Flash ISP trn chip cho php b nh chng trnh c th lp trnh c ngay trn h thng qua 1 b giao din ni tip SPI hoc bng b np chng trnh vo b nh khng t mt d liu thng thng, hoc bng 1 chng trnh khi ng trn chip ang chy trong li AVR. Chng trnh boot c th s dng mt vi giao din ti chng trnh ng dng trong b nh Flash ng dng. Phn mm trong on Flash khi ng s tip tc hot ng trong khi on Flash khi ng c cp nht, cung cp hot ng c ghi mt cch chnh xc. Bng cch kt hp 1 CPU 8 bit theo cu trc RISC vi b nh Flash lp trnh ngay trn h thng trong mt chip n, ATmega16 ca Atmel l b vi iu khin mnh n p ng s linh hot cao v l gii php c gi tr hiu qu a nhiu ng dng iu khin vo.

16

1.2.3. S v chc nng cc chn

Hnh 1.4. S chn ATMEGA16

Port A (PA7 PA0) Port A l mt cng vo/ra 2 hng 8 bit, nu b chuyn i khng c dng. Chn Port c cc in tr ni ln ngun dng (c chn cho mi bit). Ng ra Port A c nhng c tnh iu khin i xng vi c hai kh nng chu ng ngun v nhit cao. Khi chn PA0 ti chn PA7 c s dng nh l ng vo v c t xung mc thp t bn ngoi, chng s l ngun dng nu cc in tr ni ln cc dng c kch hot. Port A cng c s dng khi mt tn hiu tng t ng vo n b chuyn i A/D. Cc chn ca Port A s c t trng thi 3 (tng tr cao) khi tn hiu reset mc tch cc ngay c khi tn hiu xung nhp khng hot ng. Port B (PB7 PB0) Port B l mt cng vo/ra 2 hng 8 bit vi cc in tr ko ln ngun dng bn trong (c chn cho mi bit). Ng ra Port B c nhng c tnh iu khin i xng vi c hai kh nng chu ng ngun v nhit cao. Cng nh cc chn ng vo, cc chn Port B c t xung mc thp t bn ngoi s l ngun dng nu cc in tr ni ln cc dng c kch hot. Cc chn Port B s c t trng thi th 3 khi tn hiu reset mc tch cc, ngay khi xung nhp khng hot ng.

17

Port C (PC7 PC0) Port C l mt cng vo/ra 2 hng 8 bit vi cc in tr ko ln ngun dng bn trong (c chn cho mi bit). Ng ra Port C c nhng c tnh iu khin i xng vi c hai kh nng chu ng ngun v nhit cao. Cng nh cc chn ng vo, cc chn Port C c t xung mc thp t bn ngoi s l ngun dng nu cc in tr ni ln cc dng c kch hot. Cc chn Port C s c t trng thi th 3 (tng tr cao) khi tn hiu reset mc tch cc, ngay khi xung nhp khng hot ng. Nu giao din JTAG c mc cho php, nhng in tr ko ln trn nhng chn PC5(TDI), PC3(TMS) v PC2(TCK) s c kch hot ngay c khi nu mt reset xut hin. Port D (PD7 PD0) Port D l mt cng vo/ra 2 hng 8 bit vi cc in tr ko ln ngun dng bn trong (c chn cho mi bit). Ng ra Port D c nhng c tnh iu khin i xng vi c hai kh nng chu ng ngun v nhit cao. Cng nh cc chn ng vo, cc chn Port D c t xung mc thp t bn ngoi s l ngun dng nu cc in tr ni ln cc dng c kch hot. Cc chn Port C s c t trng thi th 3 (tng tr cao) khi tn hiu reset mc tch cc, ngay khi xung nhp khng hot ng. VCC, GND, RESET, XTAL1, XTAL2, AVCC, AREF VCC: Ngun cung cp. GND: t.
RESET : Ng vo Reset. Mt mc thp trn chn ny di hn rng xung

ti thiu s to ra mt reset, ngay khi xung nhp khng hot ng. rng xung ti thiu l 1,5us. Xung ngn hn khng m bo to ra mt reset. XTAL1: Ng vo ca b khuch i dao ng o v mch to xung nhp bn trong. XTAL2: Ng ra ca b khuch i dao ng o. AVCC: l chn ngun cung cp cho Port A v b chuyn i A/D. N nn c kt ni ngoi ti VCC, ngay khi nu b ADC khng c dng. Nu b ADC c s dng th n c kt ni ti VCC thng qua mt mch lc thng thp. AREF: l chn tham chiu cho b chuyn i A/D.
18

1.2.4. T chc b nh ca ATMEGA16

tng ti a hiu sut v tnh tng thch, vi iu khin AVR s dng kin trc Havard tc l b nh d liu v b nh chng trnh tch bit nhau c v vng nh v ng bus. B nh chng trnh ca AVR l b nh Flash c dung lng 16kbyte. B nh chng trnh c rng bus l 16 bit. Nhng a ch u tin ca b nh chng trnh c dng cho bng vecto ngt c a ch t 0000H 0028H(gm 21 ngt). B nh chng trnh Flash c chia thnh 2 phn, phn chng trnh khi ng v phn chng trnh ng dng. C hai phn u dnh nhng bit kha cho vic bo v ghi v c/ghi. B nh d liu ca AVR chia lm 2 phn chnh l b nh SRAM v b nh EEPROM. Tuy cng l b nh d liu nhng hai b nh ny li nm tch bit nhau v c nh a ch ring. B nh SRAM c chia thnh 3 phn: Phn u l 32 thanh ghi chc nng chung (General Purpose Register ) R0 n R31 c a ch t $0000 ti $001F. Phn th 2 l khng gian nh vo ra vi 64 thanh ghi vo ra ( I/O Register ) c a ch t $0020 ti $005F. Phn th 3 c a ch t $0060 ti $045F l vng ca b nh SRAM ni c kch thc l 1Kbyte. B nh EEPROM: y l b nh d liu c th ghi xa ngay trong lc vi iu khin ang hot ng v khng b mt d liu khi ngun in cung cp b ct. C th v b nh d liu EEPROM ging nh l cng ( Hard disk ) ca my vi tnh. Vi vi iu khin ATmega16, b nh EEPROM c kch thc l 512byte. EEPROM c xem nh l mt b nh vo ra c nh a ch c lp vi SRAM, iu ny c ngha l ta cn s dng cc lnh in, out khi mun truy xut ti EEPROM. B nh c a ch t $000 ti $1FF.

19

B nh chng trnh
$0000

SRAM
$0000 32 thanh ghi $001F a nng $0020 64 thanh ghi $005F I/O $0060 $0000

EEPROM

16 bit

512 byte 8 bit

16 Kbyte

1024 byte SRAM ni 8 bit $045F

$01FF

$3FFF

Hnh 1.5. T chc b nh ca ATmega16

1.2.5. Mt s thanh ghi ca ATMEGA16 1. Status Register Thanh ghi trng thi Thanh ghi trng thi cha thng tin v kt qu thc hin ca hu ht cc lnh s hc. Cc thng tin ny c th c s dng iu khin chng trnh. Ch rng cc thanh ghi trng thi c cp nht sau tt c cc hot ng ca ALU. Trong nhiu trng hp, iu ny s b i nhng cn thit khi s dng cu lnh so snh chuyn dng, kt qu nhanh hn v on chng trnh ngn gn hn. Thanh ghi trng thi khng t ng lu tr khi ang nhp vo mt thng trnh ngt v lu tr khi tr v t mt ngt. iu ny phi c qun l bng phn mm. Thanh ghi trng thi AVR SREG - c nh ngha nh sau:

Bit 7 I: Global Interrupt Enable - bit cho php ngt ton cc.
20

Bit cho php ngt ton cc phi c t cho cc ngt c th hot ng. iu khin hot ng ca cc ngt ring bit c thc hin trong cc thanh ghi iu khin ring bit. Nu thanh ghi cho php ngt ton cc c xa, khng c mt ngt ring bit no c hot ng. Bit I c xa bi phn cng sau khi mt ngt xy ra v c t bi lnh RETI cho cc php cc ngt tip theo hot ng. Bit I cng c th c t v xa bi cu lnh SEI v CLI trong cc ng dng. Bit 6 T: Bit Copy Storage. Cc cu lnh copy bit BLD (Bit LoaD) v BST (Bit STore) s dng bit T nh l ch hoc ngun cho bit hot ng. 1 bit t mt thanh ghi trong tp thanh ghi c th c copy vo bit T bng lnh BST v mt bit trong T c th c copy vo 1 bit trong thanh ghi trong tp thanh ghi bng lng BLD. Bit 5 H: Half Carry Flag . C nh mt na dng cho cc ton hng hng mt na byte trong cc php ton s hc. C H s dng php ton s hc vi s BDC . Bit 4 S: Sign Bit, S = N V bit du. Bit S l php XOR gia c m v c trn V . Bit 3 V: Twos Complement Overflow Flag c trn m b 2. C trn V h tr php ton s b 2. Bit 2 N: Negative Flag c m. C m N hin th kt qu m ca php ton logic hoc s hc. Bit 1 Z: Zero Flag . C Zero Z hin th kt qu bng 0 ca php ton logic hoc s hc. Bit 0 C: Carry Flag. C nh C hin th s nh trong php ton logic hoc s hc. 2. Thanh ghi a ch EEPROM EEARH v EEARL

Bit 15..9 Res: Reserved Bits l cc bit th trong ATmega16 v lun lun c t mc [0]. Bit 8..0 EEAR8..0: EEPROM Address
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Thanh ghi a ch EEPROM EEARH v EEARL ch r a ch EEPROM trong khng gian EEPROM 512 byte. Nhng byte d liu EEPROM c nh a ch 0 511. Gi tr ban u ca EEAR th khng c nh ngha. Mt gi tr ring phi c vit trc khi EEPROM c th c truy xut. 3. Thanh ghi d liu EEPROM EEDR

Bit 7..0- EEDR7..0: D liu EEPROM i vi thao tc ghi ca EEPROM, thanh ghi d liu EEDR cha d liu c ghi ti EEPROM trong vng a ch c nh bi thanh EEAR. i vi thao tc c ca EEPROM, thanh ghi EEDR cha d liu c to ra EEPROM trong vng a ch c nh bi thanh ghi EEAR. 4. Thanh ghi iu khin EEPROM- EECR

Bit 7..4 - Res: Resserved Bits l nhng bt th ng. Cc bt ny lun c t mc [0]. Bit 3 - EERIE: EEPROM Ready Interrupt Enable Khi bit I trong thanh ghi SREG v EERIE c t ln [1], ngt EEPROM Ready c cho php v khi xo xung [0] th ngt b cm. Ngt EEPROM Ready pht ra mt ngt hng khi EEWE b xo xung [0]. Bit 2- EEMWE: EEPROM Master Write Enable Vic t EEMWE ln [1] sau vic thit lp EEWE s ch ghi d liu ln b nh EEPROM ti vng a ch c chn. Nu EEMWE b xo xung [0] th thit lp EEWE cng khng c tc dng g. Khi EEMWE c t ln [1] bng phn mm th phn cng s xo bit ny xung [0] sau 4 chu k xung nhp. Bit 1- EEWE: EEPROM Write Enable Khi a ch v d liu c ci t mt chnh xc, bit EEWE phi c thit lp ghi gi tr vo trong EEPROM. Khi mc logic [1] c t vo bit EEWE th bit EEMWE phi c thit lp, nu khng s khng thao tc ghi EEPROM c. Cc lnh ghi d liu b nh EEPROM c vit nh sau (bc 3 v 4 khng cn thit): 1. i cho n khi EEWE tr thnh [0].
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2. i cho n khi SPMEN SPMCR tr thnh [0]. 3. Ghi a ch EEPROM mi ti EEAR (khng bt buc). 4. Ghi d liu EEPROM mi ti EEDR (khng bt buc). 5. Ghi mc lgic [1] ti bit EEMWE trong khi ghi mc [0] ti EEWE thanh ghi EECR. 6. Trong vng bn chu k ng h sau khi EEMWE c thit lp, ghi lgic [1] ti EEWE. Bit 0 - EERE: EEPROM Read Enable Khi a ch chnh xc c ci t trong thanh ghi EEAR, bit EERE c ghi mc lgic [1] ti EEPROM kch c. Truy xut c EEPROM mt mt lnh v d liu yu cu c p ng ngay lp tc. Khi EEPROM c c, CPU tm ngh bn chu k xung trc khi lnh k tip c thc hin. Ngi s dng nn kim tra bit EEWE trc khi bt u thao tc c. Nu mt thao tc ghi c ang hot ng, n khng th c EEPROM, m cng khng thay i thanh ghi EEAR. 5. Thanh ghi iu khin MCUCR

Thanh ghi ny dng chn iu kin xy ra cc ngt ngoi INT0 v INT1. Cc bt ISCxx s c nhim v vi bt ISC1x s c tc ng ti ngt ngoi INT1 cn vi bt ISC0x s tc ng ti ngt ngoi INT0. C th s c trnh by nh sau:

ISCx1 ISCx0 iu kin xy ra ngt 0 1 0 1 0 0 1 1 Mc logic 0(thp) s xy ra ngt C s thay i mc logic s xy ra ngt Cnh xung ca tn hiu s xy ra ngt Cnh ln ca tn hiu s xy ra ngt

Vy ta c bn s la chn xy ra ngt ngoi, ty vo yu cu t ra m ta chn iu kin xy ra ngt.

23

Bt ISC2 cho php chn iu kin xy ra ngt ngoi INT2. ISC2 1 0 iu kin Cnh ln ca tn hiu s xy ra ngt Cnh xung ca tn hiu s xy ra ngt

6. Thanh ghi iu khin ngt ngoi GICR

Cc bit INT0, INT1, INT2 cho php cc ngt ngoi c xy ra hay khng. Cc ngt ngoi ch xy ra khi cc bt ny c t thnh 1 v ngt ton cc I c php. 7. Thanh ghi c ngt ngoi ngt ngoi GIFR

Cc bt INTF2, INTF1, INTF0 l cc c ngt ca cc ngt ngoi tng ng. Khi c tn hiu yu cu ngt ngoi th c ngt tng ng s c set thnh 1, nu ngt tng ng c cho php th MCU s nhy ti bng vc t ngt, c ngt s c xa khi chng trnh phc v ngt ( ISR ) c thc thi. Ngoi ra ta cng c set hay xa c ngt bng cch ghi trc tip mt gi tr logic vo n.

1.2.6. Chuyn i ADC trong AVR

C 4 thanh trong b ADC trn AVR trong c 2 thanh ghi data cha d liu sau khi chuyn i, 2 thanh ghi iu khin v cha trng thi ca ADC. -1, ADMUX (ADC Multiplexer Selection Register): l 1 thanh ghi 8 bit iu khin vic chn in p tham chiu, knh v ch hot ng ca ADC. Chc nng ca tng bit trn thanh ghi ny s c trnh by c th nh sau:

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Bit 7:6- REFS1:0 (Reference Selection Bits): l cc bit chn in p tham chiu cho ADC, 1 trong 3 ngun in p tham chiu c th c chn l: in p ngoi t chn VREF, in p tham chiu ni 2.56V hoc in p AVCC. Bng 2 tm tt gi tr cc bit v in p tham chiu tng ng.

Bng 2: Chn in p tham chiu

Bit 5-ADLAR (ADC Left Adjust Result): l bit cho php hiu chnh tri kt qu chuyn i. S d c bit ny l v ADC trn AVR c phn gii 10 bit, ngha l kt qu thu c sau chuyn i l 1 s c di 10 bit (ti a 1023), AVR b tr 2 thanh ghi data 8 bit cha gi tr sau chuyn i. Nh th gi tr chuyn i s khng lp y 2 thanh ghi data, trong mt s trng hp ngi dng mun 10 bit kt qu nm lch v pha tri trong khi cng c trng hp ngi dng mun kt qu nm v pha phi. Bit ADLAR s quyt nh v tr ca 10 bit kt qu trong 16 bit ca 2 thanh ghi data. Nu ADLAR=0 kt qu s c hiu chnh v pha phi (thanh ghi ADCL cha trn 8 bit thp v thanh ghi ADCH cha 2 bit cao trong 10 bit kt qu), v nu ADLAR=1 th kt qu c hiu chnh tri (thanh ghi ADCH cha trn 8 bit cao nht, cc bit t 9 n 2, v thanh ADCL cha 2 bit thp nht trong 10 bit kt qu (bn xem hnh cch b tr 2 thanh ghi ADCL v ADCH bn di hiu r hn). Bits 4:0-MUX4:0 (Analog Channel and Gain Selection Bits): l 5 bit cho php chn knh, ch v c h s khuych i cho ADC. Do b ADC trn AVR c nhiu knh v cho php thc hin chuyn i ADC kiu so snh (so snh in p gia 2 chn analog) nn trc khi thc hin chuyn i, chng ta cn set cc bit MUX chn knh v ch cn s dng. Bng 3 tm tt cc ch hot ng ca ADC thng qua cc gi tr ca cc bit MUX. Trong bng ny, ng vi cc gi tr t 00000 n 00111 (nh phn), cc knh ADC c chn ch n knh (tn hiu input ly trc tip t cc chn analog v so snh vi 0V), gi tr t 01000 n 11101 tng ng vi ch chuyn i so snh.

Bng 3: Chn ch chuyn i.

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- 2, ADCSRA (ADC Control and Status RegisterA): l thanh ghi chnh iu khin hot ng v cha trng thi ca module ADC.

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Tng bit ca thanh ghi ADCSRA c m t nh bn di:

Bit 7 - ADEN(ADC Enable): vit gi tr 1 vo bit ny tc bn cho php module ADC c s dng. Tuy nhin khi ADEN=1 khng c ngha l ADC hot ng ngay, bn cn set mt bit khc ln 1 bt u qu trnh chuyn i, l bit ADSC. Bit 6 - ADSC(ADC Start Conversion): set bit ny ln 1 l bt u khi ng qu trnh chuyn i. Trong sut qu trnh chuyn i, bit ADSC s c gi nguyn gi tr 1, khi qu trnh chuyn i kt thc (t ng), bit ny s c tr v 0. V vy bn khng cn v cng khng nn vit gi tr 0 vo bit ny bt k tnh hung no. thc hin mt chuyn i, thng thng chng ta s set bit ADEN=1 trc v sau set ADSC=1. Bit 4 ADIF(ADC Interrupt Flag): c bo ngt. Khi mt chuyn i kt thc, bit ny t ng c set ln 1, v th ngi dng cn kim tra gi tr bit ny trc khi thc hin c gi tr chuyn i m bo qu trnh chuyn i thc s hon tt. Bit 3 ADIE(ADC Interrupt Enable): bit cho php ngt, nu bit ny c set bng 1 v bit cho php ngt ton cc (bit I trong thanh ghi trng thi ca chip) c set, mt ngt s xy ra khi mt qu trnh chuyn i ADC kt thc v cc gi tr chuyn i c cp nht (cc gi tr chuyn i cha trong 2 thanh ghi ADCL v ADCH). Bit 2:0 ADPS2:0(ADC Prescaler Select Bits): cc bit chn h s chia xung nhp cho ADC. ADC, cng nh tt c cc module khc trn AVR, cn c gi nhp bng mt ngun xung clock. Xung nhp ny c ly t ngun xung chnh ca chip thng qua mt h s chia. Cc bit ADPS cho php ngi dng chn h s chia t ngun clock chnh n ADC. Tham kho bng 4 bit cch chn h s chia.

Bng 4: H s chia xung nhp cho ADC.

-3, ADCL v ADCH (ADC Data Register): 2 thanh ghi cha gi tr ca qu trnh chuyn i. Do module ADC trn AVR c phn gii ti a 10 bits nn cn 2 thanh ghi cha gi tr chuyn i. Tuy nhin tng s bt ca 2 thanh ghi 8 bit l 16, con s ny nhiu hn 10 bit ca kt qu chuyn i, v th
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chng ta c php chn cch ghi 10 bit kt qu vo 2 thanh ghi ny. Bit ADLAR trong thanh ghi ADMUX quy nh cch m kt qu c ghi vo. ADLAR=0:

ADLAR=1:

Thng thng, 2 thanh ghi data c sp xp theo nh dng ADLAR=0, ADCL cha 8 bit thp v 2 bit thp ca ADCH cha 2 bit cao nht ca gi tr thu c. Ch th t c gi tr t 2 thanh ghi ny, trnh c sai kt qu, bn cn c thanh ghi ADCL trc v ADCH sau, v sau khi ADCH c c, cc thanh ghi data c th c cp nht gi tr tip theo. - SFIOR(Special FunctionIO Register C): thanh ghi chc nng c bit, 3 bit cao trong thanh ghi ny quy nh ngun kch ADC nu ch Auto Trigger c s dng. l cc bit ADTS2:0 (Auto Trigger Source 2:0). Cc loi ngun kch c trnh by trong bng 5.

Bng 5: Ngun kch ADC trong ch Auto Trigger.

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2. LCD 16x2.
2.1, Tm hiu v LCD 16x2
LCD s dng trong ti l loi 2 dng v 16 ct, cho php hin hin th cng lc 32 k t. Vi 14 chn iu khin v 2 chn m rng, s chn c ch ra hnh.

Hnh nh thc t LCD16x2. Bng 1.1 M t cc chn ca LCD: S th t Tn 1 2 3 Vss Vcc Vee ngha t

V tr cc chn v tn chn tng ng.

Cung cp ngun +5V iu khin tng phn 0 = u vo l lnh

RS 1 = u vo l d liu 0 = ghi ti LCD

R/W 1 = c t LCD

6 7 8

EN D0 D1

Chn cho php ng d liu 0 (LSB) ng d liu 1

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9 10 11 12 13 14

D2 D3 D4 D5 D6 D7

ng d liu 2 ng d liu 3 ng d liu 4 ng d liu 5 ng d liu 6 ng d liu 7 (MSB)

.a, T chc b nh ca LCD16x2(HD44780U)

LCD HD44780U c 3 loi b nh: DDRAM DDRAM l b nh tm cha cc k t cn hin th ln LCD, b nh ny gm c 80 c chia thnh 2 hng, mi c rng 8 bit v c nh s t 0 n 39 cho dng 1; t 64 n 103 cho dng 2. Mi nh tng ng vi 1 trn mn hnh LCD. Nh chng ta bit LCD loi 16x2 c th hin th ti a 32 k t (c 32 hin th), v th c mt s nh ca DDRAM khng c s dng lm cc hin th. hiu r hn chng ta tham kho hnh bn di.

Hnh 1.14. T chc ca DDRAM. Ch c 16 nh c a ch t 0 n 15 v 16 a ch t 64 n 79 l c hin th trn LCD. V th mun hin th mt k t no trn LCD chng ta cn vit k t vo DDRAM 1 trong 32 a ch trn. Cc k t nm ngoi 32 nh trn s khng c hin th, tuy nhin vn khng b mt i, chng c th c dng cho cc mc ch khc nu cn thit. CGROM CGROM l vng nh c nh cha nh ngha font cho cc k t. Chng ta khng trc tip truy xut vng nh ny m chip HD44780U s t thc hin
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khi c yu cu c font hin th. Mt iu ng lu l a ch font ca mi k t vng nh CGROM chnh l m ASCII ca k t . V d k t a c m ASCII l 97, tham kho t chc ca vng nh CGROM trong hnh 4 bn s nhn thy a ch font ca a c 4 bit thp l 0001 v 4 bit cao l 0110. CGROM v DDRAM c t ng phi hp trong qu trnh hin th ca LCD. Gi s chng ta mun hin th k t a ti v tr u tin, dng th 2 ca LCD th cc bc thc hin s nh sau: trc ht chng ta bit rng v tr u tin ca dng 2 c a ch l 64 trong b nh DDRAM, v th chng ta s ghi vo nh c a ch 64 mt gi tr l 97 (m ASCII ca k t a). Tip theo, chip HD44780U c gi tr 97 ny v coi nh l a ch ca vng nh CGROM, n s tm n vng nh CGROM c a ch 97 v c bng font c nh ngha sn y, sau xut bn font ny ra cc chm trn mn hnh LCD ti v tr u tin ca dng 2 trn LCD. y chnh l cch m 2 b nh DDRAM v CGROM phi hp vi nhau hin th cc k t. Nh m t, cng vic ca ngi lp trnh iu khin LCD tng i n gin, l vit m ASCII vo b nh DDRAM ti ng v tr c yu cu, bc tip theo s do HD44780U m nhim. CGRAM CGRAM l vng nh cha cc symbol do ngi dng t nh ngha, mi symbol c c kch thc font 5x8 v c dnh cho 8 nh 8 bit. Cc symbol thng c nh ngha trc v c gi hin th khi cn thit. Vng ny c tt c 64 nh nn c ti a 8 symbol c th c nh ngha.

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Hnh 1.15. Vng nh CGROM.

.b. Thanh ghi ch th v thanh ghi d liu.

L 2 thanh ghi 8 bit trong b iu khin HD44780. Thanh ghi ch th lnh (instruction register) cha cc lnh c gi t vi iu khin iu khin LCD nh lnh dch LCD, xa LCD, a ch LCD.v.v.. Thanh ghi d liu (data register) c s dng lu tr d liu hin th trn LCD. Khi tn hiu cho php gi ca LCD c xc nhn, d liu trn cc chn s c cht ti thanh ghi d liu v d liu ny sau s c t ng chuyn ti DDRAM v sau s hin th ln LCD.
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Lnh v ch th: Ch c thanh ghi ch th (instruction register) v thanh ghi d liu (data register) ca LCD mi c th iu khin c bng vi iu khin. S hot ng bn trong ca LCD c xc nh bng cc tn hiu c gi n t MCU. Nhng tn hiu bao gm: tn hiu la chon thanh ghi, tn hiu c/ghi, v d liu trn bus (D0 ti D7), c 4 loi lnh ca LCD l: Ch r chc nng ca LCD nh nh dng hin th, di d liu Thit lp a ch RAM trong. Thc hin truyn d liu vi RAM trong. Thc hin mt s chc nng khc. Bng1.2. Danh sch cc lnh thng xuyn s dng khi lm vic vi LCD. M lnh (hex) 0x30 0x38 0x20 0x28 0x08 0x0E 0x0C 0x0F 0x18 0x1C 0x10 M lnh (decimal) 48 56 32 40 8 14 12 15 24 30 16

S th t

Ch th Thit lp : 8 bit, 1 dng, 5x7 im Thit lp : 8 bit, 2 dng, 5x7 im Thit lp : 4 bit, 1 dng, 5x7 im Thit lp : 4 bit, 2 dng, 5x7 im Tt hin th, tt con tr Bt hin th, bt con tr Bt hin th, tt con tr Bt hin th, nhp nhy con tr Dch hin th sang tri Dch hin th sang phi Di chuyn con tr sang tri 1 k t

1 2 3 4 5 6 7 8 9 10 11

33

12

Dich chuyn con tr sang phi 1 k t Xa him th ng thi cng xa ni dung trong DDRAM Thit lp a ch DDRAM hoc v tr con tr hin th Thit lp a ch CGRAM hoc ci t con tr ti vng CGRAM

0x14

20

13

0x01

14

0x80 + add 128 + add

15

0x40 + add 64 + add

.c, Ch giao tip vi LCD16x2. C 2 ch giao tip l ch 8 bit v ch 4 bt. Vi ch 8 bt chng ta cn s dng 8 chn ca vi iu khin( cng 1 PORT) lm 8 chn d liu v phi s dng thm 3 chn ca vi iu khin na lm cc chn iu khin. Nh vy ta cn ti 11 chn ca vi iu khin giao tip vi 1 LCD, mt khc s lng chn ca vi iu khin rt hn ch do vy ch giao tip 8 bt t c s dng trong thc t. Vi ch 4 bt ta ch cn 4 chn ca vi iu khin v 3 chn vi iu khin lm cc chn a tn hiu iu khin ti LCD. Do vy ta ch mt c 7 chn ca vi iu khin giao tip vi LCD. ch ny th khi gi 1byte ti LCD ta phi chia lm hai ln l gi 4bit cao trc sau gi 4bit thp sau.Tuy nhin ch ny s tit kim chn ca vi iu khin giao tip vi LCD do ch ny hin ny c s dng rt rng di. .d, Mt s hm thao tc c bn vi LCD 1. Hm c c bn. Busy Flag (BF): l c ch th trng thi cho LCD. Khi gi 1 lnh hoc d liu ti LCD x l th c ny c bt (BF =1). Qu trnh kt thc c ny c xa v khng (BF = 0). c c c BF th iu kin l chn RS = 0 v chn R/W = 1, bit MSB ca d liu LCD (D7) cha gi tr nhn c ca BF. Khi BF = 1 c ngha l LCD ang bn v s khng nhn bt c lnh no, cn khi BF = 0 cho bit LCD sn sng nhn lnh hoc d liu x l. Khi gi lnh th BF hoc D7 ca LCD s nhn gi tr 1 thng bo LCD ang bn x l, qu trnh kt thc BF = 0. Cc bc sau ch ra qu trnh c c bn.
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 La chn thanh ghi lnh(RS = 0). La chn thao tc c(R/W = 1). Gi tn hiu cho php(E = 0, E =1). c c bn BF(c bit D7). .

Tuy nhin, ta c th ta khng phi c trc tip c bn(BF) m ta c th thay th bng mt on tr LCD x l xong cc lnh m n nhn t thit b iu khin. 2. Ghi lnh ti LCD Qu trnh gi lnh thc hin ging ht nh trong hm khi to c th xy dng hm con vi cc bc sau: Di chuyn d liu(lnh cn gi) ti cng ca LCD. La chn thanh ghi lnh(RS = 0). La chn thao tc ghi(R/W = 0). Gi tn hiu cho php(E = 0, E = 1) i cho LCD x l(ti khi c BF = 0). 3. Ghi d liu ti LCD Gi d liu n gin ch cn la chn thanh ghi d liu, cc cng vic khc hon ton ging vi thao tc gi lnh. c m t bng cc bc sau: Di chuyn d liu(d liu cn ghi) ti cng LCD. La chn thanh ghi d liu(RS = 1). La chn thao tc ghi(R/W = 0). Gi tn hiu cho php(E = 0, E = 1). i cho LCD x l.

4. Di chuyn v tr ca con tr thit lp v tr con tr trn LCD, cn gi ti a ch DDRAM . Bit Gi tr 7 6 5 4 3 2 1 0

1 AD6 AD5 AD4 AD3 AD2 AD1 AD0

Bit th 7 lun lun l 1(D7 = 1), cc bit t 0 ti 7 l a ch ca DDRAM. Nu mun t con tr ti v tr u tin tc dng 1 ct 1, th a ch s phi ghi l 0b10000000 hay 0x80. Vi LCD 2 dng 16 ct, a ch t 0x80 ti 0x8F cho php nhn thy trn dng 1 v t a ch t 0xC0 ti 0xCF nhn thy c trn dng 2, vng cn trng ca DDRAM vn c dng, tuy nhin s khng nhn thy c trn
35

LCD. kim tra iu ny cch n gin l xut 1 chui k t ln hn 16 v dch hin th th nhng k t khng c nhn thy s tr li t pha sau. Cch tnh a ch DDRAM(v tr ca con tr) nh sau: ADD = 128 + (x - 1) + 64(y - 1) Vi y l s hng, y = 1 hoc y = 2. x l s ct, x = 1- 16. VD : Mun di chuyn con tr ti v tr hng 2 ct 3(y = 2, x = 3) th : ADD = 128 + (3-1) +64(2-1) = 194 hay 0xC2.

2.2.Kt ni LCD vi AVR

.a, S kt ni.

36

.b, Trnh t giao tip vi LCD.

3, Ngn ng C.
Ngn ng vit chng trnh cho vi iu khin AVR thng rt a dng. T nhng ngn ng cp thp nh ASM ti nhng ngn ng cp cao nh basic, pascal, C & C++, ngn ng ha. Khi s dng ngn ng cp thp vit chng trnh gip ta c th hiu r cu trc ca vi iu khin tuy nhin li mt nhiu thi gian khi ta xy dng cc ng ln. Vi ngn ng bc cao c u im l gip ta xy dng cc chng trnh mt cch nhanh chng, rt ngn thi gian xy dng cc ng dng. Trong cc ngn ng bc cao th ngn ng C c s dng rt rng di trong lp trnh cho cc dng vi iu khin ni chung v dng AVR ni ring. Trnh bin dch gip ta dch cc file vit thnh ngn ng my np vo vi iu khin. Hin nay, c rt nhiu trnh bin dch cho vi iu khin AVR, mi trnh dch c th s dng mt hoc nhiu ngn ng vit nh WINavr; Codevision, ICCAVR, MikroC(C); Bacom, AvrFast(basic), Flowcode(ngn ng ha).
37

3.1. C bn v ngn ng C Ngn ng lp trnh C l ngn ng kh mnh v c nhiu ngi s dng. Lp trnh bng ngn ng cp cao nh C gip xy dng cc ng dng nhanh chng v d dng hn. Sau y s gii thiu mt cch c bn nht v cch vit chng trnh cho AVR s dng ngn ng C. Mt chng trnh C cho AVR thng bao gm nhng thn phn c bn nh: ch thch (comments), biu thc (expressions), cu lnh (statements), khi (blocks), cc ton t, cu trc iu khin (flow controls), hm (function). Ch thch (comments): Ch thch l nhng on trong chng trnh dng gii thch hay bnh phm nhng g ta lm trong chng trnh, phn ch thch khng c bin dch v vy n khng c bt k nh hng no dn hot ng ca chng trnh. C hai cch to phn ch thch trong C l ch thch theo tng dng bng cch t u dng ch thch du // v ch thch block bng cch kp on cn ch thch vo gia /**/. Tin x l (preprocessor): l mt tin ch ca ngng ng C, cc preprocessor c trnh bin dch x l trc tt c cc phn khc. Cc preprocessor c bt u bng du #, trong ngn ng C c hai preprocessor c s dng ph bin nht l #include v #define. Preprocessor #include dng ch nh 1 file c nh km trong qu trnh x l, v #define dng nh ngha mt chui thay th hoc 1 macro. Biu thc (expressions): l mt phn ca cc cu lnh, biu thc c th bao gm cc bin, cc ton t, gi hm. Biu thc tr v mt gi tr n. Biu thc khng phi l mt cu lnh hon chnh. Cu lnh (statements): l mt dng lnh hon chnh c th bao gm cc t kha (key words), cc biu thc cc cu lnh khc v c kt thc bng du ;. Khi (blocks): l s kt hp ca nhiu cu lnh cng thc hin mt nhim v no . Khi c kp gia hai du m khi v ng khi . Ton t (operators): l nhng k hiu bo cho trnh bin dch bit nhng nhim v cn thc hin(ton t i s, ton t logic v quan h ). Cu trc iu khin (flow controls): Cc cu trc iu khin cho php chng trnh thc hin ng theo tng ca ngi vit chng trnh. Cc cu trc iu khin thng dng trong lp trnh C: - If (iu kin) cu lnh; Nu iu kin l ng th thc hin cu lnh tip theo sau, cu lnh c th c vit cng dng hay dng sau t kha if. iu kin l mt biu thc bt k c th l s kt hp ca nhiu iu kin thng qua
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cc ton t quan h AND(&&), OR(||), iu kin c cho l ng khi n khc 0 . Trong trng hp cn thc thi nhiu cu lnh khi mt iu kin no tha mn ta c th t cc cu lnh trong mt khi: If (iu kin) Cu lnh 1; Cu lnh 2; - If (iu kin) cu lnh 1; else cu lnh 2;: Nu iu kin ng th thc hin cu lnh 1, nu khng ng th thc hin cu lnh 2. Vic t else v cc cu lnh trn cng 1 dng hay khc dng khng lm thay i ngha ca cu trc. Nu cn thc hin nhiu cu lnh th cc cu lnh cn c dt trong 1 khi: If (iu kin) Cu lnh 1; Cu lnh 2; Else Cu lnh 1; Cu lnh 2; - Trong trng hp c nhiu kh nng xy ra cho 1 biu thc (hay mt bin) vi mi kh nng li cn thc hin mt cng vic no , ta c th s dng cu trc switch: Switch (biu thc) Case hng _s_1: Cc cu lnh 1; Break; Case hng_s_2: Cc cu lnh 2; Break;
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Defaul: Cc cu lnh khc; Cu trc switch hot ng theo cch thc sau: u tin chng trnh tnh gi tr ca biu thc sau ln lt em so snh vi cc gi tr hng s t pha sau t kha case. Biu thc c gi tr bng hng s no th thc hin cc cu lnh trong case dn khi tm thy t kha break. C th t bao nhiu case ty . Nu gi tr ca biu thc khng tng ng vi cc hng s th chng trnh thc hin cc cu lnh trong phn defaul: (nu c phn ny). - Cu trc lp While: while (iu kin) cu lnh 1. ngha ca cu trc lp while l thc hin cu lnh 1 (hoc 1 khi cu lnh t trong du ) khi iu kin cn ng. - Cu trc lp for : for (biu thc 1; biu thc 2; biu thc 3) cu lnh. Trong biu thc 1 l biu thc khi to, biu thc 2 l iu kin, biu thc 3 l biu thc thc hin sau. Biu thc 1 c thc hin 1 ln sau chng trnh kim tra iu kin qua biu thc 2, nu iu kin ng cu lnh c thc hin, sau thc hin biu thc 3 ri li quay li kim tra iu kin. C nh vy ti khi iu kin khng cn ng na th chng trnh thot khi vng lp. Ch khi s dng vng lp for l cc biu thc trong cu trc for c th khng c nhng cc du ; th bt buc phi c. Hm (functions): Trong C c rt nhiu hm, mi hm dng thc hin mt chc nng c th. Cc hm trong C thng c thit k nh gn, c nhng hm phc tp ngi dng cn t to ra. Cc t kha (key words): T kha l nhng t quy nh ca ngn ng C nh tn cc kiu d liu (char, int, unsigned int, ); tn cc cu trc iu khin (if, while, for,). Cn ch khng c t tn bin trng vi t kha. Cc kiu d liu thng dng khi lp trnh C cho vi iu khin: Tn kiu d liu Char Unsigned char Signed char Int S byte 1 1 1 2 Khong d liu - 127 n 127 hoc 0 n 255 0 n 255 - 127 n 127 - 32767 n 32767

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Unsigned int Singed int Short int Unsigned short int Singed short int Long int Unsigned long int Singed long int Long long int Unsigned long long int Signed long long int

2 2 2 2 2 4 4 4 8 8 8

0 n 65353 - 32767 n 32767 - 32767 n 32767 0 n 65353 - 32767 n 32767 - 2147483647 n 2147483647 0 n 4294967295 - 2147483647 n 2147483647 - (2^63 1) n (2^63 1) 0 n (2^64 1 ) - (2^63 1) n (2^63 1)

4, Phn mm Win AVR

Win AVR l mt b phn mm m ngun m bao gm cc cng c cho dng vi iu khin AVR. Win AVR chy trn h iu hnh Windows, n bao gm cc cng c sau: -, Trnh bin dch avr-gcc :GNU GNC l trnh bin dch C .C++ pht tin bi cng ng m ngun m GNU ,AVR-gcc pht trin ring cho AVR . -, Chng trnh np chip AVRdude . -, Chng trnh g li AVR-gdb -, Programmer Notepad : Trnh bin dch code h tr nhiu ngn ng C, C++,CSS,JAVA -,Mfile: tin ch to cc file Makefile dng trong qu trnh bin dch code. Ct li ca Win AVR l trnh bin dch GNU-GCC v th vin avr-libc y l b cng c lp trnh C min ph duy nht cho AVR . C th ni b cng c ny gp phn khng nh gip cho gip cho chip AVR ngy cng tr ln ph bin .Win AVR lin tc c cp nht v hon thin bi rt nhiu ngi ,ngun ti liu v chng trnh vit mu bng cng c ny l rt ln

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Chng 3. Thit k h thng o nhit s dng LM335

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